2 piix4.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
5 Philip Edelbrock <phil@netroedge.com>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Serverworks OSB4, CSB5, CSB6
28 Note: we assume there can only be one device, with one SMBus interface.
31 #include <linux/config.h>
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/config.h>
35 #include <linux/pci.h>
36 #include <linux/kernel.h>
37 #include <linux/stddef.h>
38 #include <linux/sched.h>
39 #include <linux/ioport.h>
40 #include <linux/i2c.h>
41 #include <linux/init.h>
42 #include <linux/apm_bios.h>
47 const unsigned short mfr;
48 const unsigned short dev;
49 const unsigned char fn;
53 /* PIIX4 SMBus address offsets */
54 #define SMBHSTSTS (0 + piix4_smba)
55 #define SMBHSLVSTS (1 + piix4_smba)
56 #define SMBHSTCNT (2 + piix4_smba)
57 #define SMBHSTCMD (3 + piix4_smba)
58 #define SMBHSTADD (4 + piix4_smba)
59 #define SMBHSTDAT0 (5 + piix4_smba)
60 #define SMBHSTDAT1 (6 + piix4_smba)
61 #define SMBBLKDAT (7 + piix4_smba)
62 #define SMBSLVCNT (8 + piix4_smba)
63 #define SMBSHDWCMD (9 + piix4_smba)
64 #define SMBSLVEVT (0xA + piix4_smba)
65 #define SMBSLVDAT (0xC + piix4_smba)
67 /* count for request_region */
70 /* PCI Address Constants */
72 #define SMBHSTCFG 0x0D2
74 #define SMBSHDW1 0x0D4
75 #define SMBSHDW2 0x0D5
79 #define MAX_TIMEOUT 500
83 #define PIIX4_QUICK 0x00
84 #define PIIX4_BYTE 0x04
85 #define PIIX4_BYTE_DATA 0x08
86 #define PIIX4_WORD_DATA 0x0C
87 #define PIIX4_BLOCK_DATA 0x14
89 /* insmod parameters */
91 /* If force is set to anything different from 0, we forcibly enable the
94 module_param (force, int, 0);
95 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
97 /* If force_addr is set to anything different from 0, we forcibly enable
98 the PIIX4 at the given address. VERY DANGEROUS! */
99 static int force_addr = 0;
100 module_param (force_addr, int, 0);
101 MODULE_PARM_DESC(force_addr,
102 "Forcibly enable the PIIX4 at the given address. "
103 "EXTREMELY DANGEROUS!");
105 /* If fix_hstcfg is set to anything different from 0, we reset one of the
106 registers to be a valid value. */
107 static int fix_hstcfg = 0;
108 module_param (fix_hstcfg, int, 0);
109 MODULE_PARM_DESC(fix_hstcfg,
110 "Fix config register. Needed on some boards (Force CPCI735).");
112 static int piix4_transaction(void);
114 static unsigned short piix4_smba = 0;
115 static struct i2c_adapter piix4_adapter;
118 * Get DMI information.
120 static int __devinit ibm_dmi_probe(void)
123 extern int is_unsafe_smbus;
124 return is_unsafe_smbus;
130 static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
131 const struct pci_device_id *id)
135 /* match up the function */
136 if (PCI_FUNC(PIIX4_dev->devfn) != id->driver_data)
139 dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
141 if(ibm_dmi_probe()) {
142 dev_err(&PIIX4_dev->dev, "IBM Laptop detected; this module "
143 "may corrupt your serial eeprom! Refusing to load "
148 /* Determine the address of the SMBus areas */
150 piix4_smba = force_addr & 0xfff0;
153 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
154 piix4_smba &= 0xfff0;
155 if(piix4_smba == 0) {
156 dev_err(&PIIX4_dev->dev, "SMB base address "
157 "uninitialized - upgrade BIOS or use "
158 "force_addr=0xaddr\n");
163 if (!request_region(piix4_smba, SMBIOSIZE, "piix4-smbus")) {
164 dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n",
169 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
171 /* Some BIOS will set up the chipset incorrectly and leave a register
172 in an undefined state (causing I2C to act very strangely). */
175 dev_info(&PIIX4_dev->dev, "Working around buggy BIOS "
178 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
180 dev_info(&PIIX4_dev->dev, "Unusual config register "
182 dev_info(&PIIX4_dev->dev, "Try using fix_hstcfg=1 if "
183 "you experience problems\n");
187 /* If force_addr is set, we program the new address here. Just to make
188 sure, we disable the PIIX4 first. */
190 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
191 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
192 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
193 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
194 "new address %04x!\n", piix4_smba);
195 } else if ((temp & 1) == 0) {
197 /* This should never need to be done, but has been
198 * noted that many Dell machines have the SMBus
199 * interface on the PIIX4 disabled!? NOTE: This assumes
200 * I/O space and other allocations WERE done by the
201 * Bios! Don't complain if your hardware does weird
202 * things after enabling this. :') Check for Bios
203 * updates before resorting to this.
205 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
207 dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
208 "WARNING: SMBus interface has been "
209 "FORCEFULLY ENABLED!\n");
211 dev_err(&PIIX4_dev->dev,
212 "Host SMBus controller not enabled!\n");
213 release_region(piix4_smba, SMBIOSIZE);
219 if ((temp & 0x0E) == 8)
220 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
221 else if ((temp & 0x0E) == 0)
222 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
224 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
225 "(or code out of date)!\n");
227 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
228 dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp);
229 dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba);
234 /* Another internally used function */
235 static int piix4_transaction(void)
241 dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
242 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
243 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
246 /* Make sure the SMBus host is ready to start transmitting */
247 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
248 dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
249 "Resetting... \n", temp);
250 outb_p(temp, SMBHSTSTS);
251 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
252 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
255 dev_dbg(&piix4_adapter.dev, "Successfull!\n");
259 /* start the transaction by setting bit 6 */
260 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
262 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
265 temp = inb_p(SMBHSTSTS);
266 } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
268 /* If the SMBus is still busy, we give up */
269 if (timeout >= MAX_TIMEOUT) {
270 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
276 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
281 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
282 "locked until next hard reset. (sorry!)\n");
283 /* Clock stops and slave is stuck in mid-transmission */
288 dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
291 if (inb_p(SMBHSTSTS) != 0x00)
292 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
294 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
295 dev_err(&piix4_adapter.dev, "Failed reset at end of "
296 "transaction (%02x)\n", temp);
298 dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
299 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
300 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
305 /* Return -1 on error. */
306 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
307 unsigned short flags, char read_write,
308 u8 command, int size, union i2c_smbus_data * data)
313 case I2C_SMBUS_PROC_CALL:
314 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
316 case I2C_SMBUS_QUICK:
317 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
322 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
324 if (read_write == I2C_SMBUS_WRITE)
325 outb_p(command, SMBHSTCMD);
328 case I2C_SMBUS_BYTE_DATA:
329 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
331 outb_p(command, SMBHSTCMD);
332 if (read_write == I2C_SMBUS_WRITE)
333 outb_p(data->byte, SMBHSTDAT0);
334 size = PIIX4_BYTE_DATA;
336 case I2C_SMBUS_WORD_DATA:
337 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
339 outb_p(command, SMBHSTCMD);
340 if (read_write == I2C_SMBUS_WRITE) {
341 outb_p(data->word & 0xff, SMBHSTDAT0);
342 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
344 size = PIIX4_WORD_DATA;
346 case I2C_SMBUS_BLOCK_DATA:
347 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
349 outb_p(command, SMBHSTCMD);
350 if (read_write == I2C_SMBUS_WRITE) {
351 len = data->block[0];
356 outb_p(len, SMBHSTDAT0);
357 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
358 for (i = 1; i <= len; i++)
359 outb_p(data->block[i], SMBBLKDAT);
361 size = PIIX4_BLOCK_DATA;
365 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
367 if (piix4_transaction()) /* Error in transaction */
370 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
375 case PIIX4_BYTE: /* Where is the result put? I assume here it is in
376 SMBHSTDAT0 but it might just as well be in the
377 SMBHSTCMD. No clue in the docs */
379 data->byte = inb_p(SMBHSTDAT0);
381 case PIIX4_BYTE_DATA:
382 data->byte = inb_p(SMBHSTDAT0);
384 case PIIX4_WORD_DATA:
385 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
387 case PIIX4_BLOCK_DATA:
388 data->block[0] = inb_p(SMBHSTDAT0);
389 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
390 for (i = 1; i <= data->block[0]; i++)
391 data->block[i] = inb_p(SMBBLKDAT);
397 static u32 piix4_func(struct i2c_adapter *adapter)
399 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
400 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
401 I2C_FUNC_SMBUS_BLOCK_DATA;
404 static struct i2c_algorithm smbus_algorithm = {
405 .name = "Non-I2C SMBus adapter",
406 .id = I2C_ALGO_SMBUS,
407 .smbus_xfer = piix4_access,
408 .functionality = piix4_func,
411 static struct i2c_adapter piix4_adapter = {
412 .owner = THIS_MODULE,
413 .class = I2C_ADAP_CLASS_SMBUS,
414 .algo = &smbus_algorithm,
418 static struct pci_device_id piix4_ids[] = {
420 .vendor = PCI_VENDOR_ID_INTEL,
421 .device = PCI_DEVICE_ID_INTEL_82371AB_3,
422 .subvendor = PCI_ANY_ID,
423 .subdevice = PCI_ANY_ID,
427 .vendor = PCI_VENDOR_ID_SERVERWORKS,
428 .device = PCI_DEVICE_ID_SERVERWORKS_OSB4,
429 .subvendor = PCI_ANY_ID,
430 .subdevice = PCI_ANY_ID,
434 .vendor = PCI_VENDOR_ID_SERVERWORKS,
435 .device = PCI_DEVICE_ID_SERVERWORKS_CSB5,
436 .subvendor = PCI_ANY_ID,
437 .subdevice = PCI_ANY_ID,
441 .vendor = PCI_VENDOR_ID_SERVERWORKS,
442 .device = PCI_DEVICE_ID_SERVERWORKS_CSB6,
443 .subvendor = PCI_ANY_ID,
444 .subdevice = PCI_ANY_ID,
448 .vendor = PCI_VENDOR_ID_INTEL,
449 .device = PCI_DEVICE_ID_INTEL_82443MX_3,
450 .subvendor = PCI_ANY_ID,
451 .subdevice = PCI_ANY_ID,
455 .vendor = PCI_VENDOR_ID_EFAR,
456 .device = PCI_DEVICE_ID_EFAR_SLC90E66_3,
457 .subvendor = PCI_ANY_ID,
458 .subdevice = PCI_ANY_ID,
464 static int __devinit piix4_probe(struct pci_dev *dev,
465 const struct pci_device_id *id)
469 retval = piix4_setup(dev, id);
473 /* set up the driverfs linkage to our parent device */
474 piix4_adapter.dev.parent = &dev->dev;
476 snprintf(piix4_adapter.name, I2C_NAME_SIZE,
477 "SMBus PIIX4 adapter at %04x", piix4_smba);
479 if ((retval = i2c_add_adapter(&piix4_adapter))) {
480 dev_err(&dev->dev, "Couldn't register adapter!\n");
481 release_region(piix4_smba, SMBIOSIZE);
488 static void __devexit piix4_remove(struct pci_dev *dev)
491 i2c_del_adapter(&piix4_adapter);
492 release_region(piix4_smba, SMBIOSIZE);
497 static struct pci_driver piix4_driver = {
498 .name = "piix4-smbus",
499 .id_table = piix4_ids,
500 .probe = piix4_probe,
501 .remove = __devexit_p(piix4_remove),
504 static int __init i2c_piix4_init(void)
506 return pci_module_init(&piix4_driver);
509 static void __exit i2c_piix4_exit(void)
511 pci_unregister_driver(&piix4_driver);
514 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
515 "Philip Edelbrock <phil@netroedge.com>");
516 MODULE_DESCRIPTION("PIIX4 SMBus driver");
517 MODULE_LICENSE("GPL");
519 module_init(i2c_piix4_init);
520 module_exit(i2c_piix4_exit);