1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
3 * Copyright (C) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 I2C Controller
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/sched.h>
32 #include <linux/delay.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/device.h>
37 #include <asm/hardware.h>
41 #include <asm/hardware/clock.h>
42 #include <asm/arch/regs-gpio.h>
43 #include <asm/arch/regs-iic.h>
44 #include <asm/arch/iic.h>
46 /* i2c controller state */
48 enum s3c24xx_i2c_state {
58 wait_queue_head_t wait;
65 enum s3c24xx_i2c_state state;
71 struct resource *ioarea;
72 struct i2c_adapter adap;
75 /* default platform data to use if not supplied in the platform_device
78 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
83 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
86 /* s3c24xx_i2c_is2440()
88 * return true is this is an s3c2440
91 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
93 struct platform_device *pdev = to_platform_device(i2c->dev);
95 return !strcmp(pdev->name, "s3c2440-i2c");
99 /* s3c24xx_i2c_get_platformdata
101 * get the platform data associated with the given device, or return
102 * the default if there is none
105 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
107 if (dev->platform_data != NULL)
108 return (struct s3c2410_platform_i2c *)dev->platform_data;
110 return &s3c24xx_i2c_default_platform;
113 /* s3c24xx_i2c_master_complete
115 * complete the message and wake up the caller, using the given return code,
116 * or zero to mean ok.
119 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
121 dev_dbg(i2c->dev, "master_complete %d\n", ret);
133 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
137 tmp = readl(i2c->regs + S3C2410_IICCON);
138 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
142 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
146 tmp = readl(i2c->regs + S3C2410_IICCON);
147 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
151 /* irq enable/disable functions */
153 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
157 tmp = readl(i2c->regs + S3C2410_IICCON);
158 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
161 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
165 tmp = readl(i2c->regs + S3C2410_IICCON);
166 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
170 /* s3c24xx_i2c_message_start
172 * put the start of a message onto the bus
175 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
178 unsigned int addr = (msg->addr & 0x7f) << 1;
180 unsigned long iiccon;
183 stat |= S3C2410_IICSTAT_TXRXEN;
185 if (msg->flags & I2C_M_RD) {
186 stat |= S3C2410_IICSTAT_MASTER_RX;
189 stat |= S3C2410_IICSTAT_MASTER_TX;
191 // todo - check for wether ack wanted or not
192 s3c24xx_i2c_enable_ack(i2c);
194 iiccon = readl(i2c->regs + S3C2410_IICCON);
195 writel(stat, i2c->regs + S3C2410_IICSTAT);
197 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
198 writeb(addr, i2c->regs + S3C2410_IICDS);
200 // delay a bit and reset iiccon before setting start (per samsung)
202 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
203 writel(iiccon, i2c->regs + S3C2410_IICCON);
205 stat |= S3C2410_IICSTAT_START;
206 writel(stat, i2c->regs + S3C2410_IICSTAT);
209 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
211 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
213 dev_dbg(i2c->dev, "STOP\n");
215 /* stop the transfer */
216 iicstat &= ~ S3C2410_IICSTAT_START;
217 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
219 i2c->state = STATE_STOP;
221 s3c24xx_i2c_master_complete(i2c, ret);
222 s3c24xx_i2c_disable_irq(i2c);
225 /* helper functions to determine the current state in the set of
226 * messages we are sending */
230 * returns TRUE if the current message is the last in the set
233 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
235 return i2c->msg_idx >= (i2c->msg_num - 1);
240 * returns TRUE if we this is the last byte in the current message
243 static inline int is_msglast(struct s3c24xx_i2c *i2c)
245 return i2c->msg_ptr == i2c->msg->len-1;
250 * returns TRUE if we reached the end of the current message
253 static inline int is_msgend(struct s3c24xx_i2c *i2c)
255 return i2c->msg_ptr >= i2c->msg->len;
258 /* i2s_s3c_irq_nextbyte
260 * process an interrupt and work out what to do
263 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
269 switch (i2c->state) {
272 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
277 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
278 s3c24xx_i2c_disable_irq(i2c);
282 /* last thing we did was send a start condition on the
283 * bus, or started a new i2c message
286 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
287 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
288 /* ack was not received... */
290 dev_err(i2c->dev, "ack was not received\n" );
291 s3c24xx_i2c_stop(i2c, -EREMOTEIO);
295 if (i2c->msg->flags & I2C_M_RD)
296 i2c->state = STATE_READ;
298 i2c->state = STATE_WRITE;
300 /* terminate the transfer if there is nothing to do
301 * (used by the i2c probe to find devices */
303 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
304 s3c24xx_i2c_stop(i2c, 0);
308 if (i2c->state == STATE_READ)
311 /* fall through to the write state, as we will need to
312 * send a byte as well */
315 /* we are writing data to the device... check for the
316 * end of the message, and if so, work out what to do
320 if (!is_msgend(i2c)) {
321 byte = i2c->msg->buf[i2c->msg_ptr++];
322 writeb(byte, i2c->regs + S3C2410_IICDS);
324 } else if (!is_lastmsg(i2c)) {
325 /* we need to go to the next i2c message */
327 dev_dbg(i2c->dev, "WRITE: Next Message\n");
333 /* check to see if we need to do another message */
334 if (i2c->msg->flags & I2C_M_NOSTART) {
336 if (i2c->msg->flags & I2C_M_RD) {
337 /* cannot do this, the controller
338 * forces us to send a new START
339 * when we change direction */
341 s3c24xx_i2c_stop(i2c, -EINVAL);
347 /* send the new start */
348 s3c24xx_i2c_message_start(i2c, i2c->msg);
349 i2c->state = STATE_START;
355 s3c24xx_i2c_stop(i2c, 0);
360 /* we have a byte of data in the data register, do
361 * something with it, and then work out wether we are
362 * going to do any more read/write
365 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
366 !(is_msglast(i2c) && is_lastmsg(i2c))) {
368 if (iicstat & S3C2410_IICSTAT_LASTBIT) {
369 dev_dbg(i2c->dev, "READ: No Ack\n");
371 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
376 byte = readb(i2c->regs + S3C2410_IICDS);
377 i2c->msg->buf[i2c->msg_ptr++] = byte;
380 if (is_msglast(i2c)) {
381 /* last byte of buffer */
384 s3c24xx_i2c_disable_ack(i2c);
386 } else if (is_msgend(i2c)) {
387 /* ok, we've read the entire buffer, see if there
388 * is anything else we need to do */
390 if (is_lastmsg(i2c)) {
391 /* last message, send stop and complete */
392 dev_dbg(i2c->dev, "READ: Send Stop\n");
394 s3c24xx_i2c_stop(i2c, 0);
396 /* go to the next transfer */
397 dev_dbg(i2c->dev, "READ: Next Transfer\n");
408 /* acknowlegde the IRQ and get back on with the work */
411 tmp = readl(i2c->regs + S3C2410_IICCON);
412 tmp &= ~S3C2410_IICCON_IRQPEND;
413 writel(tmp, i2c->regs + S3C2410_IICCON);
420 * top level IRQ servicing routine
423 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id,
424 struct pt_regs *regs)
426 struct s3c24xx_i2c *i2c = dev_id;
427 unsigned long status;
430 status = readl(i2c->regs + S3C2410_IICSTAT);
432 if (status & S3C2410_IICSTAT_ARBITR) {
433 // deal with arbitration loss
434 dev_err(i2c->dev, "deal with arbitration loss\n");
437 if (i2c->state == STATE_IDLE) {
438 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
440 tmp = readl(i2c->regs + S3C2410_IICCON);
441 tmp &= ~S3C2410_IICCON_IRQPEND;
442 writel(tmp, i2c->regs + S3C2410_IICCON);
446 /* pretty much this leaves us with the fact that we've
447 * transmitted or received whatever byte we last sent */
449 i2s_s3c_irq_nextbyte(i2c, status);
456 /* s3c24xx_i2c_set_master
458 * get the i2c bus for a master transaction
461 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
463 unsigned long iicstat;
466 while (timeout-- > 0) {
467 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
469 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
475 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
476 __raw_readl(S3C2410_GPEDAT));
481 /* s3c24xx_i2c_doxfer
483 * this starts an i2c transfer
486 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg msgs[], int num)
488 unsigned long timeout;
491 ret = s3c24xx_i2c_set_master(i2c);
493 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
498 spin_lock_irq(&i2c->lock);
504 i2c->state = STATE_START;
506 s3c24xx_i2c_enable_irq(i2c);
507 s3c24xx_i2c_message_start(i2c, msgs);
508 spin_unlock_irq(&i2c->lock);
510 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
514 /* having these next two as dev_err() makes life very
515 * noisy when doing an i2cdetect */
518 dev_dbg(i2c->dev, "timeout\n");
520 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
522 /* ensure the stop has been through the bus */
532 * first port of call from the i2c bus code when an message needs
533 * transfering across the i2c bus.
536 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
537 struct i2c_msg msgs[], int num)
539 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
543 for (retry = 0; retry < adap->retries; retry++) {
545 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
550 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
558 /* i2c bus registration info */
560 static struct i2c_algorithm s3c24xx_i2c_algorithm = {
561 .name = "S3C2410-I2C-Algorithm",
562 .master_xfer = s3c24xx_i2c_xfer,
565 static struct s3c24xx_i2c s3c24xx_i2c = {
566 .lock = SPIN_LOCK_UNLOCKED,
567 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
569 .name = "s3c2410-i2c",
570 .algo = &s3c24xx_i2c_algorithm,
575 /* s3c24xx_i2c_calcdivisor
577 * return the divisor settings for a given frequency
580 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
581 unsigned int *div1, unsigned int *divs)
583 unsigned int calc_divs = clkin / wanted;
584 unsigned int calc_div1;
586 if (calc_divs > (16*16))
591 calc_divs += calc_div1-1;
592 calc_divs /= calc_div1;
602 return clkin / (calc_divs * calc_div1);
607 * test wether a frequency is within the acceptable range of error
610 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
612 int diff = freq - wanted;
614 return (diff >= -2 && diff <= 2);
617 /* s3c24xx_i2c_getdivisor
619 * work out a divisor for the user requested frequency setting,
620 * either by the requested frequency, or scanning the acceptable
621 * range of frequencies until something is found
624 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
625 struct s3c2410_platform_i2c *pdata,
626 unsigned long *iicon,
629 unsigned long clkin = clk_get_rate(i2c->clk);
631 unsigned int divs, div1;
635 clkin /= 1000; /* clkin now in KHz */
637 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
638 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
640 if (pdata->bus_freq != 0) {
641 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
643 if (freq_acceptable(freq, pdata->bus_freq/1000))
647 /* ok, we may have to search for something suitable... */
649 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
650 end = pdata->min_freq;
657 for (; start > end; start--) {
658 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
659 if (freq_acceptable(freq, start))
663 /* cannot find frequency spec */
670 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
676 * initialise the controller, set the IO lines and frequency
679 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
681 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
682 struct s3c2410_platform_i2c *pdata;
685 /* get the plafrom data */
687 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
689 /* inititalise the gpio */
691 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
692 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
694 /* write slave address */
696 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
698 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
700 /* we need to work out the divisors for the clock... */
702 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
703 dev_err(i2c->dev, "cannot meet bus frequency required\n");
707 /* todo - check that the i2c lines aren't being dragged anywhere */
709 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
710 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
712 writel(iicon, i2c->regs + S3C2410_IICCON);
714 /* check for s3c2440 i2c controller */
716 if (s3c24xx_i2c_is2440(i2c)) {
717 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
719 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
725 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
727 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
728 clk_disable(i2c->clk);
734 if (i2c->regs != NULL) {
739 if (i2c->ioarea != NULL) {
740 release_resource(i2c->ioarea);
748 * called by the bus driver when a suitable device is found
751 static int s3c24xx_i2c_probe(struct device *dev)
753 struct platform_device *pdev = to_platform_device(dev);
754 struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
755 struct resource *res;
758 /* find the clock and enable it */
761 i2c->clk = clk_get(dev, "i2c");
762 if (IS_ERR(i2c->clk)) {
763 dev_err(dev, "cannot get clock\n");
768 dev_dbg(dev, "clock source %p\n", i2c->clk);
771 clk_enable(i2c->clk);
773 /* map the registers */
775 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
777 dev_err(dev, "cannot find IO resource\n");
782 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
785 if (i2c->ioarea == NULL) {
786 dev_err(dev, "cannot request IO\n");
791 i2c->regs = ioremap(res->start, (res->end-res->start)+1);
793 if (i2c->regs == NULL) {
794 dev_err(dev, "cannot map IO\n");
799 dev_dbg(dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
801 /* setup info block for the i2c core */
803 i2c->adap.algo_data = i2c;
804 i2c->adap.dev.parent = dev;
806 /* initialise the i2c controller */
808 ret = s3c24xx_i2c_init(i2c);
812 /* find the IRQ for this unit (note, this relies on the init call to
813 * ensure no current IRQs pending
816 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
818 dev_err(dev, "cannot find IRQ\n");
823 ret = request_irq(res->start, s3c24xx_i2c_irq, SA_INTERRUPT,
827 dev_err(dev, "cannot claim IRQ\n");
833 dev_dbg(dev, "irq resource %p (%ld)\n", res, res->start);
835 ret = i2c_add_adapter(&i2c->adap);
837 dev_err(dev, "failed to add bus to i2c core\n");
841 dev_set_drvdata(dev, i2c);
843 dev_info(dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
847 s3c24xx_i2c_free(i2c);
852 /* s3c24xx_i2c_remove
854 * called when device is removed from the bus
857 static int s3c24xx_i2c_remove(struct device *dev)
859 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
862 s3c24xx_i2c_free(i2c);
863 dev_set_drvdata(dev, NULL);
870 static int s3c24xx_i2c_resume(struct device *dev, u32 level)
872 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
874 if (i2c != NULL && level == RESUME_ENABLE) {
875 dev_dbg(dev, "resume: level %d\n", level);
876 s3c24xx_i2c_init(i2c);
883 #define s3c24xx_i2c_resume NULL
886 /* device driver for platform bus bits */
888 static struct device_driver s3c2410_i2c_driver = {
889 .name = "s3c2410-i2c",
890 .bus = &platform_bus_type,
891 .probe = s3c24xx_i2c_probe,
892 .remove = s3c24xx_i2c_remove,
893 .resume = s3c24xx_i2c_resume,
896 static struct device_driver s3c2440_i2c_driver = {
897 .name = "s3c2440-i2c",
898 .bus = &platform_bus_type,
899 .probe = s3c24xx_i2c_probe,
900 .remove = s3c24xx_i2c_remove,
901 .resume = s3c24xx_i2c_resume,
904 static int __init i2c_adap_s3c_init(void)
908 ret = driver_register(&s3c2410_i2c_driver);
910 ret = driver_register(&s3c2440_i2c_driver);
915 static void __exit i2c_adap_s3c_exit(void)
917 driver_unregister(&s3c2410_i2c_driver);
918 driver_unregister(&s3c2440_i2c_driver);
921 module_init(i2c_adap_s3c_init);
922 module_exit(i2c_adap_s3c_exit);
924 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
925 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
926 MODULE_LICENSE("GPL");