2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/config.h>
78 #include <linux/module.h>
79 #include <linux/types.h>
80 #include <linux/kernel.h>
81 #include <linux/timer.h>
83 #include <linux/interrupt.h>
84 #include <linux/pci.h>
85 #include <linux/init.h>
86 #include <linux/ide.h>
87 #include <linux/delay.h>
88 #include <linux/scatterlist.h>
93 struct drive_list_entry {
95 const char *id_firmware;
98 static const struct drive_list_entry drive_whitelist [] = {
100 { "Micropolis 2112A" , "ALL" },
101 { "CONNER CTMA 4000" , "ALL" },
102 { "CONNER CTT8000-A" , "ALL" },
103 { "ST34342A" , "ALL" },
107 static const struct drive_list_entry drive_blacklist [] = {
109 { "WDC AC11000H" , "ALL" },
110 { "WDC AC22100H" , "ALL" },
111 { "WDC AC32500H" , "ALL" },
112 { "WDC AC33100H" , "ALL" },
113 { "WDC AC31600H" , "ALL" },
114 { "WDC AC32100H" , "24.09P07" },
115 { "WDC AC23200L" , "21.10N21" },
116 { "Compaq CRD-8241B" , "ALL" },
117 { "CRD-8400B" , "ALL" },
118 { "CRD-8480B", "ALL" },
119 { "CRD-8480C", "ALL" },
120 { "CRD-8482B", "ALL" },
121 { "CRD-84" , "ALL" },
122 { "SanDisk SDP3B" , "ALL" },
123 { "SanDisk SDP3B-64" , "ALL" },
124 { "SANYO CD-ROM CRD" , "ALL" },
125 { "HITACHI CDR-8" , "ALL" },
126 { "HITACHI CDR-8335" , "ALL" },
127 { "HITACHI CDR-8435" , "ALL" },
128 { "Toshiba CD-ROM XM-6202B" , "ALL" },
129 { "CD-532E-A" , "ALL" },
130 { "E-IDE CD-ROM CR-840", "ALL" },
131 { "CD-ROM Drive/F5A", "ALL" },
132 { "WPI CDD-820", "ALL" },
133 { "SAMSUNG CD-ROM SC-148C", "ALL" },
134 { "SAMSUNG CD-ROM SC", "ALL" },
135 { "SanDisk SDP3B-64" , "ALL" },
136 { "SAMSUNG CD-ROM SN-124", "ALL" },
137 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
138 { "_NEC DV5800A", "ALL" },
144 * in_drive_list - look for drive in black/white list
145 * @id: drive identifier
146 * @drive_table: list to inspect
148 * Look for a drive in the blacklist and the whitelist tables
149 * Returns 1 if the drive is found in the table.
152 static int in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
154 for ( ; drive_table->id_model ; drive_table++)
155 if ((!strcmp(drive_table->id_model, id->model)) &&
156 ((strstr(drive_table->id_firmware, id->fw_rev)) ||
157 (!strcmp(drive_table->id_firmware, "ALL"))))
162 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
164 * ide_dma_intr - IDE DMA interrupt handler
165 * @drive: the drive the interrupt is for
167 * Handle an interrupt completing a read/write DMA transfer on an
171 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
173 u8 stat = 0, dma_stat = 0;
175 dma_stat = HWIF(drive)->ide_dma_end(drive);
176 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
177 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
179 struct request *rq = HWGROUP(drive)->rq;
181 DRIVER(drive)->end_request(drive, 1, rq->nr_sectors);
184 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
185 drive->name, dma_stat);
187 return DRIVER(drive)->error(drive, "dma_intr", stat);
190 EXPORT_SYMBOL_GPL(ide_dma_intr);
193 * ide_build_sglist - map IDE scatter gather for DMA I/O
194 * @drive: the drive to build the DMA table for
195 * @rq: the request holding the sg list
197 * Perform the PCI mapping magic necessary to access the source or
198 * target buffers of a request via PCI DMA. The lower layers of the
199 * kernel provide the necessary cache management so that we can
200 * operate in a portable fashion
203 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
205 ide_hwif_t *hwif = HWIF(drive);
206 struct scatterlist *sg = hwif->sg_table;
208 if ((rq->flags & REQ_DRIVE_TASKFILE) && rq->nr_sectors > 256)
211 ide_map_sg(drive, rq);
213 if (rq_data_dir(rq) == READ)
214 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
216 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
218 return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
221 EXPORT_SYMBOL_GPL(ide_build_sglist);
224 * ide_build_dmatable - build IDE DMA table
226 * ide_build_dmatable() prepares a dma request. We map the command
227 * to get the pci bus addresses of the buffers and then build up
228 * the PRD table that the IDE layer wants to be fed. The code
229 * knows about the 64K wrap bug in the CS5530.
231 * Returns 0 if all went okay, returns 1 otherwise.
232 * May also be invoked from trm290.c
235 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
237 ide_hwif_t *hwif = HWIF(drive);
238 unsigned int *table = hwif->dmatable_cpu;
239 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
240 unsigned int count = 0;
242 struct scatterlist *sg;
244 hwif->sg_nents = i = ide_build_sglist(drive, rq);
254 cur_addr = sg_dma_address(sg);
255 cur_len = sg_dma_len(sg);
258 * Fill in the dma table, without crossing any 64kB boundaries.
259 * Most hardware requires 16-bit alignment of all blocks,
260 * but the trm290 requires 32-bit alignment.
264 if (count++ >= PRD_ENTRIES) {
265 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
266 goto use_pio_instead;
268 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
270 if (bcount > cur_len)
272 *table++ = cpu_to_le32(cur_addr);
273 xcount = bcount & 0xffff;
275 xcount = ((xcount >> 2) - 1) << 16;
276 if (xcount == 0x0000) {
278 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
279 * but at least one (e.g. CS5530) misinterprets it as zero (!).
280 * So here we break the 64KB entry into two 32KB entries instead.
282 if (count++ >= PRD_ENTRIES) {
283 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
284 goto use_pio_instead;
286 *table++ = cpu_to_le32(0x8000);
287 *table++ = cpu_to_le32(cur_addr + 0x8000);
290 *table++ = cpu_to_le32(xcount);
302 *--table |= cpu_to_le32(0x80000000);
305 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
307 pci_unmap_sg(hwif->pci_dev,
310 hwif->sg_dma_direction);
311 return 0; /* revert to PIO for this request */
314 EXPORT_SYMBOL_GPL(ide_build_dmatable);
317 * ide_destroy_dmatable - clean up DMA mapping
318 * @drive: The drive to unmap
320 * Teardown mappings after DMA has completed. This must be called
321 * after the completion of each use of ide_build_dmatable and before
322 * the next use of ide_build_dmatable. Failure to do so will cause
323 * an oops as only one mapping can be live for each target at a given
327 void ide_destroy_dmatable (ide_drive_t *drive)
329 struct pci_dev *dev = HWIF(drive)->pci_dev;
330 struct scatterlist *sg = HWIF(drive)->sg_table;
331 int nents = HWIF(drive)->sg_nents;
333 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
336 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
339 * config_drive_for_dma - attempt to activate IDE DMA
340 * @drive: the drive to place in DMA mode
342 * If the drive supports at least mode 2 DMA or UDMA of any kind
343 * then attempt to place it into DMA mode. Drives that are known to
344 * support DMA but predate the DMA properties or that are known
345 * to have DMA handling bugs are also set up appropriately based
346 * on the good/bad drive lists.
349 static int config_drive_for_dma (ide_drive_t *drive)
351 struct hd_driveid *id = drive->id;
352 ide_hwif_t *hwif = HWIF(drive);
354 if ((id->capability & 1) && hwif->autodma) {
356 * Enable DMA on any drive that has
357 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
359 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
360 return hwif->ide_dma_on(drive);
362 * Enable DMA on any drive that has mode2 DMA
363 * (multi or single) enabled
365 if (id->field_valid & 2) /* regular DMA */
366 if ((id->dma_mword & 0x404) == 0x404 ||
367 (id->dma_1word & 0x404) == 0x404)
368 return hwif->ide_dma_on(drive);
370 /* Consult the list of known "good" drives */
371 if (__ide_dma_good_drive(drive))
372 return hwif->ide_dma_on(drive);
374 // if (hwif->tuneproc != NULL) hwif->tuneproc(drive, 255);
375 return hwif->ide_dma_off_quietly(drive);
379 * dma_timer_expiry - handle a DMA timeout
380 * @drive: Drive that timed out
382 * An IDE DMA transfer timed out. In the event of an error we ask
383 * the driver to resolve the problem, if a DMA transfer is still
384 * in progress we continue to wait (arguably we need to add a
385 * secondary 'I don't care what the drive thinks' timeout here)
386 * Finally if we have an interrupt we let it complete the I/O.
387 * But only one time - we clear expiry and if it's still not
388 * completed after WAIT_CMD, we error and retry in PIO.
389 * This can occur if an interrupt is lost or due to hang or bugs.
392 static int dma_timer_expiry (ide_drive_t *drive)
394 ide_hwif_t *hwif = HWIF(drive);
395 u8 dma_stat = hwif->INB(hwif->dma_status);
397 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
398 drive->name, dma_stat);
400 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
403 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
405 /* 1 dmaing, 2 error, 4 intr */
406 if (dma_stat & 2) /* ERROR */
409 if (dma_stat & 1) /* DMAing */
412 if (dma_stat & 4) /* Got an Interrupt */
415 return 0; /* Status is unknown -- reset the bus */
419 * __ide_dma_host_off - Generic DMA kill
420 * @drive: drive to control
422 * Perform the generic IDE controller DMA off operation. This
423 * works for most IDE bus mastering controllers
426 int __ide_dma_host_off (ide_drive_t *drive)
428 ide_hwif_t *hwif = HWIF(drive);
429 u8 unit = (drive->select.b.unit & 0x01);
430 u8 dma_stat = hwif->INB(hwif->dma_status);
432 hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
436 EXPORT_SYMBOL(__ide_dma_host_off);
439 * __ide_dma_host_off_quietly - Generic DMA kill
440 * @drive: drive to control
442 * Turn off the current DMA on this IDE controller.
445 int __ide_dma_off_quietly (ide_drive_t *drive)
447 drive->using_dma = 0;
448 ide_toggle_bounce(drive, 0);
450 if (HWIF(drive)->ide_dma_host_off(drive))
456 EXPORT_SYMBOL(__ide_dma_off_quietly);
457 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
460 * __ide_dma_off - disable DMA on a device
461 * @drive: drive to disable DMA on
463 * Disable IDE DMA for a device on this IDE controller.
464 * Inform the user that DMA has been disabled.
467 int __ide_dma_off (ide_drive_t *drive)
469 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
470 return HWIF(drive)->ide_dma_off_quietly(drive);
473 EXPORT_SYMBOL(__ide_dma_off);
475 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
477 * __ide_dma_host_on - Enable DMA on a host
478 * @drive: drive to enable for DMA
480 * Enable DMA on an IDE controller following generic bus mastering
481 * IDE controller behaviour
484 int __ide_dma_host_on (ide_drive_t *drive)
486 if (drive->using_dma) {
487 ide_hwif_t *hwif = HWIF(drive);
488 u8 unit = (drive->select.b.unit & 0x01);
489 u8 dma_stat = hwif->INB(hwif->dma_status);
491 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
497 EXPORT_SYMBOL(__ide_dma_host_on);
500 * __ide_dma_on - Enable DMA on a device
501 * @drive: drive to enable DMA on
503 * Enable IDE DMA for a device on this IDE controller.
506 int __ide_dma_on (ide_drive_t *drive)
508 /* consult the list of known "bad" drives */
509 if (__ide_dma_bad_drive(drive))
512 drive->using_dma = 1;
513 ide_toggle_bounce(drive, 1);
515 if (HWIF(drive)->ide_dma_host_on(drive))
521 EXPORT_SYMBOL(__ide_dma_on);
524 * __ide_dma_check - check DMA setup
525 * @drive: drive to check
527 * Don't use - due for extermination
530 int __ide_dma_check (ide_drive_t *drive)
532 return config_drive_for_dma(drive);
535 EXPORT_SYMBOL(__ide_dma_check);
538 * ide_dma_setup - begin a DMA phase
539 * @drive: target device
541 * Build an IDE DMA PRD (IDE speak for scatter gather table)
542 * and then set up the DMA transfer registers for a device
543 * that follows generic IDE PCI DMA behaviour. Controllers can
544 * override this function if they need to
546 * Returns 0 on success. If a PIO fallback is required then 1
550 int ide_dma_setup(ide_drive_t *drive)
552 ide_hwif_t *hwif = drive->hwif;
553 struct request *rq = HWGROUP(drive)->rq;
554 unsigned int reading;
562 /* fall back to pio! */
563 if (!ide_build_dmatable(drive, rq)) {
564 ide_map_sg(drive, rq);
569 hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
572 hwif->OUTB(reading, hwif->dma_command);
574 /* read dma_status for INTR & ERROR flags */
575 dma_stat = hwif->INB(hwif->dma_status);
577 /* clear INTR & ERROR flags */
578 hwif->OUTB(dma_stat|6, hwif->dma_status);
579 drive->waiting_for_dma = 1;
583 EXPORT_SYMBOL_GPL(ide_dma_setup);
585 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
587 /* issue cmd to drive */
588 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
591 void ide_dma_start(ide_drive_t *drive)
593 ide_hwif_t *hwif = HWIF(drive);
594 u8 dma_cmd = hwif->INB(hwif->dma_command);
596 /* Note that this is done *after* the cmd has
597 * been issued to the drive, as per the BM-IDE spec.
598 * The Promise Ultra33 doesn't work correctly when
599 * we do this part before issuing the drive cmd.
602 hwif->OUTB(dma_cmd|1, hwif->dma_command);
607 EXPORT_SYMBOL_GPL(ide_dma_start);
609 /* returns 1 on error, 0 otherwise */
610 int __ide_dma_end (ide_drive_t *drive)
612 ide_hwif_t *hwif = HWIF(drive);
613 u8 dma_stat = 0, dma_cmd = 0;
615 drive->waiting_for_dma = 0;
616 /* get dma_command mode */
617 dma_cmd = hwif->INB(hwif->dma_command);
619 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
621 dma_stat = hwif->INB(hwif->dma_status);
622 /* clear the INTR & ERROR bits */
623 hwif->OUTB(dma_stat|6, hwif->dma_status);
624 /* purge DMA mappings */
625 ide_destroy_dmatable(drive);
626 /* verify good DMA status */
629 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
632 EXPORT_SYMBOL(__ide_dma_end);
634 /* returns 1 if dma irq issued, 0 otherwise */
635 int __ide_dma_test_irq (ide_drive_t *drive)
637 ide_hwif_t *hwif = HWIF(drive);
638 u8 dma_stat = hwif->INB(hwif->dma_status);
640 #if 0 /* do not set unless you know what you are doing */
642 u8 stat = hwif->INB(IDE_STATUS_REG);
643 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
646 /* return 1 if INTR asserted */
647 if ((dma_stat & 4) == 4)
649 if (!drive->waiting_for_dma)
650 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
651 drive->name, __FUNCTION__);
655 EXPORT_SYMBOL(__ide_dma_test_irq);
656 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
658 int __ide_dma_bad_drive (ide_drive_t *drive)
660 struct hd_driveid *id = drive->id;
662 int blacklist = in_drive_list(id, drive_blacklist);
664 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
665 drive->name, id->model);
671 EXPORT_SYMBOL(__ide_dma_bad_drive);
673 int __ide_dma_good_drive (ide_drive_t *drive)
675 struct hd_driveid *id = drive->id;
676 return in_drive_list(id, drive_whitelist);
679 EXPORT_SYMBOL(__ide_dma_good_drive);
681 int ide_use_dma(ide_drive_t *drive)
683 struct hd_driveid *id = drive->id;
684 ide_hwif_t *hwif = drive->hwif;
686 /* consult the list of known "bad" drives */
687 if (__ide_dma_bad_drive(drive))
690 /* capable of UltraDMA modes */
691 if (id->field_valid & 4) {
692 if (hwif->ultra_mask & id->dma_ultra)
696 /* capable of regular DMA modes */
697 if (id->field_valid & 2) {
698 if (hwif->mwdma_mask & id->dma_mword)
700 if (hwif->swdma_mask & id->dma_1word)
704 /* consult the list of known "good" drives */
705 if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
711 EXPORT_SYMBOL_GPL(ide_use_dma);
713 void ide_dma_verbose(ide_drive_t *drive)
715 struct hd_driveid *id = drive->id;
716 ide_hwif_t *hwif = HWIF(drive);
718 if (id->field_valid & 4) {
719 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
721 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
722 if (((id->dma_ultra >> 11) & 0x1F) &&
723 eighty_ninty_three(drive)) {
724 if ((id->dma_ultra >> 15) & 1) {
725 printk(", UDMA(mode 7)");
726 } else if ((id->dma_ultra >> 14) & 1) {
727 printk(", UDMA(133)");
728 } else if ((id->dma_ultra >> 13) & 1) {
729 printk(", UDMA(100)");
730 } else if ((id->dma_ultra >> 12) & 1) {
731 printk(", UDMA(66)");
732 } else if ((id->dma_ultra >> 11) & 1) {
733 printk(", UDMA(44)");
738 if ((id->dma_ultra >> 10) & 1) {
739 printk(", UDMA(33)");
740 } else if ((id->dma_ultra >> 9) & 1) {
741 printk(", UDMA(25)");
742 } else if ((id->dma_ultra >> 8) & 1) {
743 printk(", UDMA(16)");
747 printk(", (U)DMA"); /* Can be BIOS-enabled! */
749 } else if (id->field_valid & 2) {
750 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
753 } else if (id->field_valid & 1) {
758 printk(", BUG DMA OFF");
759 hwif->ide_dma_off_quietly(drive);
763 EXPORT_SYMBOL(ide_dma_verbose);
765 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
766 int __ide_dma_lostirq (ide_drive_t *drive)
768 printk("%s: DMA interrupt recovery\n", drive->name);
772 EXPORT_SYMBOL(__ide_dma_lostirq);
774 int __ide_dma_timeout (ide_drive_t *drive)
776 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
777 if (HWIF(drive)->ide_dma_test_irq(drive))
780 return HWIF(drive)->ide_dma_end(drive);
783 EXPORT_SYMBOL(__ide_dma_timeout);
786 * Needed for allowing full modular support of ide-driver
788 int ide_release_dma_engine (ide_hwif_t *hwif)
790 if (hwif->dmatable_cpu) {
791 pci_free_consistent(hwif->pci_dev,
792 PRD_ENTRIES * PRD_BYTES,
795 hwif->dmatable_cpu = NULL;
800 int ide_release_iomio_dma (ide_hwif_t *hwif)
802 if ((hwif->dma_extra) && (hwif->channel == 0))
803 release_region((hwif->dma_base + 16), hwif->dma_extra);
804 release_region(hwif->dma_base, 8);
806 release_region(hwif->dma_base, 8);
811 * Needed for allowing full modular support of ide-driver
813 int ide_release_dma (ide_hwif_t *hwif)
817 if (hwif->chipset == ide_etrax100)
820 ide_release_dma_engine(hwif);
821 return ide_release_iomio_dma(hwif);
824 int ide_allocate_dma_engine (ide_hwif_t *hwif)
826 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
827 PRD_ENTRIES * PRD_BYTES,
828 &hwif->dmatable_dma);
830 if (hwif->dmatable_cpu)
833 printk(KERN_ERR "%s: -- Error, unable to allocate%s DMA table(s).\n",
834 (hwif->dmatable_cpu == NULL) ? " CPU" : "",
837 ide_release_dma_engine(hwif);
841 int ide_mapped_mmio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
843 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
845 hwif->dma_base = base;
846 if (hwif->cds->extra && hwif->channel == 0)
847 hwif->dma_extra = hwif->cds->extra;
850 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
852 hwif->dma_master = base;
856 int ide_iomio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
858 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
859 hwif->name, base, base + ports - 1);
860 if (!request_region(base, ports, hwif->name)) {
861 printk(" -- Error, ports in use.\n");
864 hwif->dma_base = base;
865 if ((hwif->cds->extra) && (hwif->channel == 0)) {
866 request_region(base+16, hwif->cds->extra, hwif->cds->name);
867 hwif->dma_extra = hwif->cds->extra;
871 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
873 hwif->dma_master = base;
874 if (hwif->dma_base2) {
875 if (!request_region(hwif->dma_base2, ports, hwif->name))
877 printk(" -- Error, secondary ports in use.\n");
878 release_region(base, ports);
888 int ide_dma_iobase (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
891 return ide_mapped_mmio_dma(hwif, base,ports);
892 BUG_ON(hwif->mmio == 1);
893 return ide_iomio_dma(hwif, base, ports);
897 * This can be called for a dynamically installed interface. Don't __init it
899 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
901 if (ide_dma_iobase(hwif, dma_base, num_ports))
904 if (ide_allocate_dma_engine(hwif)) {
905 ide_release_dma(hwif);
909 if (!(hwif->dma_command))
910 hwif->dma_command = hwif->dma_base;
911 if (!(hwif->dma_vendor1))
912 hwif->dma_vendor1 = (hwif->dma_base + 1);
913 if (!(hwif->dma_status))
914 hwif->dma_status = (hwif->dma_base + 2);
915 if (!(hwif->dma_vendor3))
916 hwif->dma_vendor3 = (hwif->dma_base + 3);
917 if (!(hwif->dma_prdtable))
918 hwif->dma_prdtable = (hwif->dma_base + 4);
920 if (!hwif->ide_dma_off_quietly)
921 hwif->ide_dma_off_quietly = &__ide_dma_off_quietly;
922 if (!hwif->ide_dma_host_off)
923 hwif->ide_dma_host_off = &__ide_dma_host_off;
924 if (!hwif->ide_dma_on)
925 hwif->ide_dma_on = &__ide_dma_on;
926 if (!hwif->ide_dma_host_on)
927 hwif->ide_dma_host_on = &__ide_dma_host_on;
928 if (!hwif->ide_dma_check)
929 hwif->ide_dma_check = &__ide_dma_check;
930 if (!hwif->dma_setup)
931 hwif->dma_setup = &ide_dma_setup;
932 if (!hwif->dma_exec_cmd)
933 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
934 if (!hwif->dma_start)
935 hwif->dma_start = &ide_dma_start;
936 if (!hwif->ide_dma_end)
937 hwif->ide_dma_end = &__ide_dma_end;
938 if (!hwif->ide_dma_test_irq)
939 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
940 if (!hwif->ide_dma_timeout)
941 hwif->ide_dma_timeout = &__ide_dma_timeout;
942 if (!hwif->ide_dma_lostirq)
943 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
945 if (hwif->chipset != ide_trm290) {
946 u8 dma_stat = hwif->INB(hwif->dma_status);
947 printk(", BIOS settings: %s:%s, %s:%s",
948 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
949 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
953 if (!(hwif->dma_master))
957 EXPORT_SYMBOL_GPL(ide_setup_dma);
958 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */