2 * linux/drivers/ide/pci/aec62xx.c Version 0.11 March 27, 2002
4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
8 #include <linux/module.h>
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <linux/delay.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/init.h>
22 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
23 (void) pci_read_config_byte(dev, 0x54, &art);
24 p += sprintf(p, "DMA Mode: %s(%s)",
25 (c0&0x20)?((art&0x03)?"UDMA":" DMA"):" PIO",
26 (art&0x02)?"2":(art&0x01)?"1":"0");
27 p += sprintf(p, " %s(%s)",
28 (c0&0x40)?((art&0x0c)?"UDMA":" DMA"):" PIO",
29 (art&0x08)?"2":(art&0x04)?"1":"0");
30 p += sprintf(p, " %s(%s)",
31 (c1&0x20)?((art&0x30)?"UDMA":" DMA"):" PIO",
32 (art&0x20)?"2":(art&0x10)?"1":"0");
33 p += sprintf(p, " %s(%s)\n",
34 (c1&0x40)?((art&0xc0)?"UDMA":" DMA"):" PIO",
35 (art&0x80)?"2":(art&0x40)?"1":"0");
40 * TO DO: active tuning and correction of cards without a bios.
42 static u8 pci_bus_clock_list (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
44 for ( ; chipset_table->xfer_speed ; chipset_table++)
45 if (chipset_table->xfer_speed == speed) {
46 return chipset_table->chipset_settings;
48 return chipset_table->chipset_settings;
51 static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
53 for ( ; chipset_table->xfer_speed ; chipset_table++)
54 if (chipset_table->xfer_speed == speed) {
55 return chipset_table->ultra_settings;
57 return chipset_table->ultra_settings;
60 static u8 aec62xx_ratemask (ide_drive_t *drive)
62 ide_hwif_t *hwif = HWIF(drive);
65 switch(hwif->pci_dev->device) {
66 case PCI_DEVICE_ID_ARTOP_ATP865:
67 case PCI_DEVICE_ID_ARTOP_ATP865R:
69 mode = (hwif->INB(hwif->dma_master) & 0x10) ? 4 : 3;
71 mode = (hwif->INB(((hwif->channel) ?
72 hwif->mate->dma_status :
73 hwif->dma_status)) & 0x10) ? 4 : 3;
76 case PCI_DEVICE_ID_ARTOP_ATP860:
77 case PCI_DEVICE_ID_ARTOP_ATP860R:
80 case PCI_DEVICE_ID_ARTOP_ATP850UF:
85 if (!eighty_ninty_three(drive))
86 mode = min(mode, (u8)1);
90 static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
92 ide_hwif_t *hwif = HWIF(drive);
93 struct pci_dev *dev = hwif->pci_dev;
95 u8 speed = ide_rate_filter(aec62xx_ratemask(drive), xferspeed);
96 u8 ultra = 0, ultra_conf = 0;
97 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
100 local_irq_save(flags);
101 /* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
102 pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
103 tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev));
104 SPLIT_BYTE(tmp0,tmp1,tmp2);
105 MAKE_WORD(d_conf,tmp1,tmp2);
106 pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
110 pci_read_config_byte(dev, 0x54, &ultra);
111 tmp1 = ((0x00 << (2*drive->dn)) | (ultra & ~(3 << (2*drive->dn))));
112 ultra_conf = pci_bus_clock_list_ultra(speed, BUSCLOCK(dev));
113 tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn))));
114 pci_write_config_byte(dev, 0x54, tmp2);
115 local_irq_restore(flags);
116 return(ide_config_drive_speed(drive, speed));
119 static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
121 ide_hwif_t *hwif = HWIF(drive);
122 struct pci_dev *dev = hwif->pci_dev;
123 u8 speed = ide_rate_filter(aec62xx_ratemask(drive), xferspeed);
124 u8 unit = (drive->select.b.unit & 0x01);
125 u8 tmp1 = 0, tmp2 = 0;
126 u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
129 local_irq_save(flags);
130 /* high 4-bits: Active, low 4-bits: Recovery */
131 pci_read_config_byte(dev, 0x40|drive->dn, &drive_conf);
132 drive_conf = pci_bus_clock_list(speed, BUSCLOCK(dev));
133 pci_write_config_byte(dev, 0x40|drive->dn, drive_conf);
135 pci_read_config_byte(dev, (0x44|hwif->channel), &ultra);
136 tmp1 = ((0x00 << (4*unit)) | (ultra & ~(7 << (4*unit))));
137 ultra_conf = pci_bus_clock_list_ultra(speed, BUSCLOCK(dev));
138 tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit))));
139 pci_write_config_byte(dev, (0x44|hwif->channel), tmp2);
140 local_irq_restore(flags);
141 return(ide_config_drive_speed(drive, speed));
144 static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed)
146 switch (HWIF(drive)->pci_dev->device) {
147 case PCI_DEVICE_ID_ARTOP_ATP865:
148 case PCI_DEVICE_ID_ARTOP_ATP865R:
149 case PCI_DEVICE_ID_ARTOP_ATP860:
150 case PCI_DEVICE_ID_ARTOP_ATP860R:
151 return ((int) aec6260_tune_chipset(drive, speed));
152 case PCI_DEVICE_ID_ARTOP_ATP850UF:
153 return ((int) aec6210_tune_chipset(drive, speed));
159 static int config_chipset_for_dma (ide_drive_t *drive)
161 u8 speed = ide_dma_speed(drive, aec62xx_ratemask(drive));
166 (void) aec62xx_tune_chipset(drive, speed);
167 return ide_dma_enable(drive);
170 static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
173 u8 new_pio = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
176 case 5: speed = new_pio; break;
177 case 4: speed = XFER_PIO_4; break;
178 case 3: speed = XFER_PIO_3; break;
179 case 2: speed = XFER_PIO_2; break;
180 case 1: speed = XFER_PIO_1; break;
181 default: speed = XFER_PIO_0; break;
183 (void) aec62xx_tune_chipset(drive, speed);
186 static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
188 ide_hwif_t *hwif = HWIF(drive);
189 struct hd_driveid *id = drive->id;
191 if ((id->capability & 1) && drive->autodma) {
193 if (ide_use_dma(drive)) {
194 if (config_chipset_for_dma(drive))
195 return hwif->ide_dma_on(drive);
200 } else if ((id->capability & 8) || (id->field_valid & 2)) {
202 aec62xx_tune_drive(drive, 5);
203 return hwif->ide_dma_off_quietly(drive);
205 /* IORDY not supported */
209 static int aec62xx_irq_timeout (ide_drive_t *drive)
211 ide_hwif_t *hwif = HWIF(drive);
212 struct pci_dev *dev = hwif->pci_dev;
214 switch(dev->device) {
215 case PCI_DEVICE_ID_ARTOP_ATP860:
216 case PCI_DEVICE_ID_ARTOP_ATP860R:
217 case PCI_DEVICE_ID_ARTOP_ATP865:
218 case PCI_DEVICE_ID_ARTOP_ATP865R:
219 printk(" AEC62XX time out ");
224 pci_read_config_byte(HWIF(drive)->pci_dev, 0x49, ®49h);
226 pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h|0x10);
227 pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h & ~0x10);
236 ide_hwif_t *hwif = HWIF(drive);
237 struct pci_dev *dev = hwif->pci_dev;
238 u8 tmp1 = 0, tmp2 = 0, mode6 = 0;
240 pci_read_config_byte(dev, 0x44, &tmp1);
241 pci_read_config_byte(dev, 0x45, &tmp2);
242 printk(" AEC6280 r44=%x r45=%x ",tmp1,tmp2);
243 mode6 = HWIF(drive)->INB(((hwif->channel) ?
244 hwif->mate->dma_status :
246 printk(" AEC6280 133=%x ", (mode6 & 0x10));
252 static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
254 int bus_speed = system_bus_clock();
256 if (dev->resource[PCI_ROM_RESOURCE].start) {
257 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
258 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
262 pci_set_drvdata(dev, (void *) aec6xxx_33_base);
264 pci_set_drvdata(dev, (void *) aec6xxx_34_base);
269 static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
272 hwif->tuneproc = &aec62xx_tune_drive;
273 hwif->speedproc = &aec62xx_tune_chipset;
275 if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
276 hwif->serialized = hwif->channel;
281 hwif->mate->serialized = hwif->serialized;
283 if (!hwif->dma_base) {
284 hwif->drives[0].autotune = 1;
285 hwif->drives[1].autotune = 1;
289 hwif->ultra_mask = 0x7f;
290 hwif->mwdma_mask = 0x07;
291 hwif->swdma_mask = 0x07;
293 hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate;
294 hwif->ide_dma_lostirq = &aec62xx_irq_timeout;
295 hwif->ide_dma_timeout = &aec62xx_irq_timeout;
298 hwif->drives[0].autodma = hwif->autodma;
299 hwif->drives[1].autodma = hwif->autodma;
302 static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase)
304 struct pci_dev *dev = hwif->pci_dev;
306 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
310 spin_lock_irqsave(&ide_lock, flags);
311 pci_read_config_byte(dev, 0x54, ®54h);
312 pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F));
313 spin_unlock_irqrestore(&ide_lock, flags);
316 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
317 if (!(hwif->udma_four))
318 hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1;
321 ide_setup_dma(hwif, dmabase, 8);
324 static void __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
326 ide_setup_pci_device(dev, d);
329 static void __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
331 unsigned long bar4reg = pci_resource_start(dev, 4);
333 if (inb(bar4reg+2) & 0x10) {
334 strcpy(d->name, "AEC6880");
335 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)
336 strcpy(d->name, "AEC6880R");
338 strcpy(d->name, "AEC6280");
339 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)
340 strcpy(d->name, "AEC6280R");
343 ide_setup_pci_device(dev, d);
347 * aec62xx_init_one - called when a AEC is found
348 * @dev: the aec62xx device
349 * @id: the matching pci id
351 * Called when the PCI registration layer (or the IDE initialization)
352 * finds a device matching our IDE device tables.
355 static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
357 ide_pci_device_t *d = &aec62xx_chipsets[id->driver_data];
359 d->init_setup(dev, d);
363 static struct pci_device_id aec62xx_pci_tbl[] = {
364 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
365 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
366 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
367 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
368 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
371 MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl);
373 static struct pci_driver driver = {
374 .name = "AEC62xx_IDE",
375 .id_table = aec62xx_pci_tbl,
376 .probe = aec62xx_init_one,
379 static int aec62xx_ide_init(void)
381 return ide_pci_register_driver(&driver);
384 module_init(aec62xx_ide_init);
386 MODULE_AUTHOR("Andre Hedrick");
387 MODULE_DESCRIPTION("PCI driver module for ARTOP AEC62xx IDE");
388 MODULE_LICENSE("GPL");