4 #include <linux/config.h>
8 #define DISPLAY_AEC62XX_TIMINGS
10 struct chipset_bus_clock_list_entry {
12 byte chipset_settings;
16 struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
17 { XFER_UDMA_6, 0x31, 0x07 },
18 { XFER_UDMA_5, 0x31, 0x06 },
19 { XFER_UDMA_4, 0x31, 0x05 },
20 { XFER_UDMA_3, 0x31, 0x04 },
21 { XFER_UDMA_2, 0x31, 0x03 },
22 { XFER_UDMA_1, 0x31, 0x02 },
23 { XFER_UDMA_0, 0x31, 0x01 },
25 { XFER_MW_DMA_2, 0x31, 0x00 },
26 { XFER_MW_DMA_1, 0x31, 0x00 },
27 { XFER_MW_DMA_0, 0x0a, 0x00 },
28 { XFER_PIO_4, 0x31, 0x00 },
29 { XFER_PIO_3, 0x33, 0x00 },
30 { XFER_PIO_2, 0x08, 0x00 },
31 { XFER_PIO_1, 0x0a, 0x00 },
32 { XFER_PIO_0, 0x00, 0x00 },
36 struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
37 { XFER_UDMA_6, 0x41, 0x06 },
38 { XFER_UDMA_5, 0x41, 0x05 },
39 { XFER_UDMA_4, 0x41, 0x04 },
40 { XFER_UDMA_3, 0x41, 0x03 },
41 { XFER_UDMA_2, 0x41, 0x02 },
42 { XFER_UDMA_1, 0x41, 0x01 },
43 { XFER_UDMA_0, 0x41, 0x01 },
45 { XFER_MW_DMA_2, 0x41, 0x00 },
46 { XFER_MW_DMA_1, 0x42, 0x00 },
47 { XFER_MW_DMA_0, 0x7a, 0x00 },
48 { XFER_PIO_4, 0x41, 0x00 },
49 { XFER_PIO_3, 0x43, 0x00 },
50 { XFER_PIO_2, 0x78, 0x00 },
51 { XFER_PIO_1, 0x7a, 0x00 },
52 { XFER_PIO_0, 0x70, 0x00 },
57 #define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
60 #define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
64 ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
66 static void init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
67 static void init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
68 static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
69 static void init_hwif_aec62xx(ide_hwif_t *);
70 static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
72 static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
75 .init_setup = init_setup_aec62xx,
76 .init_chipset = init_chipset_aec62xx,
77 .init_hwif = init_hwif_aec62xx,
78 .init_dma = init_dma_aec62xx,
81 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
82 .bootable = OFF_BOARD,
85 .init_setup = init_setup_aec62xx,
86 .init_chipset = init_chipset_aec62xx,
87 .init_hwif = init_hwif_aec62xx,
88 .init_dma = init_dma_aec62xx,
91 .bootable = OFF_BOARD,
94 .init_setup = init_setup_aec62xx,
95 .init_chipset = init_chipset_aec62xx,
96 .init_hwif = init_hwif_aec62xx,
97 .init_dma = init_dma_aec62xx,
100 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
101 .bootable = NEVER_BOARD,
104 .init_setup = init_setup_aec6x80,
105 .init_chipset = init_chipset_aec62xx,
106 .init_hwif = init_hwif_aec62xx,
107 .init_dma = init_dma_aec62xx,
110 .bootable = OFF_BOARD,
113 .init_setup = init_setup_aec6x80,
114 .init_chipset = init_chipset_aec62xx,
115 .init_hwif = init_hwif_aec62xx,
116 .init_dma = init_dma_aec62xx,
119 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
120 .bootable = OFF_BOARD,
124 #endif /* AEC62XX_H */