4 #include <linux/config.h>
8 struct chipset_bus_clock_list_entry {
10 byte chipset_settings;
14 static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
15 { XFER_UDMA_6, 0x31, 0x07 },
16 { XFER_UDMA_5, 0x31, 0x06 },
17 { XFER_UDMA_4, 0x31, 0x05 },
18 { XFER_UDMA_3, 0x31, 0x04 },
19 { XFER_UDMA_2, 0x31, 0x03 },
20 { XFER_UDMA_1, 0x31, 0x02 },
21 { XFER_UDMA_0, 0x31, 0x01 },
23 { XFER_MW_DMA_2, 0x31, 0x00 },
24 { XFER_MW_DMA_1, 0x31, 0x00 },
25 { XFER_MW_DMA_0, 0x0a, 0x00 },
26 { XFER_PIO_4, 0x31, 0x00 },
27 { XFER_PIO_3, 0x33, 0x00 },
28 { XFER_PIO_2, 0x08, 0x00 },
29 { XFER_PIO_1, 0x0a, 0x00 },
30 { XFER_PIO_0, 0x00, 0x00 },
34 static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
35 { XFER_UDMA_6, 0x41, 0x06 },
36 { XFER_UDMA_5, 0x41, 0x05 },
37 { XFER_UDMA_4, 0x41, 0x04 },
38 { XFER_UDMA_3, 0x41, 0x03 },
39 { XFER_UDMA_2, 0x41, 0x02 },
40 { XFER_UDMA_1, 0x41, 0x01 },
41 { XFER_UDMA_0, 0x41, 0x01 },
43 { XFER_MW_DMA_2, 0x41, 0x00 },
44 { XFER_MW_DMA_1, 0x42, 0x00 },
45 { XFER_MW_DMA_0, 0x7a, 0x00 },
46 { XFER_PIO_4, 0x41, 0x00 },
47 { XFER_PIO_3, 0x43, 0x00 },
48 { XFER_PIO_2, 0x78, 0x00 },
49 { XFER_PIO_1, 0x7a, 0x00 },
50 { XFER_PIO_0, 0x70, 0x00 },
55 #define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
58 #define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
62 ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
64 static void init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
65 static void init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
66 static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
67 static void init_hwif_aec62xx(ide_hwif_t *);
68 static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
70 static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
73 .init_setup = init_setup_aec62xx,
74 .init_chipset = init_chipset_aec62xx,
75 .init_hwif = init_hwif_aec62xx,
76 .init_dma = init_dma_aec62xx,
79 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
80 .bootable = OFF_BOARD,
83 .init_setup = init_setup_aec62xx,
84 .init_chipset = init_chipset_aec62xx,
85 .init_hwif = init_hwif_aec62xx,
86 .init_dma = init_dma_aec62xx,
89 .bootable = OFF_BOARD,
92 .init_setup = init_setup_aec62xx,
93 .init_chipset = init_chipset_aec62xx,
94 .init_hwif = init_hwif_aec62xx,
95 .init_dma = init_dma_aec62xx,
98 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
99 .bootable = NEVER_BOARD,
102 .init_setup = init_setup_aec6x80,
103 .init_chipset = init_chipset_aec62xx,
104 .init_hwif = init_hwif_aec62xx,
105 .init_dma = init_dma_aec62xx,
108 .bootable = OFF_BOARD,
111 .init_setup = init_setup_aec6x80,
112 .init_chipset = init_chipset_aec62xx,
113 .init_hwif = init_hwif_aec62xx,
114 .init_dma = init_dma_aec62xx,
117 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
118 .bootable = OFF_BOARD,
122 #endif /* AEC62XX_H */