2 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/ioport.h>
14 #include <linux/pci.h>
15 #include <linux/hdreg.h>
16 #include <linux/ide.h>
17 #include <linux/delay.h>
18 #include <linux/init.h>
22 #define ATIIXP_IDE_PIO_TIMING 0x40
23 #define ATIIXP_IDE_MDMA_TIMING 0x44
24 #define ATIIXP_IDE_PIO_CONTROL 0x48
25 #define ATIIXP_IDE_PIO_MODE 0x4a
26 #define ATIIXP_IDE_UDMA_CONTROL 0x54
27 #define ATIIXP_IDE_UDMA_MODE 0x56
34 static atiixp_ide_timing pio_timing[] = {
42 static atiixp_ide_timing mdma_timing[] = {
48 static int save_mdma_mode[4];
50 #define DISPLAY_ATIIXP_TIMINGS
52 #if defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS)
54 #include <linux/stat.h>
55 #include <linux/proc_fs.h>
57 static u8 atiixp_proc;
58 static struct pci_dev *bmide_dev;
61 * atiixp_get_info - fill in /proc for ATIIXP IDE
62 * @buffer: buffer to fill
63 * @addr: address of user start in buffer
64 * @offset: offset into 'file'
65 * @count: buffer count
67 * Output summary data on the tuning.
70 static int atiixp_get_info(char *buffer, char **addr, off_t offset, int count)
73 struct pci_dev *dev = bmide_dev;
74 unsigned long bibma = pci_resource_start(dev, 4);
76 u16 udma_mode = 0, pio_mode = 0;
77 u8 c0, c1, udma_control = 0;
79 p += sprintf(p, "\n ATI ");
80 p += sprintf(p, "ATIIXP Ultra100 IDE Chipset.\n");
82 pci_read_config_byte(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_control);
83 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &udma_mode);
84 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode);
85 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &mdma_timing);
88 * at that point bibma+0x2 et bibma+0xa are byte registers
91 c0 = inb(bibma + 0x02);
92 c1 = inb(bibma + 0x0a);
94 p += sprintf(p, "--------------- Primary Channel "
95 "---------------- Secondary Channel "
97 p += sprintf(p, " %sabled "
99 (c0 & 0x80) ? "dis" : " en",
100 (c1 & 0x80) ? "dis" : " en");
101 p += sprintf(p, "--------------- drive0 --------- drive1 "
102 "-------- drive0 ---------- drive1 ------\n");
103 p += sprintf(p, "DMA enabled: %s %s "
105 (c0 & 0x20) ? "yes" : "no ",
106 (c0 & 0x40) ? "yes" : "no ",
107 (c1 & 0x20) ? "yes" : "no ",
108 (c1 & 0x40) ? "yes" : "no " );
109 p += sprintf(p, "UDMA enabled: %s %s "
111 (udma_control & 0x01) ? "yes" : "no ",
112 (udma_control & 0x02) ? "yes" : "no ",
113 (udma_control & 0x04) ? "yes" : "no ",
114 (udma_control & 0x08) ? "yes" : "no " );
115 p += sprintf(p, "UDMA mode: %c %c "
117 (udma_control & 0x01) ?
118 ((udma_mode & 0x07) + 48) : 'X',
119 (udma_control & 0x02) ?
120 (((udma_mode >> 4) & 0x07) + 48) : 'X',
121 (udma_control & 0x04) ?
122 (((udma_mode >> 8) & 0x07) + 48) : 'X',
123 (udma_control & 0x08) ?
124 (((udma_mode >> 12) & 0x07) + 48) : 'X');
125 p += sprintf(p, "MDMA mode: %c %c "
127 (save_mdma_mode[0] && (c0 & 0x20)) ?
128 ((save_mdma_mode[0] & 0xf) + 48) : 'X',
129 (save_mdma_mode[1] && (c0 & 0x40)) ?
130 ((save_mdma_mode[1] & 0xf) + 48) : 'X',
131 (save_mdma_mode[2] && (c1 & 0x20)) ?
132 ((save_mdma_mode[2] & 0xf) + 48) : 'X',
133 (save_mdma_mode[3] && (c1 & 0x40)) ?
134 ((save_mdma_mode[3] & 0xf) + 48) : 'X');
135 p += sprintf(p, "PIO mode: %c %c "
137 (c0 & 0x20) ? 'X' : ((pio_mode & 0x07) + 48),
138 (c0 & 0x40) ? 'X' : (((pio_mode >> 4) & 0x07) + 48),
139 (c1 & 0x20) ? 'X' : (((pio_mode >> 8) & 0x07) + 48),
140 (c1 & 0x40) ? 'X' : (((pio_mode >> 12) & 0x07) + 48));
142 return p - buffer; /* => must be less than 4k! */
144 #endif /* defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS) */
147 * atiixp_ratemask - compute rate mask for ATIIXP IDE
148 * @drive: IDE drive to compute for
150 * Returns the available modes for the ATIIXP IDE controller.
153 static u8 atiixp_ratemask(ide_drive_t *drive)
157 if (!eighty_ninty_three(drive))
158 mode = min(mode, (u8)1);
163 * atiixp_dma_2_pio - return the PIO mode matching DMA
164 * @xfer_rate: transfer speed
166 * Returns the nearest equivalent PIO timing for the PIO or DMA
167 * mode requested by the controller.
170 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
199 static int atiixp_ide_dma_host_on(ide_drive_t *drive)
201 struct pci_dev *dev = drive->hwif->pci_dev;
205 spin_lock_irqsave(&ide_lock, flags);
207 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
208 if (save_mdma_mode[drive->dn])
209 tmp16 &= ~(1 << drive->dn);
211 tmp16 |= (1 << drive->dn);
212 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
214 spin_unlock_irqrestore(&ide_lock, flags);
216 return __ide_dma_host_on(drive);
219 static int atiixp_ide_dma_host_off(ide_drive_t *drive)
221 struct pci_dev *dev = drive->hwif->pci_dev;
225 spin_lock_irqsave(&ide_lock, flags);
227 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
228 tmp16 &= ~(1 << drive->dn);
229 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
231 spin_unlock_irqrestore(&ide_lock, flags);
233 return __ide_dma_host_off(drive);
237 * atiixp_tune_drive - tune a drive attached to a ATIIXP
238 * @drive: drive to tune
239 * @pio: desired PIO mode
241 * Set the interface PIO mode.
244 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
246 struct pci_dev *dev = drive->hwif->pci_dev;
248 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
252 spin_lock_irqsave(&ide_lock, flags);
254 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
255 pio_mode_data &= ~(0x07 << (drive->dn * 4));
256 pio_mode_data |= (pio << (drive->dn * 4));
257 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
259 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
260 pio_timing_data &= ~(0xff << timing_shift);
261 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
262 (pio_timing[pio].command_width << (timing_shift + 4));
263 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
265 spin_unlock_irqrestore(&ide_lock, flags);
269 * atiixp_tune_chipset - tune a ATIIXP interface
270 * @drive: IDE drive to tune
271 * @xferspeed: speed to configure
273 * Set a ATIIXP interface channel to the desired speeds. This involves
274 * requires the right timing data into the ATIIXP configuration space
275 * then setting the drive parameters appropriately
278 static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
280 struct pci_dev *dev = drive->hwif->pci_dev;
282 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
287 speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed);
289 spin_lock_irqsave(&ide_lock, flags);
291 save_mdma_mode[drive->dn] = 0;
292 if (speed >= XFER_UDMA_0) {
293 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
294 tmp16 &= ~(0x07 << (drive->dn * 4));
295 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
296 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
298 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
299 save_mdma_mode[drive->dn] = speed;
300 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
301 tmp32 &= ~(0xff << timing_shift);
302 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
303 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
304 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
308 spin_unlock_irqrestore(&ide_lock, flags);
310 if (speed >= XFER_SW_DMA_0)
311 pio = atiixp_dma_2_pio(speed);
313 pio = speed - XFER_PIO_0;
315 atiixp_tuneproc(drive, pio);
317 return ide_config_drive_speed(drive, speed);
321 * atiixp_config_drive_for_dma - configure drive for DMA
322 * @drive: IDE drive to configure
324 * Set up a ATIIXP interface channel for the best available speed.
325 * We prefer UDMA if it is available and then MWDMA. If DMA is
326 * not available we switch to PIO and return 0.
329 static int atiixp_config_drive_for_dma(ide_drive_t *drive)
331 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
333 /* If no DMA speed was available then disable DMA and use PIO. */
335 u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
336 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
339 (void) atiixp_speedproc(drive, speed);
340 return ide_dma_enable(drive);
344 * atiixp_dma_check - set up an IDE device
345 * @drive: IDE drive to configure
347 * Set up the ATIIXP interface for the best available speed on this
348 * interface, preferring DMA to PIO.
351 static int atiixp_dma_check(ide_drive_t *drive)
353 ide_hwif_t *hwif = HWIF(drive);
354 struct hd_driveid *id = drive->id;
357 drive->init_speed = 0;
359 if ((id->capability & 1) && drive->autodma) {
360 /* Consult the list of known "bad" drives */
361 if (__ide_dma_bad_drive(drive))
363 if (id->field_valid & 4) {
364 if (id->dma_ultra & hwif->ultra_mask) {
365 /* Force if Capable UltraDMA */
366 if ((id->field_valid & 2) &&
367 (!atiixp_config_drive_for_dma(drive)))
370 } else if (id->field_valid & 2) {
372 if ((id->dma_mword & hwif->mwdma_mask) ||
373 (id->dma_1word & hwif->swdma_mask)) {
374 /* Force if Capable regular DMA modes */
375 if (!atiixp_config_drive_for_dma(drive))
378 } else if (__ide_dma_good_drive(drive) &&
379 (id->eide_dma_time < 150)) {
380 /* Consult the list of known "good" drives */
381 if (!atiixp_config_drive_for_dma(drive))
386 return hwif->ide_dma_on(drive);
387 } else if ((id->capability & 8) || (id->field_valid & 2)) {
390 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
391 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
392 hwif->speedproc(drive, speed);
393 return hwif->ide_dma_off_quietly(drive);
395 /* IORDY not supported */
400 * init_chipset_atiixp - set up the ATIIXP chipset
401 * @dev: PCI device to set up
402 * @name: Name of the device
404 * Initialize the PCI device as required. For the ATIIXP this turns
405 * out to be nice and simple
408 static unsigned int __devinit init_chipset_atiixp(struct pci_dev *dev, const char *name)
410 #if defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS)
414 ide_pci_create_host_proc("atiixp", atiixp_get_info);
416 #endif /* DISPLAY_ATIIXP_TIMINGS && CONFIG_PROC_FS */
421 * init_hwif_atiixp - fill in the hwif for the ATIIXP
422 * @hwif: IDE interface
424 * Set up the ide_hwif_t for the ATIIXP interface according to the
425 * capabilities of the hardware.
428 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
431 hwif->irq = hwif->channel ? 15 : 14;
434 hwif->tuneproc = &atiixp_tuneproc;
435 hwif->speedproc = &atiixp_speedproc;
436 hwif->drives[0].autotune = 1;
437 hwif->drives[1].autotune = 1;
443 hwif->ultra_mask = 0x3f;
444 hwif->mwdma_mask = 0x06;
445 hwif->swdma_mask = 0x04;
447 /* FIXME: proper cable detection needed */
449 hwif->ide_dma_host_on = &atiixp_ide_dma_host_on;
450 hwif->ide_dma_host_off = &atiixp_ide_dma_host_off;
451 hwif->ide_dma_check = &atiixp_dma_check;
455 hwif->drives[1].autodma = hwif->autodma;
456 hwif->drives[0].autodma = hwif->autodma;
459 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
462 .init_chipset = init_chipset_atiixp,
463 .init_hwif = init_hwif_atiixp,
466 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
467 .bootable = ON_BOARD,
472 * atiixp_init_one - called when a ATIIXP is found
473 * @dev: the atiixp device
474 * @id: the matching pci id
476 * Called when the PCI registration layer (or the IDE initialization)
477 * finds a device matching our IDE device tables.
480 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
482 ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
486 static struct pci_device_id atiixp_pci_tbl[] = {
487 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
490 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
492 static struct pci_driver driver = {
493 .name = "ATIIXP_IDE",
494 .id_table = atiixp_pci_tbl,
495 .probe = atiixp_init_one,
498 static int atiixp_ide_init(void)
500 return ide_pci_register_driver(&driver);
503 module_init(atiixp_ide_init);
505 MODULE_AUTHOR("HUI YU");
506 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
507 MODULE_LICENSE("GPL");