2 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
4 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
5 * May be copied or modified under the terms of the GNU General Public License
7 * Development of this chipset driver was funded
8 * by the nice folks at National Semiconductor.
11 * Available from National Semiconductor
14 #include <linux/config.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/timer.h>
21 #include <linux/ioport.h>
22 #include <linux/blkdev.h>
23 #include <linux/hdreg.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/ide.h>
32 #define SC1200_REV_A 0x00
33 #define SC1200_REV_B1 0x01
34 #define SC1200_REV_B3 0x02
35 #define SC1200_REV_C1 0x03
36 #define SC1200_REV_D1 0x04
38 #define PCI_CLK_33 0x00
39 #define PCI_CLK_48 0x01
40 #define PCI_CLK_66 0x02
41 #define PCI_CLK_33A 0x03
43 static unsigned short sc1200_get_pci_clock (void)
45 unsigned char chip_id, silicon_revision;
46 unsigned int pci_clock;
48 * Check the silicon revision, as not all versions of the chip
49 * have the register with the fast PCI bus timings.
51 chip_id = inb (0x903c);
52 silicon_revision = inb (0x903d);
54 // Read the fast pci clock frequency
55 if (chip_id == 0x04 && silicon_revision < SC1200_REV_B1) {
56 pci_clock = PCI_CLK_33;
58 // check clock generator configuration (cfcc)
59 // the clock is in bits 8 and 9 of this word
61 pci_clock = inw (0x901e);
64 if (pci_clock == PCI_CLK_33A)
65 pci_clock = PCI_CLK_33;
70 #define DISPLAY_SC1200_TIMINGS
72 #if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
73 #include <linux/stat.h>
74 #include <linux/proc_fs.h>
76 static int sc1200_get_info(char *, char **, off_t, int);
77 extern int (*sc1200_display_info)(char *, char **, off_t, int); /* ide-proc.c */
78 extern char *ide_media_verbose(ide_drive_t *);
79 static u8 sc1200_proc = 0;
81 static struct pci_dev *bmide_dev;
83 static int sc1200_get_info (char *buffer, char **addr, off_t offset, int count)
86 unsigned long bibma = pci_resource_start(bmide_dev, 4);
91 * at that point bibma+0x2 et bibma+0xa are byte registers
95 c0 = inb_p(bibma + 0x02);
96 c1 = inb_p(bibma + 0x0a);
98 p += sprintf(p, "\n National SCx200 Chipset.\n");
99 p += sprintf(p, "--------------- Primary Channel ---------------- Secondary Channel -------------\n");
100 p += sprintf(p, " %sabled %sabled\n",
101 (c0&0x80) ? "dis" : " en",
102 (c1&0x80) ? "dis" : " en");
103 p += sprintf(p, "--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 ------\n");
104 p += sprintf(p, "DMA enabled: %s %s %s %s\n",
105 (c0&0x20) ? "yes" : "no ", (c0&0x40) ? "yes" : "no ",
106 (c1&0x20) ? "yes" : "no ", (c1&0x40) ? "yes" : "no " );
108 p += sprintf(p, "UDMA\n");
109 p += sprintf(p, "DMA\n");
110 p += sprintf(p, "PIO\n");
112 len = (p - buffer) - offset;
113 *addr = buffer + offset;
115 return len > count ? count : len;
117 #endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
119 extern char *ide_xfer_verbose (byte xfer_rate);
122 * Set a new transfer mode at the drive
124 int sc1200_set_xfer_mode (ide_drive_t *drive, byte mode)
126 printk("%s: sc1200_set_xfer_mode(%s)\n", drive->name, ide_xfer_verbose(mode));
127 return ide_config_drive_speed(drive, mode);
131 * Here are the standard PIO mode 0-4 timings for each "format".
132 * Format-0 uses fast data reg timings, with slower command reg timings.
133 * Format-1 uses fast timings for all registers, but won't work with all drives.
135 static const unsigned int sc1200_pio_timings[4][5] =
136 {{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
137 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
138 {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
139 {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
142 * After chip reset, the PIO timings are set to 0x00009172, which is not valid.
144 //#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
146 static int sc1200_autoselect_dma_mode (ide_drive_t *drive)
148 int udma_ok = 1, mode = 0;
149 ide_hwif_t *hwif = HWIF(drive);
150 int unit = drive->select.b.unit;
151 ide_drive_t *mate = &hwif->drives[unit^1];
152 struct hd_driveid *id = drive->id;
155 * The SC1200 specifies that two drives sharing a cable cannot
156 * mix UDMA/MDMA. It has to be one or the other, for the pair,
157 * though different timings can still be chosen for each drive.
158 * We could set the appropriate timing bits on the fly,
159 * but that might be a bit confusing. So, for now we statically
160 * handle this requirement by looking at our mate drive to see
161 * what it is capable of, before choosing a mode for our own drive.
164 struct hd_driveid *mateid = mate->id;
165 if (mateid && (mateid->capability & 1) && !__ide_dma_bad_drive(mate)) {
166 if ((mateid->field_valid & 4) && (mateid->dma_ultra & 7))
168 else if ((mateid->field_valid & 2) && (mateid->dma_mword & 7))
175 * Now see what the current drive is capable of,
176 * selecting UDMA only if the mate said it was ok.
178 if (id && (id->capability & 1) && hwif->autodma && !__ide_dma_bad_drive(drive)) {
179 if (udma_ok && (id->field_valid & 4) && (id->dma_ultra & 7)) {
180 if (id->dma_ultra & 4)
182 else if (id->dma_ultra & 2)
184 else if (id->dma_ultra & 1)
187 if (!mode && (id->field_valid & 2) && (id->dma_mword & 7)) {
188 if (id->dma_mword & 4)
189 mode = XFER_MW_DMA_2;
190 else if (id->dma_mword & 2)
191 mode = XFER_MW_DMA_1;
192 else if (id->dma_mword & 1)
193 mode = XFER_MW_DMA_0;
200 * sc1200_config_dma2() handles selection/setting of DMA/UDMA modes
201 * for both the chipset and drive.
203 static int sc1200_config_dma2 (ide_drive_t *drive, int mode)
205 ide_hwif_t *hwif = HWIF(drive);
206 int unit = drive->select.b.unit;
207 unsigned int reg, timings;
208 unsigned short pci_clock;
209 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
212 * Default to DMA-off in case we run into trouble here.
214 hwif->ide_dma_off_quietly(drive); /* turn off DMA while we fiddle */
215 outb(inb(hwif->dma_base+2)&~(unit?0x40:0x20), hwif->dma_base+2); /* clear DMA_capable bit */
218 * Tell the drive to switch to the new mode; abort on failure.
220 if (!mode || sc1200_set_xfer_mode(drive, mode)) {
221 printk("SC1200: set xfer mode failure\n");
222 return 1; /* failure */
225 pci_clock = sc1200_get_pci_clock();
228 * Now tune the chipset to match the drive:
230 * Note that each DMA mode has several timings associated with it.
231 * The correct timing depends on the fast PCI clock freq.
237 case PCI_CLK_33: timings = 0x00921250; break;
238 case PCI_CLK_48: timings = 0x00932470; break;
239 case PCI_CLK_66: timings = 0x009436a1; break;
244 case PCI_CLK_33: timings = 0x00911140; break;
245 case PCI_CLK_48: timings = 0x00922260; break;
246 case PCI_CLK_66: timings = 0x00933481; break;
251 case PCI_CLK_33: timings = 0x00911030; break;
252 case PCI_CLK_48: timings = 0x00922140; break;
253 case PCI_CLK_66: timings = 0x00923261; break;
258 case PCI_CLK_33: timings = 0x00077771; break;
259 case PCI_CLK_48: timings = 0x000bbbb2; break;
260 case PCI_CLK_66: timings = 0x000ffff3; break;
265 case PCI_CLK_33: timings = 0x00012121; break;
266 case PCI_CLK_48: timings = 0x00024241; break;
267 case PCI_CLK_66: timings = 0x00035352; break;
272 case PCI_CLK_33: timings = 0x00002020; break;
273 case PCI_CLK_48: timings = 0x00013131; break;
274 case PCI_CLK_66: timings = 0x00015151; break;
280 printk("%s: sc1200_config_dma: huh? mode=%02x clk=%x \n", drive->name, mode, pci_clock);
281 return 1; /* failure */
284 if (unit == 0) { /* are we configuring drive0? */
285 pci_read_config_dword(hwif->pci_dev, basereg+4, ®);
286 timings |= reg & 0x80000000; /* preserve PIO format bit */
287 pci_write_config_dword(hwif->pci_dev, basereg+4, timings);
289 pci_write_config_dword(hwif->pci_dev, basereg+12, timings);
292 outb(inb(hwif->dma_base+2)|(unit?0x40:0x20), hwif->dma_base+2); /* set DMA_capable bit */
295 * Finally, turn DMA on in software, and exit.
297 return hwif->ide_dma_on(drive); /* success */
301 * sc1200_config_dma() handles selection/setting of DMA/UDMA modes
302 * for both the chipset and drive.
304 static int sc1200_config_dma (ide_drive_t *drive)
306 return sc1200_config_dma2(drive, sc1200_autoselect_dma_mode(drive));
310 /* Replacement for the standard ide_dma_end action in
313 * returns 1 on error, 0 otherwise
315 int sc1200_ide_dma_end (ide_drive_t *drive)
317 ide_hwif_t *hwif = HWIF(drive);
318 unsigned long dma_base = hwif->dma_base;
321 dma_stat = inb(dma_base+2); /* get DMA status */
324 printk(" ide_dma_end dma_stat=%0x err=%x newerr=%x\n",
325 dma_stat, ((dma_stat&7)!=4), ((dma_stat&2)==2));
327 outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
328 outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
330 drive->waiting_for_dma = 0;
331 ide_destroy_dmatable(drive); /* purge DMA mappings */
333 return (dma_stat & 7) != 4; /* verify good DMA status */
337 * sc1200_tuneproc() handles selection/setting of PIO modes
338 * for both the chipset and drive.
340 * All existing BIOSs for this chipset guarantee that all drives
341 * will have valid default PIO timings set up before we get here.
343 static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */
345 ide_hwif_t *hwif = HWIF(drive);
347 static byte modes[5] = {XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, XFER_PIO_4};
351 case 200: mode = XFER_UDMA_0; break;
352 case 201: mode = XFER_UDMA_1; break;
353 case 202: mode = XFER_UDMA_2; break;
354 case 100: mode = XFER_MW_DMA_0; break;
355 case 101: mode = XFER_MW_DMA_1; break;
356 case 102: mode = XFER_MW_DMA_2; break;
359 printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
360 (void)sc1200_config_dma2(drive, mode);
364 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
365 printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio);
366 if (!sc1200_set_xfer_mode(drive, modes[pio])) {
367 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
368 pci_read_config_dword (hwif->pci_dev, basereg+4, &format);
369 format = (format >> 31) & 1;
371 format += sc1200_get_pci_clock();
372 pci_write_config_dword(hwif->pci_dev, basereg + (drive->select.b.unit << 3), sc1200_pio_timings[format][pio]);
376 static ide_hwif_t *lookup_pci_dev (ide_hwif_t *prev, struct pci_dev *dev)
380 for (h = 0; h < MAX_HWIFS; h++) {
381 ide_hwif_t *hwif = &ide_hwifs[h];
384 prev = NULL; // found previous, now look for next match
386 if (hwif && hwif->pci_dev == dev)
387 return hwif; // found next match
390 return NULL; // not found
393 typedef struct sc1200_saved_state_s {
395 } sc1200_saved_state_t;
398 static int sc1200_suspend (struct pci_dev *dev, u32 state)
400 ide_hwif_t *hwif = NULL;
402 printk("SC1200: suspend(%u)\n", state);
405 // we only save state when going from full power to less
408 // Loop over all interfaces that are part of this PCI device:
410 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
411 sc1200_saved_state_t *ss;
412 unsigned int basereg, r;
414 // allocate a permanent save area, if not already allocated
416 ss = (sc1200_saved_state_t *)hwif->config_data;
418 ss = kmalloc(sizeof(sc1200_saved_state_t), GFP_KERNEL);
421 hwif->config_data = (unsigned long)ss;
423 ss = (sc1200_saved_state_t *)hwif->config_data;
425 // Save timing registers: this may be unnecessary if
428 basereg = hwif->channel ? 0x50 : 0x40;
429 for (r = 0; r < 4; ++r) {
430 pci_read_config_dword (hwif->pci_dev, basereg + (r<<2), &ss->regs[r]);
435 /* You don't need to iterate over disks -- sysfs should have done that for you already */
437 pci_disable_device(dev);
438 pci_set_power_state(dev,state);
439 dev->current_state = state;
443 static int sc1200_resume (struct pci_dev *dev)
445 ide_hwif_t *hwif = NULL;
447 printk("SC1200: resume\n");
448 pci_set_power_state(dev,0); // bring chip back from sleep state
449 dev->current_state = 0;
450 pci_enable_device(dev);
452 // loop over all interfaces that are part of this pci device:
454 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
455 unsigned int basereg, r, d, format;
456 sc1200_saved_state_t *ss = (sc1200_saved_state_t *)hwif->config_data;
457 printk("%s: SC1200: resume\n", hwif->name);
460 // Restore timing registers: this may be unnecessary if BIOS also does it
462 basereg = hwif->channel ? 0x50 : 0x40;
464 for (r = 0; r < 4; ++r) {
465 pci_write_config_dword(hwif->pci_dev, basereg + (r<<2), ss->regs[r]);
469 // Re-program drive PIO modes
471 pci_read_config_dword(hwif->pci_dev, basereg+4, &format);
472 format = (format >> 31) & 1;
474 format += sc1200_get_pci_clock();
475 for (d = 0; d < 2; ++d) {
476 ide_drive_t *drive = &(hwif->drives[d]);
477 if (drive->present) {
478 unsigned int pio, timings;
479 pci_read_config_dword(hwif->pci_dev, basereg+(drive->select.b.unit << 3), &timings);
480 for (pio = 0; pio <= 4; ++pio) {
481 if (sc1200_pio_timings[format][pio] == timings)
485 pio = 255; /* autotune */
486 (void)sc1200_tuneproc(drive, pio);
490 // Re-program drive DMA modes
492 for (d = 0; d < MAX_DRIVES; ++d) {
493 ide_drive_t *drive = &(hwif->drives[d]);
494 if (drive->present && !__ide_dma_bad_drive(drive)) {
495 int was_using_dma = drive->using_dma;
496 hwif->ide_dma_off_quietly(drive);
497 sc1200_config_dma(drive);
498 if (!was_using_dma && drive->using_dma) {
499 hwif->ide_dma_off_quietly(drive);
508 * Initialize the sc1200 bridge for reliable IDE DMA operation.
510 static unsigned int __init init_chipset_sc1200 (struct pci_dev *dev, const char *name)
512 #if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
516 ide_pci_create_host_proc("sc1200", sc1200_get_info);
518 #endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
523 * This gets invoked by the IDE driver once for each channel,
524 * and performs channel-specific pre-initialization before drive probing.
526 static void __init init_hwif_sc1200 (ide_hwif_t *hwif)
529 hwif->serialized = hwif->mate->serialized = 1;
531 if (hwif->dma_base) {
532 hwif->ide_dma_check = &sc1200_config_dma;
533 hwif->ide_dma_end = &sc1200_ide_dma_end;
536 hwif->tuneproc = &sc1200_tuneproc;
539 hwif->ultra_mask = 0x07;
540 hwif->mwdma_mask = 0x07;
542 hwif->drives[0].autodma = hwif->autodma;
543 hwif->drives[1].autodma = hwif->autodma;
546 static ide_pci_device_t sc1200_chipset __devinitdata = {
548 .init_chipset = init_chipset_sc1200,
549 .init_hwif = init_hwif_sc1200,
552 .bootable = ON_BOARD,
555 static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
557 ide_setup_pci_device(dev, &sc1200_chipset);
561 static struct pci_device_id sc1200_pci_tbl[] = {
562 { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
565 MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl);
567 static struct pci_driver driver = {
568 .name = "SC1200_IDE",
569 .id_table = sc1200_pci_tbl,
570 .probe = sc1200_init_one,
571 .suspend = sc1200_suspend,
572 .resume = sc1200_resume,
575 static int sc1200_ide_init(void)
577 return ide_pci_register_driver(&driver);
580 module_init(sc1200_ide_init);
582 MODULE_AUTHOR("Mark Lord");
583 MODULE_DESCRIPTION("PCI driver module for NS SC1200 IDE");
584 MODULE_LICENSE("GPL");