2 * linux/drivers/ide/setup-pci.c Version 1.14 2004/08/10
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (c) 2004 Red Hat <alan@redhat.com>
7 * Copyright (c) 1995-1998 Mark Lord
8 * May be copied or modified under the terms of the GNU General Public License
11 * Split the set up function into multiple functions
13 * Fix misreporting of I/O v MMIO problems
14 * Initial fixups for simplex devices
19 * This module provides support for automatic detection and
20 * configuration of all PCI IDE interfaces present in a system.
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/kernel.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/ide.h>
33 #include <linux/delay.h>
40 * ide_match_hwif - match a PCI IDE against an ide_hwif
41 * @io_base: I/O base of device
42 * @bootable: set if its bootable
43 * @name: name of device
45 * Match a PCI IDE port against an entry in ide_hwifs[],
46 * based on io_base port if possible. Return the matching hwif,
47 * or a new hwif. If we find an error (clashing, out of devices, etc)
48 * return NULL. The caller must hold the ide_cfg_sem.
50 * FIXME: we need to handle mmio matches here too
53 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
59 * Look for a hwif with matching io_base specified using
60 * parameters to ide_setup().
62 for (h = 0; h < MAX_HWIFS; ++h) {
64 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
65 if (hwif->chipset == ide_forced)
66 return hwif; /* a perfect match */
70 * Look for a hwif with matching io_base default value.
71 * If chipset is "ide_unknown", then claim that hwif slot.
72 * Otherwise, some other chipset has already claimed it.. :(
74 for (h = 0; h < MAX_HWIFS; ++h) {
76 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
77 if (hwif->chipset == ide_unknown)
78 return hwif; /* match */
79 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
80 name, io_base, hwif->name);
81 return NULL; /* already claimed */
85 * Okay, there is no hwif matching our io_base,
86 * so we'll just claim an unassigned slot.
87 * Give preference to claiming other slots before claiming ide0/ide1,
88 * just in case there's another interface yet-to-be-scanned
89 * which uses ports 1f0/170 (the ide0/ide1 defaults).
91 * Unless there is a bootable card that does not use the standard
92 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
94 * FIXME: migrate use of ide_unknown to also use ->configured
97 for (h = 0; h < MAX_HWIFS; ++h) {
99 if (hwif->chipset == ide_unknown)
100 return hwif; /* pick an unused entry */
103 for (h = 2; h < MAX_HWIFS; ++h) {
104 hwif = ide_hwifs + h;
105 if (hwif->chipset == ide_unknown)
106 return hwif; /* pick an unused entry */
109 for (h = 0; h < 2; ++h) {
110 hwif = ide_hwifs + h;
111 if (hwif->chipset == ide_unknown)
112 return hwif; /* pick an unused entry */
114 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
119 * ide_setup_pci_baseregs - place a PCI IDE controller native
120 * @dev: PCI device of interface to switch native
121 * @name: Name of interface
123 * We attempt to place the PCI interface into PCI native mode. If
124 * we succeed the BARs are ok and the controller is in PCI mode.
125 * Returns 0 on success or an errno code.
127 * FIXME: if we program the interface and then fail to set the BARS
128 * we don't switch it back to legacy mode. Do we actually care ??
131 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
136 * Place both IDE interfaces into PCI "native" mode:
138 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
140 if ((progif & 0xa) != 0xa) {
141 printk(KERN_INFO "%s: device not capable of full "
142 "native PCI mode\n", name);
145 printk("%s: placing both ports into native PCI mode\n", name);
146 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
147 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
149 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
150 "0x%04x, got 0x%04x\n",
151 name, progif|5, progif);
158 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
160 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
162 * Long lost data from 2.0.34 that is now in 2.0.39
164 * This was used in ./drivers/block/triton.c to do DMA Base address setup
165 * when PnP failed. Oh the things we forget. I believe this was part
166 * of SFF-8038i that has been withdrawn from public access... :-((
168 #define DEFAULT_BMIBA 0xe800 /* in case BIOS did not init it */
169 #define DEFAULT_BMCRBA 0xcc00 /* VIA's default value */
170 #define DEFAULT_BMALIBA 0xd400 /* ALI's default value */
171 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
174 * ide_get_or_set_dma_base - setup BMIBA
177 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
178 * If need be we set up the DMA base. Where a device has a partner that
179 * is already in DMA mode we check and enforce IDE simplex rules.
182 static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
184 unsigned long dma_base = 0;
185 struct pci_dev *dev = hwif->pci_dev;
187 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
188 int second_chance = 0;
190 second_chance_to_dma:
191 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
194 return hwif->dma_base;
196 if (hwif->mate && hwif->mate->dma_base) {
197 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
199 dma_base = pci_resource_start(dev, 4);
201 printk(KERN_ERR "%s: dma_base is invalid\n",
206 #ifdef CONFIG_BLK_DEV_IDEDMA_FORCED
207 /* FIXME - should use pci_assign_resource surely */
208 if ((!dma_base) && (!second_chance)) {
209 unsigned long set_bmiba = 0;
211 switch(dev->vendor) {
212 case PCI_VENDOR_ID_AL:
213 set_bmiba = DEFAULT_BMALIBA; break;
214 case PCI_VENDOR_ID_VIA:
215 set_bmiba = DEFAULT_BMCRBA; break;
216 case PCI_VENDOR_ID_INTEL:
217 set_bmiba = DEFAULT_BMIBA; break;
221 pci_write_config_dword(dev, 0x20, set_bmiba|1);
222 goto second_chance_to_dma;
224 #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
228 dma_base += hwif->channel ? 8 : 0;
230 switch(dev->device) {
231 case PCI_DEVICE_ID_AL_M5219:
232 case PCI_DEVICE_ID_AL_M5229:
233 case PCI_DEVICE_ID_AMD_VIPER_7409:
234 case PCI_DEVICE_ID_CMD_643:
235 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
236 simplex_stat = hwif->INB(dma_base + 2);
237 hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
238 simplex_stat = hwif->INB(dma_base + 2);
239 if (simplex_stat & 0x80) {
240 printk(KERN_INFO "%s: simplex device: "
247 * If the device claims "simplex" DMA,
248 * this means only one of the two interfaces
249 * can be trusted with DMA at any point in time.
250 * So we should enable DMA only on one of the
253 simplex_stat = hwif->INB(dma_base + 2);
254 if (simplex_stat & 0x80) {
255 /* simplex device? */
257 * At this point we haven't probed the drives so we can't make the
258 * appropriate decision. Really we should defer this problem
259 * until we tune the drive then try to grab DMA ownership if we want
260 * to be the DMA end. This has to be become dynamic to handle hot
263 if (hwif->mate && hwif->mate->dma_base) {
264 printk(KERN_INFO "%s: simplex device: "
274 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
276 void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
278 printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
279 d->name, pci_name(dev));
282 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
286 * ide_pci_enable - do PCI enables
288 * @d: IDE pci device data
290 * Enable the IDE PCI device. We attempt to enable the device in full
291 * but if that fails then we only need BAR4 so we will enable that.
293 * Returns zero on success or an error code
296 static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
299 if (pci_enable_device(dev)) {
300 if (pci_enable_device_bars(dev, 1 << 4)) {
301 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
302 "Could not enable device.\n", d->name);
305 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
309 * assume all devices can do 32-bit dma for now. we can add a
310 * dma mask field to the ide_pci_device_t if we need it (or let
311 * lower level driver set the dma mask)
313 if (pci_set_dma_mask(dev, 0xffffffff)) {
314 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
318 /* FIXME: Temporary - until we put in the hotplug interface logic
319 Check that the bits we want are not in use by someone else */
320 if (pci_request_region(dev, 4, "ide_tmp"))
322 pci_release_region(dev, 4);
328 * ide_pci_configure - configure an unconfigured device
330 * @d: IDE pci device data
332 * Enable and configure the PCI device we have been passed.
333 * Returns zero on success or an error code.
336 static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
340 * PnP BIOS was *supposed* to have setup this device, but we
341 * can do it ourselves, so long as the BIOS has assigned an IRQ
342 * (or possibly the device is using a "legacy header" for IRQs).
343 * Maybe the user deliberately *disabled* the device,
344 * but we'll eventually ignore it again if no drives respond.
346 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
348 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
351 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
352 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
355 if (!(pcicmd & PCI_COMMAND_IO)) {
356 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
363 * ide_pci_check_iomem - check a register is I/O
368 * Checks if a BAR is configured and points to MMIO space. If so
369 * print an error and return an error code. Otherwise return 0
372 static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
374 ulong flags = pci_resource_flags(dev, bar);
377 if (!flags || pci_resource_len(dev, bar) == 0)
381 if(flags & PCI_BASE_ADDRESS_IO_MASK)
385 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
387 "<andre@linux-ide.org>.\n", d->name);
392 * ide_hwif_configure - configure an IDE interface
393 * @dev: PCI device holding interface
395 * @mate: Paired interface if any
397 * Perform the initial set up for the hardware interface structure. This
398 * is done per interface port rather than per PCI device. There may be
399 * more than one port per device.
401 * Returns the new hardware interface structure, or NULL on a failure
404 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
406 unsigned long ctl = 0, base = 0;
409 if ((d->flags & IDEPCI_FLAG_ISA_PORTS) == 0) {
410 /* Possibly we should fail if these checks report true */
411 ide_pci_check_iomem(dev, d, 2*port);
412 ide_pci_check_iomem(dev, d, 2*port+1);
414 ctl = pci_resource_start(dev, 2*port+1);
415 base = pci_resource_start(dev, 2*port);
416 if ((ctl && !base) || (base && !ctl)) {
417 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
418 "for port %d, skipping\n", d->name, port);
424 /* Use default values */
425 ctl = port ? 0x374 : 0x3f4;
426 base = port ? 0x170 : 0x1f0;
430 * Protect against a hwif being unloaded as we attach to it
434 if ((hwif = ide_match_hwif(base, d->bootable, d->name)) == NULL)
437 return NULL; /* no room in ide_hwifs[] */
440 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
441 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
442 memset(&hwif->hw, 0, sizeof(hwif->hw));
443 ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
444 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
445 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
447 hwif->chipset = ide_pci;
449 hwif->cds = (struct ide_pci_device_s *) d;
450 hwif->channel = port;
451 hwif->configured = 1;
465 * ide_hwif_setup_dma - configure DMA interface
468 * @hwif: Hardware interface we are configuring
470 * Set up the DMA base for the interface. Enable the master bits as
471 * necessary and attempt to bring the device DMA into a ready to use
475 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
476 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
480 static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
483 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
485 if ((d->autodma == AUTODMA) ||
486 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
487 (dev->class & 0x80))) {
488 unsigned long dma_base = ide_get_or_set_dma_base(hwif);
489 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
491 * Set up BM-DMA capability
492 * (PnP BIOS should have done this)
494 /* default DMA off if we had to configure it here */
497 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
498 printk(KERN_ERR "%s: %s error updating PCICMD\n",
499 hwif->name, d->name);
505 d->init_dma(hwif, dma_base);
507 ide_setup_dma(hwif, dma_base, 8);
510 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
511 "(BIOS)\n", hwif->name, d->name);
516 #ifndef CONFIG_IDEDMA_PCI_AUTO
517 #warning CONFIG_IDEDMA_PCI_AUTO=n support is obsolete, and will be removed soon.
520 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
523 * ide_setup_pci_controller - set up IDE PCI
526 * @noisy: verbose flag
527 * @config: returned as 1 if we configured the hardware
529 * Set up the PCI and controller side of the IDE interface. This brings
530 * up the PCI side of the device, checks that the device is enabled
531 * and enables it if need be
534 static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
540 ide_setup_pci_noise(dev, d);
542 if (ide_pci_enable(dev, d))
545 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
546 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
549 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
550 if (ide_pci_configure(dev, d))
553 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
556 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
559 printk(KERN_INFO "%s: chipset revision %d\n", d->name, class_rev);
564 * ide_pci_setup_ports - configure ports/devices on PCI IDE
566 * @d: IDE pci device info
568 * @index: ata index to update
570 * Scan the interfaces attached to this device and do any
571 * necessary per port setup. Attach the devices and ask the
572 * generic DMA layer to do its work for us.
574 * Normally called automaticall from do_ide_pci_setup_device,
575 * but is also used directly as a helper function by some controllers
576 * where the chipset setup is not the default PCI IDE one.
579 void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index)
582 int at_least_one_hwif_enabled = 0;
583 ide_hwif_t *hwif, *mate = NULL;
584 static int secondpdc = 0;
590 * Set up the IDE ports
593 for (port = 0; port <= 1; ++port) {
594 ide_pci_enablebit_t *e = &(d->enablebits[port]);
597 * If this is a Promise FakeRaid controller,
598 * the 2nd controller will be marked as
599 * disabled while it is actually there and enabled
600 * by the bios for raid purposes.
601 * Skip the normal "is it enabled" test for those.
603 if ((d->flags & IDEPCI_FLAG_FORCE_PDC) &&
604 (secondpdc++==1) && (port==1))
607 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
608 (tmp & e->mask) != e->val))
609 continue; /* port not enabled */
612 if (d->channels <= port)
615 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
618 /* setup proper ancestral information */
619 hwif->gendev.parent = &dev->dev;
622 index->b.high = hwif->index;
624 index->b.low = hwif->index;
631 if (d->autodma == NODMA)
632 goto bypass_legacy_dma;
634 if(d->init_setup_dma)
635 d->init_setup_dma(dev, d, hwif);
637 ide_hwif_setup_dma(dev, d, hwif);
640 /* Call chipset-specific routine
641 * for each enabled hwif
646 at_least_one_hwif_enabled = 1;
648 if (!at_least_one_hwif_enabled)
649 printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
652 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
655 * ide_setup_pci_device() looks at the primary/secondary interfaces
656 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
657 * for use with them. This generic code works for most PCI chipsets.
659 * One thing that is not standardized is the location of the
660 * primary/secondary interface "enable/disable" bits. For chipsets that
661 * we "know" about, this information is in the ide_pci_device_t struct;
662 * for all other chipsets, we just assume both interfaces are enabled.
664 static ata_index_t do_ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d, u8 noisy)
667 int tried_config = 0;
668 ata_index_t index = { .b = { .low = 0xff, .high = 0xff } };
670 if (ide_setup_pci_controller(dev, d, noisy, &tried_config) < 0)
674 * Can we trust the reported IRQ?
678 /* Is it an "IDE storage" device in non-PCI mode? */
679 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
681 printk(KERN_INFO "%s: not 100%% native mode: "
682 "will probe irqs later\n", d->name);
684 * This allows offboard ide-pci cards the enable a BIOS,
685 * verify interrupt settings of split-mirror pci-config
686 * space, place chipset into init-mode, and/or preserve
687 * an interrupt if the card is not native ide support.
689 pciirq = (d->init_chipset) ? d->init_chipset(dev, d->name) : 0;
690 } else if (tried_config) {
692 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
694 } else if (!pciirq) {
696 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
702 if(d->init_chipset(dev, d->name) < 0)
707 printk(KERN_INFO "%s: 100%% native mode on irq %s\n",
708 d->name, __irq_itoa(pciirq));
710 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
715 if(pciirq < 0) /* Error not an IRQ */
718 ide_pci_setup_ports(dev, d, pciirq, &index);
723 void ide_setup_pci_device (struct pci_dev *dev, ide_pci_device_t *d)
725 ata_index_t index_list = do_ide_setup_pci_device(dev, d, 1);
727 if ((index_list.b.low & 0xf0) != 0xf0)
728 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.low], d->fixup);
729 if ((index_list.b.high & 0xf0) != 0xf0)
730 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.high], d->fixup);
732 create_proc_ide_interfaces();
735 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
737 void ide_setup_pci_devices (struct pci_dev *dev, struct pci_dev *dev2, ide_pci_device_t *d)
739 ata_index_t index_list = do_ide_setup_pci_device(dev, d, 1);
740 ata_index_t index_list2 = do_ide_setup_pci_device(dev2, d, 0);
742 if ((index_list.b.low & 0xf0) != 0xf0)
743 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.low], d->fixup);
744 if ((index_list.b.high & 0xf0) != 0xf0)
745 probe_hwif_init_with_fixup(&ide_hwifs[index_list.b.high], d->fixup);
746 if ((index_list2.b.low & 0xf0) != 0xf0)
747 probe_hwif_init_with_fixup(&ide_hwifs[index_list2.b.low], d->fixup);
748 if ((index_list2.b.high & 0xf0) != 0xf0)
749 probe_hwif_init_with_fixup(&ide_hwifs[index_list2.b.high], d->fixup);
751 create_proc_ide_interfaces();
754 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
757 static int ide_pci_try_unregister(struct pci_dev *dev)
761 ide_hwif_t *hwif = ide_hwifs;
763 for(i = 0; i < MAX_HWIFS; i++) {
764 if(hwif->configured && hwif->pci_dev == dev)
765 err |= __ide_unregister_hwif(hwif);
773 * ide_pci_remove_hwifs - remove PCI interfaces
776 * Remove any hwif attached to this PCI device. This will call
777 * back the various hwif->remove functions. In order to get the
778 * best results when delays occur we kill the iops before we
779 * potentially start blocking for long periods untangling the
782 * Takes the ide_cfg_sem in order to protect against races with
783 * new/old hwifs. Calls functions that take all the other locks
784 * so should be called with no locks held.
787 void ide_pci_remove_hwifs(struct pci_dev *dev)
790 ide_hwif_t *hwif = ide_hwifs;
795 err = ide_pci_try_unregister(dev);
798 printk(KERN_ERR "ide: PCI interfaces busy during hotplug. Waiting....\n");
799 for(i = 0; i < MAX_HWIFS; i++) {
800 if(hwif->configured && hwif->pci_dev == dev)
801 removed_hwif_iops(hwif);
806 /* Should drop this out to a work queue I think ? */
807 while(ide_pci_try_unregister(dev) < 0)
812 EXPORT_SYMBOL_GPL(ide_pci_remove_hwifs);
819 static int pre_init = 1; /* Before first ordered IDE scan */
820 static LIST_HEAD(ide_pci_drivers);
823 * ide_register_pci_driver - attach IDE driver
824 * @driver: pci driver
826 * Registers a driver with the IDE layer. The IDE layer arranges that
827 * boot time setup is done in the expected device order and then
828 * hands the controllers off to the core PCI code to do the rest of
831 * The driver_data of the driver table must point to an ide_pci_device_t
832 * describing the interface.
834 * Returns are the same as for pci_register_driver
837 int ide_pci_register_driver(struct pci_driver *driver)
840 return pci_module_init(driver);
841 list_add_tail(&driver->node, &ide_pci_drivers);
845 EXPORT_SYMBOL_GPL(ide_pci_register_driver);
848 * ide_unregister_pci_driver - unregister an IDE driver
849 * @driver: driver to remove
851 * Unregister a currently installed IDE driver. Returns are the same
852 * as for pci_unregister_driver
855 void ide_pci_unregister_driver(struct pci_driver *driver)
858 pci_unregister_driver(driver);
860 list_del(&driver->node);
863 EXPORT_SYMBOL_GPL(ide_pci_unregister_driver);
866 * ide_scan_pcidev - find an IDE driver for a device
867 * @dev: PCI device to check
869 * Look for an IDE driver to handle the device we are considering.
870 * This is only used during boot up to get the ordering correct. After
871 * boot up the pci layer takes over the job.
874 static int __init ide_scan_pcidev(struct pci_dev *dev)
877 struct pci_driver *d;
879 list_for_each(l, &ide_pci_drivers)
881 d = list_entry(l, struct pci_driver, node);
884 const struct pci_device_id *id = pci_match_device(d->id_table, dev);
887 if(d->probe(dev, id) >= 0)
899 * ide_scan_pcibus - perform the initial IDE driver scan
900 * @scan_direction: set for reverse order scanning
902 * Perform the initial bus rather than driver ordered scan of the
903 * PCI drivers. After this all IDE pci handling becomes standard
904 * module ordering not traditionally ordered.
907 void __init ide_scan_pcibus (int scan_direction)
909 struct pci_dev *dev = NULL;
910 struct pci_driver *d;
911 struct list_head *l, *n;
914 if (!scan_direction) {
915 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
916 ide_scan_pcidev(dev);
919 while ((dev = pci_find_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
920 ide_scan_pcidev(dev);
925 * Hand the drivers over to the PCI layer now we
929 list_for_each_safe(l, n, &ide_pci_drivers)
932 d = list_entry(l, struct pci_driver, node);
933 pci_register_driver(d);