2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * $Id: mthca_cmd.h 1349 2004-12-16 21:09:43Z roland $
40 #define MTHCA_CMD_MAILBOX_ALIGN 16UL
41 #define MTHCA_CMD_MAILBOX_EXTRA (MTHCA_CMD_MAILBOX_ALIGN - 1)
44 /* command completed successfully: */
45 MTHCA_CMD_STAT_OK = 0x00,
46 /* Internal error (such as a bus error) occurred while processing command: */
47 MTHCA_CMD_STAT_INTERNAL_ERR = 0x01,
48 /* Operation/command not supported or opcode modifier not supported: */
49 MTHCA_CMD_STAT_BAD_OP = 0x02,
50 /* Parameter not supported or parameter out of range: */
51 MTHCA_CMD_STAT_BAD_PARAM = 0x03,
52 /* System not enabled or bad system state: */
53 MTHCA_CMD_STAT_BAD_SYS_STATE = 0x04,
54 /* Attempt to access reserved or unallocaterd resource: */
55 MTHCA_CMD_STAT_BAD_RESOURCE = 0x05,
56 /* Requested resource is currently executing a command, or is otherwise busy: */
57 MTHCA_CMD_STAT_RESOURCE_BUSY = 0x06,
59 MTHCA_CMD_STAT_DDR_MEM_ERR = 0x07,
60 /* Required capability exceeds device limits: */
61 MTHCA_CMD_STAT_EXCEED_LIM = 0x08,
62 /* Resource is not in the appropriate state or ownership: */
63 MTHCA_CMD_STAT_BAD_RES_STATE = 0x09,
64 /* Index out of range: */
65 MTHCA_CMD_STAT_BAD_INDEX = 0x0a,
66 /* FW image corrupted: */
67 MTHCA_CMD_STAT_BAD_NVMEM = 0x0b,
68 /* Attempt to modify a QP/EE which is not in the presumed state: */
69 MTHCA_CMD_STAT_BAD_QPEE_STATE = 0x10,
70 /* Bad segment parameters (Address/Size): */
71 MTHCA_CMD_STAT_BAD_SEG_PARAM = 0x20,
72 /* Memory Region has Memory Windows bound to: */
73 MTHCA_CMD_STAT_REG_BOUND = 0x21,
74 /* HCA local attached memory not present: */
75 MTHCA_CMD_STAT_LAM_NOT_PRE = 0x22,
76 /* Bad management packet (silently discarded): */
77 MTHCA_CMD_STAT_BAD_PKT = 0x30,
78 /* More outstanding CQEs in CQ than new CQ size: */
79 MTHCA_CMD_STAT_BAD_SIZE = 0x40
83 MTHCA_TRANS_INVALID = 0,
85 MTHCA_TRANS_INIT2INIT,
89 MTHCA_TRANS_SQERR2RTS,
98 DEV_LIM_FLAG_SRQ = 1 << 6
101 struct mthca_dev_lim {
120 int max_requester_per_qp;
121 int max_responder_per_qp;
123 int local_ca_ack_delay;
150 int uar_scratch_entry_sz;
168 struct mthca_adapter {
175 struct mthca_init_hca_param {
187 u64 uar_scratch_base;
203 struct mthca_init_ib_param {
218 struct mthca_set_ib_param {
225 int mthca_cmd_use_events(struct mthca_dev *dev);
226 void mthca_cmd_use_polling(struct mthca_dev *dev);
227 void mthca_cmd_event(struct mthca_dev *dev, u16 token,
228 u8 status, u64 out_param);
230 int mthca_SYS_EN(struct mthca_dev *dev, u8 *status);
231 int mthca_SYS_DIS(struct mthca_dev *dev, u8 *status);
232 int mthca_MAP_FA(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status);
233 int mthca_UNMAP_FA(struct mthca_dev *dev, u8 *status);
234 int mthca_RUN_FW(struct mthca_dev *dev, u8 *status);
235 int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status);
236 int mthca_ENABLE_LAM(struct mthca_dev *dev, u8 *status);
237 int mthca_DISABLE_LAM(struct mthca_dev *dev, u8 *status);
238 int mthca_QUERY_DDR(struct mthca_dev *dev, u8 *status);
239 int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
240 struct mthca_dev_lim *dev_lim, u8 *status);
241 int mthca_QUERY_ADAPTER(struct mthca_dev *dev,
242 struct mthca_adapter *adapter, u8 *status);
243 int mthca_INIT_HCA(struct mthca_dev *dev,
244 struct mthca_init_hca_param *param,
246 int mthca_INIT_IB(struct mthca_dev *dev,
247 struct mthca_init_ib_param *param,
248 int port, u8 *status);
249 int mthca_CLOSE_IB(struct mthca_dev *dev, int port, u8 *status);
250 int mthca_CLOSE_HCA(struct mthca_dev *dev, int panic, u8 *status);
251 int mthca_SET_IB(struct mthca_dev *dev, struct mthca_set_ib_param *param,
252 int port, u8 *status);
253 int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt, u8 *status);
254 int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status);
255 int mthca_UNMAP_ICM(struct mthca_dev *dev, u64 virt, u32 page_count, u8 *status);
256 int mthca_MAP_ICM_AUX(struct mthca_dev *dev, struct mthca_icm *icm, u8 *status);
257 int mthca_UNMAP_ICM_AUX(struct mthca_dev *dev, u8 *status);
258 int mthca_SET_ICM_SIZE(struct mthca_dev *dev, u64 icm_size, u64 *aux_pages,
260 int mthca_SW2HW_MPT(struct mthca_dev *dev, void *mpt_entry,
261 int mpt_index, u8 *status);
262 int mthca_HW2SW_MPT(struct mthca_dev *dev, void *mpt_entry,
263 int mpt_index, u8 *status);
264 int mthca_WRITE_MTT(struct mthca_dev *dev, u64 *mtt_entry,
265 int num_mtt, u8 *status);
266 int mthca_MAP_EQ(struct mthca_dev *dev, u64 event_mask, int unmap,
267 int eq_num, u8 *status);
268 int mthca_SW2HW_EQ(struct mthca_dev *dev, void *eq_context,
269 int eq_num, u8 *status);
270 int mthca_HW2SW_EQ(struct mthca_dev *dev, void *eq_context,
271 int eq_num, u8 *status);
272 int mthca_SW2HW_CQ(struct mthca_dev *dev, void *cq_context,
273 int cq_num, u8 *status);
274 int mthca_HW2SW_CQ(struct mthca_dev *dev, void *cq_context,
275 int cq_num, u8 *status);
276 int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
277 int is_ee, void *qp_context, u32 optmask,
279 int mthca_QUERY_QP(struct mthca_dev *dev, u32 num, int is_ee,
280 void *qp_context, u8 *status);
281 int mthca_CONF_SPECIAL_QP(struct mthca_dev *dev, int type, u32 qpn,
283 int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey,
284 int port, struct ib_wc* in_wc, struct ib_grh* in_grh,
285 void *in_mad, void *response_mad, u8 *status);
286 int mthca_READ_MGM(struct mthca_dev *dev, int index, void *mgm,
288 int mthca_WRITE_MGM(struct mthca_dev *dev, int index, void *mgm,
290 int mthca_MGID_HASH(struct mthca_dev *dev, void *gid, u16 *hash,
292 int mthca_NOP(struct mthca_dev *dev, u8 *status);
294 #define MAILBOX_ALIGN(x) ((void *) ALIGN((unsigned long) (x), MTHCA_CMD_MAILBOX_ALIGN))
296 #endif /* MTHCA_CMD_H */