2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/config.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/sysdev.h>
23 #include <linux/serio.h>
24 #include <linux/pci.h>
25 #include <linux/err.h>
29 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
30 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
31 MODULE_LICENSE("GPL");
33 static unsigned int i8042_noaux;
34 module_param_named(noaux, i8042_noaux, bool, 0);
35 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
37 static unsigned int i8042_nomux;
38 module_param_named(nomux, i8042_nomux, bool, 0);
39 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
41 static unsigned int i8042_unlock;
42 module_param_named(unlock, i8042_unlock, bool, 0);
43 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
45 static unsigned int i8042_reset;
46 module_param_named(reset, i8042_reset, bool, 0);
47 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
49 static unsigned int i8042_direct;
50 module_param_named(direct, i8042_direct, bool, 0);
51 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
53 static unsigned int i8042_dumbkbd;
54 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
55 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
57 static unsigned int i8042_noloop;
58 module_param_named(noloop, i8042_noloop, bool, 0);
59 MODULE_PARM_DESC(dumbkbd, "Disable the AUX Loopback command while probing for the AUX port");
61 __obsolete_setup("i8042_noaux");
62 __obsolete_setup("i8042_nomux");
63 __obsolete_setup("i8042_unlock");
64 __obsolete_setup("i8042_reset");
65 __obsolete_setup("i8042_direct");
66 __obsolete_setup("i8042_dumbkbd");
71 spinlock_t i8042_lock = SPIN_LOCK_UNLOCKED;
75 unsigned char disable;
82 static struct i8042_values i8042_kbd_values = {
83 .disable = I8042_CTR_KBDDIS,
84 .irqen = I8042_CTR_KBDINT,
89 static struct i8042_values i8042_aux_values = {
90 .disable = I8042_CTR_AUXDIS,
91 .irqen = I8042_CTR_AUXINT,
96 static struct i8042_values i8042_mux_values[I8042_NUM_MUX_PORTS];
98 static struct serio *i8042_kbd_port;
99 static struct serio *i8042_aux_port;
100 static struct serio *i8042_mux_port[I8042_NUM_MUX_PORTS];
101 static unsigned char i8042_initial_ctr;
102 static unsigned char i8042_ctr;
103 static unsigned char i8042_mux_open;
104 static unsigned char i8042_mux_present;
105 static struct pm_dev *i8042_pm_dev;
106 static struct timer_list i8042_timer;
107 static struct platform_device *i8042_platform_device;
110 * Shared IRQ's require a device pointer, but this driver doesn't support
113 #define i8042_request_irq_cookie (&i8042_timer)
115 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
118 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
119 * be ready for reading values from it / writing values to it.
120 * Called always with i8042_lock held.
123 static int i8042_wait_read(void)
126 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
130 return -(i == I8042_CTL_TIMEOUT);
133 static int i8042_wait_write(void)
136 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
140 return -(i == I8042_CTL_TIMEOUT);
144 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
145 * of the i8042 down the toilet.
148 static int i8042_flush(void)
154 spin_lock_irqsave(&i8042_lock, flags);
156 while ((i8042_read_status() & I8042_STR_OBF) && (i++ < I8042_BUFFER_SIZE)) {
158 data = i8042_read_data();
159 dbg("%02x <- i8042 (flush, %s)", data,
160 i8042_read_status() & I8042_STR_AUXDATA ? "aux" : "kbd");
163 spin_unlock_irqrestore(&i8042_lock, flags);
169 * i8042_command() executes a command on the i8042. It also sends the input
170 * parameter(s) of the commands to it, and receives the output value(s). The
171 * parameters are to be stored in the param array, and the output is placed
172 * into the same array. The number of the parameters and output values is
173 * encoded in bits 8-11 of the command number.
176 static int i8042_command(unsigned char *param, int command)
179 int retval = 0, i = 0;
181 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
184 spin_lock_irqsave(&i8042_lock, flags);
186 retval = i8042_wait_write();
188 dbg("%02x -> i8042 (command)", command & 0xff);
189 i8042_write_command(command & 0xff);
193 for (i = 0; i < ((command >> 12) & 0xf); i++) {
194 if ((retval = i8042_wait_write())) break;
195 dbg("%02x -> i8042 (parameter)", param[i]);
196 i8042_write_data(param[i]);
200 for (i = 0; i < ((command >> 8) & 0xf); i++) {
201 if ((retval = i8042_wait_read())) break;
202 if (i8042_read_status() & I8042_STR_AUXDATA)
203 param[i] = ~i8042_read_data();
205 param[i] = i8042_read_data();
206 dbg("%02x <- i8042 (return)", param[i]);
209 spin_unlock_irqrestore(&i8042_lock, flags);
212 dbg(" -- i8042 (timeout)");
218 * i8042_kbd_write() sends a byte out through the keyboard interface.
221 static int i8042_kbd_write(struct serio *port, unsigned char c)
226 spin_lock_irqsave(&i8042_lock, flags);
228 if(!(retval = i8042_wait_write())) {
229 dbg("%02x -> i8042 (kbd-data)", c);
233 spin_unlock_irqrestore(&i8042_lock, flags);
239 * i8042_aux_write() sends a byte out through the aux interface.
242 static int i8042_aux_write(struct serio *port, unsigned char c)
244 struct i8042_values *values = port->port_data;
251 if (values->mux == -1)
252 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
254 retval = i8042_command(&c, I8042_CMD_MUX_SEND + values->mux);
257 * Make sure the interrupt happens and the character is received even
258 * in the case the IRQ isn't wired, so that we can receive further
262 i8042_interrupt(0, NULL, NULL);
267 * i8042_activate_port() enables port on a chip.
270 static int i8042_activate_port(struct serio *port)
272 struct i8042_values *values = port->port_data;
277 * Enable port again here because it is disabled if we are
278 * resuming (normally it is enabled already).
280 i8042_ctr &= ~values->disable;
282 i8042_ctr |= values->irqen;
284 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
285 i8042_ctr &= ~values->irqen;
294 * i8042_open() is called when a port is open by the higher layer.
295 * It allocates the interrupt and calls i8042_enable_port.
298 static int i8042_open(struct serio *port)
300 struct i8042_values *values = port->port_data;
302 if (values->mux != -1)
303 if (i8042_mux_open++)
306 if (request_irq(values->irq, i8042_interrupt,
307 SA_SHIRQ, "i8042", i8042_request_irq_cookie)) {
308 printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", values->irq, values->name);
312 if (i8042_activate_port(port)) {
313 printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", values->name);
317 i8042_interrupt(0, NULL, NULL);
322 free_irq(values->irq, i8042_request_irq_cookie);
326 serio_unregister_port_delayed(port);
332 * i8042_close() frees the interrupt, so that it can possibly be used
333 * by another driver. We never know - if the user doesn't have a mouse,
334 * the BIOS could have used the AUX interrupt for PCI.
337 static void i8042_close(struct serio *port)
339 struct i8042_values *values = port->port_data;
341 if (values->mux != -1)
342 if (--i8042_mux_open)
345 i8042_ctr &= ~values->irqen;
347 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
348 printk(KERN_ERR "i8042.c: Can't write CTR while closing %s.\n", values->name);
352 free_irq(values->irq, i8042_request_irq_cookie);
358 * i8042_interrupt() is the most important function in this driver -
359 * it handles the interrupts from the i8042, and sends incoming bytes
360 * to the upper layers.
363 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
366 unsigned char str, data = 0;
368 unsigned int aux_idx;
371 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
373 spin_lock_irqsave(&i8042_lock, flags);
374 str = i8042_read_status();
375 if (str & I8042_STR_OBF)
376 data = i8042_read_data();
377 spin_unlock_irqrestore(&i8042_lock, flags);
379 if (~str & I8042_STR_OBF) {
380 if (irq) dbg("Interrupt %d, without any data", irq);
385 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
386 static unsigned long last_transmit;
387 static unsigned char last_str;
390 if (str & I8042_STR_MUXERR) {
391 dbg("MUX error, status is %02x, data is %02x", str, data);
395 * When MUXERR condition is signalled the data register can only contain
396 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
397 * it is not always the case. Some KBC just get confused which port the
398 * data came from and signal error leaving the data intact. They _do not_
399 * revert to legacy mode (actually I've never seen KBC reverting to legacy
400 * mode yet, when we see one we'll add proper handling).
401 * Anyway, we will assume that the data came from the same serio last byte
402 * was transmitted (if transmission happened not too long ago).
404 if (time_before(jiffies, last_transmit + HZ/10)) {
408 /* fall through - report timeout */
410 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
411 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
415 aux_idx = (str >> 6) & 3;
417 dbg("%02x <- i8042 (interrupt, aux%d, %d%s%s)",
419 dfl & SERIO_PARITY ? ", bad parity" : "",
420 dfl & SERIO_TIMEOUT ? ", timeout" : "");
422 if (likely(i8042_mux_values[aux_idx].exists))
423 serio_interrupt(i8042_mux_port[aux_idx], data, dfl, regs);
426 last_transmit = jiffies;
430 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
431 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
433 dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
434 data, (str & I8042_STR_AUXDATA) ? "aux" : "kbd", irq,
435 dfl & SERIO_PARITY ? ", bad parity" : "",
436 dfl & SERIO_TIMEOUT ? ", timeout" : "");
439 if (str & I8042_STR_AUXDATA) {
440 if (likely(i8042_aux_values.exists))
441 serio_interrupt(i8042_aux_port, data, dfl, regs);
443 if (likely(i8042_kbd_values.exists))
444 serio_interrupt(i8042_kbd_port, data, dfl, regs);
450 return IRQ_RETVAL(ret);
454 * i8042_enable_mux_mode checks whether the controller has an active
455 * multiplexor and puts the chip into Multiplexed (as opposed to
459 static int i8042_enable_mux_mode(struct i8042_values *values, unsigned char *mux_version)
464 * Get rid of bytes in the queue.
470 * Internal loopback test - send three bytes, they should come back from the
471 * mouse interface, the last should be version. Note that we negate mouseport
472 * command responses for the i8042_check_aux() routine.
476 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x0f)
479 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa9)
482 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == 0x5b)
486 *mux_version = ~param;
493 * i8042_enable_mux_ports enables 4 individual AUX ports after
494 * the controller has been switched into Multiplexed mode
497 static int i8042_enable_mux_ports(struct i8042_values *values)
502 * Disable all muxed ports by disabling AUX.
505 i8042_ctr |= I8042_CTR_AUXDIS;
506 i8042_ctr &= ~I8042_CTR_AUXINT;
508 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
509 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
514 * Enable all muxed ports.
517 for (i = 0; i < 4; i++) {
518 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
519 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
527 * i8042_check_mux() checks whether the controller supports the PS/2 Active
528 * Multiplexing specification by Synaptics, Phoenix, Insyde and
532 static int __init i8042_check_mux(struct i8042_values *values)
534 unsigned char mux_version;
536 if (i8042_enable_mux_mode(values, &mux_version))
539 /* Workaround for broken chips which seem to support MUX, but in reality don't. */
540 /* They all report version 10.12 */
541 if (mux_version == 0xAC)
544 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
545 (mux_version >> 4) & 0xf, mux_version & 0xf);
547 if (i8042_enable_mux_ports(values))
550 i8042_mux_present = 1;
556 * i8042_check_aux() applies as much paranoia as it can at detecting
557 * the presence of an AUX interface.
560 static int __init i8042_check_aux(struct i8042_values *values)
563 static int i8042_check_aux_cookie;
566 * Check if AUX irq is available. If it isn't, then there is no point
567 * in trying to detect AUX presence.
570 if (request_irq(values->irq, i8042_interrupt, SA_SHIRQ,
571 "i8042", &i8042_check_aux_cookie))
573 free_irq(values->irq, &i8042_check_aux_cookie);
576 * Get rid of bytes in the queue.
582 * Internal loopback test - filters out AT-type i8042's. Unfortunately
583 * SiS screwed up and their 5597 doesn't support the LOOP command even
584 * though it has an AUX port.
588 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa5) {
591 * External connection test - filters out AT-soldered PS/2 i8042's
592 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
593 * 0xfa - no error on some notebooks which ignore the spec
594 * Because it's common for chipsets to return error on perfectly functioning
595 * AUX ports, we test for this only when the LOOP command failed.
598 if (i8042_command(¶m, I8042_CMD_AUX_TEST)
599 || (param && param != 0xfa && param != 0xff))
604 * Bit assignment test - filters out PS/2 i8042's in AT mode
607 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
609 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
610 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
611 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
614 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
616 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
620 * Disable the interface.
623 i8042_ctr |= I8042_CTR_AUXDIS;
624 i8042_ctr &= ~I8042_CTR_AUXINT;
626 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
634 * i8042_port_register() marks the device as existing,
635 * registers it, and reports to the user.
638 static int __init i8042_port_register(struct serio *port)
640 struct i8042_values *values = port->port_data;
644 i8042_ctr &= ~values->disable;
646 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
647 printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
652 printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
654 (unsigned long) I8042_DATA_REG,
655 (unsigned long) I8042_COMMAND_REG,
658 serio_register_port(port);
664 static void i8042_timer_func(unsigned long data)
666 i8042_interrupt(0, NULL, NULL);
670 static int i8042_spank_usb(void)
672 struct pci_dev *usb = NULL;
679 while((usb = pci_get_class((PCI_CLASS_SERIAL_USB << 8), usb)) != NULL)
681 /* UHCI controller not in legacy ? */
683 pci_read_config_word(usb, 0xC0, &word);
687 /* Check it is enabled. If the port is active in legacy mode
688 then this will be mapped already */
690 for(i = 0; i < PCI_ROM_RESOURCE; i++)
692 if (!(pci_resource_flags (usb, i) & IORESOURCE_IO))
695 if(i == PCI_ROM_RESOURCE)
702 addr = pci_resource_start(usb, i);
703 len = pci_resource_len (usb, i);
706 * Check its configured and not in use
710 if (request_region(addr, len, "usb whackamole"))
714 * Kick the problem controller out of legacy mode
715 * so things like the E750x don't break
718 outw(0, addr + 4); /* IRQ Mask */
719 outw(4, addr); /* Reset */
724 /* Now take if off the BIOS */
725 pci_write_config_word(usb, 0xC0, 0x2000);
726 release_region(addr, len);
736 * i8042_controller init initializes the i8042 controller, and,
737 * most importantly, sets it into non-xlated mode if that's
741 static int i8042_controller_init(void)
747 * Test the i8042. We need to know if it thinks it's working correctly
748 * before doing anything else.
757 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
758 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
762 if (param != I8042_RET_CTL_TEST) {
763 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
764 param, I8042_RET_CTL_TEST);
770 * Save the CTR for restoral on unload / reboot.
773 while(i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
774 if(tries > 3 || !i8042_spank_usb())
776 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
779 printk(KERN_WARNING "i8042.c: Can't read CTR, disabling USB legacy and retrying.\n");
784 i8042_initial_ctr = i8042_ctr;
787 * Disable the keyboard interface and interrupt.
790 i8042_ctr |= I8042_CTR_KBDDIS;
791 i8042_ctr &= ~I8042_CTR_KBDINT;
797 spin_lock_irqsave(&i8042_lock, flags);
798 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
800 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
802 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
804 spin_unlock_irqrestore(&i8042_lock, flags);
807 * If the chip is configured into nontranslated mode by the BIOS, don't
808 * bother enabling translating and be happy.
811 if (~i8042_ctr & I8042_CTR_XLATE)
815 * Set nontranslated mode for the kbd interface if requested by an option.
816 * After this the kbd interface becomes a simple serial in/out, like the aux
817 * interface is. We don't do this by default, since it can confuse notebook
822 i8042_ctr &= ~I8042_CTR_XLATE;
828 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
829 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
838 * Reset the controller.
840 void i8042_controller_reset(void)
845 if (i8042_command(¶m, I8042_CMD_CTL_TEST))
846 printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
850 * Restore the original control register setting.
853 i8042_ctr = i8042_initial_ctr;
855 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
856 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
861 * Here we try to reset everything back to a state in which the BIOS will be
862 * able to talk to the hardware when rebooting.
865 void i8042_controller_cleanup(void)
872 * Reset anything that is connected to the ports.
875 if (i8042_kbd_values.exists)
876 serio_cleanup(i8042_kbd_port);
878 if (i8042_aux_values.exists)
879 serio_cleanup(i8042_aux_port);
881 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
882 if (i8042_mux_values[i].exists)
883 serio_cleanup(i8042_mux_port[i]);
885 i8042_controller_reset();
889 static int blink_frequency = 500;
890 module_param_named(panicblink, blink_frequency, int, 0600);
892 /* Catch the case when the kbd interrupt is off */
893 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
895 /* Tell the user who may be running in X and not see the console that we have
896 panic'ed. This is to distingush panics from "real" lockups. */
897 static long i8042_panic_blink(long count)
900 static long last_blink;
902 /* Roughly 1/2s frequency. KDB uses about 1s. Make sure it is
904 if (!blink_frequency)
906 if (count - last_blink < blink_frequency)
909 while (i8042_read_status() & I8042_STR_IBF)
911 i8042_write_data(0xed); /* set leds */
913 while (i8042_read_status() & I8042_STR_IBF)
916 i8042_write_data(led);
925 * Here we try to restore the original BIOS settings
928 static int i8042_controller_suspend(void)
930 del_timer_sync(&i8042_timer);
931 i8042_controller_reset();
938 * Here we try to reset everything back to a state in which suspended
941 static int i8042_controller_resume(void)
945 if (i8042_controller_init()) {
946 printk(KERN_ERR "i8042: resume failed\n");
950 if (i8042_mux_present)
951 if (i8042_enable_mux_mode(&i8042_aux_values, NULL) ||
952 i8042_enable_mux_ports(&i8042_aux_values)) {
953 printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
957 * Reconnect anything that was connected to the ports.
960 if (i8042_kbd_values.exists && i8042_activate_port(i8042_kbd_port) == 0)
961 serio_reconnect(i8042_kbd_port);
963 if (i8042_aux_values.exists && i8042_activate_port(i8042_aux_port) == 0)
964 serio_reconnect(i8042_aux_port);
966 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
967 if (i8042_mux_values[i].exists && i8042_activate_port(i8042_mux_port[i]) == 0)
968 serio_reconnect(i8042_mux_port[i]);
970 * Restart timer (for polling "stuck" data)
972 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
974 panic_blink = i8042_panic_blink;
981 * We need to reset the 8042 back to original mode on system shutdown,
982 * because otherwise BIOSes will be confused.
985 static int i8042_notify_sys(struct notifier_block *this, unsigned long code,
988 if (code == SYS_DOWN || code == SYS_HALT)
989 i8042_controller_cleanup();
993 static struct notifier_block i8042_notifier =
1001 * Suspend/resume handlers for the new PM scheme (driver model)
1003 static int i8042_suspend(struct device *dev, u32 state, u32 level)
1005 return level == SUSPEND_DISABLE ? i8042_controller_suspend() : 0;
1008 static int i8042_resume(struct device *dev, u32 level)
1010 return level == RESUME_ENABLE ? i8042_controller_resume() : 0;
1013 static void i8042_shutdown(struct device *dev)
1015 i8042_controller_cleanup();
1018 static struct device_driver i8042_driver = {
1020 .bus = &platform_bus_type,
1021 .suspend = i8042_suspend,
1022 .resume = i8042_resume,
1023 .shutdown = i8042_shutdown,
1027 * Suspend/resume handler for the old PM scheme (APM)
1029 static int i8042_pm_callback(struct pm_dev *dev, pm_request_t request, void *dummy)
1033 return i8042_controller_suspend();
1036 return i8042_controller_resume();
1042 static struct serio * __init i8042_allocate_kbd_port(void)
1044 struct serio *serio;
1046 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1048 memset(serio, 0, sizeof(struct serio));
1049 serio->type = i8042_direct ? SERIO_8042 : SERIO_8042_XL,
1050 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write,
1051 serio->open = i8042_open,
1052 serio->close = i8042_close,
1053 serio->port_data = &i8042_kbd_values,
1054 serio->dev.parent = &i8042_platform_device->dev;
1055 strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
1056 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1062 static struct serio * __init i8042_allocate_aux_port(void)
1064 struct serio *serio;
1066 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1068 memset(serio, 0, sizeof(struct serio));
1069 serio->type = SERIO_8042;
1070 serio->write = i8042_aux_write;
1071 serio->open = i8042_open;
1072 serio->close = i8042_close;
1073 serio->port_data = &i8042_aux_values,
1074 serio->dev.parent = &i8042_platform_device->dev;
1075 strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
1076 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1082 static struct serio * __init i8042_allocate_mux_port(int index)
1084 struct serio *serio;
1085 struct i8042_values *values = &i8042_mux_values[index];
1087 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1089 *values = i8042_aux_values;
1090 snprintf(values->name, sizeof(values->name), "AUX%d", index);
1091 values->mux = index;
1093 memset(serio, 0, sizeof(struct serio));
1094 serio->type = SERIO_8042;
1095 serio->write = i8042_aux_write;
1096 serio->open = i8042_open;
1097 serio->close = i8042_close;
1098 serio->port_data = values;
1099 serio->dev.parent = &i8042_platform_device->dev;
1100 snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
1101 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
1107 int __init i8042_init(void)
1114 init_timer(&i8042_timer);
1115 i8042_timer.function = i8042_timer_func;
1117 if (i8042_platform_init())
1120 i8042_aux_values.irq = I8042_AUX_IRQ;
1121 i8042_kbd_values.irq = I8042_KBD_IRQ;
1123 if (i8042_controller_init())
1126 err = driver_register(&i8042_driver);
1130 i8042_platform_device = platform_device_register_simple("i8042", -1, NULL, 0);
1131 if (IS_ERR(i8042_platform_device)) {
1132 driver_unregister(&i8042_driver);
1133 return PTR_ERR(i8042_platform_device);
1136 if (!i8042_noaux && !i8042_check_aux(&i8042_aux_values)) {
1137 if (!i8042_nomux && !i8042_check_mux(&i8042_aux_values))
1138 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1139 i8042_mux_port[i] = i8042_allocate_mux_port(i);
1140 if (i8042_mux_port[i])
1141 i8042_port_register(i8042_mux_port[i]);
1144 i8042_aux_port = i8042_allocate_aux_port();
1146 i8042_port_register(i8042_aux_port);
1150 i8042_kbd_port = i8042_allocate_kbd_port();
1152 i8042_port_register(i8042_kbd_port);
1154 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
1156 i8042_pm_dev = pm_register(PM_SYS_DEV, PM_SYS_UNKNOWN, i8042_pm_callback);
1158 register_reboot_notifier(&i8042_notifier);
1163 void __exit i8042_exit(void)
1167 unregister_reboot_notifier(&i8042_notifier);
1170 pm_unregister(i8042_pm_dev);
1172 i8042_controller_cleanup();
1174 if (i8042_kbd_values.exists)
1175 serio_unregister_port(i8042_kbd_port);
1177 if (i8042_aux_values.exists)
1178 serio_unregister_port(i8042_aux_port);
1180 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
1181 if (i8042_mux_values[i].exists)
1182 serio_unregister_port(i8042_mux_port[i]);
1184 del_timer_sync(&i8042_timer);
1186 platform_device_unregister(i8042_platform_device);
1187 driver_unregister(&i8042_driver);
1189 i8042_platform_exit();
1194 module_init(i8042_init);
1195 module_exit(i8042_exit);