1 /* $Id: os_pri.c,v 1.32 2004/03/21 17:26:01 armin Exp $ */
14 #include "xdi_adapter.h"
22 /* --------------------------------------------------------------------------
23 OS Dependent part of XDI driver for DIVA PRI Adapter
25 DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com)
26 -------------------------------------------------------------------------- */
28 #define DIVA_PRI_NO_PCI_BIOS_WORKAROUND 1
30 extern int diva_card_read_xlog(diva_os_xdi_adapter_t * a);
35 extern void prepare_pri_functions(PISDN_ADAPTER IoAdapter);
36 extern void prepare_pri2_functions(PISDN_ADAPTER IoAdapter);
37 extern void diva_xdi_display_adapter_features(int card);
39 static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a);
40 static int diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
41 diva_xdi_um_cfg_cmd_t * cmd, int length);
42 static int pri_get_serial_number(diva_os_xdi_adapter_t * a);
43 static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a);
44 static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a);
47 ** Check card revision
49 static int pri_is_rev_2_card(int card_ordinal)
51 switch (card_ordinal) {
52 case CARDTYPE_DIVASRV_P_30M_V2_PCI:
53 case CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI:
59 static void diva_pri_set_addresses(diva_os_xdi_adapter_t * a)
61 a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0;
62 a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2;
63 a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4;
64 a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
65 a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2;
66 a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4;
67 a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3;
69 a->xdi_adapter.Address = a->resources.pci.addr[0];
70 a->xdi_adapter.Control = a->resources.pci.addr[2];
71 a->xdi_adapter.Config = a->resources.pci.addr[4];
73 a->xdi_adapter.ram = a->resources.pci.addr[0];
74 a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
76 a->xdi_adapter.reset = a->resources.pci.addr[2];
77 a->xdi_adapter.reset += MP_RESET;
79 a->xdi_adapter.cfg = a->resources.pci.addr[4];
80 a->xdi_adapter.cfg += MP_IRQ_RESET;
82 a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
84 a->xdi_adapter.prom = a->resources.pci.addr[3];
88 ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2
89 ** BAR1 - DEVICES, 0x1000
90 ** BAR2 - CONTROL (REG), 0x2000
91 ** BAR3 - FLASH (REG), 0x8000
92 ** BAR4 - CONFIG (CFG), 0x1000
94 int diva_pri_init_card(diva_os_xdi_adapter_t * a)
98 unsigned long bar_length[5] = {
106 pri_rev_2 = pri_is_rev_2_card(a->CardOrdinal);
109 bar_length[0] = MP2_MEMORY_SIZE;
114 a->xdi_adapter.Properties = CardProperties[a->CardOrdinal];
115 DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name))
118 First initialization step: get and check hardware resoures.
119 Do not map resources and do not acecess card at this step
121 for (bar = 0; bar < 5; bar++) {
122 a->resources.pci.bar[bar] =
123 divasa_get_pci_bar(a->resources.pci.bus,
124 a->resources.pci.func, bar,
125 a->resources.pci.hdev);
126 if (!a->resources.pci.bar[bar]
127 || (a->resources.pci.bar[bar] == 0xFFFFFFF0)) {
128 DBG_ERR(("A: invalid bar[%d]=%08x", bar,
129 a->resources.pci.bar[bar]))
133 a->resources.pci.irq =
134 (byte) divasa_get_pci_irq(a->resources.pci.bus,
135 a->resources.pci.func,
136 a->resources.pci.hdev);
137 if (!a->resources.pci.irq) {
138 DBG_ERR(("A: invalid irq"));
145 for (bar = 0; bar < 5; bar++) {
146 a->resources.pci.addr[bar] =
147 divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar],
149 if (!a->resources.pci.addr[bar]) {
150 DBG_ERR(("A: A(%d), can't map bar[%d]",
152 diva_pri_cleanup_adapter(a);
160 diva_pri_set_addresses(a);
163 Get Serial Number of this adapter
165 if (pri_get_serial_number(a)) {
167 serNo = a->resources.pci.bar[1] & 0xffff0000;
168 serNo |= ((dword) a->resources.pci.bus) << 8;
169 serNo += (a->resources.pci.func + a->controller + 1);
170 a->xdi_adapter.serialNo = serNo & ~0xFF000000;
171 DBG_ERR(("A: A(%d) can't get Serial Number, generated serNo=%ld",
172 a->controller, a->xdi_adapter.serialNo))
177 Initialize os objects
179 if (diva_os_initialize_spin_lock(&a->xdi_adapter.isr_spin_lock, "isr")) {
180 diva_pri_cleanup_adapter(a);
183 if (diva_os_initialize_spin_lock
184 (&a->xdi_adapter.data_spin_lock, "data")) {
185 diva_pri_cleanup_adapter(a);
189 strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasprid");
191 if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr,
192 DIDpcRoutine, &a->xdi_adapter)) {
193 diva_pri_cleanup_adapter(a);
198 Do not initialize second DPC - only one thread will be created
200 a->xdi_adapter.isr_soft_isr.object =
201 a->xdi_adapter.req_soft_isr.object;
204 Next step of card initialization:
205 set up all interface pointers
207 a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels;
208 a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info;
210 a->xdi_adapter.e_tbl =
211 diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO));
212 if (!a->xdi_adapter.e_tbl) {
213 diva_pri_cleanup_adapter(a);
216 memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO));
218 a->xdi_adapter.a.io = &a->xdi_adapter;
219 a->xdi_adapter.DIRequest = request;
220 a->interface.cleanup_adapter_proc = diva_pri_cleanup_adapter;
221 a->interface.cmd_proc = diva_pri_cmd_card_proc;
224 prepare_pri2_functions(&a->xdi_adapter);
226 prepare_pri_functions(&a->xdi_adapter);
229 a->dsp_mask = diva_pri_detect_dsps(a);
235 diva_init_dma_map(a->resources.pci.hdev,
236 (struct _diva_dma_map_entry **) &a->xdi_adapter.dma_map, 32);
242 a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq;
243 sprintf(a->xdi_adapter.irq_info.irq_name,
244 "DIVA PRI %ld", (long) a->xdi_adapter.serialNo);
246 if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr,
247 a->xdi_adapter.irq_info.irq_name)) {
248 diva_pri_cleanup_adapter(a);
251 a->xdi_adapter.irq_info.registered = 1;
253 diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name,
254 a->resources.pci.irq, a->xdi_adapter.serialNo);
259 static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a)
264 Stop Adapter if adapter is running
266 if (a->xdi_adapter.Initialized) {
267 diva_pri_stop_adapter(a);
273 if (a->xdi_adapter.irq_info.registered) {
274 diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr);
276 a->xdi_adapter.irq_info.registered = 0;
279 Step 1: unmap all BAR's, if any was mapped
281 for (bar = 0; bar < 5; bar++) {
282 if (a->resources.pci.bar[bar]
283 && a->resources.pci.addr[bar]) {
284 divasa_unmap_pci_bar(a->resources.pci.addr[bar]);
285 a->resources.pci.bar[bar] = 0;
286 a->resources.pci.addr[bar] = NULL;
293 diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr);
294 diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr);
296 diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr);
297 a->xdi_adapter.isr_soft_isr.object = NULL;
299 diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm");
300 diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm");
303 Free memory accupied by XDI adapter
305 if (a->xdi_adapter.e_tbl) {
306 diva_os_free(0, a->xdi_adapter.e_tbl);
307 a->xdi_adapter.e_tbl = NULL;
309 a->xdi_adapter.Channels = 0;
310 a->xdi_adapter.e_max = 0;
316 diva_free_dma_map(a->resources.pci.hdev,
317 (struct _diva_dma_map_entry *) a->xdi_adapter.
319 a->xdi_adapter.dma_map = NULL;
323 Detach this adapter from debug driver
330 ** Activate On Board Boot Loader
332 static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
335 struct mp_load *boot;
337 if (!IoAdapter->Address || !IoAdapter->reset) {
340 if (IoAdapter->Initialized) {
341 DBG_ERR(("A: A(%d) can't reset PRI adapter - please stop first",
346 boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
347 WRITE_DWORD(&boot->err, 0);
348 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
350 IoAdapter->rstFnc(IoAdapter);
354 boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
355 i = READ_DWORD(&boot->live);
358 if (i == READ_DWORD(&boot->live)) {
359 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
360 DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!",
361 IoAdapter->ANum, IoAdapter->serialNo))
364 if (READ_DWORD(&boot->err)) {
365 DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx",
366 IoAdapter->ANum, IoAdapter->serialNo,
367 READ_DWORD(&boot->err)))
368 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
371 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
374 Forget all outstanding entities
376 IoAdapter->e_count = 0;
377 if (IoAdapter->e_tbl) {
378 memset(IoAdapter->e_tbl, 0x00,
379 IoAdapter->e_max * sizeof(E_INFO));
383 IoAdapter->assign = 0;
384 IoAdapter->trapped = 0;
386 memset(&IoAdapter->a.IdTable[0], 0x00,
387 sizeof(IoAdapter->a.IdTable));
388 memset(&IoAdapter->a.IdTypeTable[0], 0x00,
389 sizeof(IoAdapter->a.IdTypeTable));
390 memset(&IoAdapter->a.FlowControlIdTable[0], 0x00,
391 sizeof(IoAdapter->a.FlowControlIdTable));
392 memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00,
393 sizeof(IoAdapter->a.FlowControlSkipTable));
394 memset(&IoAdapter->a.misc_flags_table[0], 0x00,
395 sizeof(IoAdapter->a.misc_flags_table));
396 memset(&IoAdapter->a.rx_stream[0], 0x00,
397 sizeof(IoAdapter->a.rx_stream));
398 memset(&IoAdapter->a.tx_stream[0], 0x00,
399 sizeof(IoAdapter->a.tx_stream));
400 memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos));
401 memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos));
407 diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
409 const byte * data, dword length, dword limit)
411 byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
414 if (((address + length) >= limit) || !mem) {
415 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
416 DBG_ERR(("A: A(%d) write PRI address=0x%08lx",
417 IoAdapter->ANum, address + length))
426 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
431 diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
432 dword start_address, dword features)
437 struct mp_load *boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
438 ADAPTER *a = &IoAdapter->a;
440 if (IoAdapter->Initialized) {
441 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
442 DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running",
447 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
448 DBG_ERR(("A: PRI %ld can't start, adapter not mapped",
449 IoAdapter->serialNo))
453 sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
454 DBG_LOG(("A(%d) start PRI at 0x%08lx", IoAdapter->ANum,
457 WRITE_DWORD(&boot->addr, start_address);
458 WRITE_DWORD(&boot->cmd, 3);
460 for (i = 0; i < 300; ++i) {
462 if ((READ_DWORD(&boot->signature) >> 16) == 0x4447) {
463 DBG_LOG(("A(%d) Protocol startup time %d.%02d seconds",
464 IoAdapter->ANum, (i / 100), (i % 100)))
471 byte *p = (byte *)boot;
474 TrapId = READ_DWORD(&p[0x80]);
475 debug = READ_DWORD(&p[0x1c]);
476 DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx",
477 IoAdapter->ANum, READ_DWORD(&boot->signature),
479 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
480 if (IoAdapter->trapFnc) {
481 (*(IoAdapter->trapFnc)) (IoAdapter);
483 IoAdapter->stop(IoAdapter);
486 DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
488 IoAdapter->Initialized = TRUE;
493 IoAdapter->IrqCount = 0;
494 p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
495 WRITE_DWORD(((dword volatile *) p), (dword) ~ 0x03E00000);
496 DIVA_OS_MEM_DETACH_CFG(IoAdapter, p);
498 a->ram_out(a, &PR_RAM->ReadyInt, 1);
500 for (i = 100; !IoAdapter->IrqCount && (i-- > 0); diva_os_wait(10));
502 if (!IoAdapter->IrqCount) {
503 DBG_ERR(("A: A(%d) interrupt test failed",
505 IoAdapter->Initialized = FALSE;
506 IoAdapter->stop(IoAdapter);
510 IoAdapter->Properties.Features = (word) features;
512 diva_xdi_display_adapter_features(IoAdapter->ANum);
514 DBG_LOG(("A(%d) PRI adapter successfull started", IoAdapter->ANum))
518 diva_xdi_didd_register_adapter(IoAdapter->ANum);
523 static void diva_pri_clear_interrupts(diva_os_xdi_adapter_t * a)
525 PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
528 clear any pending interrupt
530 IoAdapter->disIrq(IoAdapter);
532 IoAdapter->tst_irq(&IoAdapter->a);
533 IoAdapter->clr_irq(&IoAdapter->a);
534 IoAdapter->tst_irq(&IoAdapter->a);
539 diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr);
540 diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr);
544 ** Stop Adapter, but do not unmap/unregister - adapter
545 ** will be restarted later
547 static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a)
549 PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
552 if (!IoAdapter->ram) {
555 if (!IoAdapter->Initialized) {
556 DBG_ERR(("A: A(%d) can't stop PRI adapter - not running",
558 return (-1); /* nothing to stop */
560 IoAdapter->Initialized = 0;
563 Disconnect Adapter from DIDD
565 diva_xdi_didd_remove_adapter(IoAdapter->ANum);
570 a->clear_interrupts_proc = diva_pri_clear_interrupts;
571 IoAdapter->a.ReadyInt = 1;
572 IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt);
575 } while (i-- && a->clear_interrupts_proc);
577 if (a->clear_interrupts_proc) {
578 diva_pri_clear_interrupts(a);
579 a->clear_interrupts_proc = NULL;
580 DBG_ERR(("A: A(%d) no final interrupt from PRI adapter",
583 IoAdapter->a.ReadyInt = 0;
586 Stop and reset adapter
588 IoAdapter->stop(IoAdapter);
594 ** Process commands form configuration/download framework and from
597 ** return 0 on success
600 diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
601 diva_xdi_um_cfg_cmd_t * cmd, int length)
605 if (cmd->adapter != a->controller) {
606 DBG_ERR(("A: pri_cmd, invalid controller=%d != %d",
607 cmd->adapter, a->controller))
611 switch (cmd->command) {
612 case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL:
613 a->xdi_mbox.data_length = sizeof(dword);
615 diva_os_malloc(0, a->xdi_mbox.data_length);
616 if (a->xdi_mbox.data) {
617 *(dword *) a->xdi_mbox.data =
618 (dword) a->CardOrdinal;
619 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
624 case DIVA_XDI_UM_CMD_GET_SERIAL_NR:
625 a->xdi_mbox.data_length = sizeof(dword);
627 diva_os_malloc(0, a->xdi_mbox.data_length);
628 if (a->xdi_mbox.data) {
629 *(dword *) a->xdi_mbox.data =
630 (dword) a->xdi_adapter.serialNo;
631 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
636 case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG:
637 a->xdi_mbox.data_length = sizeof(dword) * 9;
639 diva_os_malloc(0, a->xdi_mbox.data_length);
640 if (a->xdi_mbox.data) {
642 dword *data = (dword *) a->xdi_mbox.data;
644 for (i = 0; i < 8; i++) {
645 *data++ = a->resources.pci.bar[i];
647 *data++ = (dword) a->resources.pci.irq;
648 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
653 case DIVA_XDI_UM_CMD_RESET_ADAPTER:
654 ret = diva_pri_reset_adapter(&a->xdi_adapter);
657 case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK:
658 ret = diva_pri_write_sdram_block(&a->xdi_adapter,
664 pri_is_rev_2_card(a->
670 case DIVA_XDI_UM_CMD_STOP_ADAPTER:
671 ret = diva_pri_stop_adapter(a);
674 case DIVA_XDI_UM_CMD_START_ADAPTER:
675 ret = diva_pri_start_adapter(&a->xdi_adapter,
676 cmd->command_data.start.
678 cmd->command_data.start.
682 case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES:
683 a->xdi_adapter.features =
684 cmd->command_data.features.features;
685 a->xdi_adapter.a.protocol_capabilities =
686 a->xdi_adapter.features;
687 DBG_TRC(("Set raw protocol features (%08x)",
688 a->xdi_adapter.features))
692 case DIVA_XDI_UM_CMD_GET_CARD_STATE:
693 a->xdi_mbox.data_length = sizeof(dword);
695 diva_os_malloc(0, a->xdi_mbox.data_length);
696 if (a->xdi_mbox.data) {
697 dword *data = (dword *) a->xdi_mbox.data;
698 if (!a->xdi_adapter.ram ||
699 !a->xdi_adapter.reset ||
700 !a->xdi_adapter.cfg) {
702 } else if (a->xdi_adapter.trapped) {
704 } else if (a->xdi_adapter.Initialized) {
709 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
714 case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY:
715 ret = diva_card_read_xlog(a);
718 case DIVA_XDI_UM_CMD_READ_SDRAM:
719 if (a->xdi_adapter.Address) {
721 (a->xdi_mbox.data_length =
722 cmd->command_data.read_sdram.length)) {
724 (a->xdi_mbox.data_length +
725 cmd->command_data.read_sdram.offset) <
726 a->xdi_adapter.MemorySize) {
731 if (a->xdi_mbox.data) {
732 byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
734 byte *dst = a->xdi_mbox.data;
735 dword len = a->xdi_mbox.data_length;
737 src += cmd->command_data.read_sdram.offset;
742 a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
743 DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
752 DBG_ERR(("A: A(%d) invalid cmd=%d", a->controller,
762 static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
766 dword len = sizeof(data);
767 volatile byte *config;
768 volatile byte *flash;
771 * First set some GT6401x config registers before accessing the BOOT-ROM
773 config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
774 if (!(config[0xc3c] & 0x08)) {
775 config[0xc3c] |= 0x08; /* Base Address enable register */
777 config[LOW_BOOTCS_DREG] = 0x00;
778 config[HI_BOOTCS_DREG] = 0xFF;
779 DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
781 * Read only the last 64 bytes of manufacturing data
783 memset(data, '\0', len);
784 flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
785 for (i = 0; i < len; i++) {
786 data[i] = flash[0x8000 - len + i];
788 DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash);
790 config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
791 config[LOW_BOOTCS_DREG] = 0xFC; /* Disable FLASH EPROM access */
792 config[HI_BOOTCS_DREG] = 0xFF;
793 DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
795 if (memcmp(&data[48], "DIVAserverPR", 12)) {
796 #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */
797 word cmd = 0, cmd_org;
799 dword addr1, addr3, addr4;
802 addr4 = a->resources.pci.bar[4];
803 addr3 = a->resources.pci.bar[3]; /* flash */
804 addr1 = a->resources.pci.bar[1]; /* unused */
806 DBG_ERR(("A: apply Compaq BIOS workaround"))
807 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
808 data[0], data[1], data[2], data[3],
809 data[4], data[5], data[6], data[7]))
811 Bus = a->resources.pci.bus;
812 Slot = a->resources.pci.func;
813 hdev = a->resources.pci.hdev;
814 PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
815 PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev);
817 PCIwrite(Bus, Slot, 0x14, &addr4, sizeof(addr4), hdev);
818 PCIwrite(Bus, Slot, 0x20, &addr1, sizeof(addr1), hdev);
820 PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
822 addr = a->resources.pci.addr[1];
823 a->resources.pci.addr[1] = a->resources.pci.addr[4];
824 a->resources.pci.addr[4] = addr;
826 addr1 = a->resources.pci.bar[1];
827 a->resources.pci.bar[1] = a->resources.pci.bar[4];
828 a->resources.pci.bar[4] = addr1;
831 Try to read Flash again
835 config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
836 if (!(config[0xc3c] & 0x08)) {
837 config[0xc3c] |= 0x08; /* Base Address enable register */
839 config[LOW_BOOTCS_DREG] = 0x00;
840 config[HI_BOOTCS_DREG] = 0xFF;
841 DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
843 memset(data, '\0', len);
844 flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
845 for (i = 0; i < len; i++) {
846 data[i] = flash[0x8000 - len + i];
848 DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash);
849 config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
850 config[LOW_BOOTCS_DREG] = 0xFC;
851 config[HI_BOOTCS_DREG] = 0xFF;
852 DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
854 if (memcmp(&data[48], "DIVAserverPR", 12)) {
855 DBG_ERR(("A: failed to read serial number"))
856 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
857 data[0], data[1], data[2], data[3],
858 data[4], data[5], data[6], data[7]))
862 DBG_ERR(("A: failed to read DIVA signature word"))
863 DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
864 data[0], data[1], data[2], data[3],
865 data[4], data[5], data[6], data[7]))
866 DBG_LOG(("%02x:%02x:%02x:%02x", data[47], data[46],
871 a->xdi_adapter.serialNo =
872 (data[47] << 24) | (data[46] << 16) | (data[45] << 8) |
874 if (!a->xdi_adapter.serialNo
875 || (a->xdi_adapter.serialNo == 0xffffffff)) {
876 a->xdi_adapter.serialNo = 0;
877 DBG_ERR(("A: failed to read serial number"))
881 DBG_LOG(("Serial No. : %ld", a->xdi_adapter.serialNo))
882 DBG_TRC(("Board Revision : %d.%02d", (int) data[41],
884 DBG_TRC(("PLD revision : %d.%02d", (int) data[33],
886 DBG_TRC(("Boot loader version : %d.%02d", (int) data[37],
889 DBG_TRC(("Manufacturing Date : %d/%02d/%02d (yyyy/mm/dd)",
890 (int) ((data[28] > 90) ? 1900 : 2000) +
891 (int) data[28], (int) data[29], (int) data[30]))
896 void diva_os_prepare_pri2_functions(PISDN_ADAPTER IoAdapter)
900 void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter)
905 ** Checks presence of DSP on board
908 dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp)
912 WRITE_WORD(addr, 0x4000);
913 WRITE_WORD(data, DSP_SIGNATURE_PROBE_WORD);
915 WRITE_WORD(addr, 0x4000);
916 pattern = READ_WORD(data);
918 if (pattern != DSP_SIGNATURE_PROBE_WORD) {
919 DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)",
920 dsp, pattern, DSP_SIGNATURE_PROBE_WORD))
924 WRITE_WORD(addr, 0x4000);
925 WRITE_WORD(data, ~DSP_SIGNATURE_PROBE_WORD);
927 WRITE_WORD(addr, 0x4000);
928 pattern = READ_WORD(data);
930 if (pattern != (word) ~ DSP_SIGNATURE_PROBE_WORD) {
931 DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)",
932 dsp, pattern, (word) ~ DSP_SIGNATURE_PROBE_WORD))
936 DBG_TRC(("DSP[%d] present", dsp))
943 ** Check if DSP's are present and operating
944 ** Information about detected DSP's is returned as bit mask
951 static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
956 dword row_offset[7] = {
958 0x00000800, /* 1 - ROW 1 */
959 0x00000840, /* 2 - ROW 2 */
960 0x00001000, /* 3 - ROW 3 */
961 0x00001040, /* 4 - ROW 4 */
962 0x00000000 /* 5 - ROW 0 */
965 byte *dsp_addr_port, *dsp_data_port, row_state;
966 int dsp_row = 0, dsp_index, dsp_num;
968 if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) {
972 p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
973 *(volatile byte *) p = _MP_RISC_RESET | _MP_DSP_RESET;
974 DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
977 base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter);
979 for (dsp_num = 0; dsp_num < 30; dsp_num++) {
980 dsp_row = dsp_num / 7 + 1;
981 dsp_index = dsp_num % 7;
983 dsp_data_port = base;
984 dsp_addr_port = base;
986 dsp_data_port += row_offset[dsp_row];
987 dsp_addr_port += row_offset[dsp_row];
989 dsp_data_port += (dsp_index * 8);
990 dsp_addr_port += (dsp_index * 8) + 0x80;
992 if (!dsp_check_presence
993 (dsp_addr_port, dsp_data_port, dsp_num + 1)) {
994 ret |= (1 << dsp_num);
997 DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base);
999 p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
1000 *(volatile byte *) p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
1001 DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
1007 for (dsp_row = 0; dsp_row < 4; dsp_row++) {
1008 row_state = ((ret >> (dsp_row * 7)) & 0x7F);
1009 if (row_state && (row_state != 0x7F)) {
1010 for (dsp_index = 0; dsp_index < 7; dsp_index++) {
1011 if (!(row_state & (1 << dsp_index))) {
1012 DBG_ERR(("A: MODULE[%d]-DSP[%d] failed",
1020 if (!(ret & 0x10000000)) {
1021 DBG_ERR(("A: ON BOARD-DSP[1] failed"))
1023 if (!(ret & 0x20000000)) {
1024 DBG_ERR(("A: ON BOARD-DSP[2] failed"))
1028 Print module population now
1030 DBG_LOG(("+-----------------------+"))
1031 DBG_LOG(("| DSP MODULE POPULATION |"))
1032 DBG_LOG(("+-----------------------+"))
1033 DBG_LOG(("| 1 | 2 | 3 | 4 |"))
1034 DBG_LOG(("+-----------------------+"))
1035 DBG_LOG(("| %s | %s | %s | %s |",
1036 ((ret >> (0 * 7)) & 0x7F) ? "Y" : "N",
1037 ((ret >> (1 * 7)) & 0x7F) ? "Y" : "N",
1038 ((ret >> (2 * 7)) & 0x7F) ? "Y" : "N",
1039 ((ret >> (3 * 7)) & 0x7F) ? "Y" : "N"))
1040 DBG_LOG(("+-----------------------+"))
1042 DBG_LOG(("DSP's(present-absent):%08x-%08x", ret,