2 * skystar2.c - driver for the Technisat SkyStar2 PCI DVB card
3 * based on the FlexCopII by B2C2,Inc.
5 * Copyright (C) 2003 Vadim Catana, skystar@moldova.cc
7 * FIX: DISEQC Tone Burst in flexcop_diseqc_ioctl()
8 * FIX: FULL soft DiSEqC for skystar2 (FlexCopII rev 130) VP310 equipped
9 * Vincenzo Di Massa, hawk.it at tiscalinet.it
11 * Converted to Linux coding style
12 * Misc reorganization, polishing, restyling
13 * Roberto Ragusa, r.ragusa at libero.it
15 * Added hardware filtering support,
16 * Niklas Peinecke, peinecke at gdv.uni-hannover.de
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU Lesser General Public License
21 * as published by the Free Software Foundation; either version 2.1
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU Lesser General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/delay.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/version.h>
43 #include "dvb_frontend.h"
45 #include <linux/dvb/frontend.h>
46 #include <linux/dvb/dmx.h>
47 #include "dvb_demux.h"
49 #include "dvb_filter.h"
59 static int enable_hw_filters = 2;
61 module_param(debug, int, 0644);
62 MODULE_PARM_DESC(debug, "Set debugging level (0 = default, 1 = most messages, 2 = all messages).");
63 module_param(enable_hw_filters, int, 0444);
64 MODULE_PARM_DESC(enable_hw_filters, "enable hardware filters: supported values: 0 (none), 1, 2");
66 #define dprintk(x...) do { if (debug>=1) printk(x); } while (0)
67 #define ddprintk(x...) do { if (debug>=2) printk(x); } while (0)
69 #define SIZE_OF_BUF_DMA1 0x3ac00
70 #define SIZE_OF_BUF_DMA2 0x758
72 #define MAX_N_HW_FILTERS (6+32)
73 #define N_PID_SLOTS 256
83 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
96 unsigned long io_port;
100 struct dvb_adapter *dvb_adapter;
101 struct dvb_demux demux;
102 struct dmxdev dmxdev;
103 struct dmx_frontend hw_frontend;
104 struct dmx_frontend mem_frontend;
105 struct i2c_adapter i2c_adap;
106 struct dvb_net dvbnet;
108 struct semaphore i2c_sem;
120 int useable_hw_filters;
121 u16 hw_pids[MAX_N_HW_FILTERS];
122 u16 pid_list[N_PID_SLOTS];
123 int pid_rc[N_PID_SLOTS]; // ref counters for the pids
125 int whole_bandwidth_count;
128 struct dvb_frontend* fe;
129 int (*fe_sleep)(struct dvb_frontend* fe);
132 #define write_reg_dw(adapter,reg,value) writel(value, adapter->io_mem + reg)
133 #define read_reg_dw(adapter,reg) readl(adapter->io_mem + reg)
135 static void write_reg_bitfield(struct adapter *adapter, u32 reg, u32 zeromask, u32 orvalue)
139 tmp = read_reg_dw(adapter, reg);
140 tmp = (tmp & ~zeromask) | orvalue;
141 write_reg_dw(adapter, reg, tmp);
145 static int i2c_main_write_for_flex2(struct adapter *adapter, u32 command, u8 *buf, int retries)
150 write_reg_dw(adapter, 0x100, 0);
151 write_reg_dw(adapter, 0x100, command);
153 for (i = 0; i < retries; i++) {
154 value = read_reg_dw(adapter, 0x100);
156 if ((value & 0x40000000) == 0) {
157 if ((value & 0x81000000) == 0x80000000) {
159 *buf = (value >> 0x10) & 0xff;
164 write_reg_dw(adapter, 0x100, 0);
165 write_reg_dw(adapter, 0x100, command);
172 /* device = 0x10000000 for tuner, 0x20000000 for eeprom */
173 static void i2c_main_setup(u32 device, u32 chip_addr, u8 op, u8 addr, u32 value, u32 len, u32 *command)
175 *command = device | ((len - 1) << 26) | (value << 16) | (addr << 8) | chip_addr;
178 *command = *command | 0x03000000;
180 *command = *command | 0x01000000;
183 static int flex_i2c_read4(struct adapter *adapter, u32 device, u32 chip_addr, u16 addr, u8 *buf, u8 len)
190 i2c_main_setup(device, chip_addr, 1, addr, 0, len, &command);
192 result = i2c_main_write_for_flex2(adapter, command, buf, 100000);
194 if ((result & 0xff) != 0) {
196 value = read_reg_dw(adapter, 0x104);
198 for (i = 1; i < len; i++) {
199 buf[i] = value & 0xff;
208 static int flex_i2c_write4(struct adapter *adapter, u32 device, u32 chip_addr, u32 addr, u8 *buf, u8 len)
217 for (i = len; i > 1; i--) {
219 value = value | buf[i - 1];
222 write_reg_dw(adapter, 0x104, value);
225 i2c_main_setup(device, chip_addr, 0, addr, buf[0], len, &command);
227 return i2c_main_write_for_flex2(adapter, command, NULL, 100000);
230 static void fixchipaddr(u32 device, u32 bus, u32 addr, u32 *ret)
232 if (device == 0x20000000)
233 *ret = bus | ((addr >> 8) & 3);
238 static u32 flex_i2c_read(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len)
241 u32 bytes_to_transfer;
244 ddprintk("%s:\n", __FUNCTION__);
249 bytes_to_transfer = len;
251 if (bytes_to_transfer > 4)
252 bytes_to_transfer = 4;
254 fixchipaddr(device, bus, addr, &chipaddr);
256 if (flex_i2c_read4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0)
259 buf = buf + bytes_to_transfer;
260 addr = addr + bytes_to_transfer;
261 len = len - bytes_to_transfer;
267 static u32 flex_i2c_write(struct adapter *adapter, u32 device, u32 bus, u32 addr, u8 *buf, u32 len)
270 u32 bytes_to_transfer;
273 ddprintk("%s:\n", __FUNCTION__);
278 bytes_to_transfer = len;
280 if (bytes_to_transfer > 4)
281 bytes_to_transfer = 4;
283 fixchipaddr(device, bus, addr, &chipaddr);
285 if (flex_i2c_write4(adapter, device, chipaddr, addr, buf, bytes_to_transfer) == 0)
288 buf = buf + bytes_to_transfer;
289 addr = addr + bytes_to_transfer;
290 len = len - bytes_to_transfer;
296 static int master_xfer(struct i2c_adapter* adapter, struct i2c_msg msgs[], int num)
298 struct adapter *tmp = i2c_get_adapdata(adapter);
301 if (down_interruptible(&tmp->i2c_sem))
304 ddprintk("%s: %d messages to transfer\n", __FUNCTION__, num);
306 for (i = 0; i < num; i++) {
307 ddprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i,
308 msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
312 if ((num == 2) && (msgs[0].flags == 0) && (msgs[1].flags == I2C_M_RD) && (msgs[0].buf != NULL) && (msgs[1].buf != NULL)) {
314 ret = flex_i2c_read(tmp, 0x10000000, msgs[0].addr, msgs[0].buf[0], msgs[1].buf, msgs[1].len);
318 if (ret != msgs[1].len) {
319 dprintk("%s: read error !\n", __FUNCTION__);
321 for (i = 0; i < 2; i++) {
322 dprintk("message %d: flags=0x%x, addr=0x%x, buf=0x%x, len=%d \n", i,
323 msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
332 for (i = 0; i < num; i++) {
334 if ((msgs[i].flags != 0) || (msgs[i].buf == NULL) || (msgs[i].len < 2))
337 ret = flex_i2c_write(tmp, 0x10000000, msgs[i].addr, msgs[i].buf[0], &msgs[i].buf[1], msgs[i].len - 1);
341 if (ret != msgs[0].len - 1) {
342 dprintk("%s: write error %i !\n", __FUNCTION__, ret);
344 dprintk("message %d: flags=0x%x, addr=0x%x, buf[0]=0x%x, len=%d \n", i,
345 msgs[i].flags, msgs[i].addr, msgs[i].buf[0], msgs[i].len);
353 printk("%s: unknown command format !\n", __FUNCTION__);
358 /* SRAM (Skystar2 rev2.3 has one "ISSI IS61LV256" chip on board,
359 but it seems that FlexCopII can work with more than one chip) */
360 static void sram_set_net_dest(struct adapter *adapter, u8 dest)
366 tmp = (read_reg_dw(adapter, 0x714) & 0xfffffffc) | (dest & 3);
370 write_reg_dw(adapter, 0x714, tmp);
371 write_reg_dw(adapter, 0x714, tmp);
375 /* return value is never used? */
379 static void sram_set_cai_dest(struct adapter *adapter, u8 dest)
385 tmp = (read_reg_dw(adapter, 0x714) & 0xfffffff3) | ((dest & 3) << 2);
390 write_reg_dw(adapter, 0x714, tmp);
391 write_reg_dw(adapter, 0x714, tmp);
395 /* return value is never used? */
399 static void sram_set_cao_dest(struct adapter *adapter, u8 dest)
405 tmp = (read_reg_dw(adapter, 0x714) & 0xffffffcf) | ((dest & 3) << 4);
410 write_reg_dw(adapter, 0x714, tmp);
411 write_reg_dw(adapter, 0x714, tmp);
415 /* return value is never used? */
419 static void sram_set_media_dest(struct adapter *adapter, u8 dest)
425 tmp = (read_reg_dw(adapter, 0x714) & 0xffffff3f) | ((dest & 3) << 6);
430 write_reg_dw(adapter, 0x714, tmp);
431 write_reg_dw(adapter, 0x714, tmp);
435 /* return value is never used? */
439 /* SRAM memory is accessed through a buffer register in the FlexCop
440 chip (0x700). This register has the following structure:
442 bit 15 : read/write flag
443 bits 16-23 : 8-bit word to write
445 bits 28-29 : memory bank selector
448 static void flex_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
453 for (i = 0; i < len; i++) {
454 command = bank | addr | 0x04000000 | (*buf << 0x10);
458 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
464 printk("%s: SRAM timeout\n", __FUNCTION__);
466 write_reg_dw(adapter, 0x700, command);
473 static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
478 for (i = 0; i < len; i++) {
479 command = bank | addr | 0x04008000;
483 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
489 printk("%s: SRAM timeout\n", __FUNCTION__);
491 write_reg_dw(adapter, 0x700, command);
495 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
501 printk("%s: SRAM timeout\n", __FUNCTION__);
503 value = read_reg_dw(adapter, 0x700) >> 0x10;
505 *buf = (value & 0xff);
512 static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
518 if (adapter->dw_sram_type == 0x20000) {
519 bank = (addr & 0x18000) << 0x0d;
522 if (adapter->dw_sram_type == 0x00000) {
523 if ((addr >> 0x0f) == 0)
529 flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
532 static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
538 if (adapter->dw_sram_type == 0x20000) {
539 bank = (addr & 0x18000) << 0x0d;
542 if (adapter->dw_sram_type == 0x00000) {
543 if ((addr >> 0x0f) == 0)
549 flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
552 static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
559 // check if the address range belongs to the same
560 // 32K memory chip. If not, the data is read from
561 // one chip at a time.
562 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
563 length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
566 sram_read_chunk(adapter, addr, buf, length);
568 addr = addr + length;
574 static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
581 // check if the address range belongs to the same
582 // 32K memory chip. If not, the data is written to
583 // one chip at a time.
584 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
585 length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
588 sram_write_chunk(adapter, addr, buf, length);
590 addr = addr + length;
596 static void sram_set_size(struct adapter *adapter, u32 mask)
598 write_reg_dw(adapter, 0x71c, (mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
601 static void sram_init(struct adapter *adapter)
605 tmp = read_reg_dw(adapter, 0x71c);
607 write_reg_dw(adapter, 0x71c, 1);
609 if (read_reg_dw(adapter, 0x71c) != 0) {
610 write_reg_dw(adapter, 0x71c, tmp);
612 adapter->dw_sram_type = tmp & 0x30000;
614 ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type);
618 adapter->dw_sram_type = 0x10000;
620 ddprintk("%s: dw_sram_type = %x\n", __FUNCTION__, adapter->dw_sram_type);
623 /* return value is never used? */
624 /* return adapter->dw_sram_type; */
627 static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
631 dprintk("%s: mask = %x, addr = %x\n", __FUNCTION__, mask, addr);
633 sram_set_size(adapter, mask);
639 sram_write(adapter, addr, &tmp2, 1);
640 sram_write(adapter, addr + 4, &tmp1, 1);
646 sram_read(adapter, addr, &tmp2, 1);
647 sram_read(adapter, addr, &tmp2, 1);
649 dprintk("%s: wrote 0xa5, read 0x%2x\n", __FUNCTION__, tmp2);
657 sram_write(adapter, addr, &tmp2, 1);
658 sram_write(adapter, addr + 4, &tmp1, 1);
664 sram_read(adapter, addr, &tmp2, 1);
665 sram_read(adapter, addr, &tmp2, 1);
667 dprintk("%s: wrote 0x5a, read 0x%2x\n", __FUNCTION__, tmp2);
675 static u32 sram_length(struct adapter *adapter)
677 if (adapter->dw_sram_type == 0x10000)
679 if (adapter->dw_sram_type == 0x00000)
681 if (adapter->dw_sram_type == 0x20000)
682 return 131072; // 128K
687 /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
688 - for 128K there are 4x32K chips at bank 0,1,2,3.
689 - for 64K there are 2x32K chips at bank 1,2.
690 - for 32K there is one 32K chip at bank 0.
692 FlexCop works only with one bank at a time. The bank is selected
693 by bits 28-29 of the 0x700 register.
695 bank 0 covers addresses 0x00000-0x07fff
696 bank 1 covers addresses 0x08000-0x0ffff
697 bank 2 covers addresses 0x10000-0x17fff
698 bank 3 covers addresses 0x18000-0x1ffff
700 static int sram_detect_for_flex2(struct adapter *adapter)
704 dprintk("%s:\n", __FUNCTION__);
706 tmp = read_reg_dw(adapter, 0x208);
707 write_reg_dw(adapter, 0x208, 0);
709 tmp2 = read_reg_dw(adapter, 0x71c);
711 dprintk("%s: tmp2 = %x\n", __FUNCTION__, tmp2);
713 write_reg_dw(adapter, 0x71c, 1);
715 tmp3 = read_reg_dw(adapter, 0x71c);
717 dprintk("%s: tmp3 = %x\n", __FUNCTION__, tmp3);
719 write_reg_dw(adapter, 0x71c, tmp2);
721 // check for internal SRAM ???
724 sram_set_size(adapter, 0x10000);
726 write_reg_dw(adapter, 0x208, tmp);
728 dprintk("%s: sram size = 32K\n", __FUNCTION__);
733 if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
734 sram_set_size(adapter, 0x20000);
736 write_reg_dw(adapter, 0x208, tmp);
738 dprintk("%s: sram size = 128K\n", __FUNCTION__);
743 if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
744 sram_set_size(adapter, 0x00000);
746 write_reg_dw(adapter, 0x208, tmp);
748 dprintk("%s: sram size = 64K\n", __FUNCTION__);
753 if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
754 sram_set_size(adapter, 0x10000);
756 write_reg_dw(adapter, 0x208, tmp);
758 dprintk("%s: sram size = 32K\n", __FUNCTION__);
763 sram_set_size(adapter, 0x10000);
765 write_reg_dw(adapter, 0x208, tmp);
767 dprintk("%s: SRAM detection failed. Set to 32K \n", __FUNCTION__);
772 static void sll_detect_sram_size(struct adapter *adapter)
774 sram_detect_for_flex2(adapter);
777 /* EEPROM (Skystar2 has one "24LC08B" chip on board) */
779 static int eeprom_write(struct adapter *adapter, u16 addr, u8 *buf, u16 len)
781 return flex_i2c_write(adapter, 0x20000000, 0x50, addr, buf, len);
785 static int eeprom_read(struct adapter *adapter, u16 addr, u8 *buf, u16 len)
787 return flex_i2c_read(adapter, 0x20000000, 0x50, addr, buf, len);
790 static u8 calc_lrc(u8 *buf, int len)
797 for (i = 0; i < len; i++)
803 static int eeprom_lrc_read(struct adapter *adapter, u32 addr, u32 len, u8 *buf, int retries)
807 for (i = 0; i < retries; i++) {
808 if (eeprom_read(adapter, addr, buf, len) == len) {
809 if (calc_lrc(buf, len - 1) == buf[len - 1])
818 static int eeprom_lrc_write(struct adapter *adapter, u32 addr, u32 len, u8 *wbuf, u8 *rbuf, int retries)
822 for (i = 0; i < retries; i++) {
823 if (eeprom_write(adapter, addr, wbuf, len) == len) {
824 if (eeprom_lrc_read(adapter, addr, len, rbuf, retries) == 1)
834 /* These functions could be used to unlock SkyStar2 cards. */
837 static int eeprom_writeKey(struct adapter *adapter, u8 *key, u32 len)
845 memcpy(wbuf, key, len);
850 wbuf[19] = calc_lrc(wbuf, 19);
852 return eeprom_lrc_write(adapter, 0x3e4, 20, wbuf, rbuf, 4);
855 static int eeprom_readKey(struct adapter *adapter, u8 *key, u32 len)
862 if (eeprom_lrc_read(adapter, 0x3e4, 20, buf, 4) == 0)
865 memcpy(key, buf, len);
871 static int eeprom_get_mac_addr(struct adapter *adapter, char type, u8 *mac)
875 if (eeprom_lrc_read(adapter, 0x3f8, 8, tmp, 4) != 0) {
913 static char eeprom_set_mac_addr(struct adapter *adapter, char type, u8 *mac)
936 tmp[7] = calc_lrc(tmp, 7);
938 if (eeprom_write(adapter, 0x3f8, tmp, 8) == 8)
947 /* every flexcop has 6 "lower" hw PID filters */
948 /* these are enabled by setting bits 0-5 of 0x208 */
949 /* for the 32 additional filters we have to select one */
950 /* of them through 0x310 and modify through 0x314 */
951 /* op: 0=disable, 1=enable */
952 static void filter_enable_hw_filter(struct adapter *adapter, int id, u8 op)
954 dprintk("%s: id=%d op=%d\n", __FUNCTION__, id, op);
956 u32 mask = (0x00000001 << id);
957 write_reg_bitfield(adapter, 0x208, mask, op ? mask : 0);
960 write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f);
962 write_reg_bitfield(adapter, 0x314, 0x00006000, op ? 0x00004000 : 0);
966 /* this sets the PID that should pass the specified filter */
967 static void pid_set_hw_pid(struct adapter *adapter, int id, u16 pid)
969 dprintk("%s: id=%d pid=%d\n", __FUNCTION__, id, pid);
971 u32 adr = 0x300 + ((id & 6) << 1);
972 int shift = (id & 1) ? 16 : 0;
973 dprintk("%s: id=%d addr=%x %c pid=%d\n", __FUNCTION__, id, adr, (id & 1) ? 'h' : 'l', pid);
974 write_reg_bitfield(adapter, adr, (0x7fff) << shift, (pid & 0x1fff) << shift);
977 write_reg_bitfield(adapter, 0x310, 0x1f, (id - 6) & 0x1f);
979 write_reg_bitfield(adapter, 0x314, 0x1fff, pid & 0x1fff);
985 static void filter_enable_null_filter(struct adapter *adapter, u32 op)
987 dprintk("%s: op=%x\n", __FUNCTION__, op);
989 write_reg_bitfield(adapter, 0x208, 0x00000040, op?0x00000040:0);
993 static void filter_enable_mask_filter(struct adapter *adapter, u32 op)
995 dprintk("%s: op=%x\n", __FUNCTION__, op);
997 write_reg_bitfield(adapter, 0x208, 0x00000080, op ? 0x00000080 : 0);
1001 static void ctrl_enable_mac(struct adapter *adapter, u32 op)
1003 write_reg_bitfield(adapter, 0x208, 0x00004000, op ? 0x00004000 : 0);
1006 static int ca_set_mac_dst_addr_filter(struct adapter *adapter, u8 *mac)
1010 tmp1 = (mac[3] << 0x18) | (mac[2] << 0x10) | (mac[1] << 0x08) | mac[0];
1011 tmp2 = (mac[5] << 0x08) | mac[4];
1013 write_reg_dw(adapter, 0x418, tmp1);
1014 write_reg_dw(adapter, 0x41c, tmp2);
1020 static void set_ignore_mac_filter(struct adapter *adapter, u8 op)
1023 write_reg_bitfield(adapter, 0x208, 0x00004000, 0);
1024 adapter->mac_filter = 1;
1026 if (adapter->mac_filter != 0) {
1027 adapter->mac_filter = 0;
1028 write_reg_bitfield(adapter, 0x208, 0x00004000, 0x00004000);
1035 static void check_null_filter_enable(struct adapter *adapter)
1037 filter_enable_null_filter(adapter, 1);
1038 filter_enable_mask_filter(adapter, 1);
1042 static void pid_set_group_pid(struct adapter *adapter, u16 pid)
1046 dprintk("%s: pid=%x\n", __FUNCTION__, pid);
1047 value = (pid & 0x3fff) | (read_reg_dw(adapter, 0x30c) & 0xffff0000);
1048 write_reg_dw(adapter, 0x30c, value);
1051 static void pid_set_group_mask(struct adapter *adapter, u16 pid)
1055 dprintk("%s: pid=%x\n", __FUNCTION__, pid);
1056 value = ((pid & 0x3fff) << 0x10) | (read_reg_dw(adapter, 0x30c) & 0xffff);
1057 write_reg_dw(adapter, 0x30c, value);
1061 static int pid_get_group_pid(struct adapter *adapter)
1063 return read_reg_dw(adapter, 0x30c) & 0x00001fff;
1066 static int pid_get_group_mask(struct adapter *adapter)
1068 return (read_reg_dw(adapter, 0x30c) >> 0x10)& 0x00001fff;
1073 static void reset_hardware_pid_filter(struct adapter *adapter)
1075 pid_set_stream1_pid(adapter, 0x1fff);
1077 pid_set_stream2_pid(adapter, 0x1fff);
1078 filter_enable_stream2_filter(adapter, 0);
1080 pid_set_pcr_pid(adapter, 0x1fff);
1081 filter_enable_pcr_filter(adapter, 0);
1083 pid_set_pmt_pid(adapter, 0x1fff);
1084 filter_enable_pmt_filter(adapter, 0);
1086 pid_set_ecm_pid(adapter, 0x1fff);
1087 filter_enable_ecm_filter(adapter, 0);
1089 pid_set_emm_pid(adapter, 0x1fff);
1090 filter_enable_emm_filter(adapter, 0);
1094 static void init_pids(struct adapter *adapter)
1098 adapter->pid_count = 0;
1099 adapter->whole_bandwidth_count = 0;
1100 for (i = 0; i < adapter->useable_hw_filters; i++) {
1101 dprintk("%s: setting filter %d to 0x1fff\n", __FUNCTION__, i);
1102 adapter->hw_pids[i] = 0x1fff;
1103 pid_set_hw_pid(adapter, i, 0x1fff);
1106 pid_set_group_pid(adapter, 0);
1107 pid_set_group_mask(adapter, 0x1fe0);
1110 static void open_whole_bandwidth(struct adapter *adapter)
1112 dprintk("%s:\n", __FUNCTION__);
1113 pid_set_group_pid(adapter, 0);
1114 pid_set_group_mask(adapter, 0);
1116 filter_enable_mask_filter(adapter, 1);
1120 static void close_whole_bandwidth(struct adapter *adapter)
1122 dprintk("%s:\n", __FUNCTION__);
1123 pid_set_group_pid(adapter, 0);
1124 pid_set_group_mask(adapter, 0x1fe0);
1126 filter_enable_mask_filter(adapter, 1);
1130 static void whole_bandwidth_inc(struct adapter *adapter)
1132 if (adapter->whole_bandwidth_count++ == 0)
1133 open_whole_bandwidth(adapter);
1136 static void whole_bandwidth_dec(struct adapter *adapter)
1138 if (--adapter->whole_bandwidth_count <= 0)
1139 close_whole_bandwidth(adapter);
1142 /* The specified PID has to be let through the
1144 We try to allocate an hardware filter and open whole
1145 bandwidth when allocation is impossible.
1146 All pids<=0x1f pass through the group filter.
1147 Returns 1 on success, -1 on error */
1148 static int add_hw_pid(struct adapter *adapter, u16 pid)
1152 dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1157 /* we can't use a filter for 0x2000, so no search */
1158 if (pid != 0x2000) {
1159 /* find an unused hardware filter */
1160 for (i = 0; i < adapter->useable_hw_filters; i++) {
1161 dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i);
1162 if (adapter->hw_pids[i] == 0x1fff) {
1163 dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i);
1164 adapter->hw_pids[i] = pid;
1165 pid_set_hw_pid(adapter, i, pid);
1166 filter_enable_hw_filter(adapter, i, 1);
1171 /* if we have not used a filter, this pid depends on whole bandwidth */
1172 dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid);
1173 whole_bandwidth_inc(adapter);
1177 /* returns -1 if the pid was not present in the filters */
1178 static int remove_hw_pid(struct adapter *adapter, u16 pid)
1182 dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1187 /* we can't use a filter for 0x2000, so no search */
1188 if (pid != 0x2000) {
1189 for (i = 0; i < adapter->useable_hw_filters; i++) {
1190 dprintk("%s: pid=%d searching slot=%d\n", __FUNCTION__, pid, i);
1191 if (adapter->hw_pids[i] == pid) { // find the pid slot
1192 dprintk("%s: pid=%d slot=%d\n", __FUNCTION__, pid, i);
1193 adapter->hw_pids[i] = 0x1fff;
1194 pid_set_hw_pid(adapter, i, 0x1fff);
1195 filter_enable_hw_filter(adapter, i, 0);
1200 /* if we have not used a filter, this pid depended on whole bandwith */
1201 dprintk("%s: pid=%d whole_bandwidth\n", __FUNCTION__, pid);
1202 whole_bandwidth_dec(adapter);
1206 /* Adds a PID to the filters.
1207 Adding a pid more than once is possible, we keep reference counts.
1208 Whole stream available through pid==0x2000.
1209 Returns 1 on success, -1 on error */
1210 static int add_pid(struct adapter *adapter, u16 pid)
1214 dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1216 if (pid > 0x1ffe && pid != 0x2000)
1219 // check if the pid is already present
1220 for (i = 0; i < adapter->pid_count; i++)
1221 if (adapter->pid_list[i] == pid) {
1222 adapter->pid_rc[i]++; // increment ref counter
1226 if (adapter->pid_count == N_PID_SLOTS)
1227 return -1; // no more pids can be added
1228 adapter->pid_list[adapter->pid_count] = pid; // register pid
1229 adapter->pid_rc[adapter->pid_count] = 1;
1230 adapter->pid_count++;
1232 add_hw_pid(adapter, pid);
1237 /* Removes a PID from the filters. */
1238 static int remove_pid(struct adapter *adapter, u16 pid)
1242 dprintk("%s: pid=%d\n", __FUNCTION__, pid);
1244 if (pid > 0x1ffe && pid != 0x2000)
1247 // check if the pid is present (it must be!)
1248 for (i = 0; i < adapter->pid_count; i++) {
1249 if (adapter->pid_list[i] == pid) {
1250 adapter->pid_rc[i]--;
1251 if (adapter->pid_rc[i] <= 0) {
1252 // remove from the list
1253 adapter->pid_count--;
1254 adapter->pid_list[i]=adapter->pid_list[adapter->pid_count];
1255 adapter->pid_rc[i] = adapter->pid_rc[adapter->pid_count];
1257 remove_hw_pid(adapter, pid);
1268 static void ctrl_enable_smc(struct adapter *adapter, u32 op)
1270 write_reg_bitfield(adapter, 0x208, 0x00000800, op ? 0x00000800 : 0);
1273 static void dma_enable_disable_irq(struct adapter *adapter, u32 flag1, u32 flag2, u32 flag3)
1275 adapter->dma_ctrl = adapter->dma_ctrl & 0x000f0000;
1279 adapter->dma_ctrl = adapter->dma_ctrl & ~0x00010000;
1281 adapter->dma_ctrl = adapter->dma_ctrl | 0x00010000;
1284 adapter->dma_ctrl = adapter->dma_ctrl & ~0x00020000;
1286 adapter->dma_ctrl = adapter->dma_ctrl | 0x00020000;
1291 adapter->dma_ctrl = adapter->dma_ctrl & ~0x00040000;
1293 adapter->dma_ctrl = adapter->dma_ctrl | 0x00040000;
1296 adapter->dma_ctrl = adapter->dma_ctrl & ~0x00080000;
1298 adapter->dma_ctrl = adapter->dma_ctrl | 0x00080000;
1302 static void irq_dma_enable_disable_irq(struct adapter *adapter, u32 op)
1306 value = read_reg_dw(adapter, 0x208) & 0xfff0ffff;
1309 value = value | (adapter->dma_ctrl & 0x000f0000);
1311 write_reg_dw(adapter, 0x208, value);
1314 /* FlexCopII has 2 dma channels. DMA1 is used to transfer TS data to
1317 The DMA1 buffer is divided in 2 subbuffers of equal size.
1318 FlexCopII will transfer TS data to one subbuffer, signal an interrupt
1319 when the subbuffer is full and continue fillig the second subbuffer.
1322 subbuffer size in 32-bit words is stored in the first 24 bits of
1323 register 0x004. The last 8 bits of register 0x004 contain the number
1326 the first 30 bits of register 0x000 contain the address of the first
1327 subbuffer. The last 2 bits contain 0, when dma1 is disabled and 1,
1328 when dma1 is enabled.
1330 the first 30 bits of register 0x00c contain the address of the second
1331 subbuffer. the last 2 bits contain 1.
1333 register 0x008 will contain the address of the subbuffer that was filled
1334 with TS data, when FlexCopII will generate an interrupt.
1337 subbuffer size in 32-bit words is stored in the first 24 bits of
1338 register 0x014. The last 8 bits of register 0x014 contain the number
1341 the first 30 bits of register 0x010 contain the address of the first
1342 subbuffer. The last 2 bits contain 0, when dma1 is disabled and 1,
1343 when dma1 is enabled.
1345 the first 30 bits of register 0x01c contain the address of the second
1346 subbuffer. the last 2 bits contain 1.
1348 register 0x018 contains the address of the subbuffer that was filled
1349 with TS data, when FlexCopII generates an interrupt.
1351 static int dma_init_dma(struct adapter *adapter, u32 dma_channel)
1353 u32 subbuffers, subbufsize, subbuf0, subbuf1;
1355 if (dma_channel == 0) {
1356 dprintk("%s: Initializing DMA1 channel\n", __FUNCTION__);
1360 subbufsize = (((adapter->dmaq1.buffer_size / 2) / 4) << 8) | subbuffers;
1362 subbuf0 = adapter->dmaq1.bus_addr & 0xfffffffc;
1364 subbuf1 = ((adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) & 0xfffffffc) | 1;
1366 dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0);
1368 write_reg_dw(adapter, 0x000, subbuf0);
1370 dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4);
1372 write_reg_dw(adapter, 0x004, subbufsize);
1374 dprintk("%s: second subbuffer address = 0x%x\n", __FUNCTION__, subbuf1);
1376 write_reg_dw(adapter, 0x00c, subbuf1);
1378 dprintk("%s: counter = 0x%x\n", __FUNCTION__, adapter->dmaq1.bus_addr & 0xfffffffc);
1379 write_reg_dw(adapter, 0x008, adapter->dmaq1.bus_addr & 0xfffffffc);
1382 dma_enable_disable_irq(adapter, 0, 1, subbuffers ? 1 : 0);
1384 irq_dma_enable_disable_irq(adapter, 1);
1386 sram_set_media_dest(adapter, 1);
1387 sram_set_net_dest(adapter, 1);
1388 sram_set_cai_dest(adapter, 2);
1389 sram_set_cao_dest(adapter, 2);
1392 if (dma_channel == 1) {
1393 dprintk("%s: Initializing DMA2 channel\n", __FUNCTION__);
1397 subbufsize = (((adapter->dmaq2.buffer_size / 2) / 4) << 8) | subbuffers;
1399 subbuf0 = adapter->dmaq2.bus_addr & 0xfffffffc;
1401 subbuf1 = ((adapter->dmaq2.bus_addr + adapter->dmaq2.buffer_size / 2) & 0xfffffffc) | 1;
1403 dprintk("%s: first subbuffer address = 0x%x\n", __FUNCTION__, subbuf0);
1405 write_reg_dw(adapter, 0x010, subbuf0);
1407 dprintk("%s: subbuffer size = 0x%x\n", __FUNCTION__, (subbufsize >> 8) * 4);
1409 write_reg_dw(adapter, 0x014, subbufsize);
1411 dprintk("%s: second buffer address = 0x%x\n", __FUNCTION__, subbuf1);
1413 write_reg_dw(adapter, 0x01c, subbuf1);
1415 sram_set_cai_dest(adapter, 2);
1421 static void ctrl_enable_receive_data(struct adapter *adapter, u32 op)
1424 write_reg_bitfield(adapter, 0x208, 0x00008000, 0);
1425 adapter->dma_status = adapter->dma_status & ~0x00000004;
1427 write_reg_bitfield(adapter, 0x208, 0x00008000, 0x00008000);
1428 adapter->dma_status = adapter->dma_status | 0x00000004;
1432 /* bit 0 of dma_mask is set to 1 if dma1 channel has to be enabled/disabled
1433 bit 1 of dma_mask is set to 1 if dma2 channel has to be enabled/disabled
1435 static void dma_start_stop(struct adapter *adapter, u32 dma_mask, int start_stop)
1437 u32 dma_enable, dma1_enable, dma2_enable;
1439 dprintk("%s: dma_mask=%x\n", __FUNCTION__, dma_mask);
1441 if (start_stop == 1) {
1442 dprintk("%s: starting dma\n", __FUNCTION__);
1447 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) == 0) && (adapter->dmaq1.bus_addr != 0)) {
1448 adapter->dma_status = adapter->dma_status | 1;
1452 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) == 0) && (adapter->dmaq2.bus_addr != 0)) {
1453 adapter->dma_status = adapter->dma_status | 2;
1456 // enable dma1 and dma2
1457 if ((dma1_enable == 1) && (dma2_enable == 1)) {
1458 write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1);
1459 write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1460 write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1);
1462 ctrl_enable_receive_data(adapter, 1);
1467 if ((dma1_enable == 1) && (dma2_enable == 0)) {
1468 write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr | 1);
1469 write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1471 ctrl_enable_receive_data(adapter, 1);
1476 if ((dma1_enable == 0) && (dma2_enable == 1)) {
1477 write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr | 1);
1479 ctrl_enable_receive_data(adapter, 1);
1484 if ((dma1_enable == 0) && (dma2_enable == 0)) {
1485 ctrl_enable_receive_data(adapter, 1);
1492 dprintk("%s: stopping dma\n", __FUNCTION__);
1494 dma_enable = adapter->dma_status & 0x00000003;
1496 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0)) {
1497 dma_enable = dma_enable & 0xfffffffe;
1500 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0)) {
1501 dma_enable = dma_enable & 0xfffffffd;
1504 if ((dma_enable == 0) && ((adapter->dma_status & 4) != 0)) {
1505 ctrl_enable_receive_data(adapter, 0);
1510 if (((dma_mask & 1) != 0) && ((adapter->dma_status & 1) != 0) && (adapter->dmaq1.bus_addr != 0)) {
1511 write_reg_dw(adapter, 0x000, adapter->dmaq1.bus_addr);
1512 write_reg_dw(adapter, 0x00c, (adapter->dmaq1.bus_addr + adapter->dmaq1.buffer_size / 2) | 1);
1514 adapter->dma_status = adapter->dma_status & ~0x00000001;
1517 if (((dma_mask & 2) != 0) && ((adapter->dma_status & 2) != 0) && (adapter->dmaq2.bus_addr != 0)) {
1518 write_reg_dw(adapter, 0x010, adapter->dmaq2.bus_addr);
1520 adapter->dma_status = adapter->dma_status & ~0x00000002;
1525 static void open_stream(struct adapter *adapter, u16 pid)
1529 ++adapter->capturing;
1531 filter_enable_mask_filter(adapter, 1);
1533 add_pid(adapter, pid);
1535 dprintk("%s: adapter->dma_status=%x\n", __FUNCTION__, adapter->dma_status);
1537 if ((adapter->dma_status & 7) != 7) {
1540 if (((adapter->dma_status & 0x10000000) != 0) && ((adapter->dma_status & 1) == 0)) {
1541 dma_mask = dma_mask | 1;
1543 adapter->dmaq1.head = 0;
1544 adapter->dmaq1.tail = 0;
1546 memset(adapter->dmaq1.buffer, 0, adapter->dmaq1.buffer_size);
1549 if (((adapter->dma_status & 0x20000000) != 0) && ((adapter->dma_status & 2) == 0)) {
1550 dma_mask = dma_mask | 2;
1552 adapter->dmaq2.head = 0;
1553 adapter->dmaq2.tail = 0;
1556 if (dma_mask != 0) {
1557 irq_dma_enable_disable_irq(adapter, 1);
1559 dma_start_stop(adapter, dma_mask, 1);
1564 static void close_stream(struct adapter *adapter, u16 pid)
1566 if (adapter->capturing > 0)
1567 --adapter->capturing;
1569 dprintk("%s: dma_status=%x\n", __FUNCTION__, adapter->dma_status);
1571 if (adapter->capturing == 0) {
1574 if ((adapter->dma_status & 1) != 0)
1575 dma_mask = dma_mask | 0x00000001;
1576 if ((adapter->dma_status & 2) != 0)
1577 dma_mask = dma_mask | 0x00000002;
1579 if (dma_mask != 0) {
1580 dma_start_stop(adapter, dma_mask, 0);
1583 remove_pid(adapter, pid);
1586 static void interrupt_service_dma1(struct adapter *adapter)
1588 struct dvb_demux *dvbdmx = &adapter->demux;
1590 int n_cur_dma_counter;
1591 u32 n_num_bytes_parsed;
1592 u32 n_num_new_bytes_transferred;
1593 u32 dw_default_packet_size = 188;
1594 u8 gb_tmp_buffer[188];
1595 u8 *pb_dma_buf_cur_pos;
1597 n_cur_dma_counter = readl(adapter->io_mem + 0x008) - adapter->dmaq1.bus_addr;
1598 n_cur_dma_counter = (n_cur_dma_counter / dw_default_packet_size) * dw_default_packet_size;
1600 if ((n_cur_dma_counter < 0) || (n_cur_dma_counter > adapter->dmaq1.buffer_size)) {
1601 dprintk("%s: dma counter outside dma buffer\n", __FUNCTION__);
1605 adapter->dmaq1.head = n_cur_dma_counter;
1607 if (adapter->dmaq1.tail <= n_cur_dma_counter) {
1608 n_num_new_bytes_transferred = n_cur_dma_counter - adapter->dmaq1.tail;
1612 n_num_new_bytes_transferred = (adapter->dmaq1.buffer_size - adapter->dmaq1.tail) + n_cur_dma_counter;
1615 ddprintk("%s: n_cur_dma_counter = %d\n", __FUNCTION__, n_cur_dma_counter);
1616 ddprintk("%s: dmaq1.tail = %d\n", __FUNCTION__, adapter->dmaq1.tail);
1617 ddprintk("%s: bytes_transferred = %d\n", __FUNCTION__, n_num_new_bytes_transferred);
1619 if (n_num_new_bytes_transferred < dw_default_packet_size)
1622 n_num_bytes_parsed = 0;
1624 while (n_num_bytes_parsed < n_num_new_bytes_transferred) {
1625 pb_dma_buf_cur_pos = adapter->dmaq1.buffer + adapter->dmaq1.tail;
1627 if (adapter->dmaq1.buffer + adapter->dmaq1.buffer_size < adapter->dmaq1.buffer + adapter->dmaq1.tail + 188) {
1628 memcpy(gb_tmp_buffer, adapter->dmaq1.buffer + adapter->dmaq1.tail,
1629 adapter->dmaq1.buffer_size - adapter->dmaq1.tail);
1630 memcpy(gb_tmp_buffer + (adapter->dmaq1.buffer_size - adapter->dmaq1.tail), adapter->dmaq1.buffer,
1631 (188 - (adapter->dmaq1.buffer_size - adapter->dmaq1.tail)));
1633 pb_dma_buf_cur_pos = gb_tmp_buffer;
1636 if (adapter->capturing != 0) {
1637 dvb_dmx_swfilter_packets(dvbdmx, pb_dma_buf_cur_pos, dw_default_packet_size / 188);
1640 n_num_bytes_parsed = n_num_bytes_parsed + dw_default_packet_size;
1642 adapter->dmaq1.tail = adapter->dmaq1.tail + dw_default_packet_size;
1644 if (adapter->dmaq1.tail >= adapter->dmaq1.buffer_size)
1645 adapter->dmaq1.tail = adapter->dmaq1.tail - adapter->dmaq1.buffer_size;
1649 static void interrupt_service_dma2(struct adapter *adapter)
1651 printk("%s:\n", __FUNCTION__);
1654 static irqreturn_t isr(int irq, void *dev_id, struct pt_regs *regs)
1656 struct adapter *tmp = dev_id;
1660 ddprintk("%s:\n", __FUNCTION__);
1662 spin_lock_irq(&tmp->lock);
1664 if (0 == ((value = read_reg_dw(tmp, 0x20c)) & 0x0f)) {
1665 spin_unlock_irq(&tmp->lock);
1669 while (value != 0) {
1670 if ((value & 0x03) != 0)
1671 interrupt_service_dma1(tmp);
1672 if ((value & 0x0c) != 0)
1673 interrupt_service_dma2(tmp);
1674 value = read_reg_dw(tmp, 0x20c) & 0x0f;
1677 spin_unlock_irq(&tmp->lock);
1681 static int init_dma_queue_one(struct adapter *adapter, struct dmaq *dmaq,
1682 int size, int dmaq_offset)
1684 struct pci_dev *pdev = adapter->pdev;
1685 dma_addr_t dma_addr;
1690 dmaq->buffer = pci_alloc_consistent(pdev, size + 0x80, &dma_addr);
1694 dmaq->bus_addr = dma_addr;
1695 dmaq->buffer_size = size;
1697 dma_init_dma(adapter, dmaq_offset);
1699 ddprintk("%s: allocated dma buffer at 0x%p, length=%d\n",
1700 __FUNCTION__, dmaq->buffer, size);
1705 static int init_dma_queue(struct adapter *adapter)
1712 { &adapter->dmaq1, 0x10000000, SIZE_OF_BUF_DMA1 },
1713 { &adapter->dmaq2, 0x20000000, SIZE_OF_BUF_DMA2 }
1717 for (i = 0; i < 2; i++, p++) {
1718 if (init_dma_queue_one(adapter, p->dmaq, p->size, i) < 0)
1719 adapter->dma_status &= ~p->dma_status;
1721 adapter->dma_status |= p->dma_status;
1723 return (adapter->dma_status & 0x30000000) ? 0 : -ENOMEM;
1726 static void free_dma_queue_one(struct adapter *adapter, struct dmaq *dmaq)
1729 pci_free_consistent(adapter->pdev, dmaq->buffer_size + 0x80,
1730 dmaq->buffer, dmaq->bus_addr);
1731 memset(dmaq, 0, sizeof(*dmaq));
1735 static void free_dma_queue(struct adapter *adapter)
1737 struct dmaq *dmaq[] = {
1743 for (p = dmaq; *p; p++)
1744 free_dma_queue_one(adapter, *p);
1747 static void release_adapter(struct adapter *adapter)
1749 struct pci_dev *pdev = adapter->pdev;
1751 iounmap(adapter->io_mem);
1752 pci_disable_device(pdev);
1753 pci_release_region(pdev, 0);
1754 pci_release_region(pdev, 1);
1757 static void free_adapter_object(struct adapter *adapter)
1759 dprintk("%s:\n", __FUNCTION__);
1761 close_stream(adapter, 0);
1762 free_irq(adapter->irq, adapter);
1763 free_dma_queue(adapter);
1764 release_adapter(adapter);
1768 static struct pci_driver skystar2_pci_driver;
1770 static int claim_adapter(struct adapter *adapter)
1772 struct pci_dev *pdev = adapter->pdev;
1776 ret = pci_request_region(pdev, 1, skystar2_pci_driver.name);
1780 ret = pci_request_region(pdev, 0, skystar2_pci_driver.name);
1782 goto err_pci_release_1;
1784 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &adapter->card_revision);
1786 dprintk("%s: card revision %x \n", __FUNCTION__, adapter->card_revision);
1788 ret = pci_enable_device(pdev);
1790 goto err_pci_release_0;
1792 pci_read_config_word(pdev, 4, &var);
1795 pci_set_master(pdev);
1797 adapter->io_port = pdev->resource[1].start;
1799 adapter->io_mem = ioremap(pdev->resource[0].start, 0x800);
1801 if (!adapter->io_mem) {
1802 dprintk("%s: can not map io memory\n", __FUNCTION__);
1804 goto err_pci_disable;
1807 dprintk("%s: io memory maped at %p\n", __FUNCTION__, adapter->io_mem);
1814 pci_disable_device(pdev);
1816 pci_release_region(pdev, 0);
1818 pci_release_region(pdev, 1);
1823 static int sll_reset_flexcop(struct adapter *adapter)
1825 write_reg_dw(adapter, 0x208, 0);
1826 write_reg_dw(adapter, 0x210, 0xb2ff);
1832 static void decide_how_many_hw_filters(struct adapter *adapter)
1835 int mod_option_hw_filters;
1837 // FlexCop IIb & III have 6+32 hw filters
1838 // FlexCop II has 6 hw filters, every other should have at least 6
1839 switch (adapter->b2c2_revision) {
1843 case 0xc3: /* IIB */
1844 hw_filters = 6 + 32;
1846 case 0xc0: /* III */
1847 hw_filters = 6 + 32;
1853 printk("%s: the chip has %i hardware filters", __FILE__, hw_filters);
1855 mod_option_hw_filters = 0;
1856 if (enable_hw_filters >= 1)
1857 mod_option_hw_filters += 6;
1858 if (enable_hw_filters >= 2)
1859 mod_option_hw_filters += 32;
1861 if (mod_option_hw_filters >= hw_filters) {
1862 adapter->useable_hw_filters = hw_filters;
1864 adapter->useable_hw_filters = mod_option_hw_filters;
1865 printk(", but only %d will be used because of module option", mod_option_hw_filters);
1868 dprintk("%s: useable_hardware_filters set to %i\n", __FILE__, adapter->useable_hw_filters);
1871 static int driver_initialize(struct pci_dev *pdev)
1873 struct adapter *adapter;
1877 adapter = kmalloc(sizeof(struct adapter), GFP_KERNEL);
1879 dprintk("%s: out of memory!\n", __FUNCTION__);
1883 memset(adapter, 0, sizeof(struct adapter));
1885 pci_set_drvdata(pdev,adapter);
1887 adapter->pdev = pdev;
1888 adapter->irq = pdev->irq;
1890 ret = claim_adapter(adapter);
1894 irq_dma_enable_disable_irq(adapter, 0);
1896 ret = request_irq(pdev->irq, isr, 0x4000000, "Skystar2", adapter);
1898 dprintk("%s: unable to allocate irq=%d !\n", __FUNCTION__, pdev->irq);
1899 goto err_release_adapter;
1902 read_reg_dw(adapter, 0x208);
1903 write_reg_dw(adapter, 0x208, 0);
1904 write_reg_dw(adapter, 0x210, 0xb2ff);
1905 write_reg_dw(adapter, 0x208, 0x40);
1907 ret = init_dma_queue(adapter);
1911 adapter->b2c2_revision = (read_reg_dw(adapter, 0x204) >> 0x18);
1913 switch (adapter->b2c2_revision) {
1915 printk("%s: FlexCopII(rev.130) chip found\n", __FILE__);
1918 printk("%s: FlexCopIIB(rev.195) chip found\n", __FILE__);
1921 printk("%s: FlexCopIII(rev.192) chip found\n", __FILE__);
1924 printk("%s: The revision of the FlexCop chip on your card is %d\n", __FILE__, adapter->b2c2_revision);
1925 printk("%s: This driver works only with FlexCopII(rev.130), FlexCopIIB(rev.195) and FlexCopIII(rev.192).\n", __FILE__);
1927 goto err_free_dma_queue;
1930 decide_how_many_hw_filters(adapter);
1934 tmp = read_reg_dw(adapter, 0x204);
1936 write_reg_dw(adapter, 0x204, 0);
1939 write_reg_dw(adapter, 0x204, tmp);
1942 tmp = read_reg_dw(adapter, 0x308);
1943 write_reg_dw(adapter, 0x308, 0x4000 | tmp);
1945 adapter->dw_sram_type = 0x10000;
1947 sll_detect_sram_size(adapter);
1949 dprintk("%s sram length = %d, sram type= %x\n", __FUNCTION__, sram_length(adapter), adapter->dw_sram_type);
1951 sram_set_media_dest(adapter, 1);
1952 sram_set_net_dest(adapter, 1);
1954 ctrl_enable_smc(adapter, 0);
1956 sram_set_cai_dest(adapter, 2);
1957 sram_set_cao_dest(adapter, 2);
1959 dma_enable_disable_irq(adapter, 1, 0, 0);
1961 if (eeprom_get_mac_addr(adapter, 0, adapter->mac_addr) != 0) {
1962 printk("%s MAC address = %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x \n", __FUNCTION__, adapter->mac_addr[0],
1963 adapter->mac_addr[1], adapter->mac_addr[2], adapter->mac_addr[3], adapter->mac_addr[4], adapter->mac_addr[5],
1964 adapter->mac_addr[6], adapter->mac_addr[7]
1967 ca_set_mac_dst_addr_filter(adapter, adapter->mac_addr);
1968 ctrl_enable_mac(adapter, 1);
1971 adapter->lock = SPIN_LOCK_UNLOCKED;
1977 free_dma_queue(adapter);
1979 free_irq(pdev->irq, adapter);
1980 err_release_adapter:
1981 release_adapter(adapter);
1983 pci_set_drvdata(pdev, NULL);
1988 static void driver_halt(struct pci_dev *pdev)
1990 struct adapter *adapter = pci_get_drvdata(pdev);
1992 irq_dma_enable_disable_irq(adapter, 0);
1994 ctrl_enable_receive_data(adapter, 0);
1996 free_adapter_object(adapter);
1998 pci_set_drvdata(pdev, NULL);
2000 pci_disable_device(pdev);
2001 pci_release_region(pdev, 1);
2002 pci_release_region(pdev, 0);
2005 static int dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed)
2007 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
2008 struct adapter *adapter = (struct adapter *) dvbdmx->priv;
2010 dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type);
2012 open_stream(adapter, dvbdmxfeed->pid);
2017 static int dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
2019 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
2020 struct adapter *adapter = (struct adapter *) dvbdmx->priv;
2022 dprintk("%s: PID=%d, type=%d\n", __FUNCTION__, dvbdmxfeed->pid, dvbdmxfeed->type);
2024 close_stream(adapter, dvbdmxfeed->pid);
2030 static void set_tuner_tone(struct adapter *adapter, u8 tone)
2032 u16 wz_half_period_for_45_mhz[] = { 0x01ff, 0x0154, 0x00ff, 0x00cc };
2035 dprintk("%s: %u\n", __FUNCTION__, tone);
2039 ax = wz_half_period_for_45_mhz[0];
2042 ax = wz_half_period_for_45_mhz[1];
2045 ax = wz_half_period_for_45_mhz[2];
2048 ax = wz_half_period_for_45_mhz[3];
2056 write_reg_dw(adapter, 0x200, ((ax << 0x0f) + (ax & 0x7fff)) | 0x40000000);
2060 write_reg_dw(adapter, 0x200, 0x40ff8000);
2064 static void set_tuner_polarity(struct adapter *adapter, u8 polarity)
2068 dprintk("%s : polarity = %u \n", __FUNCTION__, polarity);
2070 var = read_reg_dw(adapter, 0x204);
2072 if (polarity == 0) {
2073 dprintk("%s: LNB power off\n", __FUNCTION__);
2077 if (polarity == 1) {
2082 if (polarity == 2) {
2087 write_reg_dw(adapter, 0x204, var);
2090 static void diseqc_send_bit(struct adapter *adapter, int data)
2092 set_tuner_tone(adapter, 1);
2093 udelay(data ? 500 : 1000);
2094 set_tuner_tone(adapter, 0);
2095 udelay(data ? 1000 : 500);
2099 static void diseqc_send_byte(struct adapter *adapter, int data)
2103 for (i = 7; i >= 0; i--) {
2104 d = (data >> i) & 1;
2106 diseqc_send_bit(adapter, d);
2109 diseqc_send_bit(adapter, par);
2113 static int send_diseqc_msg(struct adapter *adapter, int len, u8 *msg, unsigned long burst)
2117 set_tuner_tone(adapter, 0);
2120 for (i = 0; i < len; i++)
2121 diseqc_send_byte(adapter, msg[i]);
2127 diseqc_send_byte(adapter, 0xff);
2129 set_tuner_tone(adapter, 1);
2131 set_tuner_tone(adapter, 0);
2139 static int flexcop_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2141 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2145 set_tuner_tone(adapter, 1);
2148 set_tuner_tone(adapter, 0);
2157 static int flexcop_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
2159 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2161 send_diseqc_msg(adapter, cmd->msg_len, cmd->msg, 0);
2166 static int flexcop_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2168 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2170 send_diseqc_msg(adapter, 0, NULL, minicmd);
2175 static int flexcop_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2177 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2179 dprintk("%s: FE_SET_VOLTAGE\n", __FUNCTION__);
2182 case SEC_VOLTAGE_13:
2183 dprintk("%s: SEC_VOLTAGE_13, %x\n", __FUNCTION__, SEC_VOLTAGE_13);
2184 set_tuner_polarity(adapter, 1);
2187 case SEC_VOLTAGE_18:
2188 dprintk("%s: SEC_VOLTAGE_18, %x\n", __FUNCTION__, SEC_VOLTAGE_18);
2189 set_tuner_polarity(adapter, 2);
2197 static int flexcop_sleep(struct dvb_frontend* fe)
2199 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2201 dprintk("%s: FE_SLEEP\n", __FUNCTION__);
2202 set_tuner_polarity(adapter, 0);
2204 if (adapter->fe_sleep) return adapter->fe_sleep(fe);
2208 static u32 flexcop_i2c_func(struct i2c_adapter *adapter)
2210 printk("flexcop_i2c_func\n");
2212 return I2C_FUNC_I2C;
2215 static struct i2c_algorithm flexcop_algo = {
2216 .name = "flexcop i2c algorithm",
2218 .master_xfer = master_xfer,
2219 .functionality = flexcop_i2c_func,
2225 static int samsung_tbmu24112_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
2230 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
2231 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
2232 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
2233 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
2234 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
2235 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
2237 stv0299_writereg (fe, 0x13, aclk);
2238 stv0299_writereg (fe, 0x14, bclk);
2239 stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff);
2240 stv0299_writereg (fe, 0x20, (ratio >> 8) & 0xff);
2241 stv0299_writereg (fe, 0x21, (ratio ) & 0xf0);
2246 static int samsung_tbmu24112_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2250 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
2251 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2253 div = params->frequency / 125;
2255 buf[0] = (div >> 8) & 0x7f;
2256 buf[1] = div & 0xff;
2257 buf[2] = 0x84; // 0xC4
2260 if (params->frequency < 1500000) buf[3] |= 0x10;
2262 if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO;
2266 static u8 samsung_tbmu24112_inittab[] = {
2311 static struct stv0299_config samsung_tbmu24112_config = {
2312 .demod_address = 0x68,
2313 .inittab = samsung_tbmu24112_inittab,
2316 .enhanced_tuning = 0,
2318 .lock_output = STV0229_LOCKOUTPUT_LK,
2319 .volt13_op0_op1 = STV0299_VOLT13_OP1,
2320 .min_delay_ms = 100,
2321 .set_symbol_rate = samsung_tbmu24112_set_symbol_rate,
2322 .pll_set = samsung_tbmu24112_pll_set,
2327 static int nxt2002_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
2329 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2331 return request_firmware(fw, name, &adapter->pdev->dev);
2335 static struct nxt2002_config samsung_tbmv_config = {
2336 .demod_address = 0x0A,
2337 .request_firmware = nxt2002_request_firmware,
2340 static int samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
2342 static u8 mt352_clock_config [] = { 0x89, 0x18, 0x2d };
2343 static u8 mt352_reset [] = { 0x50, 0x80 };
2344 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
2345 static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0xa1 };
2346 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
2348 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
2350 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
2351 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
2353 mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
2354 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
2359 int samsung_tdtc9251dh0_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf)
2362 unsigned char bs = 0;
2364 #define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */
2365 div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
2367 if (params->frequency >= 48000000 && params->frequency <= 154000000) bs = 0x09;
2368 if (params->frequency >= 161000000 && params->frequency <= 439000000) bs = 0x0a;
2369 if (params->frequency >= 447000000 && params->frequency <= 863000000) bs = 0x08;
2371 pllbuf[0] = 0xc2; // Note: non-linux standard PLL i2c address
2372 pllbuf[1] = div >> 8;
2373 pllbuf[2] = div & 0xff;
2380 static struct mt352_config samsung_tdtc9251dh0_config = {
2382 .demod_address = 0x0f,
2383 .demod_init = samsung_tdtc9251dh0_demod_init,
2384 .pll_set = samsung_tdtc9251dh0_pll_set,
2387 static int skystar23_samsung_tbdu18132_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2391 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
2392 struct adapter* adapter = (struct adapter*) fe->dvb->priv;
2394 div = (params->frequency + (125/2)) / 125;
2396 buf[0] = (div >> 8) & 0x7f;
2397 buf[1] = (div >> 0) & 0xff;
2398 buf[2] = 0x84 | ((div >> 10) & 0x60);
2401 if (params->frequency < 1550000)
2404 if (i2c_transfer (&adapter->i2c_adap, &msg, 1) != 1) return -EIO;
2408 static struct mt312_config skystar23_samsung_tbdu18132_config = {
2410 .demod_address = 0x0e,
2411 .pll_set = skystar23_samsung_tbdu18132_pll_set,
2417 static void frontend_init(struct adapter *skystar2)
2419 switch(skystar2->pdev->device) {
2420 case 0x2103: // Technisat Skystar2 OR Technisat Airstar2 (DVB-T or ATSC)
2422 // Attempt to load the Nextwave nxt2002 for ATSC support
2423 skystar2->fe = nxt2002_attach(&samsung_tbmv_config, &skystar2->i2c_adap);
2424 if (skystar2->fe != NULL) {
2425 skystar2->fe_sleep = skystar2->fe->ops->sleep;
2426 skystar2->fe->ops->sleep = flexcop_sleep;
2430 // try the skystar2 v2.6 first (stv0299/Samsung tbmu24112(sl1935))
2431 skystar2->fe = stv0299_attach(&samsung_tbmu24112_config, &skystar2->i2c_adap);
2432 if (skystar2->fe != NULL) {
2433 skystar2->fe->ops->set_voltage = flexcop_set_voltage;
2434 skystar2->fe_sleep = skystar2->fe->ops->sleep;
2435 skystar2->fe->ops->sleep = flexcop_sleep;
2439 // try the airstar2 (mt352/Samsung tdtc9251dh0(??))
2440 skystar2->fe = mt352_attach(&samsung_tdtc9251dh0_config, &skystar2->i2c_adap);
2441 if (skystar2->fe != NULL) {
2442 skystar2->fe->ops->info.frequency_min = 474000000;
2443 skystar2->fe->ops->info.frequency_max = 858000000;
2447 // try the skystar2 v2.3 (vp310/Samsung tbdu18132(tsa5059))
2448 skystar2->fe = vp310_attach(&skystar23_samsung_tbdu18132_config, &skystar2->i2c_adap);
2449 if (skystar2->fe != NULL) {
2450 skystar2->fe->ops->diseqc_send_master_cmd = flexcop_diseqc_send_master_cmd;
2451 skystar2->fe->ops->diseqc_send_burst = flexcop_diseqc_send_burst;
2452 skystar2->fe->ops->set_tone = flexcop_set_tone;
2453 skystar2->fe->ops->set_voltage = flexcop_set_voltage;
2454 skystar2->fe_sleep = skystar2->fe->ops->sleep;
2455 skystar2->fe->ops->sleep = flexcop_sleep;
2461 if (skystar2->fe == NULL) {
2462 printk("skystar2: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2463 skystar2->pdev->vendor,
2464 skystar2->pdev->device,
2465 skystar2->pdev->subsystem_vendor,
2466 skystar2->pdev->subsystem_device);
2468 if (dvb_register_frontend(skystar2->dvb_adapter, skystar2->fe)) {
2469 printk("skystar2: Frontend registration failed!\n");
2470 if (skystar2->fe->ops->release)
2471 skystar2->fe->ops->release(skystar2->fe);
2472 skystar2->fe = NULL;
2478 static int skystar2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2480 struct adapter *adapter;
2481 struct dvb_adapter *dvb_adapter;
2482 struct dvb_demux *dvbdemux;
2483 struct dmx_demux *dmx;
2489 ret = driver_initialize(pdev);
2493 ret = dvb_register_adapter(&dvb_adapter, skystar2_pci_driver.name,
2496 printk("%s: Error registering DVB adapter\n", __FUNCTION__);
2500 adapter = pci_get_drvdata(pdev);
2502 dvb_adapter->priv = adapter;
2503 adapter->dvb_adapter = dvb_adapter;
2506 init_MUTEX(&adapter->i2c_sem);
2509 memset(&adapter->i2c_adap, 0, sizeof(struct i2c_adapter));
2510 strcpy(adapter->i2c_adap.name, "SkyStar2");
2512 i2c_set_adapdata(&adapter->i2c_adap, adapter);
2514 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
2515 adapter->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2517 adapter->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2519 adapter->i2c_adap.algo = &flexcop_algo;
2520 adapter->i2c_adap.algo_data = NULL;
2521 adapter->i2c_adap.id = I2C_ALGO_BIT;
2523 ret = i2c_add_adapter(&adapter->i2c_adap);
2525 goto err_dvb_unregister;
2527 dvbdemux = &adapter->demux;
2529 dvbdemux->priv = adapter;
2530 dvbdemux->filternum = N_PID_SLOTS;
2531 dvbdemux->feednum = N_PID_SLOTS;
2532 dvbdemux->start_feed = dvb_start_feed;
2533 dvbdemux->stop_feed = dvb_stop_feed;
2534 dvbdemux->write_to_decoder = NULL;
2535 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
2537 ret = dvb_dmx_init(&adapter->demux);
2541 dmx = &dvbdemux->dmx;
2543 adapter->hw_frontend.source = DMX_FRONTEND_0;
2544 adapter->dmxdev.filternum = N_PID_SLOTS;
2545 adapter->dmxdev.demux = dmx;
2546 adapter->dmxdev.capabilities = 0;
2548 ret = dvb_dmxdev_init(&adapter->dmxdev, adapter->dvb_adapter);
2550 goto err_dmx_release;
2552 ret = dmx->add_frontend(dmx, &adapter->hw_frontend);
2554 goto err_dmxdev_release;
2556 adapter->mem_frontend.source = DMX_MEMORY_FE;
2558 ret = dmx->add_frontend(dmx, &adapter->mem_frontend);
2560 goto err_remove_hw_frontend;
2562 ret = dmx->connect_frontend(dmx, &adapter->hw_frontend);
2564 goto err_remove_mem_frontend;
2566 dvb_net_init(adapter->dvb_adapter, &adapter->dvbnet, &dvbdemux->dmx);
2568 frontend_init(adapter);
2572 err_remove_mem_frontend:
2573 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->mem_frontend);
2574 err_remove_hw_frontend:
2575 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &adapter->hw_frontend);
2577 dvb_dmxdev_release(&adapter->dmxdev);
2579 dvb_dmx_release(&adapter->demux);
2581 i2c_del_adapter(&adapter->i2c_adap);
2583 dvb_unregister_adapter(adapter->dvb_adapter);
2589 static void skystar2_remove(struct pci_dev *pdev)
2591 struct adapter *adapter = pci_get_drvdata(pdev);
2592 struct dvb_demux *dvbdemux;
2593 struct dmx_demux *dmx;
2598 dvb_net_release(&adapter->dvbnet);
2599 dvbdemux = &adapter->demux;
2600 dmx = &dvbdemux->dmx;
2603 dmx->remove_frontend(dmx, &adapter->hw_frontend);
2604 dmx->remove_frontend(dmx, &adapter->mem_frontend);
2606 dvb_dmxdev_release(&adapter->dmxdev);
2607 dvb_dmx_release(dvbdemux);
2609 if (adapter->fe != NULL)
2610 dvb_unregister_frontend(adapter->fe);
2612 dvb_unregister_adapter(adapter->dvb_adapter);
2614 i2c_del_adapter(&adapter->i2c_adap);
2619 static struct pci_device_id skystar2_pci_tbl[] = {
2620 {0x000013d0, 0x00002103, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000},
2621 /* {0x000013d0, 0x00002200, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x00000000}, UNDEFINED HARDWARE - mail linuxtv.org list */ //FCIII
2625 MODULE_DEVICE_TABLE(pci, skystar2_pci_tbl);
2627 static struct pci_driver skystar2_pci_driver = {
2629 .id_table = skystar2_pci_tbl,
2630 .probe = skystar2_probe,
2631 .remove = skystar2_remove,
2634 static int skystar2_init(void)
2636 return pci_module_init(&skystar2_pci_driver);
2639 static void skystar2_cleanup(void)
2641 pci_unregister_driver(&skystar2_pci_driver);
2644 module_init(skystar2_init);
2645 module_exit(skystar2_cleanup);
2647 MODULE_DESCRIPTION("Technisat SkyStar2 DVB PCI Driver");
2648 MODULE_LICENSE("GPL");