2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
30 * DViCO FusionHDTV 5 USB Gold
31 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
34 * signal strength always returns 0.
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/moduleparam.h>
41 #include <linux/init.h>
42 #include <linux/delay.h>
43 #include <linux/string.h>
44 #include <linux/slab.h>
45 #include <asm/byteorder.h>
47 #include "dvb_frontend.h"
48 #include "lgdt330x_priv.h"
52 module_param(debug, int, 0644);
53 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
54 #define dprintk(args...) \
56 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
61 struct i2c_adapter* i2c;
62 struct dvb_frontend_ops ops;
64 /* Configuration settings */
65 const struct lgdt330x_config* config;
67 struct dvb_frontend frontend;
69 /* Demodulator private data */
70 fe_modulation_t current_modulation;
72 /* Tuner private data */
73 u32 current_frequency;
76 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
77 u8 *buf, /* data bytes to send */
78 int len /* number of bytes to send */ )
81 { .addr = state->config->demod_address,
88 for (i=0; i<len-1; i+=2){
89 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
90 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
102 * This routine writes the register (reg) to the demod bus
103 * then reads the data returned for (len) bytes.
106 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
107 enum I2C_REG reg, u8* buf, int len)
110 struct i2c_msg msg [] = {
111 { .addr = state->config->demod_address,
112 .flags = 0, .buf = wr, .len = 1 },
113 { .addr = state->config->demod_address,
114 .flags = I2C_M_RD, .buf = buf, .len = len },
117 ret = i2c_transfer(state->i2c, msg, 2);
119 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
127 static int lgdt3302_SwReset(struct lgdt330x_state* state)
132 0x00 /* bit 6 is active low software reset
133 * bits 5-0 are 1 to mask interrupts */
136 ret = i2c_write_demod_bytes(state,
137 reset, sizeof(reset));
140 /* force reset high (inactive) and unmask interrupts */
142 ret = i2c_write_demod_bytes(state,
143 reset, sizeof(reset));
148 static int lgdt3303_SwReset(struct lgdt330x_state* state)
153 0x00 /* bit 0 is active low software reset */
156 ret = i2c_write_demod_bytes(state,
157 reset, sizeof(reset));
160 /* force reset high (inactive) */
162 ret = i2c_write_demod_bytes(state,
163 reset, sizeof(reset));
168 static int lgdt330x_SwReset(struct lgdt330x_state* state)
170 switch (state->config->demod_chip) {
172 return lgdt3302_SwReset(state);
174 return lgdt3303_SwReset(state);
180 static int lgdt330x_init(struct dvb_frontend* fe)
182 /* Hardware reset is done using gpio[0] of cx23880x chip.
183 * I'd like to do it here, but don't know how to find chip address.
184 * cx88-cards.c arranges for the reset bit to be inactive (high).
185 * Maybe there needs to be a callable function in cx88-core or
186 * the caller of this function needs to do it. */
189 * Array of byte pairs <address, value>
190 * to initialize each different chip
192 static u8 lgdt3302_init_data[] = {
193 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
194 /* Change the value of NCOCTFV[25:0] of carrier
195 recovery center frequency register */
196 VSB_CARRIER_FREQ0, 0x00,
197 VSB_CARRIER_FREQ1, 0x87,
198 VSB_CARRIER_FREQ2, 0x8e,
199 VSB_CARRIER_FREQ3, 0x01,
200 /* Change the TPCLK pin polarity
201 data is valid on falling clock */
203 /* Change the value of IFBW[11:0] of
204 AGC IF/RF loop filter bandwidth register */
205 AGC_RF_BANDWIDTH0, 0x40,
206 AGC_RF_BANDWIDTH1, 0x93,
207 AGC_RF_BANDWIDTH2, 0x00,
208 /* Change the value of bit 6, 'nINAGCBY' and
209 'NSSEL[1:0] of ACG function control register 2 */
210 AGC_FUNC_CTRL2, 0xc6,
211 /* Change the value of bit 6 'RFFIX'
212 of AGC function control register 3 */
213 AGC_FUNC_CTRL3, 0x40,
214 /* Set the value of 'INLVTHD' register 0x2a/0x2c
218 /* Change the value of IAGCBW[15:8]
219 of inner AGC loop filter bandwith */
220 AGC_LOOP_BANDWIDTH0, 0x08,
221 AGC_LOOP_BANDWIDTH1, 0x9a
224 static u8 lgdt3303_init_data[] = {
228 static u8 flip_lgdt3303_init_data[] = {
233 struct lgdt330x_state* state = fe->demodulator_priv;
237 switch (state->config->demod_chip) {
239 chip_name = "LGDT3302";
240 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
241 sizeof(lgdt3302_init_data));
244 chip_name = "LGDT3303";
245 if (state->config->clock_polarity_flip) {
246 err = i2c_write_demod_bytes(state, flip_lgdt3303_init_data,
247 sizeof(flip_lgdt3303_init_data));
249 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
250 sizeof(lgdt3303_init_data));
254 chip_name = "undefined";
255 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
258 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
261 return lgdt330x_SwReset(state);
264 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
266 *ber = 0; /* Not supplied by the demod chips */
270 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
272 struct lgdt330x_state* state = fe->demodulator_priv;
276 switch (state->config->demod_chip) {
278 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
282 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
287 "Only LGDT3302 and LGDT3303 are supported chips.\n");
291 *ucblocks = (buf[0] << 8) | buf[1];
295 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
296 struct dvb_frontend_parameters *param)
299 * Array of byte pairs <address, value>
300 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
302 static u8 lgdt3303_8vsb_44_data[] = {
311 * Array of byte pairs <address, value>
312 * to initialize QAM for lgdt3303 chip
314 static u8 lgdt3303_qam_data[] = {
327 struct lgdt330x_state* state = fe->demodulator_priv;
329 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
332 /* Change only if we are actually changing the modulation */
333 if (state->current_modulation != param->u.vsb.modulation) {
334 switch(param->u.vsb.modulation) {
336 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
338 /* Select VSB mode */
339 top_ctrl_cfg[1] = 0x03;
341 /* Select ANT connector if supported by card */
342 if (state->config->pll_rf_set)
343 state->config->pll_rf_set(fe, 1);
345 if (state->config->demod_chip == LGDT3303) {
346 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
347 sizeof(lgdt3303_8vsb_44_data));
352 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
354 /* Select QAM_64 mode */
355 top_ctrl_cfg[1] = 0x00;
357 /* Select CABLE connector if supported by card */
358 if (state->config->pll_rf_set)
359 state->config->pll_rf_set(fe, 0);
361 if (state->config->demod_chip == LGDT3303) {
362 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
363 sizeof(lgdt3303_qam_data));
368 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
370 /* Select QAM_256 mode */
371 top_ctrl_cfg[1] = 0x01;
373 /* Select CABLE connector if supported by card */
374 if (state->config->pll_rf_set)
375 state->config->pll_rf_set(fe, 0);
377 if (state->config->demod_chip == LGDT3303) {
378 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
379 sizeof(lgdt3303_qam_data));
383 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
387 * select serial or parallel MPEG harware interface
388 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
391 top_ctrl_cfg[1] |= state->config->serial_mpeg;
393 /* Select the requested mode */
394 i2c_write_demod_bytes(state, top_ctrl_cfg,
395 sizeof(top_ctrl_cfg));
396 if (state->config->set_ts_params)
397 state->config->set_ts_params(fe, 0);
398 state->current_modulation = param->u.vsb.modulation;
401 /* Tune to the specified frequency */
402 if (state->config->pll_set)
403 state->config->pll_set(fe, param);
405 /* Keep track of the new frequency */
406 /* FIXME this is the wrong way to do this... */
407 /* The tuner is shared with the video4linux analog API */
408 state->current_frequency = param->frequency;
410 lgdt330x_SwReset(state);
414 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
415 struct dvb_frontend_parameters* param)
417 struct lgdt330x_state *state = fe->demodulator_priv;
418 param->frequency = state->current_frequency;
422 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
424 struct lgdt330x_state* state = fe->demodulator_priv;
427 *status = 0; /* Reset status result */
429 /* AGC status register */
430 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
431 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
432 if ((buf[0] & 0x0c) == 0x8){
433 /* Test signal does not exist flag */
434 /* as well as the AGC lock flag. */
435 *status |= FE_HAS_SIGNAL;
439 * You must set the Mask bits to 1 in the IRQ_MASK in order
440 * to see that status bit in the IRQ_STATUS register.
441 * This is done in SwReset();
444 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
445 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
449 if ((buf[2] & 0x03) == 0x01) {
450 *status |= FE_HAS_SYNC;
453 /* FEC error status */
454 if ((buf[2] & 0x0c) == 0x08) {
455 *status |= FE_HAS_LOCK;
456 *status |= FE_HAS_VITERBI;
459 /* Carrier Recovery Lock Status Register */
460 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
461 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
462 switch (state->current_modulation) {
465 /* Need to undestand why there are 3 lock levels here */
466 if ((buf[0] & 0x07) == 0x07)
467 *status |= FE_HAS_CARRIER;
470 if ((buf[0] & 0x80) == 0x80)
471 *status |= FE_HAS_CARRIER;
474 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
480 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
482 struct lgdt330x_state* state = fe->demodulator_priv;
486 *status = 0; /* Reset status result */
488 /* lgdt3303 AGC status register */
489 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
493 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
494 if ((buf[0] & 0x21) == 0x01){
495 /* Test input signal does not exist flag */
496 /* as well as the AGC lock flag. */
497 *status |= FE_HAS_SIGNAL;
500 /* Carrier Recovery Lock Status Register */
501 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
502 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
503 switch (state->current_modulation) {
506 /* Need to undestand why there are 3 lock levels here */
507 if ((buf[0] & 0x07) == 0x07)
508 *status |= FE_HAS_CARRIER;
511 i2c_read_demod_bytes(state, 0x8a, buf, 1);
512 if ((buf[0] & 0x04) == 0x04)
513 *status |= FE_HAS_SYNC;
514 if ((buf[0] & 0x01) == 0x01)
515 *status |= FE_HAS_LOCK;
516 if ((buf[0] & 0x08) == 0x08)
517 *status |= FE_HAS_VITERBI;
520 if ((buf[0] & 0x80) == 0x80)
521 *status |= FE_HAS_CARRIER;
524 i2c_read_demod_bytes(state, 0x38, buf, 1);
525 if ((buf[0] & 0x02) == 0x00)
526 *status |= FE_HAS_SYNC;
527 if ((buf[0] & 0x01) == 0x01) {
528 *status |= FE_HAS_LOCK;
529 *status |= FE_HAS_VITERBI;
533 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
538 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
540 /* not directly available. */
545 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
549 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
550 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
551 * respectively. The following tables are built on these formulas.
552 * The usual definition is SNR = 20 log10(signal/noise)
553 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
555 * This table is a an ordered list of noise values computed by the
556 * formula from the spec sheet such that the index into the table
557 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
558 * value entries at the beginning because the SNR varies more than
559 * 1 db for a change of 1 digit in noise at very small values of noise.
561 * Examples from SNR_EQ table:
579 static const u32 SNR_EQ[] =
580 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
581 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
582 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
583 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
584 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
585 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
588 static const u32 SNR_PH[] =
589 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
590 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
591 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
592 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
593 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
594 90833, 114351, 143960, 181235, 228161, 0x080000
597 static u8 buf[5];/* read data buffer */
598 static u32 noise; /* noise value */
599 static u32 snr_db; /* index into SNR_EQ[] */
600 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
602 /* read both equalizer and phase tracker noise data */
603 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
605 if (state->current_modulation == VSB_8) {
606 /* Equalizer Mean-Square Error Register for VSB */
607 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
610 * Look up noise value in table.
611 * A better search algorithm could be used...
612 * watch out there are duplicate entries.
614 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
615 if (noise < SNR_EQ[snr_db]) {
621 /* Phase Tracker Mean-Square Error Register for QAM */
622 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
624 /* Look up noise value in table. */
625 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
626 if (noise < SNR_PH[snr_db]) {
633 /* Return the raw noise value */
634 static u8 buf[5];/* read data buffer */
635 static u32 noise; /* noise value */
636 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
638 /* read both equalizer and pase tracker noise data */
639 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
641 if (state->current_modulation == VSB_8) {
642 /* Phase Tracker Mean-Square Error Register for VSB */
643 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
646 /* Carrier Recovery Mean-Square Error for QAM */
647 i2c_read_demod_bytes(state, 0x1a, buf, 2);
648 noise = ((buf[0] & 3) << 8) | buf[1];
651 /* Small values for noise mean signal is better so invert noise */
655 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
660 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
662 /* Return the raw noise value */
663 static u8 buf[5];/* read data buffer */
664 static u32 noise; /* noise value */
665 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
667 if (state->current_modulation == VSB_8) {
669 /* Phase Tracker Mean-Square Error Register for VSB */
670 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
673 /* Carrier Recovery Mean-Square Error for QAM */
674 i2c_read_demod_bytes(state, 0x1a, buf, 2);
675 noise = (buf[0] << 8) | buf[1];
678 /* Small values for noise mean signal is better so invert noise */
681 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
686 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
688 /* I have no idea about this - it may not be needed */
689 fe_tune_settings->min_delay_ms = 500;
690 fe_tune_settings->step_size = 0;
691 fe_tune_settings->max_drift = 0;
695 static void lgdt330x_release(struct dvb_frontend* fe)
697 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
701 static struct dvb_frontend_ops lgdt3302_ops;
702 static struct dvb_frontend_ops lgdt3303_ops;
704 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
705 struct i2c_adapter* i2c)
707 struct lgdt330x_state* state = NULL;
710 /* Allocate memory for the internal state */
711 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
715 /* Setup the state */
716 state->config = config;
718 switch (config->demod_chip) {
720 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
723 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
729 /* Verify communication with demod chip */
730 if (i2c_read_demod_bytes(state, 2, buf, 1))
733 state->current_frequency = -1;
734 state->current_modulation = -1;
736 /* Create dvb_frontend */
737 state->frontend.ops = &state->ops;
738 state->frontend.demodulator_priv = state;
739 return &state->frontend;
743 dprintk("%s: ERROR\n",__FUNCTION__);
747 static struct dvb_frontend_ops lgdt3302_ops = {
749 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
751 .frequency_min= 54000000,
752 .frequency_max= 858000000,
753 .frequency_stepsize= 62500,
754 .symbol_rate_min = 5056941, /* QAM 64 */
755 .symbol_rate_max = 10762000, /* VSB 8 */
756 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
758 .init = lgdt330x_init,
759 .set_frontend = lgdt330x_set_parameters,
760 .get_frontend = lgdt330x_get_frontend,
761 .get_tune_settings = lgdt330x_get_tune_settings,
762 .read_status = lgdt3302_read_status,
763 .read_ber = lgdt330x_read_ber,
764 .read_signal_strength = lgdt330x_read_signal_strength,
765 .read_snr = lgdt3302_read_snr,
766 .read_ucblocks = lgdt330x_read_ucblocks,
767 .release = lgdt330x_release,
770 static struct dvb_frontend_ops lgdt3303_ops = {
772 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
774 .frequency_min= 54000000,
775 .frequency_max= 858000000,
776 .frequency_stepsize= 62500,
777 .symbol_rate_min = 5056941, /* QAM 64 */
778 .symbol_rate_max = 10762000, /* VSB 8 */
779 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
781 .init = lgdt330x_init,
782 .set_frontend = lgdt330x_set_parameters,
783 .get_frontend = lgdt330x_get_frontend,
784 .get_tune_settings = lgdt330x_get_tune_settings,
785 .read_status = lgdt3303_read_status,
786 .read_ber = lgdt330x_read_ber,
787 .read_signal_strength = lgdt330x_read_signal_strength,
788 .read_snr = lgdt3303_read_snr,
789 .read_ucblocks = lgdt330x_read_ucblocks,
790 .release = lgdt330x_release,
793 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
794 MODULE_AUTHOR("Wilson Michaels");
795 MODULE_LICENSE("GPL");
797 EXPORT_SYMBOL(lgdt330x_attach);