2 Support for B2C2/BBTI Technisat Air2PC - ATSC
4 Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * This driver needs external firmware. Please use the command
24 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
25 * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
27 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
28 #define CRC_CCIT_MASK 0x1021
30 #include <linux/init.h>
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/firmware.h>
36 #include "dvb_frontend.h"
39 struct nxt2002_state {
41 struct i2c_adapter* i2c;
42 struct dvb_frontend_ops ops;
43 const struct nxt2002_config* config;
44 struct dvb_frontend frontend;
46 /* demodulator private data */
51 #define dprintk(args...) \
53 if (debug) printk(KERN_DEBUG "nxt2002: " args); \
56 static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len)
58 /* probbably a much better way or doing this */
61 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
64 for (x = 0 ; x < len ; x++)
67 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
68 printk ("%s: i2c write error (addr %02x, err == %i)\n",
69 __FUNCTION__, state->config->demod_address, err);
76 static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len)
80 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
81 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
85 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
86 printk ("%s: i2c read error (addr %02x, err == %i)\n",
87 __FUNCTION__, state->config->demod_address, err);
94 static u16 nxt2002_crc(u16 crc, u8 c)
98 u16 input = (u16) c & 0xFF;
102 if((crc ^ input) & 0x8000)
103 crc=(crc<<1)^CRC_CCIT_MASK;
111 static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
114 dprintk("%s\n", __FUNCTION__);
116 /* set multi register length */
117 i2c_writebytes(state,0x34,&len,1);
119 /* set mutli register register */
120 i2c_writebytes(state,0x35,®,1);
122 /* send the actual data */
123 i2c_writebytes(state,0x36,data,len);
125 /* toggle the multireg write bit*/
127 i2c_writebytes(state,0x21,&buf,1);
129 i2c_readbytes(state,0x21,&buf,1);
131 if ((buf & 0x02) == 0)
134 dprintk("Error writing multireg register %02X\n",reg);
139 static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
142 dprintk("%s\n", __FUNCTION__);
144 /* set multi register length */
146 i2c_writebytes(state,0x34,&len2,1);
148 /* set mutli register register */
149 i2c_writebytes(state,0x35,®,1);
151 /* send the actual data */
152 i2c_readbytes(state,reg,data,len);
157 static void nxt2002_microcontroller_stop (struct nxt2002_state* state)
159 u8 buf[2],counter = 0;
160 dprintk("%s\n", __FUNCTION__);
163 i2c_writebytes(state,0x22,buf,1);
165 while (counter < 20) {
166 i2c_readbytes(state,0x31,buf,1);
173 dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n");
177 static void nxt2002_microcontroller_start (struct nxt2002_state* state)
180 dprintk("%s\n", __FUNCTION__);
183 i2c_writebytes(state,0x22,&buf,1);
186 static int nxt2002_writetuner (struct nxt2002_state* state, u8* data)
190 dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]);
192 dprintk("%s\n", __FUNCTION__);
193 /* stop the micro first */
194 nxt2002_microcontroller_stop(state);
196 /* set the i2c transfer speed to the tuner */
198 i2c_writebytes(state,0x20,&buf,1);
200 /* setup to transfer 4 bytes via i2c */
202 i2c_writebytes(state,0x34,&buf,1);
204 /* write actual tuner bytes */
205 i2c_writebytes(state,0x36,data,4);
207 /* set tuner i2c address */
209 i2c_writebytes(state,0x35,&buf,1);
211 /* write UC Opmode to begin transfer */
213 i2c_writebytes(state,0x21,&buf,1);
216 i2c_readbytes(state,0x21,&buf,1);
217 if ((buf & 0x80)== 0x00)
223 printk("nxt2002: timeout error writing tuner\n");
227 static void nxt2002_agc_reset(struct nxt2002_state* state)
230 dprintk("%s\n", __FUNCTION__);
233 i2c_writebytes(state,0x08,&buf,1);
236 i2c_writebytes(state,0x08,&buf,1);
241 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
244 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
245 u8 buf[256],written = 0,chunkpos = 0;
246 u16 rambase,position,crc = 0;
248 dprintk("%s\n", __FUNCTION__);
249 dprintk("Firmware is %zu bytes\n",fw->size);
251 /* Get the RAM base for this nxt2002 */
252 i2c_readbytes(state,0x10,buf,1);
260 dprintk("rambase on this nxt2002 is %04X\n",rambase);
262 /* Hold the micro in reset while loading firmware */
264 i2c_writebytes(state,0x2B,buf,1);
267 for (position = 0; position < fw->size ; position++) {
271 buf[0] = ((rambase + position) >> 8);
272 buf[1] = (rambase + position) & 0xFF;
274 /* write starting address */
275 i2c_writebytes(state,0x29,buf,3);
280 if ((written % 4) == 0)
281 i2c_writebytes(state,chunkpos,&fw->data[position-3],4);
283 crc = nxt2002_crc(crc,fw->data[position]);
286 if ((written == 255) || (position+1 == fw->size)) {
287 /* write remaining bytes of firmware */
288 i2c_writebytes(state, chunkpos+4-(written %4),
289 &fw->data[position-(written %4) + 1],
295 i2c_writebytes(state,0x2C,buf,2);
297 /* do a read to stop things */
298 i2c_readbytes(state,0x2A,buf,1);
300 /* set transfer mode to complete */
302 i2c_writebytes(state,0x2B,buf,1);
313 static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,
314 struct dvb_frontend_parameters *p)
316 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
321 freq = 44000 + ( p->frequency / 1000 );
323 dprintk("freq = %d p->frequency = %d\n",freq,p->frequency);
325 tunerfreq = freq * 24/4000;
327 buf[0] = (tunerfreq >> 8) & 0x7F;
328 buf[1] = (tunerfreq & 0xFF);
330 if (p->frequency <= 214000000) {
331 buf[2] = 0x84 + (0x06 << 3);
332 buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;
333 } else if (p->frequency <= 721000000) {
334 buf[2] = 0x84 + (0x07 << 3);
335 buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;
336 } else if (p->frequency <= 841000000) {
337 buf[2] = 0x84 + (0x0E << 3);
340 buf[2] = 0x84 + (0x0F << 3);
344 /* write frequency information */
345 nxt2002_writetuner(state,buf);
347 /* reset the agc now that tuning has been completed */
348 nxt2002_agc_reset(state);
350 /* set target power level */
352 i2c_writebytes(state,0x42,buf,1);
356 i2c_writebytes(state,0x57,buf,1);
358 /* write sdm1 input */
361 nxt2002_writereg_multibyte(state,0x58,buf,2);
363 /* write sdmx input */
366 nxt2002_writereg_multibyte(state,0x5C,buf,2);
368 /* write adc power lpf fc */
370 i2c_writebytes(state,0x43,buf,1);
372 /* write adc power lpf fc */
374 i2c_writebytes(state,0x43,buf,1);
376 /* write accumulator2 input */
379 nxt2002_writereg_multibyte(state,0x4B,buf,2);
383 i2c_writebytes(state,0x4D,buf,1);
385 /* write sdm12 lpf fc */
387 i2c_writebytes(state,0x55,buf,1);
389 /* write agc control reg */
391 i2c_writebytes(state,0x41,buf,1);
393 /* write agc ucgp0 */
395 i2c_writebytes(state,0x30,buf,1);
397 /* write agc control reg */
399 i2c_writebytes(state,0x41,buf,1);
401 /* write accumulator2 input */
404 nxt2002_writereg_multibyte(state,0x49,buf,2);
405 nxt2002_writereg_multibyte(state,0x4B,buf,2);
407 /* write agc control reg */
409 i2c_writebytes(state,0x41,buf,1);
411 nxt2002_microcontroller_start(state);
413 /* adjacent channel detection should be done here, but I don't
414 have any stations with this need so I cannot test it */
419 static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status)
421 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
423 i2c_readbytes(state,0x31,&lock,1);
427 *status |= FE_HAS_SIGNAL;
428 *status |= FE_HAS_CARRIER;
429 *status |= FE_HAS_VITERBI;
430 *status |= FE_HAS_SYNC;
431 *status |= FE_HAS_LOCK;
436 static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber)
438 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
441 nxt2002_readreg_multibyte(state,0xE6,b,3);
443 *ber = ((b[0] << 8) + b[1]) * 8;
448 static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength)
450 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
454 /* setup to read cluster variance */
456 i2c_writebytes(state,0xA1,b,1);
458 /* get multreg val */
459 nxt2002_readreg_multibyte(state,0xA6,b,2);
461 temp = (b[0] << 8) | b[1];
462 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
467 static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
470 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
475 /* setup to read cluster variance */
477 i2c_writebytes(state,0xA1,b,1);
479 /* get multreg val from 0xA6 */
480 nxt2002_readreg_multibyte(state,0xA6,b,2);
482 temp = (b[0] << 8) | b[1];
483 temp2 = 0x7FFF - temp;
485 /* snr will be in db */
487 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
488 else if (temp2 > 0x7EC0)
489 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
490 else if (temp2 > 0x7C00)
491 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
493 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
495 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
497 *snr = snrdb * (0xFFFF/32000);
502 static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
504 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
507 nxt2002_readreg_multibyte(state,0xE6,b,3);
514 static int nxt2002_sleep(struct dvb_frontend* fe)
519 static int nxt2002_init(struct dvb_frontend* fe)
521 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
522 const struct firmware *fw;
526 if (!state->initialised) {
527 /* request the firmware, this will block until someone uploads it */
528 printk("nxt2002: Waiting for firmware upload...\n");
529 ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE);
530 printk("nxt2002: Waiting for firmware upload(2)...\n");
532 printk("nxt2002: no firmware upload (timeout or file not found?)\n");
536 ret = nxt2002_load_firmware(fe, fw);
538 printk("nxt2002: writing firmware to device failed\n");
539 release_firmware(fw);
543 /* Put the micro into reset */
544 nxt2002_microcontroller_stop(state);
546 /* ensure transfer is complete */
548 i2c_writebytes(state,0x2B,buf,1);
550 /* Put the micro into reset for real this time */
551 nxt2002_microcontroller_stop(state);
553 /* soft reset everything (agc,frontend,eq,fec)*/
555 i2c_writebytes(state,0x08,buf,1);
557 i2c_writebytes(state,0x08,buf,1);
559 /* write agc sdm configure */
561 i2c_writebytes(state,0x57,buf,1);
563 /* write mod output format */
565 i2c_writebytes(state,0x09,buf,1);
567 /* write fec mpeg mode */
570 i2c_writebytes(state,0xE9,buf,2);
572 /* write mux selection */
574 i2c_writebytes(state,0xCC,buf,1);
576 state->initialised = 1;
582 static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
584 fesettings->min_delay_ms = 500;
585 fesettings->step_size = 0;
586 fesettings->max_drift = 0;
590 static void nxt2002_release(struct dvb_frontend* fe)
592 struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
596 static struct dvb_frontend_ops nxt2002_ops;
598 struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
599 struct i2c_adapter* i2c)
601 struct nxt2002_state* state = NULL;
602 u8 buf [] = {0,0,0,0,0};
604 /* allocate memory for the internal state */
605 state = (struct nxt2002_state*) kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL);
606 if (state == NULL) goto error;
608 /* setup the state */
609 state->config = config;
611 memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
612 state->initialised = 0;
614 /* Check the first 5 registers to ensure this a revision we can handle */
616 i2c_readbytes(state, 0x00, buf, 5);
617 if (buf[0] != 0x04) goto error; /* device id */
618 if (buf[1] != 0x02) goto error; /* fab id */
619 if (buf[2] != 0x11) goto error; /* month */
620 if (buf[3] != 0x20) goto error; /* year msb */
621 if (buf[4] != 0x00) goto error; /* year lsb */
623 /* create dvb_frontend */
624 state->frontend.ops = &state->ops;
625 state->frontend.demodulator_priv = state;
626 return &state->frontend;
629 if (state) kfree(state);
633 static struct dvb_frontend_ops nxt2002_ops = {
636 .name = "Nextwave nxt2002 VSB/QAM frontend",
638 .frequency_min = 54000000,
639 .frequency_max = 803000000,
640 /* stepsize is just a guess */
641 .frequency_stepsize = 166666,
642 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
643 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
647 .release = nxt2002_release,
649 .init = nxt2002_init,
650 .sleep = nxt2002_sleep,
652 .set_frontend = nxt2002_setup_frontend_parameters,
653 .get_tune_settings = nxt2002_get_tune_settings,
655 .read_status = nxt2002_read_status,
656 .read_ber = nxt2002_read_ber,
657 .read_signal_strength = nxt2002_read_signal_strength,
658 .read_snr = nxt2002_read_snr,
659 .read_ucblocks = nxt2002_read_ucblocks,
663 module_param(debug, int, 0644);
664 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
666 MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
667 MODULE_AUTHOR("Taylor Jacob");
668 MODULE_LICENSE("GPL");
670 EXPORT_SYMBOL(nxt2002_attach);