2 Driver for the Microtune 7202D Frontend
6 This driver needs a copy of the Avermedia firmware. The version tested
7 is part of the Avermedia DVB-T 1.3.26.3 Application. If the software is
8 installed in Windows the file will be in the /Program Files/AVerTV DVB-T/
9 directory and is called sc_main.mc. Alternatively it can "extracted" from
10 the install cab files. Copy this file to '/usr/lib/hotplug/firmware/sc_main.mc'.
11 With this version of the file the first 10 bytes are discarded and the
12 next 0x4000 loaded. This may change in future versions.
15 #include <linux/kernel.h>
16 #include <linux/vmalloc.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/string.h>
20 #include <linux/slab.h>
22 #include <linux/unistd.h>
23 #include <linux/fcntl.h>
24 #include <linux/errno.h>
25 #include <linux/i2c.h>
26 #include <linux/syscalls.h>
28 #include "dvb_frontend.h"
29 #include "dvb_functions.h"
31 #ifndef DVB_SP887X_FIRMWARE_FILE
32 #define DVB_SP887X_FIRMWARE_FILE "/usr/lib/hotplug/firmware/sc_main.mc"
35 static char *sp887x_firmware = DVB_SP887X_FIRMWARE_FILE;
38 #define dprintk(x...) printk(x)
44 #define LOG(dir,addr,buf,len) \
47 printk("%s (%02x):", dir, addr & 0xff); \
48 for (i=0; i<len; i++) \
49 printk(" 0x%02x,", buf[i] & 0xff); \
53 #define LOG(dir,addr,buf,len)
58 struct dvb_frontend_info sp887x_info = {
59 .name = "Microtune MT7202DTF",
61 .frequency_min = 50500000,
62 .frequency_max = 858000000,
63 .frequency_stepsize = 166666,
64 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
65 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
66 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
71 int i2c_writebytes (struct dvb_frontend *fe, u8 addr, u8 *buf, u8 len)
73 struct dvb_i2c_bus *i2c = fe->i2c;
74 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
77 LOG("i2c_writebytes", msg.addr, msg.buf, msg.len);
79 if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
80 printk ("%s: i2c write error (addr %02x, err == %i)\n",
81 __FUNCTION__, addr, err);
91 int sp887x_writereg (struct dvb_frontend *fe, u16 reg, u16 data)
93 struct dvb_i2c_bus *i2c = fe->i2c;
94 u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
95 struct i2c_msg msg = { .addr = 0x70, .flags = 0, .buf = b0, .len = 4 };
98 LOG("sp887x_writereg", msg.addr, msg.buf, msg.len);
100 if ((ret = i2c->xfer(i2c, &msg, 1)) != 1) {
102 * in case of soft reset we ignore ACK errors...
104 if (!(reg == 0xf1a && data == 0x000 &&
105 (ret == -EREMOTEIO || ret == -EFAULT)))
107 printk("%s: writereg error "
108 "(reg %03x, data %03x, ret == %i)\n",
109 __FUNCTION__, reg & 0xffff, data & 0xffff, ret);
119 u16 sp887x_readreg (struct dvb_frontend *fe, u16 reg)
121 struct dvb_i2c_bus *i2c = fe->i2c;
122 u8 b0 [] = { reg >> 8 , reg & 0xff };
125 struct i2c_msg msg[] = {{ .addr = 0x70, .flags = 0, .buf = b0, .len = 2 },
126 { .addr = 0x70, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
128 LOG("sp887x_readreg (w)", msg[0].addr, msg[0].buf, msg[0].len);
129 LOG("sp887x_readreg (r)", msg[1].addr, msg[1].buf, msg[1].len);
131 if ((ret = i2c->xfer(i2c, msg, 2)) != 2)
132 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
134 return (((b1[0] << 8) | b1[1]) & 0xfff);
139 void sp887x_microcontroller_stop (struct dvb_frontend *fe)
141 dprintk("%s\n", __FUNCTION__);
142 sp887x_writereg(fe, 0xf08, 0x000);
143 sp887x_writereg(fe, 0xf09, 0x000);
145 /* microcontroller STOP */
146 sp887x_writereg(fe, 0xf00, 0x000);
151 void sp887x_microcontroller_start (struct dvb_frontend *fe)
153 dprintk("%s\n", __FUNCTION__);
154 sp887x_writereg(fe, 0xf08, 0x000);
155 sp887x_writereg(fe, 0xf09, 0x000);
157 /* microcontroller START */
158 sp887x_writereg(fe, 0xf00, 0x001);
163 void sp887x_setup_agc (struct dvb_frontend *fe)
165 /* setup AGC parameters */
166 dprintk("%s\n", __FUNCTION__);
167 sp887x_writereg(fe, 0x33c, 0x054);
168 sp887x_writereg(fe, 0x33b, 0x04c);
169 sp887x_writereg(fe, 0x328, 0x000);
170 sp887x_writereg(fe, 0x327, 0x005);
171 sp887x_writereg(fe, 0x326, 0x001);
172 sp887x_writereg(fe, 0x325, 0x001);
173 sp887x_writereg(fe, 0x324, 0x001);
174 sp887x_writereg(fe, 0x318, 0x050);
175 sp887x_writereg(fe, 0x317, 0x3fe);
176 sp887x_writereg(fe, 0x316, 0x001);
177 sp887x_writereg(fe, 0x313, 0x005);
178 sp887x_writereg(fe, 0x312, 0x002);
179 sp887x_writereg(fe, 0x306, 0x000);
180 sp887x_writereg(fe, 0x303, 0x000);
187 * load firmware and setup MPEG interface...
190 int sp887x_initial_setup (struct dvb_frontend *fe)
192 u8 buf [BLOCKSIZE+2];
193 unsigned char *firmware = NULL;
200 dprintk("%s\n", __FUNCTION__);
203 sp887x_writereg(fe, 0xf1a, 0x000);
205 sp887x_microcontroller_stop (fe);
211 fd = sys_open(sp887x_firmware, 0, 0);
213 printk(KERN_WARNING "%s: Unable to open firmware %s\n", __FUNCTION__,
217 filesize = sys_lseek(fd, 0L, 2);
219 printk(KERN_WARNING "%s: Firmware %s is empty\n", __FUNCTION__,
227 // allocate buffer for it
228 firmware = vmalloc(fw_size);
229 if (firmware == NULL) {
230 printk(KERN_WARNING "%s: Out of memory loading firmware\n",
237 // read the first 16384 bytes from the file
238 // ignore the first 10 bytes
239 sys_lseek(fd, 10, 0);
240 if (sys_read(fd, firmware, fw_size) != fw_size) {
241 printk(KERN_WARNING "%s: Failed to read firmware\n", __FUNCTION__);
249 printk ("%s: firmware upload... ", __FUNCTION__);
251 /* setup write pointer to -1 (end of memory) */
252 /* bit 0x8000 in address is set to enable 13bit mode */
253 sp887x_writereg(fe, 0x8f08, 0x1fff);
255 /* dummy write (wrap around to start of memory) */
256 sp887x_writereg(fe, 0x8f0a, 0x0000);
258 for (i=0; i<fw_size; i+=BLOCKSIZE) {
265 /* bit 0x8000 in address is set to enable 13bit mode */
266 /* bit 0x4000 enables multibyte read/write transfers */
267 /* write register is 0xf0a */
271 memcpy(&buf[2], firmware + i, c);
273 if ((err = i2c_writebytes (fe, 0x70, buf, c+2)) < 0) {
274 printk ("failed.\n");
275 printk ("%s: i2c error (err == %i)\n", __FUNCTION__, err);
283 /* don't write RS bytes between packets */
284 sp887x_writereg(fe, 0xc13, 0x001);
286 /* suppress clock if (!data_valid) */
287 sp887x_writereg(fe, 0xc14, 0x000);
289 /* setup MPEG interface... */
290 sp887x_writereg(fe, 0xc1a, 0x872);
291 sp887x_writereg(fe, 0xc1b, 0x001);
292 sp887x_writereg(fe, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
293 sp887x_writereg(fe, 0xc1a, 0x871);
295 /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
296 sp887x_writereg(fe, 0x301, 0x002);
298 sp887x_setup_agc(fe);
300 /* bit 0x010: enable data valid signal */
301 sp887x_writereg(fe, 0xd00, 0x010);
302 sp887x_writereg(fe, 0x0d1, 0x000);
310 * returns the actual tuned center frequency which can be used
311 * to initialise the AFC registers
314 int tsa5060_setup_pll (struct dvb_frontend *fe, int freq)
316 u8 cfg, cpump, band_select;
320 div = (36000000 + freq + 83333) / 166666;
323 cpump = freq < 175000000 ? 2 : freq < 390000000 ? 1 :
324 freq < 470000000 ? 2 : freq < 750000000 ? 2 : 3;
326 band_select = freq < 175000000 ? 0x0e : freq < 470000000 ? 0x05 : 0x03;
328 buf [0] = (div >> 8) & 0x7f;
329 buf [1] = div & 0xff;
330 buf [2] = ((div >> 10) & 0x60) | cfg;
331 buf [3] = cpump | band_select;
333 /* open i2c gate for PLL message transmission... */
334 sp887x_writereg(fe, 0x206, 0x001);
335 i2c_writebytes(fe, 0x60, buf, 4);
336 sp887x_writereg(fe, 0x206, 0x000);
338 return (div * 166666 - 36000000);
344 int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
346 int known_parameters = 1;
350 switch (p->u.ofdm.constellation) {
354 *reg0xc05 |= (1 << 10);
357 *reg0xc05 |= (2 << 10);
360 known_parameters = 0;
366 switch (p->u.ofdm.hierarchy_information) {
370 *reg0xc05 |= (1 << 7);
373 *reg0xc05 |= (2 << 7);
376 *reg0xc05 |= (3 << 7);
379 known_parameters = 0;
385 switch (p->u.ofdm.code_rate_HP) {
389 *reg0xc05 |= (1 << 3);
392 *reg0xc05 |= (2 << 3);
395 *reg0xc05 |= (3 << 3);
398 *reg0xc05 |= (4 << 3);
401 known_parameters = 0;
407 if (known_parameters)
408 *reg0xc05 |= (2 << 1); /* use specified parameters */
410 *reg0xc05 |= (1 << 1); /* enable autoprobing */
417 * estimates division of two 24bit numbers,
418 * derived from the ves1820/stv0299 driver code
421 void divide (int n, int d, int *quotient_i, int *quotient_f)
433 q = (q << 8) | (r / d);
435 *quotient_f = (q << 8) | (r / d);
441 void sp887x_correct_offsets (struct dvb_frontend *fe,
442 struct dvb_frontend_parameters *p,
445 static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
446 int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
447 int freq_offset = actual_freq - p->frequency;
448 int sysclock = 61003; //[kHz]
449 int ifreq = 36000000;
453 if (p->inversion == INVERSION_ON)
454 freq = ifreq - freq_offset;
456 freq = ifreq + freq_offset;
458 divide(freq / 333, sysclock, NULL, &frequency_shift);
460 if (p->inversion == INVERSION_ON)
461 frequency_shift = -frequency_shift;
463 /* sample rate correction */
464 sp887x_writereg(fe, 0x319, srate_correction[bw_index] >> 12);
465 sp887x_writereg(fe, 0x31a, srate_correction[bw_index] & 0xfff);
467 /* carrier offset correction */
468 sp887x_writereg(fe, 0x309, frequency_shift >> 12);
469 sp887x_writereg(fe, 0x30a, frequency_shift & 0xfff);
474 int sp887x_setup_frontend_parameters (struct dvb_frontend *fe,
475 struct dvb_frontend_parameters *p)
477 int actual_freq, err;
480 if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ &&
481 p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ &&
482 p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ)
485 if ((err = configure_reg0xc05(p, ®0xc05)))
488 sp887x_microcontroller_stop(fe);
490 actual_freq = tsa5060_setup_pll(fe, p->frequency);
492 /* read status reg in order to clear pending irqs */
493 sp887x_readreg(fe, 0x200);
495 sp887x_correct_offsets(fe, p, actual_freq);
497 /* filter for 6/7/8 Mhz channel */
498 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
500 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
505 sp887x_writereg(fe, 0x311, val);
507 /* scan order: 2k first = 0, 8k first = 1 */
508 if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
509 sp887x_writereg(fe, 0x338, 0x000);
511 sp887x_writereg(fe, 0x338, 0x001);
513 sp887x_writereg(fe, 0xc05, reg0xc05);
515 if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
517 else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
522 /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
523 * optimize algorithm for given bandwidth...
525 sp887x_writereg(fe, 0xf14, 0x160 | val);
526 sp887x_writereg(fe, 0xf15, 0x000);
528 sp887x_microcontroller_start(fe);
534 int sp887x_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
538 memcpy (arg, &sp887x_info, sizeof(struct dvb_frontend_info));
543 u16 snr12 = sp887x_readreg(fe, 0xf16);
544 u16 sync0x200 = sp887x_readreg(fe, 0x200);
545 u16 sync0xf17 = sp887x_readreg(fe, 0xf17);
546 fe_status_t *status = arg;
551 *status |= FE_HAS_SIGNAL;
553 //if (sync0x200 & 0x004)
554 // *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
556 //if (sync0x200 & 0x008)
557 // *status |= FE_HAS_VITERBI;
559 if ((sync0xf17 & 0x00f) == 0x002) {
560 *status |= FE_HAS_LOCK;
561 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
564 if (sync0x200 & 0x001) { /* tuner adjustment requested...*/
565 int steps = (sync0x200 >> 4) & 0x00f;
568 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
579 *ber = (sp887x_readreg(fe, 0xc08) & 0x3f) |
580 (sp887x_readreg(fe, 0xc07) << 6);
581 sp887x_writereg(fe, 0xc08, 0x000);
582 sp887x_writereg(fe, 0xc07, 0x000);
589 case FE_READ_SIGNAL_STRENGTH: // FIXME: correct registers ?
591 u16 snr12 = sp887x_readreg(fe, 0xf16);
592 u32 signal = 3 * (snr12 << 4);
593 *((u16*) arg) = (signal < 0xffff) ? signal : 0xffff;
599 u16 snr12 = sp887x_readreg(fe, 0xf16);
600 *(u16*) arg = (snr12 << 4) | (snr12 >> 8);
604 case FE_READ_UNCORRECTED_BLOCKS:
606 u32 *ublocks = (u32 *) arg;
607 *ublocks = sp887x_readreg(fe, 0xc0c);
608 if (*ublocks == 0xfff)
613 case FE_SET_FRONTEND:
614 return sp887x_setup_frontend_parameters(fe, arg);
616 case FE_GET_FRONTEND: // FIXME: read known values back from Hardware...
620 /* tristate TS output and disable interface pins */
621 sp887x_writereg(fe, 0xc18, 0x000);
625 if (fe->data == NULL) { /* first time initialisation... */
626 fe->data = (void*) ~0;
627 sp887x_initial_setup (fe);
629 /* enable TS output and interface pins */
630 sp887x_writereg(fe, 0xc18, 0x00d);
633 case FE_GET_TUNE_SETTINGS:
635 struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
636 fesettings->min_delay_ms = 50;
637 fesettings->step_size = 0;
638 fesettings->max_drift = 0;
652 int sp887x_attach (struct dvb_i2c_bus *i2c, void **data)
654 struct i2c_msg msg = {.addr = 0x70, .flags = 0, .buf = NULL, .len = 0 };
656 dprintk ("%s\n", __FUNCTION__);
658 if (i2c->xfer (i2c, &msg, 1) != 1)
661 return dvb_register_frontend (sp887x_ioctl, i2c, NULL, &sp887x_info);
666 void sp887x_detach (struct dvb_i2c_bus *i2c, void *data)
668 dprintk ("%s\n", __FUNCTION__);
669 dvb_unregister_frontend (sp887x_ioctl, i2c);
674 int __init init_sp887x (void)
676 dprintk ("%s\n", __FUNCTION__);
677 return dvb_register_i2c_device (NULL, sp887x_attach, sp887x_detach);
682 void __exit exit_sp887x (void)
684 dprintk ("%s\n", __FUNCTION__);
685 dvb_unregister_i2c_device (sp887x_attach);
689 module_init(init_sp887x);
690 module_exit(exit_sp887x);
693 MODULE_DESCRIPTION("sp887x DVB-T demodulator driver");
694 MODULE_LICENSE("GPL");