2 Driver for VES1893 and VES1993 QPSK Frontends
4 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
5 Copyright (C) 2001 Ronny Strutz <3des@elitedvb.de>
6 Copyright (C) 2002 Dennis Noermann <dennis.noermann@noernet.de>
7 Copyright (C) 2002-2003 Andreas Oberritter <obi@linuxtv.org>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/string.h>
30 #include <linux/slab.h>
32 #include "dvb_frontend.h"
33 #include "dvb_functions.h"
36 #define dprintk if (debug) printk
38 static int board_type = 0;
39 #define BOARD_SIEMENS_PCI 0
40 #define BOARD_NOKIA_DBOX2 1
41 #define BOARD_SAGEM_DBOX2 2
43 static int demod_type = 0;
44 #define DEMOD_VES1893 0
45 #define DEMOD_VES1993 1
47 static struct dvb_frontend_info ves1x93_info = {
50 .frequency_min = 950000,
51 .frequency_max = 2150000,
52 .frequency_stepsize = 250, /* kHz for QPSK frontends */
53 .frequency_tolerance = 29500,
54 .symbol_rate_min = 1000000,
55 .symbol_rate_max = 45000000,
56 /* .symbol_rate_tolerance = ???,*/
57 .notifier_delay = 50, /* 1/20 s */
58 .caps = FE_CAN_INVERSION_AUTO |
59 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
60 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
66 * nokia dbox2 (ves1893) and sagem dbox2 (ves1993)
67 * need bit AGCR[PWMS] set to 1
70 static u8 init_1893_tab [] = {
71 0x01, 0xa4, 0x35, 0x80, 0x2a, 0x0b, 0x55, 0xc4,
72 0x09, 0x69, 0x00, 0x86, 0x4c, 0x28, 0x7f, 0x00,
73 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x80, 0x00, 0x21, 0xb0, 0x14, 0x00, 0xdc, 0x00,
75 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
77 0x00, 0x55, 0x00, 0x00, 0x7f, 0x00
81 static u8 init_1993_tab [] = {
82 0x00, 0x9c, 0x35, 0x80, 0x6a, 0x09, 0x72, 0x8c,
83 0x09, 0x6b, 0x00, 0x00, 0x4c, 0x08, 0x00, 0x00,
84 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x80, 0x40, 0x21, 0xb0, 0x00, 0x00, 0x00, 0x10,
86 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
87 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x55, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03,
89 0x00, 0x00, 0x0e, 0x80, 0x00
93 static u8 * init_1x93_tab;
96 static u8 init_1893_wtab[] =
98 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0,
99 0,1,0,0,0,0,0,0, 1,0,1,1,0,0,0,1,
100 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0,
105 static u8 init_1993_wtab[] =
107 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0,
108 0,1,0,0,0,0,0,0, 1,1,1,1,0,0,0,1,
109 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0,
110 1,1,1,0,1,1,1,1, 1,1,1,1,1
113 struct ves1x93_state {
114 fe_spectral_inversion_t inversion;
119 static int ves1x93_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
121 u8 buf [] = { 0x00, reg, data };
122 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 3 };
125 if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
126 dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data);
134 static u8 ves1x93_readreg (struct dvb_i2c_bus *i2c, u8 reg)
137 u8 b0 [] = { 0x00, reg };
139 struct i2c_msg msg [] = { { .addr = 0x08, .flags = 0, .buf = b0, .len = 2 },
140 { .addr = 0x08, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
142 ret = i2c->xfer (i2c, msg, 2);
145 dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
151 static int tuner_write (struct dvb_i2c_bus *i2c, u8 *data, u8 len)
154 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = len };
156 ves1x93_writereg(i2c, 0x00, 0x11);
157 ret = i2c->xfer (i2c, &msg, 1);
158 ves1x93_writereg(i2c, 0x00, 0x01);
161 printk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
163 return (ret != 1) ? -1 : 0;
169 * set up the downconverter frequency divisor for a
170 * reference clock comparision frequency of 125 kHz.
172 static int sp5659_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, u8 pwr)
174 u32 div = (freq + 479500) / 125;
175 u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, 0x95, (pwr << 5) | 0x30 };
177 return tuner_write (i2c, buf, sizeof(buf));
181 static int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
188 buf[0] = (freq >> 8) & 0x7F;
189 buf[1] = freq & 0xFF;
191 ret = tuner_write(i2c, buf, sizeof(buf));
197 static int tuner_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, u8 pwr)
199 if ((demod_type == DEMOD_VES1893) && (board_type == BOARD_SIEMENS_PCI))
200 return sp5659_set_tv_freq (i2c, freq, pwr);
201 else if (demod_type == DEMOD_VES1993)
202 return tsa5059_set_tv_freq (i2c, freq);
208 static int ves1x93_init (struct dvb_i2c_bus *i2c)
214 dprintk("%s: init chip\n", __FUNCTION__);
216 switch (demod_type) {
218 init_1x93_tab = init_1893_tab;
219 init_1x93_wtab = init_1893_wtab;
220 size = sizeof(init_1893_tab);
221 if (board_type == BOARD_NOKIA_DBOX2)
222 init_1x93_tab[0x05] |= 0x20; /* invert PWM */
226 init_1x93_tab = init_1993_tab;
227 init_1x93_wtab = init_1993_wtab;
228 size = sizeof(init_1993_tab);
229 if (board_type == BOARD_SAGEM_DBOX2)
230 init_1x93_tab[0x05] |= 0x20; /* invert PWM */
237 for (i = 0; i < size; i++)
238 if (init_1x93_wtab[i])
239 ves1x93_writereg (i2c, i, init_1x93_tab[i]);
241 if (demod_type == DEMOD_VES1993) {
242 if (board_type == BOARD_NOKIA_DBOX2)
243 tuner_write(i2c, "\x06\x5c\x83\x60", 4);
244 else if (board_type == BOARD_SAGEM_DBOX2)
245 tuner_write(i2c, "\x25\x70\x92\x40", 4);
252 static int ves1x93_clr_bit (struct dvb_i2c_bus *i2c)
254 ves1x93_writereg (i2c, 0, init_1x93_tab[0] & 0xfe);
255 ves1x93_writereg (i2c, 0, init_1x93_tab[0]);
260 static int ves1x93_init_aquire (struct dvb_i2c_bus *i2c)
262 ves1x93_writereg (i2c, 3, 0x00);
263 ves1x93_writereg (i2c, 3, init_1x93_tab[3]);
269 static int ves1x93_set_inversion (struct dvb_i2c_bus *i2c, fe_spectral_inversion_t inversion)
274 * inversion on/off are interchanged because i and q seem to
275 * be swapped on the hardware
292 return ves1x93_writereg (i2c, 0x0c, (init_1x93_tab[0x0c] & 0x3f) | val);
296 static int ves1x93_set_fec (struct dvb_i2c_bus *i2c, fe_code_rate_t fec)
299 return ves1x93_writereg (i2c, 0x0d, 0x08);
300 else if (fec < FEC_1_2 || fec > FEC_8_9)
303 return ves1x93_writereg (i2c, 0x0d, fec - FEC_1_2);
307 static fe_code_rate_t ves1x93_get_fec (struct dvb_i2c_bus *i2c)
309 return FEC_1_2 + ((ves1x93_readreg (i2c, 0x0d) >> 4) & 0x7);
313 static int ves1x93_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
317 u8 ADCONF, FCONF, FNR;
322 dprintk("%s: srate == %d\n", __FUNCTION__, (unsigned int) srate);
324 switch (board_type) {
325 case BOARD_SIEMENS_PCI:
328 case BOARD_NOKIA_DBOX2:
329 if (demod_type == DEMOD_VES1893)
331 else if (demod_type == DEMOD_VES1993)
336 case BOARD_SAGEM_DBOX2:
349 #define MUL (1UL<<26)
351 FIN = (XIN + 6000) >> 4;
356 tmp = (tmp % FIN) << 8;
357 ratio = (ratio << 8) + tmp / FIN;
359 tmp = (tmp % FIN) << 8;
360 ratio = (ratio << 8) + tmp / FIN;
364 if (ratio < MUL/3) FNR = 0;
365 if (ratio < (MUL*11)/50) FNR = 1;
366 if (ratio < MUL/6) FNR = 2;
367 if (ratio < MUL/9) FNR = 3;
368 if (ratio < MUL/12) FNR = 4;
369 if (ratio < (MUL*11)/200) FNR = 5;
370 if (ratio < MUL/24) FNR = 6;
371 if (ratio < (MUL*27)/1000) FNR = 7;
372 if (ratio < MUL/48) FNR = 8;
373 if (ratio < (MUL*137)/10000) FNR = 9;
381 FCONF = 0x88 | (FNR >> 1) | ((FNR & 0x01) << 5);
382 /*FCONF = 0x80 | ((FNR & 0x01) << 5) | (((FNR > 1) & 0x03) << 3) | ((FNR >> 1) & 0x07);*/
385 BDR = (( (ratio << (FNR >> 1)) >> 4) + 1) >> 1;
386 BDRI = ( ((FIN << 8) / ((srate << (FNR >> 1)) >> 2)) + 1) >> 1;
388 dprintk("FNR= %d\n", FNR);
389 dprintk("ratio= %08x\n", (unsigned int) ratio);
390 dprintk("BDR= %08x\n", (unsigned int) BDR);
391 dprintk("BDRI= %02x\n", (unsigned int) BDRI);
396 ves1x93_writereg (i2c, 0x06, 0xff & BDR);
397 ves1x93_writereg (i2c, 0x07, 0xff & (BDR >> 8));
398 ves1x93_writereg (i2c, 0x08, 0x0f & (BDR >> 16));
400 ves1x93_writereg (i2c, 0x09, BDRI);
401 ves1x93_writereg (i2c, 0x20, ADCONF);
402 ves1x93_writereg (i2c, 0x21, FCONF);
405 ves1x93_writereg (i2c, 0x05, init_1x93_tab[0x05] | 0x80);
407 ves1x93_writereg (i2c, 0x05, init_1x93_tab[0x05] & 0x7f);
409 /* ves1993 hates this, will lose lock */
410 if (demod_type != DEMOD_VES1993)
411 ves1x93_clr_bit (i2c);
417 static int ves1x93_afc (struct dvb_i2c_bus *i2c, u32 freq, u32 srate)
421 afc = ((int)((ves1x93_readreg (i2c, 0x0a) << 1) & 0xff))/2;
422 afc = (afc * (int)(srate/1000/8))/16;
428 tuner_set_tv_freq (i2c, freq, 0);
430 ves1x93_init_aquire (i2c);
436 static int ves1x93_set_voltage (struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
440 return ves1x93_writereg (i2c, 0x1f, 0x20);
442 return ves1x93_writereg (i2c, 0x1f, 0x30);
443 case SEC_VOLTAGE_OFF:
444 return ves1x93_writereg (i2c, 0x1f, 0x00);
451 static int ves1x93_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
453 struct dvb_i2c_bus *i2c = fe->i2c;
454 struct ves1x93_state *state = (struct ves1x93_state*) fe->data;
458 memcpy (arg, &ves1x93_info, sizeof(struct dvb_frontend_info));
463 fe_status_t *status = arg;
464 u8 sync = ves1x93_readreg (i2c, 0x0e);
469 *status |= FE_HAS_SIGNAL;
472 *status |= FE_HAS_CARRIER;
475 *status |= FE_HAS_VITERBI;
478 *status |= FE_HAS_SYNC;
480 if ((sync & 0x1f) == 0x1f)
481 *status |= FE_HAS_LOCK;
488 u32 *ber = (u32 *) arg;
490 *ber = ves1x93_readreg (i2c, 0x15);
491 *ber |= (ves1x93_readreg (i2c, 0x16) << 8);
492 *ber |= ((ves1x93_readreg (i2c, 0x17) & 0x0F) << 16);
497 case FE_READ_SIGNAL_STRENGTH:
499 u8 signal = ~ves1x93_readreg (i2c, 0x0b);
500 *((u16*) arg) = (signal << 8) | signal;
506 u8 snr = ~ves1x93_readreg (i2c, 0x1c);
507 *(u16*) arg = (snr << 8) | snr;
511 case FE_READ_UNCORRECTED_BLOCKS:
513 *(u32*) arg = ves1x93_readreg (i2c, 0x18) & 0x7f;
515 if (*(u32*) arg == 0x7f)
516 *(u32*) arg = 0xffffffff; /* counter overflow... */
518 ves1x93_writereg (i2c, 0x18, 0x00); /* reset the counter */
519 ves1x93_writereg (i2c, 0x18, 0x80); /* dto. */
523 case FE_SET_FRONTEND:
525 struct dvb_frontend_parameters *p = arg;
527 tuner_set_tv_freq (i2c, p->frequency, 0);
528 ves1x93_set_inversion (i2c, p->inversion);
529 ves1x93_set_fec (i2c, p->u.qpsk.fec_inner);
530 ves1x93_set_symbolrate (i2c, p->u.qpsk.symbol_rate);
531 ves1x93_afc (i2c, p->frequency, p->u.qpsk.symbol_rate);
532 state->inversion = p->inversion;
536 case FE_GET_FRONTEND:
538 struct dvb_frontend_parameters *p = arg;
541 afc = ((int)((char)(ves1x93_readreg (i2c, 0x0a) << 1)))/2;
542 afc = (afc * (int)(p->u.qpsk.symbol_rate/1000/8))/16;
547 * inversion indicator is only valid
548 * if auto inversion was used
550 if (state->inversion == INVERSION_AUTO)
551 p->inversion = (ves1x93_readreg (i2c, 0x0f) & 2) ?
552 INVERSION_OFF : INVERSION_ON;
553 p->u.qpsk.fec_inner = ves1x93_get_fec (i2c);
554 /* XXX FIXME: timing offset !! */
559 if (board_type == BOARD_SIEMENS_PCI)
560 ves1x93_writereg (i2c, 0x1f, 0x00); /* LNB power off */
561 return ves1x93_writereg (i2c, 0x00, 0x08);
564 return ves1x93_init (i2c);
567 return -EOPNOTSUPP; /* the ves1893 can generate the 22k */
568 /* let's implement this when we have */
569 /* a box that uses the 22K_0 pin... */
572 return ves1x93_set_voltage (i2c, (fe_sec_voltage_t) arg);
582 static int ves1x93_attach (struct dvb_i2c_bus *i2c, void **data)
584 u8 identity = ves1x93_readreg(i2c, 0x1e);
585 struct ves1x93_state* state;
588 case 0xdc: /* VES1893A rev1 */
589 printk("ves1x93: Detected ves1893a rev1\n");
590 demod_type = DEMOD_VES1893;
591 ves1x93_info.name[4] = '8';
593 case 0xdd: /* VES1893A rev2 */
594 printk("ves1x93: Detected ves1893a rev2\n");
595 demod_type = DEMOD_VES1893;
596 ves1x93_info.name[4] = '8';
598 case 0xde: /* VES1993 */
599 printk("ves1x93: Detected ves1993\n");
600 demod_type = DEMOD_VES1993;
601 ves1x93_info.name[4] = '9';
604 dprintk("VES1x93 not found (identity %02x)\n", identity);
608 if ((state = kmalloc(sizeof(struct ves1x93_state), GFP_KERNEL)) == NULL) {
611 state->inversion = INVERSION_OFF;
614 return dvb_register_frontend (ves1x93_ioctl, i2c, (void*) state, &ves1x93_info);
618 static void ves1x93_detach (struct dvb_i2c_bus *i2c, void *data)
621 dvb_unregister_frontend (ves1x93_ioctl, i2c);
625 static int __init init_ves1x93 (void)
627 switch (board_type) {
628 case BOARD_NOKIA_DBOX2:
629 dprintk("%s: NOKIA_DBOX2\n", __FILE__);
631 case BOARD_SAGEM_DBOX2:
632 dprintk("%s: SAGEM_DBOX2\n", __FILE__);
634 case BOARD_SIEMENS_PCI:
635 dprintk("%s: SIEMENS_PCI\n", __FILE__);
641 return dvb_register_i2c_device (THIS_MODULE, ves1x93_attach, ves1x93_detach);
645 static void __exit exit_ves1x93 (void)
647 dvb_unregister_i2c_device (ves1x93_attach);
651 module_init(init_ves1x93);
652 module_exit(exit_ves1x93);
655 MODULE_DESCRIPTION("VES1x93 DVB-S Frontend");
656 MODULE_AUTHOR("Ralph Metzler");
657 MODULE_LICENSE("GPL");
658 MODULE_PARM(debug,"i");
659 MODULE_PARM(board_type,"i");