drivers/mtd/chips/cfi_cmdset_0002.c

   1 /*
   2  * Common Flash Interface support:
   3  *   AMD & Fujitsu Standard Vendor Command Set (ID 0x0002)
   4  *
   5  * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
   6  * Copyright (C) 2004 Arcom Control Systems Ltd <linux@arcom.com>
   7  *
   8  * 2_by_8 routines added by Simon Munton
   9  *
  10  * 4_by_16 work by Carolyn J. Smith
  11  *
  12  * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
  13  *
  14  * This code is GPL
  15  *
  16  * $Id: cfi_cmdset_0002.c,v 1.111 2004/11/16 18:29:00 dwmw2 Exp $
  17  *
  18  */
  19
  20 #include <linux/config.h>
  21 #include <linux/module.h>
  22 #include <linux/types.h>
  23 #include <linux/kernel.h>
  24 #include <linux/sched.h>
  25 #include <linux/init.h>
  26 #include <asm/io.h>
  27 #include <asm/byteorder.h>
  28
  29 #include <linux/errno.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/mtd/compatmac.h>
  34 #include <linux/mtd/map.h>
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/cfi.h>
  37
  38 #define AMD_BOOTLOC_BUG
  39 #define FORCE_WORD_WRITE 0
  40
  41 #define MAX_WORD_RETRIES 3
  42
  43 #define MANUFACTURER_AMD        0x0001
  44 #define MANUFACTURER_SST        0x00BF
  45 #define SST49LF004B             0x0060
  46
  47 static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
  48 static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
  49 static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
  50 static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
  51 static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
  52 static void cfi_amdstd_sync (struct mtd_info *);
  53 static int cfi_amdstd_suspend (struct mtd_info *);
  54 static void cfi_amdstd_resume (struct mtd_info *);
  55 static int cfi_amdstd_secsi_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
  56
  57 static void cfi_amdstd_destroy(struct mtd_info *);
  58
  59 struct mtd_info *cfi_cmdset_0002(struct map_info *, int);
  60 static struct mtd_info *cfi_amdstd_setup (struct mtd_info *);
  61
  62 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
  63 static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr);
  64 #include "fwh_lock.h"
  65
  66 static struct mtd_chip_driver cfi_amdstd_chipdrv = {
  67         .probe          = NULL, /* Not usable directly */
  68         .destroy        = cfi_amdstd_destroy,
  69         .name           = "cfi_cmdset_0002",
  70         .module         = THIS_MODULE
  71 };
  72
  73
  74 /* #define DEBUG_CFI_FEATURES */
  75
  76
  77 #ifdef DEBUG_CFI_FEATURES
  78 static void cfi_tell_features(struct cfi_pri_amdstd *extp)
  79 {
  80         const char* erase_suspend[3] = {
  81                 "Not supported", "Read only", "Read/write"
  82         };
  83         const char* top_bottom[6] = {
  84                 "No WP", "8x8KiB sectors at top & bottom, no WP",
  85                 "Bottom boot", "Top boot",
  86                 "Uniform, Bottom WP", "Uniform, Top WP"
  87         };
  88
  89         printk("  Silicon revision: %d\n", extp->SiliconRevision >> 1);
  90         printk("  Address sensitive unlock: %s\n",
  91                (extp->SiliconRevision & 1) ? "Not required" : "Required");
  92
  93         if (extp->EraseSuspend < ARRAY_SIZE(erase_suspend))
  94                 printk("  Erase Suspend: %s\n", erase_suspend[extp->EraseSuspend]);
  95         else
  96                 printk("  Erase Suspend: Unknown value %d\n", extp->EraseSuspend);
  97
  98         if (extp->BlkProt == 0)
  99                 printk("  Block protection: Not supported\n");
 100         else
 101                 printk("  Block protection: %d sectors per group\n", extp->BlkProt);
 102
 103
 104         printk("  Temporary block unprotect: %s\n",
 105                extp->TmpBlkUnprotect ? "Supported" : "Not supported");
 106         printk("  Block protect/unprotect scheme: %d\n", extp->BlkProtUnprot);
 107         printk("  Number of simultaneous operations: %d\n", extp->SimultaneousOps);
 108         printk("  Burst mode: %s\n",
 109                extp->BurstMode ? "Supported" : "Not supported");
 110         if (extp->PageMode == 0)
 111                 printk("  Page mode: Not supported\n");
 112         else
 113                 printk("  Page mode: %d word page\n", extp->PageMode << 2);
 114
 115         printk("  Vpp Supply Minimum Program/Erase Voltage: %d.%d V\n",
 116                extp->VppMin >> 4, extp->VppMin & 0xf);
 117         printk("  Vpp Supply Maximum Program/Erase Voltage: %d.%d V\n",
 118                extp->VppMax >> 4, extp->VppMax & 0xf);
 119
 120         if (extp->TopBottom < ARRAY_SIZE(top_bottom))
 121                 printk("  Top/Bottom Boot Block: %s\n", top_bottom[extp->TopBottom]);
 122         else
 123                 printk("  Top/Bottom Boot Block: Unknown value %d\n", extp->TopBottom);
 124 }
 125 #endif
 126
 127 #ifdef AMD_BOOTLOC_BUG
 128 /* Wheee. Bring me the head of someone at AMD. */
 129 static void fixup_amd_bootblock(struct mtd_info *mtd, void* param)
 130 {
 131         struct map_info *map = mtd->priv;
 132         struct cfi_private *cfi = map->fldrv_priv;
 133         struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
 134         __u8 major = extp->MajorVersion;
 135         __u8 minor = extp->MinorVersion;
 136
 137         if (((major << 8) | minor) < 0x3131) {
 138                 /* CFI version 1.0 => don't trust bootloc */
 139                 if (cfi->id & 0x80) {
 140                         printk(KERN_WARNING "%s: JEDEC Device ID is 0x%02X. Assuming broken CFI table.\n", map->name, cfi->id);
 141                         extp->TopBottom = 3;    /* top boot */
 142                 } else {
 143                         extp->TopBottom = 2;    /* bottom boot */
 144                 }
 145         }
 146 }
 147 #endif
 148
 149 static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
 150 {
 151         struct map_info *map = mtd->priv;
 152         struct cfi_private *cfi = map->fldrv_priv;
 153         if (cfi->cfiq->BufWriteTimeoutTyp) {
 154                 DEBUG(MTD_DEBUG_LEVEL1, "Using buffer write method\n" );
 155                 mtd->write = cfi_amdstd_write_buffers;
 156         }
 157 }
 158
 159 static void fixup_use_secsi(struct mtd_info *mtd, void *param)
 160 {
 161         /* Setup for chips with a secsi area */
 162         mtd->read_user_prot_reg = cfi_amdstd_secsi_read;
 163         mtd->read_fact_prot_reg = cfi_amdstd_secsi_read;
 164 }
 165
 166 static void fixup_use_erase_chip(struct mtd_info *mtd, void *param)
 167 {
 168         struct map_info *map = mtd->priv;
 169         struct cfi_private *cfi = map->fldrv_priv;
 170         if ((cfi->cfiq->NumEraseRegions == 1) &&
 171                 ((cfi->cfiq->EraseRegionInfo[0] & 0xffff) == 0)) {
 172                 mtd->erase = cfi_amdstd_erase_chip;
 173         }
 174
 175 }
 176
 177 static struct cfi_fixup cfi_fixup_table[] = {
 178 #ifdef AMD_BOOTLOC_BUG
 179         { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
 180 #endif
 181         { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, },
 182         { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, },
 183         { CFI_MFR_AMD, 0x0055, fixup_use_secsi, NULL, },
 184         { CFI_MFR_AMD, 0x0056, fixup_use_secsi, NULL, },
 185         { CFI_MFR_AMD, 0x005C, fixup_use_secsi, NULL, },
 186         { CFI_MFR_AMD, 0x005F, fixup_use_secsi, NULL, },
 187 #if !FORCE_WORD_WRITE
 188         { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
 189 #endif
 190         { 0, 0, NULL, NULL }
 191 };
 192 static struct cfi_fixup jedec_fixup_table[] = {
 193         { MANUFACTURER_SST, SST49LF004B, fixup_use_fwh_lock, NULL, },
 194         { 0, 0, NULL, NULL }
 195 };
 196
 197 static struct cfi_fixup fixup_table[] = {
 198         /* The CFI vendor ids and the JEDEC vendor IDs appear
 199          * to be common.  It is like the devices id's are as
 200          * well.  This table is to pick all cases where
 201          * we know that is the case.
 202          */
 203         { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
 204         { 0, 0, NULL, NULL }
 205 };
 206
 207
 208 struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
 209 {
 210         struct cfi_private *cfi = map->fldrv_priv;
 211         struct mtd_info *mtd;
 212         int i;
 213
 214         mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
 215         if (!mtd) {
 216                 printk(KERN_WARNING "Failed to allocate memory for MTD device\n");
 217                 return NULL;
 218         }
 219         memset(mtd, 0, sizeof(*mtd));
 220         mtd->priv = map;
 221         mtd->type = MTD_NORFLASH;
 222
 223         /* Fill in the default mtd operations */
 224         mtd->erase   = cfi_amdstd_erase_varsize;
 225         mtd->write   = cfi_amdstd_write_words;
 226         mtd->read    = cfi_amdstd_read;
 227         mtd->sync    = cfi_amdstd_sync;
 228         mtd->suspend = cfi_amdstd_suspend;
 229         mtd->resume  = cfi_amdstd_resume;
 230         mtd->flags   = MTD_CAP_NORFLASH;
 231         mtd->name    = map->name;
 232
 233         if (cfi->cfi_mode==CFI_MODE_CFI){
 234                 unsigned char bootloc;
 235                 /*
 236                  * It's a real CFI chip, not one for which the probe
 237                  * routine faked a CFI structure. So we read the feature
 238                  * table from it.
 239                  */
 240                 __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
 241                 struct cfi_pri_amdstd *extp;
 242
 243                 extp = (struct cfi_pri_amdstd*)cfi_read_pri(map, adr, sizeof(*extp), "Amd/Fujitsu");
 244                 if (!extp) {
 245                         kfree(mtd);
 246                         return NULL;
 247                 }
 248
 249                 /* Install our own private info structure */
 250                 cfi->cmdset_priv = extp;
 251
 252                 /* Apply cfi device specific fixups */
 253                 cfi_fixup(mtd, cfi_fixup_table);
 254
 255 #ifdef DEBUG_CFI_FEATURES
 256                 /* Tell the user about it in lots of lovely detail */
 257                 cfi_tell_features(extp);
 258 #endif
 259
 260                 bootloc = extp->TopBottom;
 261                 if ((bootloc != 2) && (bootloc != 3)) {
 262                         printk(KERN_WARNING "%s: CFI does not contain boot "
 263                                "bank location. Assuming top.\n", map->name);
 264                         bootloc = 2;
 265                 }
 266
 267                 if (bootloc == 3 && cfi->cfiq->NumEraseRegions > 1) {
 268                         printk(KERN_WARNING "%s: Swapping erase regions for broken CFI table.\n", map->name);
 269
 270                         for (i=0; i<cfi->cfiq->NumEraseRegions / 2; i++) {
 271                                 int j = (cfi->cfiq->NumEraseRegions-1)-i;
 272                                 __u32 swap;
 273
 274                                 swap = cfi->cfiq->EraseRegionInfo[i];
 275                                 cfi->cfiq->EraseRegionInfo[i] = cfi->cfiq->EraseRegionInfo[j];
 276                                 cfi->cfiq->EraseRegionInfo[j] = swap;
 277                         }
 278                 }
 279                 /* Set the default CFI lock/unlock addresses */
 280                 cfi->addr_unlock1 = 0x555;
 281                 cfi->addr_unlock2 = 0x2aa;
 282                 /* Modify the unlock address if we are in compatibility mode */
 283                 if (    /* x16 in x8 mode */
 284                         ((cfi->device_type == CFI_DEVICETYPE_X8) &&
 285                                 (cfi->cfiq->InterfaceDesc == 2)) ||
 286                         /* x32 in x16 mode */
 287                         ((cfi->device_type == CFI_DEVICETYPE_X16) &&
 288                                 (cfi->cfiq->InterfaceDesc == 4)))
 289                 {
 290                         cfi->addr_unlock1 = 0xaaa;
 291                         cfi->addr_unlock2 = 0x555;
 292                 }
 293
 294         } /* CFI mode */
 295         else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
 296                 /* Apply jedec specific fixups */
 297                 cfi_fixup(mtd, jedec_fixup_table);
 298         }
 299         /* Apply generic fixups */
 300         cfi_fixup(mtd, fixup_table);
 301
 302         for (i=0; i< cfi->numchips; i++) {
 303                 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
 304                 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
 305                 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
 306         }
 307
 308         map->fldrv = &cfi_amdstd_chipdrv;
 309
 310         return cfi_amdstd_setup(mtd);
 311 }
 312
 313
 314 static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
 315 {
 316         struct map_info *map = mtd->priv;
 317         struct cfi_private *cfi = map->fldrv_priv;
 318         unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
 319         unsigned long offset = 0;
 320         int i,j;
 321
 322         printk(KERN_NOTICE "number of %s chips: %d\n",
 323                (cfi->cfi_mode == CFI_MODE_CFI)?"CFI":"JEDEC",cfi->numchips);
 324         /* Select the correct geometry setup */
 325         mtd->size = devsize * cfi->numchips;
 326
 327         mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
 328         mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info)
 329                                     * mtd->numeraseregions, GFP_KERNEL);
 330         if (!mtd->eraseregions) {
 331                 printk(KERN_WARNING "Failed to allocate memory for MTD erase region info\n");
 332                 goto setup_err;
 333         }
 334
 335         for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
 336                 unsigned long ernum, ersize;
 337                 ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
 338                 ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
 339
 340                 if (mtd->erasesize < ersize) {
 341                         mtd->erasesize = ersize;
 342                 }
 343                 for (j=0; j<cfi->numchips; j++) {
 344                         mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
 345                         mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
 346                         mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
 347                 }
 348                 offset += (ersize * ernum);
 349         }
 350         if (offset != devsize) {
 351                 /* Argh */
 352                 printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
 353                 goto setup_err;
 354         }
 355 #if 0
 356         // debug
 357         for (i=0; i<mtd->numeraseregions;i++){
 358                 printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",
 359                        i,mtd->eraseregions[i].offset,
 360                        mtd->eraseregions[i].erasesize,
 361                        mtd->eraseregions[i].numblocks);
 362         }
 363 #endif
 364
 365         /* FIXME: erase-suspend-program is broken.  See
 366            http://lists.infradead.org/pipermail/linux-mtd/2003-December/009001.html */
 367         printk(KERN_NOTICE "cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.\n");
 368
 369         __module_get(THIS_MODULE);
 370         return mtd;
 371
 372  setup_err:
 373         if(mtd) {
 374                 if(mtd->eraseregions)
 375                         kfree(mtd->eraseregions);
 376                 kfree(mtd);
 377         }
 378         kfree(cfi->cmdset_priv);
 379         kfree(cfi->cfiq);
 380         return NULL;
 381 }
 382
 383 /*
 384  * Return true if the chip is ready.
 385  *
 386  * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
 387  * non-suspended sector) and is indicated by no toggle bits toggling.
 388  *
 389  * Note that anything more complicated than checking if no bits are toggling
 390  * (including checking DQ5 for an error status) is tricky to get working
 391  * correctly and is therefore not done  (particulary with interleaved chips
 392  * as each chip must be checked independantly of the others).
 393  */
 394 static int chip_ready(struct map_info *map, unsigned long addr)
 395 {
 396         map_word d, t;
 397
 398         d = map_read(map, addr);
 399         t = map_read(map, addr);
 400
 401         return map_word_equal(map, d, t);
 402 }
 403
 404 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
 405 {
 406         DECLARE_WAITQUEUE(wait, current);
 407         struct cfi_private *cfi = map->fldrv_priv;
 408         unsigned long timeo;
 409         struct cfi_pri_amdstd *cfip = (struct cfi_pri_amdstd *)cfi->cmdset_priv;
 410
 411  resettime:
 412         timeo = jiffies + HZ;
 413  retry:
 414         switch (chip->state) {
 415
 416         case FL_STATUS:
 417                 for (;;) {
 418                         if (chip_ready(map, adr))
 419                                 break;
 420
 421                         if (time_after(jiffies, timeo)) {
 422                                 printk(KERN_ERR "Waiting for chip to be ready timed out.\n");
 423                                 cfi_spin_unlock(chip->mutex);
 424                                 return -EIO;
 425                         }
 426                         cfi_spin_unlock(chip->mutex);
 427                         cfi_udelay(1);
 428                         cfi_spin_lock(chip->mutex);
 429                         /* Someone else might have been playing with it. */
 430                         goto retry;
 431                 }
 432
 433         case FL_READY:
 434         case FL_CFI_QUERY:
 435         case FL_JEDEC_QUERY:
 436                 return 0;
 437
 438         case FL_ERASING:
 439                 if (mode == FL_WRITING) /* FIXME: Erase-suspend-program appears broken. */
 440                         goto sleep;
 441
 442                 if (!(mode == FL_READY || mode == FL_POINT
 443                       || !cfip
 444                       || (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))
 445                       || (mode == FL_WRITING && (cfip->EraseSuspend & 0x1))))
 446                         goto sleep;
 447
 448                 /* We could check to see if we're trying to access the sector
 449                  * that is currently being erased. However, no user will try
 450                  * anything like that so we just wait for the timeout. */
 451
 452                 /* Erase suspend */
 453                 /* It's harmless to issue the Erase-Suspend and Erase-Resume
 454                  * commands when the erase algorithm isn't in progress. */
 455                 map_write(map, CMD(0xB0), chip->in_progress_block_addr);
 456                 chip->oldstate = FL_ERASING;
 457                 chip->state = FL_ERASE_SUSPENDING;
 458                 chip->erase_suspended = 1;
 459                 for (;;) {
 460                         if (chip_ready(map, adr))
 461                                 break;
 462
 463                         if (time_after(jiffies, timeo)) {
 464                                 /* Should have suspended the erase by now.
 465                                  * Send an Erase-Resume command as either
 466                                  * there was an error (so leave the erase
 467                                  * routine to recover from it) or we trying to
 468                                  * use the erase-in-progress sector. */
 469                                 map_write(map, CMD(0x30), chip->in_progress_block_addr);
 470                                 chip->state = FL_ERASING;
 471                                 chip->oldstate = FL_READY;
 472                                 printk(KERN_ERR "MTD %s(): chip not ready after erase suspend\n", __func__);
 473                                 return -EIO;
 474                         }
 475
 476                         cfi_spin_unlock(chip->mutex);
 477                         cfi_udelay(1);
 478                         cfi_spin_lock(chip->mutex);
 479                         /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
 480                            So we can just loop here. */
 481                 }
 482                 chip->state = FL_READY;
 483                 return 0;
 484
 485         case FL_POINT:
 486                 /* Only if there's no operation suspended... */
 487                 if (mode == FL_READY && chip->oldstate == FL_READY)
 488                         return 0;
 489
 490         default:
 491         sleep:
 492                 set_current_state(TASK_UNINTERRUPTIBLE);
 493                 add_wait_queue(&chip->wq, &wait);
 494                 cfi_spin_unlock(chip->mutex);
 495                 schedule();
 496                 remove_wait_queue(&chip->wq, &wait);
 497                 cfi_spin_lock(chip->mutex);
 498                 goto resettime;
 499         }
 500 }
 501
 502
 503 static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr)
 504 {
 505         struct cfi_private *cfi = map->fldrv_priv;
 506
 507         switch(chip->oldstate) {
 508         case FL_ERASING:
 509                 chip->state = chip->oldstate;
 510                 map_write(map, CMD(0x30), chip->in_progress_block_addr);
 511                 chip->oldstate = FL_READY;
 512                 chip->state = FL_ERASING;
 513                 break;
 514
 515         case FL_READY:
 516         case FL_STATUS:
 517                 /* We should really make set_vpp() count, rather than doing this */
 518                 DISABLE_VPP(map);
 519                 break;
 520         default:
 521                 printk(KERN_ERR "MTD: put_chip() called with oldstate %d!!\n", chip->oldstate);
 522         }
 523         wake_up(&chip->wq);
 524 }
 525
 526
 527 static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
 528 {
 529         unsigned long cmd_addr;
 530         struct cfi_private *cfi = map->fldrv_priv;
 531         int ret;
 532
 533         adr += chip->start;
 534
 535         /* Ensure cmd read/writes are aligned. */
 536         cmd_addr = adr & ~(map_bankwidth(map)-1);
 537
 538         cfi_spin_lock(chip->mutex);
 539         ret = get_chip(map, chip, cmd_addr, FL_READY);
 540         if (ret) {
 541                 cfi_spin_unlock(chip->mutex);
 542                 return ret;
 543         }
 544
 545         if (chip->state != FL_POINT && chip->state != FL_READY) {
 546                 map_write(map, CMD(0xf0), cmd_addr);
 547                 chip->state = FL_READY;
 548         }
 549
 550         map_copy_from(map, buf, adr, len);
 551
 552         put_chip(map, chip, cmd_addr);
 553
 554         cfi_spin_unlock(chip->mutex);
 555         return 0;
 556 }
 557
 558
 559 static int cfi_amdstd_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
 560 {
 561         struct map_info *map = mtd->priv;
 562         struct cfi_private *cfi = map->fldrv_priv;
 563         unsigned long ofs;
 564         int chipnum;
 565         int ret = 0;
 566
 567         /* ofs: offset within the first chip that the first read should start */
 568
 569         chipnum = (from >> cfi->chipshift);
 570         ofs = from - (chipnum <<  cfi->chipshift);
 571
 572
 573         *retlen = 0;
 574
 575         while (len) {
 576                 unsigned long thislen;
 577
 578                 if (chipnum >= cfi->numchips)
 579                         break;
 580
 581                 if ((len + ofs -1) >> cfi->chipshift)
 582                         thislen = (1<<cfi->chipshift) - ofs;
 583                 else
 584                         thislen = len;
 585
 586                 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
 587                 if (ret)
 588                         break;
 589
 590                 *retlen += thislen;
 591                 len -= thislen;
 592                 buf += thislen;
 593
 594                 ofs = 0;
 595                 chipnum++;
 596         }
 597         return ret;
 598 }
 599
 600
 601 static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
 602 {
 603         DECLARE_WAITQUEUE(wait, current);
 604         unsigned long timeo = jiffies + HZ;
 605         struct cfi_private *cfi = map->fldrv_priv;
 606
 607  retry:
 608         cfi_spin_lock(chip->mutex);
 609
 610         if (chip->state != FL_READY){
 611 #if 0
 612                 printk(KERN_DEBUG "Waiting for chip to read, status = %d\n", chip->state);
 613 #endif
 614                 set_current_state(TASK_UNINTERRUPTIBLE);
 615                 add_wait_queue(&chip->wq, &wait);
 616
 617                 cfi_spin_unlock(chip->mutex);
 618
 619                 schedule();
 620                 remove_wait_queue(&chip->wq, &wait);
 621 #if 0
 622                 if(signal_pending(current))
 623                         return -EINTR;
 624 #endif
 625                 timeo = jiffies + HZ;
 626
 627                 goto retry;
 628         }
 629
 630         adr += chip->start;
 631
 632         chip->state = FL_READY;
 633
 634         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 635         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 636         cfi_send_gen_cmd(0x88, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 637
 638         map_copy_from(map, buf, adr, len);
 639
 640         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 641         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 642         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 643         cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 644
 645         wake_up(&chip->wq);
 646         cfi_spin_unlock(chip->mutex);
 647
 648         return 0;
 649 }
 650
 651 static int cfi_amdstd_secsi_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
 652 {
 653         struct map_info *map = mtd->priv;
 654         struct cfi_private *cfi = map->fldrv_priv;
 655         unsigned long ofs;
 656         int chipnum;
 657         int ret = 0;
 658
 659
 660         /* ofs: offset within the first chip that the first read should start */
 661
 662         /* 8 secsi bytes per chip */
 663         chipnum=from>>3;
 664         ofs=from & 7;
 665
 666
 667         *retlen = 0;
 668
 669         while (len) {
 670                 unsigned long thislen;
 671
 672                 if (chipnum >= cfi->numchips)
 673                         break;
 674
 675                 if ((len + ofs -1) >> 3)
 676                         thislen = (1<<3) - ofs;
 677                 else
 678                         thislen = len;
 679
 680                 ret = do_read_secsi_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
 681                 if (ret)
 682                         break;
 683
 684                 *retlen += thislen;
 685                 len -= thislen;
 686                 buf += thislen;
 687
 688                 ofs = 0;
 689                 chipnum++;
 690         }
 691         return ret;
 692 }
 693
 694
 695 static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, map_word datum)
 696 {
 697         struct cfi_private *cfi = map->fldrv_priv;
 698         unsigned long timeo = jiffies + HZ;
 699         /*
 700          * We use a 1ms + 1 jiffies generic timeout for writes (most devices
 701          * have a max write time of a few hundreds usec). However, we should
 702          * use the maximum timeout value given by the chip at probe time
 703          * instead.  Unfortunately, struct flchip does have a field for
 704          * maximum timeout, only for typical which can be far too short
 705          * depending of the conditions.  The ' + 1' is to avoid having a
 706          * timeout of 0 jiffies if HZ is smaller than 1000.
 707          */
 708         unsigned long uWriteTimeout = ( HZ / 1000 ) + 1;
 709         int ret = 0;
 710         map_word oldd, curd;
 711         int retry_cnt = 0;
 712
 713         adr += chip->start;
 714
 715         cfi_spin_lock(chip->mutex);
 716         ret = get_chip(map, chip, adr, FL_WRITING);
 717         if (ret) {
 718                 cfi_spin_unlock(chip->mutex);
 719                 return ret;
 720         }
 721
 722         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
 723                __func__, adr, datum.x[0] );
 724
 725         /*
 726          * Check for a NOP for the case when the datum to write is already
 727          * present - it saves time and works around buggy chips that corrupt
 728          * data at other locations when 0xff is written to a location that
 729          * already contains 0xff.
 730          */
 731         oldd = map_read(map, adr);
 732         if (map_word_equal(map, oldd, datum)) {
 733                 DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): NOP\n",
 734                        __func__);
 735                 goto op_done;
 736         }
 737
 738         ENABLE_VPP(map);
 739  retry:
 740         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 741         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 742         cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 743         map_write(map, datum, adr);
 744         chip->state = FL_WRITING;
 745
 746         cfi_spin_unlock(chip->mutex);
 747         cfi_udelay(chip->word_write_time);
 748         cfi_spin_lock(chip->mutex);
 749
 750         /* See comment above for timeout value. */
 751         timeo = jiffies + uWriteTimeout;
 752         for (;;) {
 753                 if (chip->state != FL_WRITING) {
 754                         /* Someone's suspended the write. Sleep */
 755                         DECLARE_WAITQUEUE(wait, current);
 756
 757                         set_current_state(TASK_UNINTERRUPTIBLE);
 758                         add_wait_queue(&chip->wq, &wait);
 759                         cfi_spin_unlock(chip->mutex);
 760                         schedule();
 761                         remove_wait_queue(&chip->wq, &wait);
 762                         timeo = jiffies + (HZ / 2); /* FIXME */
 763                         cfi_spin_lock(chip->mutex);
 764                         continue;
 765                 }
 766
 767                 /* Test to see if toggling has stopped. */
 768                 oldd = map_read(map, adr);
 769                 curd = map_read(map, adr);
 770                 if (map_word_equal(map, curd, oldd)) {
 771                         /* Do we have the correct value? */
 772                         if (map_word_equal(map, curd, datum)) {
 773                                 goto op_done;
 774                         }
 775                         /* Nope something has gone wrong. */
 776                         break;
 777                 }
 778
 779                 if (time_after(jiffies, timeo)) {
 780                         printk(KERN_WARNING "MTD %s(): software timeout\n",
 781                                 __func__ );
 782                         break;
 783                 }
 784
 785                 /* Latency issues. Drop the lock, wait a while and retry */
 786                 cfi_spin_unlock(chip->mutex);
 787                 cfi_udelay(1);
 788                 cfi_spin_lock(chip->mutex);
 789         }
 790
 791         /* reset on all failures. */
 792         map_write( map, CMD(0xF0), chip->start );
 793         /* FIXME - should have reset delay before continuing */
 794         if (++retry_cnt <= MAX_WORD_RETRIES)
 795                 goto retry;
 796
 797         ret = -EIO;
 798  op_done:
 799         chip->state = FL_READY;
 800         put_chip(map, chip, adr);
 801         cfi_spin_unlock(chip->mutex);
 802
 803         return ret;
 804 }
 805
 806
 807 static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
 808                                   size_t *retlen, const u_char *buf)
 809 {
 810         struct map_info *map = mtd->priv;
 811         struct cfi_private *cfi = map->fldrv_priv;
 812         int ret = 0;
 813         int chipnum;
 814         unsigned long ofs, chipstart;
 815         DECLARE_WAITQUEUE(wait, current);
 816
 817         *retlen = 0;
 818         if (!len)
 819                 return 0;
 820
 821         chipnum = to >> cfi->chipshift;
 822         ofs = to  - (chipnum << cfi->chipshift);
 823         chipstart = cfi->chips[chipnum].start;
 824
 825         /* If it's not bus-aligned, do the first byte write */
 826         if (ofs & (map_bankwidth(map)-1)) {
 827                 unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
 828                 int i = ofs - bus_ofs;
 829                 int n = 0;
 830                 map_word tmp_buf;
 831
 832  retry:
 833                 cfi_spin_lock(cfi->chips[chipnum].mutex);
 834
 835                 if (cfi->chips[chipnum].state != FL_READY) {
 836 #if 0
 837                         printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state);
 838 #endif
 839                         set_current_state(TASK_UNINTERRUPTIBLE);
 840                         add_wait_queue(&cfi->chips[chipnum].wq, &wait);
 841
 842                         cfi_spin_unlock(cfi->chips[chipnum].mutex);
 843
 844                         schedule();
 845                         remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
 846 #if 0
 847                         if(signal_pending(current))
 848                                 return -EINTR;
 849 #endif
 850                         goto retry;
 851                 }
 852
 853                 /* Load 'tmp_buf' with old contents of flash */
 854                 tmp_buf = map_read(map, bus_ofs+chipstart);
 855
 856                 cfi_spin_unlock(cfi->chips[chipnum].mutex);
 857
 858                 /* Number of bytes to copy from buffer */
 859                 n = min_t(int, len, map_bankwidth(map)-i);
 860
 861                 tmp_buf = map_word_load_partial(map, tmp_buf, buf, i, n);
 862
 863                 ret = do_write_oneword(map, &cfi->chips[chipnum],
 864                                        bus_ofs, tmp_buf);
 865                 if (ret)
 866                         return ret;
 867
 868                 ofs += n;
 869                 buf += n;
 870                 (*retlen) += n;
 871                 len -= n;
 872
 873                 if (ofs >> cfi->chipshift) {
 874                         chipnum ++;
 875                         ofs = 0;
 876                         if (chipnum == cfi->numchips)
 877                                 return 0;
 878                 }
 879         }
 880
 881         /* We are now aligned, write as much as possible */
 882         while(len >= map_bankwidth(map)) {
 883                 map_word datum;
 884
 885                 datum = map_word_load(map, buf);
 886
 887                 ret = do_write_oneword(map, &cfi->chips[chipnum],
 888                                        ofs, datum);
 889                 if (ret)
 890                         return ret;
 891
 892                 ofs += map_bankwidth(map);
 893                 buf += map_bankwidth(map);
 894                 (*retlen) += map_bankwidth(map);
 895                 len -= map_bankwidth(map);
 896
 897                 if (ofs >> cfi->chipshift) {
 898                         chipnum ++;
 899                         ofs = 0;
 900                         if (chipnum == cfi->numchips)
 901                                 return 0;
 902                         chipstart = cfi->chips[chipnum].start;
 903                 }
 904         }
 905
 906         /* Write the trailing bytes if any */
 907         if (len & (map_bankwidth(map)-1)) {
 908                 map_word tmp_buf;
 909
 910  retry1:
 911                 cfi_spin_lock(cfi->chips[chipnum].mutex);
 912
 913                 if (cfi->chips[chipnum].state != FL_READY) {
 914 #if 0
 915                         printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state);
 916 #endif
 917                         set_current_state(TASK_UNINTERRUPTIBLE);
 918                         add_wait_queue(&cfi->chips[chipnum].wq, &wait);
 919
 920                         cfi_spin_unlock(cfi->chips[chipnum].mutex);
 921
 922                         schedule();
 923                         remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
 924 #if 0
 925                         if(signal_pending(current))
 926                                 return -EINTR;
 927 #endif
 928                         goto retry1;
 929                 }
 930
 931                 tmp_buf = map_read(map, ofs + chipstart);
 932
 933                 cfi_spin_unlock(cfi->chips[chipnum].mutex);
 934
 935                 tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len);
 936
 937                 ret = do_write_oneword(map, &cfi->chips[chipnum],
 938                                 ofs, tmp_buf);
 939                 if (ret)
 940                         return ret;
 941
 942                 (*retlen) += len;
 943         }
 944
 945         return 0;
 946 }
 947
 948
 949 /*
 950  * FIXME: interleaved mode not tested, and probably not supported!
 951  */
 952 static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
 953                                   unsigned long adr, const u_char *buf, int len)
 954 {
 955         struct cfi_private *cfi = map->fldrv_priv;
 956         unsigned long timeo = jiffies + HZ;
 957         /* see comments in do_write_oneword() regarding uWriteTimeo. */
 958         unsigned long uWriteTimeout = ( HZ / 1000 ) + 1;
 959         int ret = -EIO;
 960         unsigned long cmd_adr;
 961         int z, words;
 962         map_word datum;
 963
 964         adr += chip->start;
 965         cmd_adr = adr;
 966
 967         cfi_spin_lock(chip->mutex);
 968         ret = get_chip(map, chip, adr, FL_WRITING);
 969         if (ret) {
 970                 cfi_spin_unlock(chip->mutex);
 971                 return ret;
 972         }
 973
 974         datum = map_word_load(map, buf);
 975
 976         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
 977                __func__, adr, datum.x[0] );
 978
 979         ENABLE_VPP(map);
 980         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 981         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
 982         //cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
 983
 984         /* Write Buffer Load */
 985         map_write(map, CMD(0x25), cmd_adr);
 986
 987         chip->state = FL_WRITING_TO_BUFFER;
 988
 989         /* Write length of data to come */
 990         words = len / map_bankwidth(map);
 991         map_write(map, CMD(words - 1), cmd_adr);
 992         /* Write data */
 993         z = 0;
 994         while(z < words * map_bankwidth(map)) {
 995                 datum = map_word_load(map, buf);
 996                 map_write(map, datum, adr + z);
 997
 998                 z += map_bankwidth(map);
 999                 buf += map_bankwidth(map);
1000         }
1001         z -= map_bankwidth(map);
1002
1003         adr += z;
1004
1005         /* Write Buffer Program Confirm: GO GO GO */
1006         map_write(map, CMD(0x29), cmd_adr);
1007         chip->state = FL_WRITING;
1008
1009         cfi_spin_unlock(chip->mutex);
1010         cfi_udelay(chip->buffer_write_time);
1011         cfi_spin_lock(chip->mutex);
1012
1013         timeo = jiffies + uWriteTimeout;
1014
1015         for (;;) {
1016                 if (chip->state != FL_WRITING) {
1017                         /* Someone's suspended the write. Sleep */
1018                         DECLARE_WAITQUEUE(wait, current);
1019
1020                         set_current_state(TASK_UNINTERRUPTIBLE);
1021                         add_wait_queue(&chip->wq, &wait);
1022                         cfi_spin_unlock(chip->mutex);
1023                         schedule();
1024                         remove_wait_queue(&chip->wq, &wait);
1025                         timeo = jiffies + (HZ / 2); /* FIXME */
1026                         cfi_spin_lock(chip->mutex);
1027                         continue;
1028                 }
1029
1030                 if (chip_ready(map, adr))
1031                         goto op_done;
1032
1033                 if( time_after(jiffies, timeo))
1034                         break;
1035
1036                 /* Latency issues. Drop the lock, wait a while and retry */
1037                 cfi_spin_unlock(chip->mutex);
1038                 cfi_udelay(1);
1039                 cfi_spin_lock(chip->mutex);
1040         }
1041
1042         printk(KERN_WARNING "MTD %s(): software timeout\n",
1043                __func__ );
1044
1045         /* reset on all failures. */
1046         map_write( map, CMD(0xF0), chip->start );
1047         /* FIXME - should have reset delay before continuing */
1048
1049         ret = -EIO;
1050  op_done:
1051         chip->state = FL_READY;
1052         put_chip(map, chip, adr);
1053         cfi_spin_unlock(chip->mutex);
1054
1055         return ret;
1056 }
1057
1058
1059 static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
1060                                     size_t *retlen, const u_char *buf)
1061 {
1062         struct map_info *map = mtd->priv;
1063         struct cfi_private *cfi = map->fldrv_priv;
1064         int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1065         int ret = 0;
1066         int chipnum;
1067         unsigned long ofs;
1068
1069         *retlen = 0;
1070         if (!len)
1071                 return 0;
1072
1073         chipnum = to >> cfi->chipshift;
1074         ofs = to  - (chipnum << cfi->chipshift);
1075
1076         /* If it's not bus-aligned, do the first word write */
1077         if (ofs & (map_bankwidth(map)-1)) {
1078                 size_t local_len = (-ofs)&(map_bankwidth(map)-1);
1079                 if (local_len > len)
1080                         local_len = len;
1081                 ret = cfi_amdstd_write_words(mtd, ofs + (chipnum<<cfi->chipshift),
1082                                              local_len, retlen, buf);
1083                 if (ret)
1084                         return ret;
1085                 ofs += local_len;
1086                 buf += local_len;
1087                 len -= local_len;
1088
1089                 if (ofs >> cfi->chipshift) {
1090                         chipnum ++;
1091                         ofs = 0;
1092                         if (chipnum == cfi->numchips)
1093                                 return 0;
1094                 }
1095         }
1096
1097         /* Write buffer is worth it only if more than one word to write... */
1098         while (len >= map_bankwidth(map) * 2) {
1099                 /* We must not cross write block boundaries */
1100                 int size = wbufsize - (ofs & (wbufsize-1));
1101
1102                 if (size > len)
1103                         size = len;
1104                 if (size % map_bankwidth(map))
1105                         size -= size % map_bankwidth(map);
1106
1107                 ret = do_write_buffer(map, &cfi->chips[chipnum],
1108                                       ofs, buf, size);
1109                 if (ret)
1110                         return ret;
1111
1112                 ofs += size;
1113                 buf += size;
1114                 (*retlen) += size;
1115                 len -= size;
1116
1117                 if (ofs >> cfi->chipshift) {
1118                         chipnum ++;
1119                         ofs = 0;
1120                         if (chipnum == cfi->numchips)
1121                                 return 0;
1122                 }
1123         }
1124
1125         if (len) {
1126                 size_t retlen_dregs = 0;
1127
1128                 ret = cfi_amdstd_write_words(mtd, ofs + (chipnum<<cfi->chipshift),
1129                                              len, &retlen_dregs, buf);
1130
1131                 *retlen += retlen_dregs;
1132                 return ret;
1133         }
1134
1135         return 0;
1136 }
1137
1138
1139 /*
1140  * Handle devices with one erase region, that only implement
1141  * the chip erase command.
1142  */
1143 static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
1144 {
1145         struct cfi_private *cfi = map->fldrv_priv;
1146         unsigned long timeo = jiffies + HZ;
1147         unsigned long int adr;
1148         DECLARE_WAITQUEUE(wait, current);
1149         int ret = 0;
1150
1151         adr = cfi->addr_unlock1;
1152
1153         cfi_spin_lock(chip->mutex);
1154         ret = get_chip(map, chip, adr, FL_WRITING);
1155         if (ret) {
1156                 cfi_spin_unlock(chip->mutex);
1157                 return ret;
1158         }
1159
1160         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
1161                __func__, chip->start );
1162
1163         ENABLE_VPP(map);
1164         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1165         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
1166         cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1167         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1168         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
1169         cfi_send_gen_cmd(0x10, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1170
1171         chip->state = FL_ERASING;
1172         chip->erase_suspended = 0;
1173         chip->in_progress_block_addr = adr;
1174
1175         cfi_spin_unlock(chip->mutex);
1176         set_current_state(TASK_UNINTERRUPTIBLE);
1177         schedule_timeout((chip->erase_time*HZ)/(2*1000));
1178         cfi_spin_lock(chip->mutex);
1179
1180         timeo = jiffies + (HZ*20);
1181
1182         for (;;) {
1183                 if (chip->state != FL_ERASING) {
1184                         /* Someone's suspended the erase. Sleep */
1185                         set_current_state(TASK_UNINTERRUPTIBLE);
1186                         add_wait_queue(&chip->wq, &wait);
1187                         cfi_spin_unlock(chip->mutex);
1188                         schedule();
1189                         remove_wait_queue(&chip->wq, &wait);
1190                         cfi_spin_lock(chip->mutex);
1191                         continue;
1192                 }
1193                 if (chip->erase_suspended) {
1194                         /* This erase was suspended and resumed.
1195                            Adjust the timeout */
1196                         timeo = jiffies + (HZ*20); /* FIXME */
1197                         chip->erase_suspended = 0;
1198                 }
1199
1200                 if (chip_ready(map, adr))
1201                         goto op_done;
1202
1203                 if (time_after(jiffies, timeo))
1204                         break;
1205
1206                 /* Latency issues. Drop the lock, wait a while and retry */
1207                 cfi_spin_unlock(chip->mutex);
1208                 set_current_state(TASK_UNINTERRUPTIBLE);
1209                 schedule_timeout(1);
1210                 cfi_spin_lock(chip->mutex);
1211         }
1212
1213         printk(KERN_WARNING "MTD %s(): software timeout\n",
1214                __func__ );
1215
1216         /* reset on all failures. */
1217         map_write( map, CMD(0xF0), chip->start );
1218         /* FIXME - should have reset delay before continuing */
1219
1220         ret = -EIO;
1221  op_done:
1222         chip->state = FL_READY;
1223         put_chip(map, chip, adr);
1224         cfi_spin_unlock(chip->mutex);
1225
1226         return ret;
1227 }
1228
1229
1230 static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr, int len, void *thunk)
1231 {
1232         struct cfi_private *cfi = map->fldrv_priv;
1233         unsigned long timeo = jiffies + HZ;
1234         DECLARE_WAITQUEUE(wait, current);
1235         int ret = 0;
1236
1237         adr += chip->start;
1238
1239         cfi_spin_lock(chip->mutex);
1240         ret = get_chip(map, chip, adr, FL_ERASING);
1241         if (ret) {
1242                 cfi_spin_unlock(chip->mutex);
1243                 return ret;
1244         }
1245
1246         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
1247                __func__, adr );
1248
1249         ENABLE_VPP(map);
1250         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1251         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
1252         cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1253         cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
1254         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
1255         map_write(map, CMD(0x30), adr);
1256
1257         chip->state = FL_ERASING;
1258         chip->erase_suspended = 0;
1259         chip->in_progress_block_addr = adr;
1260
1261         cfi_spin_unlock(chip->mutex);
1262         set_current_state(TASK_UNINTERRUPTIBLE);
1263         schedule_timeout((chip->erase_time*HZ)/(2*1000));
1264         cfi_spin_lock(chip->mutex);
1265
1266         timeo = jiffies + (HZ*20);
1267
1268         for (;;) {
1269                 if (chip->state != FL_ERASING) {
1270                         /* Someone's suspended the erase. Sleep */
1271                         set_current_state(TASK_UNINTERRUPTIBLE);
1272                         add_wait_queue(&chip->wq, &wait);
1273                         cfi_spin_unlock(chip->mutex);
1274                         schedule();
1275                         remove_wait_queue(&chip->wq, &wait);
1276                         cfi_spin_lock(chip->mutex);
1277                         continue;
1278                 }
1279                 if (chip->erase_suspended) {
1280                         /* This erase was suspended and resumed.
1281                            Adjust the timeout */
1282                         timeo = jiffies + (HZ*20); /* FIXME */
1283                         chip->erase_suspended = 0;
1284                 }
1285
1286                 if (chip_ready(map, adr))
1287                         goto op_done;
1288
1289                 if (time_after(jiffies, timeo))
1290                         break;
1291
1292                 /* Latency issues. Drop the lock, wait a while and retry */
1293                 cfi_spin_unlock(chip->mutex);
1294                 set_current_state(TASK_UNINTERRUPTIBLE);
1295                 schedule_timeout(1);
1296                 cfi_spin_lock(chip->mutex);
1297         }
1298
1299         printk(KERN_WARNING "MTD %s(): software timeout\n",
1300                __func__ );
1301
1302         /* reset on all failures. */
1303         map_write( map, CMD(0xF0), chip->start );
1304         /* FIXME - should have reset delay before continuing */
1305
1306         ret = -EIO;
1307  op_done:
1308         chip->state = FL_READY;
1309         put_chip(map, chip, adr);
1310         cfi_spin_unlock(chip->mutex);
1311         return ret;
1312 }
1313
1314
1315 int cfi_amdstd_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
1316 {
1317         unsigned long ofs, len;
1318         int ret;
1319
1320         ofs = instr->addr;
1321         len = instr->len;
1322
1323         ret = cfi_varsize_frob(mtd, do_erase_oneblock, ofs, len, NULL);
1324         if (ret)
1325                 return ret;
1326
1327         instr->state = MTD_ERASE_DONE;
1328         mtd_erase_callback(instr);
1329
1330         return 0;
1331 }
1332
1333
1334 static int cfi_amdstd_erase_chip(struct mtd_info *mtd, struct erase_info *instr)
1335 {
1336         struct map_info *map = mtd->priv;
1337         struct cfi_private *cfi = map->fldrv_priv;
1338         int ret = 0;
1339
1340         if (instr->addr != 0)
1341                 return -EINVAL;
1342
1343         if (instr->len != mtd->size)
1344                 return -EINVAL;
1345
1346         ret = do_erase_chip(map, &cfi->chips[0]);
1347         if (ret)
1348                 return ret;
1349
1350         instr->state = MTD_ERASE_DONE;
1351         mtd_erase_callback(instr);
1352
1353         return 0;
1354 }
1355
1356
1357 static void cfi_amdstd_sync (struct mtd_info *mtd)
1358 {
1359         struct map_info *map = mtd->priv;
1360         struct cfi_private *cfi = map->fldrv_priv;
1361         int i;
1362         struct flchip *chip;
1363         int ret = 0;
1364         DECLARE_WAITQUEUE(wait, current);
1365
1366         for (i=0; !ret && i<cfi->numchips; i++) {
1367                 chip = &cfi->chips[i];
1368
1369         retry:
1370                 cfi_spin_lock(chip->mutex);
1371
1372                 switch(chip->state) {
1373                 case FL_READY:
1374                 case FL_STATUS:
1375                 case FL_CFI_QUERY:
1376                 case FL_JEDEC_QUERY:
1377                         chip->oldstate = chip->state;
1378                         chip->state = FL_SYNCING;
1379                         /* No need to wake_up() on this state change -
1380                          * as the whole point is that nobody can do anything
1381                          * with the chip now anyway.
1382                          */
1383                 case FL_SYNCING:
1384                         cfi_spin_unlock(chip->mutex);
1385                         break;
1386
1387                 default:
1388                         /* Not an idle state */
1389                         add_wait_queue(&chip->wq, &wait);
1390
1391                         cfi_spin_unlock(chip->mutex);
1392
1393                         schedule();
1394
1395                         remove_wait_queue(&chip->wq, &wait);
1396
1397                         goto retry;
1398                 }
1399         }
1400
1401         /* Unlock the chips again */
1402
1403         for (i--; i >=0; i--) {
1404                 chip = &cfi->chips[i];
1405
1406                 cfi_spin_lock(chip->mutex);
1407
1408                 if (chip->state == FL_SYNCING) {
1409                         chip->state = chip->oldstate;
1410                         wake_up(&chip->wq);
1411                 }
1412                 cfi_spin_unlock(chip->mutex);
1413         }
1414 }
1415
1416
1417 static int cfi_amdstd_suspend(struct mtd_info *mtd)
1418 {
1419         struct map_info *map = mtd->priv;
1420         struct cfi_private *cfi = map->fldrv_priv;
1421         int i;
1422         struct flchip *chip;
1423         int ret = 0;
1424
1425         for (i=0; !ret && i<cfi->numchips; i++) {
1426                 chip = &cfi->chips[i];
1427
1428                 cfi_spin_lock(chip->mutex);
1429
1430                 switch(chip->state) {
1431                 case FL_READY:
1432                 case FL_STATUS:
1433                 case FL_CFI_QUERY:
1434                 case FL_JEDEC_QUERY:
1435                         chip->oldstate = chip->state;
1436                         chip->state = FL_PM_SUSPENDED;
1437                         /* No need to wake_up() on this state change -
1438                          * as the whole point is that nobody can do anything
1439                          * with the chip now anyway.
1440                          */
1441                 case FL_PM_SUSPENDED:
1442                         break;
1443
1444                 default:
1445                         ret = -EAGAIN;
1446                         break;
1447                 }
1448                 cfi_spin_unlock(chip->mutex);
1449         }
1450
1451         /* Unlock the chips again */
1452
1453         if (ret) {
1454                 for (i--; i >=0; i--) {
1455                         chip = &cfi->chips[i];
1456
1457                         cfi_spin_lock(chip->mutex);
1458
1459                         if (chip->state == FL_PM_SUSPENDED) {
1460                                 chip->state = chip->oldstate;
1461                                 wake_up(&chip->wq);
1462                         }
1463                         cfi_spin_unlock(chip->mutex);
1464                 }
1465         }
1466
1467         return ret;
1468 }
1469
1470
1471 static void cfi_amdstd_resume(struct mtd_info *mtd)
1472 {
1473         struct map_info *map = mtd->priv;
1474         struct cfi_private *cfi = map->fldrv_priv;
1475         int i;
1476         struct flchip *chip;
1477
1478         for (i=0; i<cfi->numchips; i++) {
1479
1480                 chip = &cfi->chips[i];
1481
1482                 cfi_spin_lock(chip->mutex);
1483
1484                 if (chip->state == FL_PM_SUSPENDED) {
1485                         chip->state = FL_READY;
1486                         map_write(map, CMD(0xF0), chip->start);
1487                         wake_up(&chip->wq);
1488                 }
1489                 else
1490                         printk(KERN_ERR "Argh. Chip not in PM_SUSPENDED state upon resume()\n");
1491
1492                 cfi_spin_unlock(chip->mutex);
1493         }
1494 }
1495
1496 static void cfi_amdstd_destroy(struct mtd_info *mtd)
1497 {
1498         struct map_info *map = mtd->priv;
1499         struct cfi_private *cfi = map->fldrv_priv;
1500         kfree(cfi->cmdset_priv);
1501         kfree(cfi->cfiq);
1502         kfree(cfi);
1503         kfree(mtd->eraseregions);
1504 }
1505
1506 static char im_name[]="cfi_cmdset_0002";
1507
1508
1509 static int __init cfi_amdstd_init(void)
1510 {
1511         inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0002);
1512         return 0;
1513 }
1514
1515
1516 static void __exit cfi_amdstd_exit(void)
1517 {
1518         inter_module_unregister(im_name);
1519 }
1520
1521
1522 module_init(cfi_amdstd_init);
1523 module_exit(cfi_amdstd_exit);
1524
1525 MODULE_LICENSE("GPL");
1526 MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");
1527 MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");