1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
241 #include <linux/config.h>
242 #include <linux/module.h>
243 #include <linux/kernel.h>
244 #include <linux/string.h>
245 #include <linux/timer.h>
246 #include <linux/errno.h>
247 #include <linux/in.h>
248 #include <linux/ioport.h>
249 #include <linux/slab.h>
250 #include <linux/interrupt.h>
251 #include <linux/pci.h>
252 #include <linux/mii.h>
253 #include <linux/init.h>
254 #include <linux/netdevice.h>
255 #include <linux/etherdevice.h>
256 #include <linux/skbuff.h>
257 #include <linux/ethtool.h>
258 #include <linux/highmem.h>
259 #include <linux/eisa.h>
260 #include <linux/bitops.h>
261 #include <asm/irq.h> /* For NR_IRQS only. */
263 #include <asm/uaccess.h>
265 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
266 This is only in the support-all-kernels source code. */
268 #define RUN_AT(x) (jiffies + (x))
270 #include <linux/delay.h>
273 static char version[] __devinitdata =
274 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
276 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
277 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
278 DRV_VERSION " " DRV_RELDATE);
279 MODULE_LICENSE("GPL");
281 MODULE_PARM(debug, "i");
282 MODULE_PARM(global_options, "i");
283 MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
284 MODULE_PARM(global_full_duplex, "i");
285 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
286 MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
287 MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
288 MODULE_PARM(global_enable_wol, "i");
289 MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
290 MODULE_PARM(rx_copybreak, "i");
291 MODULE_PARM(max_interrupt_work, "i");
292 MODULE_PARM(compaq_ioaddr, "i");
293 MODULE_PARM(compaq_irq, "i");
294 MODULE_PARM(compaq_device_id, "i");
295 MODULE_PARM(watchdog, "i");
296 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
297 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
298 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
299 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
300 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
301 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
302 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
303 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
304 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
305 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
306 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
307 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
308 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
309 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
310 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
312 /* Operational parameter that usually are not changed. */
314 /* The Vortex size is twice that of the original EtherLinkIII series: the
315 runtime register window, window 1, is now always mapped in.
316 The Boomerang size is twice as large as the Vortex -- it has additional
317 bus master control registers. */
318 #define VORTEX_TOTAL_SIZE 0x20
319 #define BOOMERANG_TOTAL_SIZE 0x40
321 /* Set iff a MII transceiver on any interface requires mdio preamble.
322 This only set with the original DP83840 on older 3c905 boards, so the extra
323 code size of a per-interface flag is not worthwhile. */
324 static char mii_preamble_required;
326 #define PFX DRV_NAME ": "
333 I. Board Compatibility
335 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
336 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
337 versions of the FastEtherLink cards. The supported product IDs are
338 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
340 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
341 with the kernel source or available from
342 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
344 II. Board-specific settings
346 PCI bus devices are configured by the system at boot time, so no jumpers
347 need to be set on the board. The system BIOS should be set to assign the
348 PCI INTA signal to an otherwise unused system IRQ line.
350 The EEPROM settings for media type and forced-full-duplex are observed.
351 The EEPROM media type should be left at the default "autoselect" unless using
352 10base2 or AUI connections which cannot be reliably detected.
354 III. Driver operation
356 The 3c59x series use an interface that's very similar to the previous 3c5x9
357 series. The primary interface is two programmed-I/O FIFOs, with an
358 alternate single-contiguous-region bus-master transfer (see next).
360 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
361 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
362 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
363 programmed-I/O interface that has been removed in 'B' and subsequent board
366 One extension that is advertised in a very large font is that the adapters
367 are capable of being bus masters. On the Vortex chip this capability was
368 only for a single contiguous region making it far less useful than the full
369 bus master capability. There is a significant performance impact of taking
370 an extra interrupt or polling for the completion of each transfer, as well
371 as difficulty sharing the single transfer engine between the transmit and
372 receive threads. Using DMA transfers is a win only with large blocks or
373 with the flawed versions of the Intel Orion motherboard PCI controller.
375 The Boomerang chip's full-bus-master interface is useful, and has the
376 currently-unused advantages over other similar chips that queued transmit
377 packets may be reordered and receive buffer groups are associated with a
380 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
381 Rather than a fixed intermediate receive buffer, this scheme allocates
382 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
383 the copying breakpoint: it is chosen to trade-off the memory wasted by
384 passing the full-sized skbuff to the queue layer for all frames vs. the
385 copying cost of copying a frame to a correctly-sized skbuff.
387 IIIC. Synchronization
388 The driver runs as two independent, single-threaded flows of control. One
389 is the send-packet routine, which enforces single-threaded use by the
390 dev->tbusy flag. The other thread is the interrupt handler, which is single
391 threaded by the hardware and other software.
395 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
396 3c590, 3c595, and 3c900 boards.
397 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
398 the EISA version is called "Demon". According to Terry these names come
399 from rides at the local amusement park.
401 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
402 This driver only supports ethernet packets because of the skbuff allocation
406 /* This table drives the PCI probe routines. It's mostly boilerplate in all
407 of the drivers, and will likely be provided by some future kernel.
410 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
411 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
414 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
415 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
416 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
417 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
418 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
419 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
470 /* note: this array directly indexed by above enums, and MUST
471 * be kept in sync with both the enums above, and the PCI device
474 static struct vortex_chip_info {
479 } vortex_info_tbl[] __devinitdata = {
480 {"3c590 Vortex 10Mbps",
481 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
482 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
483 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
484 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
485 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
486 {"3c595 Vortex 100baseTx",
487 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
488 {"3c595 Vortex 100baseT4",
489 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
491 {"3c595 Vortex 100base-MII",
492 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
493 {"3c900 Boomerang 10baseT",
494 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
495 {"3c900 Boomerang 10Mbps Combo",
496 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
497 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
498 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
499 {"3c900 Cyclone 10Mbps Combo",
500 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
502 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
503 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
504 {"3c900B-FL Cyclone 10base-FL",
505 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
506 {"3c905 Boomerang 100baseTx",
507 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
508 {"3c905 Boomerang 100baseT4",
509 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
510 {"3c905B Cyclone 100baseTx",
511 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
513 {"3c905B Cyclone 10/100/BNC",
514 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
515 {"3c905B-FX Cyclone 100baseFx",
516 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
518 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
519 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
520 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
522 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
525 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
526 {"3cSOHO100-TX Hurricane",
527 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
528 {"3c555 Laptop Hurricane",
529 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
530 {"3c556 Laptop Tornado",
531 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
533 {"3c556B Laptop Hurricane",
534 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
535 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
537 {"3c575 [Megahertz] 10/100 LAN CardBus",
538 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
539 {"3c575 Boomerang CardBus",
540 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
541 {"3CCFE575BT Cyclone CardBus",
542 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
543 INVERT_LED_PWR|HAS_HWCKSM, 128, },
544 {"3CCFE575CT Tornado CardBus",
545 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
546 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
547 {"3CCFE656 Cyclone CardBus",
548 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
549 INVERT_LED_PWR|HAS_HWCKSM, 128, },
551 {"3CCFEM656B Cyclone+Winmodem CardBus",
552 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
553 INVERT_LED_PWR|HAS_HWCKSM, 128, },
554 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
555 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
556 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
557 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
558 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
560 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
561 {"3c982 Hydra Dual Port A",
562 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
564 {"3c982 Hydra Dual Port B",
565 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
567 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
568 {"3c920B-EMB-WNM Tornado",
569 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
571 {NULL,}, /* NULL terminated list. */
575 static struct pci_device_id vortex_pci_tbl[] = {
576 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
577 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
578 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
579 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
580 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
582 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
583 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
584 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
585 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
586 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
588 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
589 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
590 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
591 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
592 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
594 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
595 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
596 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
597 { 0x10B7, 0x9202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9202 },
598 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
599 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
601 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
602 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
603 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
604 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
605 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
607 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
608 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
609 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
610 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
611 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
613 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
614 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
615 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
616 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
617 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
619 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
620 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
622 {0,} /* 0 terminated list. */
624 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
627 /* Operational definitions.
628 These are not used by other compilation units and thus are not
629 exported in a ".h" file.
631 First the windows. There are eight register windows, with the command
632 and status registers available in each.
634 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
636 #define EL3_STATUS 0x0e
638 /* The top five bits written to EL3_CMD are a command, the lower
639 11 bits are the parameter, if applicable.
640 Note that 11 parameters bits was fine for ethernet, but the new chip
641 can handle FDDI length frames (~4500 octets) and now parameters count
642 32-bit 'Dwords' rather than octets. */
645 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
646 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
647 UpStall = 6<<11, UpUnstall = (6<<11)+1,
648 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
649 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
650 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
651 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
652 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
653 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
654 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
656 /* The SetRxFilter command accepts the following classes: */
658 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
660 /* Bits in the general status register. */
662 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
663 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
664 IntReq = 0x0040, StatsFull = 0x0080,
665 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
666 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
667 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
670 /* Register window 1 offsets, the window used in normal operation.
671 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
673 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
674 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
675 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
678 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
679 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
680 IntrStatus=0x0E, /* Valid in all windows. */
682 enum Win0_EEPROM_bits {
683 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
684 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
685 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
687 /* EEPROM locations. */
689 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
690 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
691 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
692 DriverTune=13, Checksum=15};
694 enum Window2 { /* Window 2. */
697 enum Window3 { /* Window 3: MAC/config bits. */
698 Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
701 #define BFEXT(value, offset, bitcount) \
702 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
704 #define BFINS(lhs, rhs, offset, bitcount) \
705 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
706 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
708 #define RAM_SIZE(v) BFEXT(v, 0, 3)
709 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
710 #define RAM_SPEED(v) BFEXT(v, 4, 2)
711 #define ROM_SIZE(v) BFEXT(v, 6, 2)
712 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
713 #define XCVR(v) BFEXT(v, 20, 4)
714 #define AUTOSELECT(v) BFEXT(v, 24, 1)
716 enum Window4 { /* Window 4: Xcvr/media bits. */
717 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
719 enum Win4_Media_bits {
720 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
721 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
722 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
723 Media_LnkBeat = 0x0800,
725 enum Window7 { /* Window 7: Bus Master control. */
726 Wn7_MasterAddr = 0, Wn7_VlanEtherType=4, Wn7_MasterLen = 6,
727 Wn7_MasterStatus = 12,
729 /* Boomerang bus master control registers. */
731 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
732 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
735 /* The Rx and Tx descriptor lists.
736 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
737 alignment contraint on tx_ring[] and rx_ring[]. */
738 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
739 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
740 struct boom_rx_desc {
741 u32 next; /* Last entry points to 0. */
743 u32 addr; /* Up to 63 addr/len pairs possible. */
744 s32 length; /* Set LAST_FRAG to indicate last pair. */
746 /* Values for the Rx status entry. */
747 enum rx_desc_status {
748 RxDComplete=0x00008000, RxDError=0x4000,
749 /* See boomerang_rx() for actual error bits */
750 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
751 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
755 #define DO_ZEROCOPY 1
757 #define DO_ZEROCOPY 0
760 struct boom_tx_desc {
761 u32 next; /* Last entry points to 0. */
762 s32 status; /* bits 0:12 length, others see below. */
767 } frag[1+MAX_SKB_FRAGS];
774 /* Values for the Tx status entry. */
775 enum tx_desc_status {
776 CRCDisable=0x2000, TxDComplete=0x8000,
777 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
778 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
781 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
782 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
784 struct vortex_private {
785 /* The Rx and Tx rings should be quad-word-aligned. */
786 struct boom_rx_desc* rx_ring;
787 struct boom_tx_desc* tx_ring;
788 dma_addr_t rx_ring_dma;
789 dma_addr_t tx_ring_dma;
790 /* The addresses of transmit- and receive-in-place skbuffs. */
791 struct sk_buff* rx_skbuff[RX_RING_SIZE];
792 struct sk_buff* tx_skbuff[TX_RING_SIZE];
793 unsigned int cur_rx, cur_tx; /* The next free ring entry */
794 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
795 struct net_device_stats stats;
796 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
797 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
799 /* PCI configuration space information. */
800 struct device *gendev;
801 char __iomem *cb_fn_base; /* CardBus function status addr space. */
803 /* Some values here only for performance evaluation and path-coverage */
804 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
807 /* The remainder are related to chip state, mostly media selection. */
808 struct timer_list timer; /* Media selection timer. */
809 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
810 int options; /* User-settable misc. driver options. */
811 unsigned int media_override:4, /* Passed-in media type. */
812 default_media:4, /* Read from the EEPROM/Wn3_Config. */
813 full_duplex:1, force_fd:1, autoselect:1,
814 bus_master:1, /* Vortex can only do a fragment bus-m. */
815 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
816 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
817 partner_flow_ctrl:1, /* Partner supports flow control */
819 enable_wol:1, /* Wake-on-LAN is enabled */
820 pm_state_valid:1, /* pci_dev->saved_config_space has sane contents */
823 must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */
824 large_frames:1; /* accept large frames */
828 u16 available_media; /* From Wn3_Options. */
829 u16 capabilities, info1, info2; /* Various, from EEPROM. */
830 u16 advertising; /* NWay media advertisement */
831 unsigned char phys[2]; /* MII device addresses. */
832 u16 deferred; /* Resend these interrupts when we
833 * bale from the ISR */
834 u16 io_size; /* Size of PCI region (for release_region) */
835 spinlock_t lock; /* Serialise access to device & its vortex_private */
836 spinlock_t mdio_lock; /* Serialise access to mdio hardware */
840 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
842 #define DEVICE_PCI(dev) NULL
845 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
848 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
850 #define DEVICE_EISA(dev) NULL
853 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
855 /* The action to take with a media selection timer tick.
856 Note that we deviate from the 3Com order by checking 10base2 before AUI.
859 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
860 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
863 static struct media_table {
865 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
866 mask:8, /* The transceiver-present bit in Wn3_Config.*/
867 next:8; /* The media type to try next. */
868 int wait; /* Time before we check media status. */
870 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
871 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
872 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
873 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
874 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
875 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
876 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
877 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
878 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
879 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
880 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
883 static int vortex_probe1(struct device *gendev, long ioaddr, int irq,
884 int chip_idx, int card_idx);
885 static void vortex_up(struct net_device *dev);
886 static void vortex_down(struct net_device *dev, int final);
887 static int vortex_open(struct net_device *dev);
888 static void mdio_sync(long ioaddr, int bits);
889 static int mdio_read(struct net_device *dev, int phy_id, int location);
890 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
891 static void vortex_timer(unsigned long arg);
892 static void rx_oom_timer(unsigned long arg);
893 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
894 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
895 static int vortex_rx(struct net_device *dev);
896 static int boomerang_rx(struct net_device *dev);
897 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
898 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
899 static int vortex_close(struct net_device *dev);
900 static void dump_tx_ring(struct net_device *dev);
901 static void update_stats(long ioaddr, struct net_device *dev);
902 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
903 static void set_rx_mode(struct net_device *dev);
905 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
907 static void vortex_tx_timeout(struct net_device *dev);
908 static void acpi_set_WOL(struct net_device *dev);
909 static struct ethtool_ops vortex_ethtool_ops;
910 static void set_8021q_mode(struct net_device *dev, int enable);
913 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
914 /* Option count limit only -- unlimited interfaces are supported. */
916 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
917 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
918 static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
919 static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
920 static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
921 static int global_options = -1;
922 static int global_full_duplex = -1;
923 static int global_enable_wol = -1;
925 /* #define dev_alloc_skb dev_alloc_skb_debug */
927 /* Variables to work-around the Compaq PCI BIOS32 problem. */
928 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
929 static struct net_device *compaq_net_device;
931 static int vortex_cards_found;
933 #ifdef CONFIG_NET_POLL_CONTROLLER
934 static void poll_vortex(struct net_device *dev)
936 struct vortex_private *vp = (struct vortex_private *)dev->priv;
938 local_save_flags(flags);
940 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
941 local_irq_restore(flags);
947 static int vortex_suspend (struct pci_dev *pdev, u32 state)
949 struct net_device *dev = pci_get_drvdata(pdev);
951 if (dev && dev->priv) {
952 if (netif_running(dev)) {
953 netif_device_detach(dev);
960 static int vortex_resume (struct pci_dev *pdev)
962 struct net_device *dev = pci_get_drvdata(pdev);
964 if (dev && dev->priv) {
965 if (netif_running(dev)) {
967 netif_device_attach(dev);
973 #endif /* CONFIG_PM */
976 static struct eisa_device_id vortex_eisa_ids[] = {
977 { "TCM5920", CH_3C592 },
978 { "TCM5970", CH_3C597 },
982 static int vortex_eisa_probe (struct device *device);
983 static int vortex_eisa_remove (struct device *device);
985 static struct eisa_driver vortex_eisa_driver = {
986 .id_table = vortex_eisa_ids,
989 .probe = vortex_eisa_probe,
990 .remove = vortex_eisa_remove
994 static int vortex_eisa_probe (struct device *device)
997 struct eisa_device *edev;
999 edev = to_eisa_device (device);
1000 ioaddr = edev->base_addr;
1002 if (!request_region(ioaddr, VORTEX_TOTAL_SIZE, DRV_NAME))
1005 if (vortex_probe1(device, ioaddr, inw(ioaddr + 0xC88) >> 12,
1006 edev->id.driver_data, vortex_cards_found)) {
1007 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1011 vortex_cards_found++;
1016 static int vortex_eisa_remove (struct device *device)
1018 struct eisa_device *edev;
1019 struct net_device *dev;
1020 struct vortex_private *vp;
1023 edev = to_eisa_device (device);
1024 dev = eisa_get_drvdata (edev);
1027 printk("vortex_eisa_remove called for Compaq device!\n");
1031 vp = netdev_priv(dev);
1032 ioaddr = dev->base_addr;
1034 unregister_netdev (dev);
1035 outw (TotalReset|0x14, ioaddr + EL3_CMD);
1036 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1043 /* returns count found (>= 0), or negative on error */
1044 static int __init vortex_eisa_init (void)
1047 int orig_cards_found = vortex_cards_found;
1050 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1051 /* Because of the way EISA bus is probed, we cannot assume
1052 * any device have been found when we exit from
1053 * eisa_driver_register (the bus root driver may not be
1054 * initialized yet). So we blindly assume something was
1055 * found, and let the sysfs magic happend... */
1061 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1062 if (compaq_ioaddr) {
1063 vortex_probe1(NULL, compaq_ioaddr, compaq_irq,
1064 compaq_device_id, vortex_cards_found++);
1067 return vortex_cards_found - orig_cards_found + eisa_found;
1070 /* returns count (>= 0), or negative on error */
1071 static int __devinit vortex_init_one (struct pci_dev *pdev,
1072 const struct pci_device_id *ent)
1076 /* wake up and enable device */
1077 if (pci_enable_device (pdev)) {
1080 rc = vortex_probe1 (&pdev->dev, pci_resource_start (pdev, 0),
1081 pdev->irq, ent->driver_data, vortex_cards_found);
1083 vortex_cards_found++;
1089 * Start up the PCI/EISA device which is described by *gendev.
1090 * Return 0 on success.
1092 * NOTE: pdev can be NULL, for the case of a Compaq device
1094 static int __devinit vortex_probe1(struct device *gendev,
1095 long ioaddr, int irq,
1096 int chip_idx, int card_idx)
1098 struct vortex_private *vp;
1100 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1102 struct net_device *dev;
1103 static int printed_version;
1104 int retval, print_info;
1105 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1106 char *print_name = "3c59x";
1107 struct pci_dev *pdev = NULL;
1108 struct eisa_device *edev = NULL;
1110 if (!printed_version) {
1112 printed_version = 1;
1116 if ((pdev = DEVICE_PCI(gendev))) {
1117 print_name = pci_name(pdev);
1120 if ((edev = DEVICE_EISA(gendev))) {
1121 print_name = edev->dev.bus_id;
1125 dev = alloc_etherdev(sizeof(*vp));
1128 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1131 SET_MODULE_OWNER(dev);
1132 SET_NETDEV_DEV(dev, gendev);
1133 vp = netdev_priv(dev);
1135 option = global_options;
1137 /* The lower four bits are the media type. */
1138 if (dev->mem_start) {
1140 * The 'options' param is passed in as the third arg to the
1141 * LILO 'ether=' argument for non-modular use
1143 option = dev->mem_start;
1145 else if (card_idx < MAX_UNITS) {
1146 if (options[card_idx] >= 0)
1147 option = options[card_idx];
1151 if (option & 0x8000)
1153 if (option & 0x4000)
1155 if (option & 0x0400)
1159 print_info = (vortex_debug > 1);
1161 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1163 printk(KERN_INFO "%s: 3Com %s %s at 0x%lx. Vers " DRV_VERSION "\n",
1165 pdev ? "PCI" : "EISA",
1169 dev->base_addr = ioaddr;
1172 vp->large_frames = mtu > 1500;
1173 vp->drv_flags = vci->drv_flags;
1174 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1175 vp->io_size = vci->io_size;
1176 vp->card_idx = card_idx;
1178 /* module list only for Compaq device */
1179 if (gendev == NULL) {
1180 compaq_net_device = dev;
1183 /* PCI-only startup logic */
1185 /* EISA resources already marked, so only PCI needs to do this here */
1186 /* Ignore return value, because Cardbus drivers already allocate for us */
1187 if (request_region(ioaddr, vci->io_size, print_name) != NULL)
1188 vp->must_free_region = 1;
1190 /* enable bus-mastering if necessary */
1191 if (vci->flags & PCI_USES_MASTER)
1192 pci_set_master (pdev);
1194 if (vci->drv_flags & IS_VORTEX) {
1196 u8 new_latency = 248;
1198 /* Check the PCI latency value. On the 3c590 series the latency timer
1199 must be set to the maximum value to avoid data corruption that occurs
1200 when the timer expires during a transfer. This bug exists the Vortex
1202 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1203 if (pci_latency < new_latency) {
1204 printk(KERN_INFO "%s: Overriding PCI latency"
1205 " timer (CFLT) setting of %d, new value is %d.\n",
1206 print_name, pci_latency, new_latency);
1207 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1212 spin_lock_init(&vp->lock);
1213 spin_lock_init(&vp->mdio_lock);
1214 vp->gendev = gendev;
1216 /* Makes sure rings are at least 16 byte aligned. */
1217 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1218 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1221 if (vp->rx_ring == 0)
1224 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1225 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1227 /* if we are a PCI driver, we store info in pdev->driver_data
1228 * instead of a module list */
1230 pci_set_drvdata(pdev, dev);
1232 eisa_set_drvdata (edev, dev);
1234 vp->media_override = 7;
1236 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1237 if (vp->media_override != 7)
1239 vp->full_duplex = (option & 0x200) ? 1 : 0;
1240 vp->bus_master = (option & 16) ? 1 : 0;
1243 if (global_full_duplex > 0)
1244 vp->full_duplex = 1;
1245 if (global_enable_wol > 0)
1248 if (card_idx < MAX_UNITS) {
1249 if (full_duplex[card_idx] > 0)
1250 vp->full_duplex = 1;
1251 if (flow_ctrl[card_idx] > 0)
1253 if (enable_wol[card_idx] > 0)
1257 vp->force_fd = vp->full_duplex;
1258 vp->options = option;
1259 /* Read the station address from the EEPROM. */
1264 if (vci->drv_flags & EEPROM_8BIT)
1266 else if (vci->drv_flags & EEPROM_OFFSET)
1267 base = EEPROM_Read + 0x30;
1271 for (i = 0; i < 0x40; i++) {
1273 outw(base + i, ioaddr + Wn0EepromCmd);
1274 /* Pause for at least 162 us. for the read to take place. */
1275 for (timer = 10; timer >= 0; timer--) {
1277 if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1280 eeprom[i] = inw(ioaddr + Wn0EepromData);
1283 for (i = 0; i < 0x18; i++)
1284 checksum ^= eeprom[i];
1285 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1286 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1288 checksum ^= eeprom[i++];
1289 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1291 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1292 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1293 for (i = 0; i < 3; i++)
1294 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1296 for (i = 0; i < 6; i++)
1297 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1299 /* Unfortunately an all zero eeprom passes the checksum and this
1300 gets found in the wild in failure cases. Crypto is hard 8) */
1301 if (!is_valid_ether_addr(dev->dev_addr)) {
1303 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n");
1304 goto free_ring; /* With every pack */
1307 for (i = 0; i < 6; i++)
1308 outb(dev->dev_addr[i], ioaddr + i);
1312 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1315 printk(", IRQ %d\n", dev->irq);
1316 /* Tell them about an invalid IRQ. */
1317 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1318 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1323 step = (inb(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1325 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1326 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1327 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1331 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1332 unsigned long fn_st_addr; /* Cardbus function status space */
1335 fn_st_addr = pci_resource_start (pdev, 2);
1337 vp->cb_fn_base = ioremap(fn_st_addr, 128);
1339 if (!vp->cb_fn_base)
1343 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1344 print_name, fn_st_addr, vp->cb_fn_base);
1348 n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1349 if (vp->drv_flags & INVERT_LED_PWR)
1351 if (vp->drv_flags & INVERT_MII_PWR)
1353 outw(n, ioaddr + Wn2_ResetOptions);
1354 if (vp->drv_flags & WNO_XCVR_PWR) {
1356 outw(0x0800, ioaddr);
1360 /* Extract our information from the EEPROM data. */
1361 vp->info1 = eeprom[13];
1362 vp->info2 = eeprom[15];
1363 vp->capabilities = eeprom[16];
1365 if (vp->info1 & 0x8000) {
1366 vp->full_duplex = 1;
1368 printk(KERN_INFO "Full duplex capable\n");
1372 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1373 unsigned int config;
1375 vp->available_media = inw(ioaddr + Wn3_Options);
1376 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1377 vp->available_media = 0x40;
1378 config = inl(ioaddr + Wn3_Config);
1380 printk(KERN_DEBUG " Internal config register is %4.4x, "
1381 "transceivers %#x.\n", config, inw(ioaddr + Wn3_Options));
1382 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1383 8 << RAM_SIZE(config),
1384 RAM_WIDTH(config) ? "word" : "byte",
1385 ram_split[RAM_SPLIT(config)],
1386 AUTOSELECT(config) ? "autoselect/" : "",
1387 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1388 media_tbl[XCVR(config)].name);
1390 vp->default_media = XCVR(config);
1391 if (vp->default_media == XCVR_NWAY)
1393 vp->autoselect = AUTOSELECT(config);
1396 if (vp->media_override != 7) {
1397 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1398 print_name, vp->media_override,
1399 media_tbl[vp->media_override].name);
1400 dev->if_port = vp->media_override;
1402 dev->if_port = vp->default_media;
1404 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1405 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1406 int phy, phy_idx = 0;
1408 mii_preamble_required++;
1409 if (vp->drv_flags & EXTRA_PREAMBLE)
1410 mii_preamble_required++;
1411 mdio_sync(ioaddr, 32);
1412 mdio_read(dev, 24, 1);
1413 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1414 int mii_status, phyx;
1417 * For the 3c905CX we look at index 24 first, because it bogusly
1418 * reports an external PHY at all indices
1426 mii_status = mdio_read(dev, phyx, 1);
1427 if (mii_status && mii_status != 0xffff) {
1428 vp->phys[phy_idx++] = phyx;
1430 printk(KERN_INFO " MII transceiver found at address %d,"
1431 " status %4x.\n", phyx, mii_status);
1433 if ((mii_status & 0x0040) == 0)
1434 mii_preamble_required++;
1437 mii_preamble_required--;
1439 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1442 vp->advertising = mdio_read(dev, vp->phys[0], 4);
1443 if (vp->full_duplex) {
1444 /* Only advertise the FD media types. */
1445 vp->advertising &= ~0x02A0;
1446 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1451 if (vp->capabilities & CapBusMaster) {
1452 vp->full_bus_master_tx = 1;
1454 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1455 (vp->info2 & 1) ? "early" : "whole-frame" );
1457 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1458 vp->bus_master = 0; /* AKPM: vortex only */
1461 /* The 3c59x-specific entries in the device structure. */
1462 dev->open = vortex_open;
1463 if (vp->full_bus_master_tx) {
1464 dev->hard_start_xmit = boomerang_start_xmit;
1465 /* Actually, it still should work with iommu. */
1466 dev->features |= NETIF_F_SG;
1467 if (((hw_checksums[card_idx] == -1) && (vp->drv_flags & HAS_HWCKSM)) ||
1468 (hw_checksums[card_idx] == 1)) {
1469 dev->features |= NETIF_F_IP_CSUM;
1472 dev->hard_start_xmit = vortex_start_xmit;
1476 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1478 (dev->features & NETIF_F_SG) ? "en":"dis",
1479 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1482 dev->stop = vortex_close;
1483 dev->get_stats = vortex_get_stats;
1485 dev->do_ioctl = vortex_ioctl;
1487 dev->ethtool_ops = &vortex_ethtool_ops;
1488 dev->set_multicast_list = set_rx_mode;
1489 dev->tx_timeout = vortex_tx_timeout;
1490 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1491 #ifdef CONFIG_NET_POLL_CONTROLLER
1492 dev->poll_controller = poll_vortex;
1494 if (pdev && vp->enable_wol) {
1495 vp->pm_state_valid = 1;
1496 pci_save_state(VORTEX_PCI(vp));
1499 retval = register_netdev(dev);
1504 pci_free_consistent(pdev,
1505 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1506 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1510 if (vp->must_free_region)
1511 release_region(ioaddr, vci->io_size);
1513 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1519 issue_and_wait(struct net_device *dev, int cmd)
1523 outw(cmd, dev->base_addr + EL3_CMD);
1524 for (i = 0; i < 2000; i++) {
1525 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress))
1529 /* OK, that didn't work. Do it the slow way. One second */
1530 for (i = 0; i < 100000; i++) {
1531 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress)) {
1532 if (vortex_debug > 1)
1533 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1534 dev->name, cmd, i * 10);
1539 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1540 dev->name, cmd, inw(dev->base_addr + EL3_STATUS));
1544 vortex_up(struct net_device *dev)
1546 long ioaddr = dev->base_addr;
1547 struct vortex_private *vp = netdev_priv(dev);
1548 unsigned int config;
1551 if (VORTEX_PCI(vp) && vp->enable_wol) {
1552 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
1553 pci_restore_state(VORTEX_PCI(vp));
1556 /* Before initializing select the active media port. */
1558 config = inl(ioaddr + Wn3_Config);
1560 if (vp->media_override != 7) {
1561 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1562 dev->name, vp->media_override,
1563 media_tbl[vp->media_override].name);
1564 dev->if_port = vp->media_override;
1565 } else if (vp->autoselect) {
1567 if (vortex_debug > 1)
1568 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1569 dev->name, dev->if_port);
1570 dev->if_port = XCVR_NWAY;
1572 /* Find first available media type, starting with 100baseTx. */
1573 dev->if_port = XCVR_100baseTx;
1574 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1575 dev->if_port = media_tbl[dev->if_port].next;
1576 if (vortex_debug > 1)
1577 printk(KERN_INFO "%s: first available media type: %s\n",
1578 dev->name, media_tbl[dev->if_port].name);
1581 dev->if_port = vp->default_media;
1582 if (vortex_debug > 1)
1583 printk(KERN_INFO "%s: using default media %s\n",
1584 dev->name, media_tbl[dev->if_port].name);
1587 init_timer(&vp->timer);
1588 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1589 vp->timer.data = (unsigned long)dev;
1590 vp->timer.function = vortex_timer; /* timer handler */
1591 add_timer(&vp->timer);
1593 init_timer(&vp->rx_oom_timer);
1594 vp->rx_oom_timer.data = (unsigned long)dev;
1595 vp->rx_oom_timer.function = rx_oom_timer;
1597 if (vortex_debug > 1)
1598 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1599 dev->name, media_tbl[dev->if_port].name);
1601 vp->full_duplex = vp->force_fd;
1602 config = BFINS(config, dev->if_port, 20, 4);
1603 if (vortex_debug > 6)
1604 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1605 outl(config, ioaddr + Wn3_Config);
1607 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1608 int mii_reg1, mii_reg5;
1610 /* Read BMSR (reg1) only to clear old status. */
1611 mii_reg1 = mdio_read(dev, vp->phys[0], 1);
1612 mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1613 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1614 netif_carrier_off(dev); /* No MII device or no link partner report */
1616 mii_reg5 &= vp->advertising;
1617 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1618 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1619 vp->full_duplex = 1;
1620 netif_carrier_on(dev);
1622 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1623 if (vortex_debug > 1)
1624 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1625 " info1 %04x, setting %s-duplex.\n",
1626 dev->name, vp->phys[0],
1628 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1632 /* Set the full-duplex bit. */
1633 outw( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1634 (vp->large_frames ? 0x40 : 0) |
1635 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1636 ioaddr + Wn3_MAC_Ctrl);
1638 if (vortex_debug > 1) {
1639 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1643 issue_and_wait(dev, TxReset);
1645 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1647 issue_and_wait(dev, RxReset|0x04);
1649 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1651 if (vortex_debug > 1) {
1653 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1654 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1657 /* Set the station address and mask in window 2 each time opened. */
1659 for (i = 0; i < 6; i++)
1660 outb(dev->dev_addr[i], ioaddr + i);
1661 for (; i < 12; i+=2)
1662 outw(0, ioaddr + i);
1664 if (vp->cb_fn_base) {
1665 unsigned short n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1666 if (vp->drv_flags & INVERT_LED_PWR)
1668 if (vp->drv_flags & INVERT_MII_PWR)
1670 outw(n, ioaddr + Wn2_ResetOptions);
1673 if (dev->if_port == XCVR_10base2)
1674 /* Start the thinnet transceiver. We should really wait 50ms...*/
1675 outw(StartCoax, ioaddr + EL3_CMD);
1676 if (dev->if_port != XCVR_NWAY) {
1678 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1679 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1682 /* Switch to the stats window, and clear all stats by reading. */
1683 outw(StatsDisable, ioaddr + EL3_CMD);
1685 for (i = 0; i < 10; i++)
1689 /* New: On the Vortex we must also clear the BadSSD counter. */
1692 /* ..and on the Boomerang we enable the extra statistics bits. */
1693 outw(0x0040, ioaddr + Wn4_NetDiag);
1695 /* Switch to register set 7 for normal use. */
1698 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1699 vp->cur_rx = vp->dirty_rx = 0;
1700 /* Initialize the RxEarly register as recommended. */
1701 outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1702 outl(0x0020, ioaddr + PktStatus);
1703 outl(vp->rx_ring_dma, ioaddr + UpListPtr);
1705 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1706 vp->cur_tx = vp->dirty_tx = 0;
1707 if (vp->drv_flags & IS_BOOMERANG)
1708 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1709 /* Clear the Rx, Tx rings. */
1710 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1711 vp->rx_ring[i].status = 0;
1712 for (i = 0; i < TX_RING_SIZE; i++)
1713 vp->tx_skbuff[i] = NULL;
1714 outl(0, ioaddr + DownListPtr);
1716 /* Set receiver mode: presumably accept b-case and phys addr only. */
1718 /* enable 802.1q tagged frames */
1719 set_8021q_mode(dev, 1);
1720 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1722 // issue_and_wait(dev, SetTxStart|0x07ff);
1723 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1724 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1725 /* Allow status bits to be seen. */
1726 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1727 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1728 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1729 (vp->bus_master ? DMADone : 0);
1730 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1731 (vp->full_bus_master_rx ? 0 : RxComplete) |
1732 StatsFull | HostError | TxComplete | IntReq
1733 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1734 outw(vp->status_enable, ioaddr + EL3_CMD);
1735 /* Ack all pending events, and set active indicator mask. */
1736 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1738 outw(vp->intr_enable, ioaddr + EL3_CMD);
1739 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1740 writel(0x8000, vp->cb_fn_base + 4);
1741 netif_start_queue (dev);
1745 vortex_open(struct net_device *dev)
1747 struct vortex_private *vp = netdev_priv(dev);
1751 /* Use the now-standard shared IRQ implementation. */
1752 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1753 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1754 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1758 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1759 if (vortex_debug > 2)
1760 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1761 for (i = 0; i < RX_RING_SIZE; i++) {
1762 struct sk_buff *skb;
1763 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1764 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1765 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1766 skb = dev_alloc_skb(PKT_BUF_SZ);
1767 vp->rx_skbuff[i] = skb;
1769 break; /* Bad news! */
1770 skb->dev = dev; /* Mark as being used by this device. */
1771 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1772 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1774 if (i != RX_RING_SIZE) {
1776 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1777 for (j = 0; j < i; j++) {
1778 if (vp->rx_skbuff[j]) {
1779 dev_kfree_skb(vp->rx_skbuff[j]);
1780 vp->rx_skbuff[j] = NULL;
1786 /* Wrap the ring. */
1787 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1794 free_irq(dev->irq, dev);
1796 if (vortex_debug > 1)
1797 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1802 vortex_timer(unsigned long data)
1804 struct net_device *dev = (struct net_device *)data;
1805 struct vortex_private *vp = netdev_priv(dev);
1806 long ioaddr = dev->base_addr;
1807 int next_tick = 10*HZ;
1809 int media_status, mii_status, old_window;
1811 if (vortex_debug > 2) {
1812 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1813 dev->name, media_tbl[dev->if_port].name);
1814 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1818 goto leave_media_alone;
1819 disable_irq(dev->irq);
1820 old_window = inw(ioaddr + EL3_CMD) >> 13;
1822 media_status = inw(ioaddr + Wn4_Media);
1823 switch (dev->if_port) {
1824 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1825 if (media_status & Media_LnkBeat) {
1826 netif_carrier_on(dev);
1828 if (vortex_debug > 1)
1829 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1830 dev->name, media_tbl[dev->if_port].name, media_status);
1832 netif_carrier_off(dev);
1833 if (vortex_debug > 1) {
1834 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1835 dev->name, media_tbl[dev->if_port].name, media_status);
1839 case XCVR_MII: case XCVR_NWAY:
1841 mii_status = mdio_read(dev, vp->phys[0], 1);
1843 if (vortex_debug > 2)
1844 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1845 dev->name, mii_status);
1846 if (mii_status & BMSR_LSTATUS) {
1847 int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1848 if (! vp->force_fd && mii_reg5 != 0xffff) {
1851 mii_reg5 &= vp->advertising;
1852 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1853 if (vp->full_duplex != duplex) {
1854 vp->full_duplex = duplex;
1855 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1856 "#%d link partner capability of %4.4x.\n",
1857 dev->name, vp->full_duplex ? "full" : "half",
1858 vp->phys[0], mii_reg5);
1859 /* Set the full-duplex bit. */
1861 outw( (vp->full_duplex ? 0x20 : 0) |
1862 (vp->large_frames ? 0x40 : 0) |
1863 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1864 ioaddr + Wn3_MAC_Ctrl);
1865 if (vortex_debug > 1)
1866 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1867 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1870 netif_carrier_on(dev);
1872 netif_carrier_off(dev);
1876 default: /* Other media types handled by Tx timeouts. */
1877 if (vortex_debug > 1)
1878 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1879 dev->name, media_tbl[dev->if_port].name, media_status);
1883 unsigned int config;
1886 dev->if_port = media_tbl[dev->if_port].next;
1887 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1888 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1889 dev->if_port = vp->default_media;
1890 if (vortex_debug > 1)
1891 printk(KERN_DEBUG "%s: Media selection failing, using default "
1893 dev->name, media_tbl[dev->if_port].name);
1895 if (vortex_debug > 1)
1896 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1898 dev->name, media_tbl[dev->if_port].name);
1899 next_tick = media_tbl[dev->if_port].wait;
1901 outw((media_status & ~(Media_10TP|Media_SQE)) |
1902 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1905 config = inl(ioaddr + Wn3_Config);
1906 config = BFINS(config, dev->if_port, 20, 4);
1907 outl(config, ioaddr + Wn3_Config);
1909 outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1911 if (vortex_debug > 1)
1912 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1913 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1915 EL3WINDOW(old_window);
1916 enable_irq(dev->irq);
1919 if (vortex_debug > 2)
1920 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1921 dev->name, media_tbl[dev->if_port].name);
1923 mod_timer(&vp->timer, RUN_AT(next_tick));
1925 outw(FakeIntr, ioaddr + EL3_CMD);
1929 static void vortex_tx_timeout(struct net_device *dev)
1931 struct vortex_private *vp = netdev_priv(dev);
1932 long ioaddr = dev->base_addr;
1934 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1935 dev->name, inb(ioaddr + TxStatus),
1936 inw(ioaddr + EL3_STATUS));
1938 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1939 inw(ioaddr + Wn4_NetDiag),
1940 inw(ioaddr + Wn4_Media),
1941 inl(ioaddr + PktStatus),
1942 inw(ioaddr + Wn4_FIFODiag));
1943 /* Slight code bloat to be user friendly. */
1944 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
1945 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1946 " network cable problem?\n", dev->name);
1947 if (inw(ioaddr + EL3_STATUS) & IntLatch) {
1948 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1949 " IRQ blocked by another device?\n", dev->name);
1950 /* Bad idea here.. but we might as well handle a few events. */
1953 * Block interrupts because vortex_interrupt does a bare spin_lock()
1955 unsigned long flags;
1956 local_irq_save(flags);
1957 if (vp->full_bus_master_tx)
1958 boomerang_interrupt(dev->irq, dev, NULL);
1960 vortex_interrupt(dev->irq, dev, NULL);
1961 local_irq_restore(flags);
1965 if (vortex_debug > 0)
1968 issue_and_wait(dev, TxReset);
1970 vp->stats.tx_errors++;
1971 if (vp->full_bus_master_tx) {
1972 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1973 if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1974 outl(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1975 ioaddr + DownListPtr);
1976 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
1977 netif_wake_queue (dev);
1978 if (vp->drv_flags & IS_BOOMERANG)
1979 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1980 outw(DownUnstall, ioaddr + EL3_CMD);
1982 vp->stats.tx_dropped++;
1983 netif_wake_queue(dev);
1986 /* Issue Tx Enable */
1987 outw(TxEnable, ioaddr + EL3_CMD);
1988 dev->trans_start = jiffies;
1990 /* Switch to register set 7 for normal use. */
1995 * Handle uncommon interrupt sources. This is a separate routine to minimize
1999 vortex_error(struct net_device *dev, int status)
2001 struct vortex_private *vp = netdev_priv(dev);
2002 long ioaddr = dev->base_addr;
2003 int do_tx_reset = 0, reset_mask = 0;
2004 unsigned char tx_status = 0;
2006 if (vortex_debug > 2) {
2007 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
2010 if (status & TxComplete) { /* Really "TxError" for us. */
2011 tx_status = inb(ioaddr + TxStatus);
2012 /* Presumably a tx-timeout. We must merely re-enable. */
2013 if (vortex_debug > 2
2014 || (tx_status != 0x88 && vortex_debug > 0)) {
2015 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2016 dev->name, tx_status);
2017 if (tx_status == 0x82) {
2018 printk(KERN_ERR "Probably a duplex mismatch. See "
2019 "Documentation/networking/vortex.txt\n");
2023 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2024 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2025 outb(0, ioaddr + TxStatus);
2026 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2028 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2030 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2031 } else { /* Merely re-enable the transmitter. */
2032 outw(TxEnable, ioaddr + EL3_CMD);
2036 if (status & RxEarly) { /* Rx early is unused. */
2038 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
2040 if (status & StatsFull) { /* Empty statistics. */
2041 static int DoneDidThat;
2042 if (vortex_debug > 4)
2043 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2044 update_stats(ioaddr, dev);
2045 /* HACK: Disable statistics as an interrupt source. */
2046 /* This occurs when we have the wrong media type! */
2047 if (DoneDidThat == 0 &&
2048 inw(ioaddr + EL3_STATUS) & StatsFull) {
2049 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2050 "stats as an interrupt source.\n", dev->name);
2052 outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2053 vp->intr_enable &= ~StatsFull;
2058 if (status & IntReq) { /* Restore all interrupt sources. */
2059 outw(vp->status_enable, ioaddr + EL3_CMD);
2060 outw(vp->intr_enable, ioaddr + EL3_CMD);
2062 if (status & HostError) {
2065 fifo_diag = inw(ioaddr + Wn4_FIFODiag);
2066 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2067 dev->name, fifo_diag);
2068 /* Adapter failure requires Tx/Rx reset and reinit. */
2069 if (vp->full_bus_master_tx) {
2070 int bus_status = inl(ioaddr + PktStatus);
2071 /* 0x80000000 PCI master abort. */
2072 /* 0x40000000 PCI target abort. */
2074 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2076 /* In this case, blow the card away */
2077 /* Must not enter D3 or we can't legally issue the reset! */
2078 vortex_down(dev, 0);
2079 issue_and_wait(dev, TotalReset | 0xff);
2080 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2081 } else if (fifo_diag & 0x0400)
2083 if (fifo_diag & 0x3000) {
2084 /* Reset Rx fifo and upload logic */
2085 issue_and_wait(dev, RxReset|0x07);
2086 /* Set the Rx filter to the current state. */
2088 /* enable 802.1q VLAN tagged frames */
2089 set_8021q_mode(dev, 1);
2090 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2091 outw(AckIntr | HostError, ioaddr + EL3_CMD);
2096 issue_and_wait(dev, TxReset|reset_mask);
2097 outw(TxEnable, ioaddr + EL3_CMD);
2098 if (!vp->full_bus_master_tx)
2099 netif_wake_queue(dev);
2104 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2106 struct vortex_private *vp = netdev_priv(dev);
2107 long ioaddr = dev->base_addr;
2109 /* Put out the doubleword header... */
2110 outl(skb->len, ioaddr + TX_FIFO);
2111 if (vp->bus_master) {
2112 /* Set the bus-master controller to transfer the packet. */
2113 int len = (skb->len + 3) & ~3;
2114 outl( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2115 ioaddr + Wn7_MasterAddr);
2116 outw(len, ioaddr + Wn7_MasterLen);
2118 outw(StartDMADown, ioaddr + EL3_CMD);
2119 /* netif_wake_queue() will be called at the DMADone interrupt. */
2121 /* ... and the packet rounded to a doubleword. */
2122 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2123 dev_kfree_skb (skb);
2124 if (inw(ioaddr + TxFree) > 1536) {
2125 netif_start_queue (dev); /* AKPM: redundant? */
2127 /* Interrupt us when the FIFO has room for max-sized packet. */
2128 netif_stop_queue(dev);
2129 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2133 dev->trans_start = jiffies;
2135 /* Clear the Tx status stack. */
2140 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
2141 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2142 if (vortex_debug > 2)
2143 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2144 dev->name, tx_status);
2145 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2146 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2147 if (tx_status & 0x30) {
2148 issue_and_wait(dev, TxReset);
2150 outw(TxEnable, ioaddr + EL3_CMD);
2152 outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2159 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2161 struct vortex_private *vp = netdev_priv(dev);
2162 long ioaddr = dev->base_addr;
2163 /* Calculate the next Tx descriptor entry. */
2164 int entry = vp->cur_tx % TX_RING_SIZE;
2165 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2166 unsigned long flags;
2168 if (vortex_debug > 6) {
2169 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2170 if (vortex_debug > 3)
2171 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2172 dev->name, vp->cur_tx);
2175 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2176 if (vortex_debug > 0)
2177 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2179 netif_stop_queue(dev);
2183 vp->tx_skbuff[entry] = skb;
2185 vp->tx_ring[entry].next = 0;
2187 if (skb->ip_summed != CHECKSUM_HW)
2188 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2190 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2192 if (!skb_shinfo(skb)->nr_frags) {
2193 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2194 skb->len, PCI_DMA_TODEVICE));
2195 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2199 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2200 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2201 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2203 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2204 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2206 vp->tx_ring[entry].frag[i+1].addr =
2207 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2208 (void*)page_address(frag->page) + frag->page_offset,
2209 frag->size, PCI_DMA_TODEVICE));
2211 if (i == skb_shinfo(skb)->nr_frags-1)
2212 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2214 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2218 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2219 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2220 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2223 spin_lock_irqsave(&vp->lock, flags);
2224 /* Wait for the stall to complete. */
2225 issue_and_wait(dev, DownStall);
2226 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2227 if (inl(ioaddr + DownListPtr) == 0) {
2228 outl(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2229 vp->queued_packet++;
2233 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2234 netif_stop_queue (dev);
2235 } else { /* Clear previous interrupt enable. */
2236 #if defined(tx_interrupt_mitigation)
2237 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2238 * were selected, this would corrupt DN_COMPLETE. No?
2240 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2243 outw(DownUnstall, ioaddr + EL3_CMD);
2244 spin_unlock_irqrestore(&vp->lock, flags);
2245 dev->trans_start = jiffies;
2249 /* The interrupt handler does all of the Rx thread work and cleans up
2250 after the Tx thread. */
2253 * This is the ISR for the vortex series chips.
2254 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2258 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2260 struct net_device *dev = dev_id;
2261 struct vortex_private *vp = netdev_priv(dev);
2264 int work_done = max_interrupt_work;
2267 ioaddr = dev->base_addr;
2268 spin_lock(&vp->lock);
2270 status = inw(ioaddr + EL3_STATUS);
2272 if (vortex_debug > 6)
2273 printk("vortex_interrupt(). status=0x%4x\n", status);
2275 if ((status & IntLatch) == 0)
2276 goto handler_exit; /* No interrupt: shared IRQs cause this */
2279 if (status & IntReq) {
2280 status |= vp->deferred;
2284 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2287 if (vortex_debug > 4)
2288 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2289 dev->name, status, inb(ioaddr + Timer));
2292 if (vortex_debug > 5)
2293 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2295 if (status & RxComplete)
2298 if (status & TxAvailable) {
2299 if (vortex_debug > 5)
2300 printk(KERN_DEBUG " TX room bit was handled.\n");
2301 /* There's room in the FIFO for a full-sized packet. */
2302 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2303 netif_wake_queue (dev);
2306 if (status & DMADone) {
2307 if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
2308 outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2309 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2310 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2311 if (inw(ioaddr + TxFree) > 1536) {
2313 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2314 * insufficient FIFO room, the TxAvailable test will succeed and call
2315 * netif_wake_queue()
2317 netif_wake_queue(dev);
2318 } else { /* Interrupt when FIFO has room for max-sized packet. */
2319 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2320 netif_stop_queue(dev);
2324 /* Check for all uncommon interrupts at once. */
2325 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2326 if (status == 0xffff)
2328 vortex_error(dev, status);
2331 if (--work_done < 0) {
2332 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2333 "%4.4x.\n", dev->name, status);
2334 /* Disable all pending interrupts. */
2336 vp->deferred |= status;
2337 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2339 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2340 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2341 /* The timer will reenable interrupts. */
2342 mod_timer(&vp->timer, jiffies + 1*HZ);
2345 /* Acknowledge the IRQ. */
2346 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2347 } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2349 if (vortex_debug > 4)
2350 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2353 spin_unlock(&vp->lock);
2354 return IRQ_RETVAL(handled);
2358 * This is the ISR for the boomerang series chips.
2359 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2363 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2365 struct net_device *dev = dev_id;
2366 struct vortex_private *vp = netdev_priv(dev);
2369 int work_done = max_interrupt_work;
2371 ioaddr = dev->base_addr;
2374 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2375 * and boomerang_start_xmit
2377 spin_lock(&vp->lock);
2379 status = inw(ioaddr + EL3_STATUS);
2381 if (vortex_debug > 6)
2382 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2384 if ((status & IntLatch) == 0)
2385 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2387 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2388 if (vortex_debug > 1)
2389 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2393 if (status & IntReq) {
2394 status |= vp->deferred;
2398 if (vortex_debug > 4)
2399 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2400 dev->name, status, inb(ioaddr + Timer));
2402 if (vortex_debug > 5)
2403 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2405 if (status & UpComplete) {
2406 outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
2407 if (vortex_debug > 5)
2408 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2412 if (status & DownComplete) {
2413 unsigned int dirty_tx = vp->dirty_tx;
2415 outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
2416 while (vp->cur_tx - dirty_tx > 0) {
2417 int entry = dirty_tx % TX_RING_SIZE;
2418 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2419 if (inl(ioaddr + DownListPtr) ==
2420 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2421 break; /* It still hasn't been processed. */
2423 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2424 break; /* It still hasn't been processed. */
2427 if (vp->tx_skbuff[entry]) {
2428 struct sk_buff *skb = vp->tx_skbuff[entry];
2431 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2432 pci_unmap_single(VORTEX_PCI(vp),
2433 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2434 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2437 pci_unmap_single(VORTEX_PCI(vp),
2438 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2440 dev_kfree_skb_irq(skb);
2441 vp->tx_skbuff[entry] = NULL;
2443 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2445 /* vp->stats.tx_packets++; Counted below. */
2448 vp->dirty_tx = dirty_tx;
2449 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2450 if (vortex_debug > 6)
2451 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2452 netif_wake_queue (dev);
2456 /* Check for all uncommon interrupts at once. */
2457 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2458 vortex_error(dev, status);
2460 if (--work_done < 0) {
2461 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2462 "%4.4x.\n", dev->name, status);
2463 /* Disable all pending interrupts. */
2465 vp->deferred |= status;
2466 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2468 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2469 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2470 /* The timer will reenable interrupts. */
2471 mod_timer(&vp->timer, jiffies + 1*HZ);
2474 /* Acknowledge the IRQ. */
2475 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2476 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2477 writel(0x8000, vp->cb_fn_base + 4);
2479 } while ((status = inw(ioaddr + EL3_STATUS)) & IntLatch);
2481 if (vortex_debug > 4)
2482 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2485 spin_unlock(&vp->lock);
2489 static int vortex_rx(struct net_device *dev)
2491 struct vortex_private *vp = netdev_priv(dev);
2492 long ioaddr = dev->base_addr;
2496 if (vortex_debug > 5)
2497 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2498 inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
2499 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
2500 if (rx_status & 0x4000) { /* Error, update stats. */
2501 unsigned char rx_error = inb(ioaddr + RxErrors);
2502 if (vortex_debug > 2)
2503 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2504 vp->stats.rx_errors++;
2505 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2506 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2507 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2508 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2509 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2511 /* The packet length: up to 4.5K!. */
2512 int pkt_len = rx_status & 0x1fff;
2513 struct sk_buff *skb;
2515 skb = dev_alloc_skb(pkt_len + 5);
2516 if (vortex_debug > 4)
2517 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2518 pkt_len, rx_status);
2521 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2522 /* 'skb_put()' points to the start of sk_buff data area. */
2523 if (vp->bus_master &&
2524 ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2525 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2526 pkt_len, PCI_DMA_FROMDEVICE);
2527 outl(dma, ioaddr + Wn7_MasterAddr);
2528 outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2529 outw(StartDMAUp, ioaddr + EL3_CMD);
2530 while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2532 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2534 insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2535 (pkt_len + 3) >> 2);
2537 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2538 skb->protocol = eth_type_trans(skb, dev);
2540 dev->last_rx = jiffies;
2541 vp->stats.rx_packets++;
2542 /* Wait a limited time to go to next packet. */
2543 for (i = 200; i >= 0; i--)
2544 if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2547 } else if (vortex_debug > 0)
2548 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2549 "size %d.\n", dev->name, pkt_len);
2551 vp->stats.rx_dropped++;
2552 issue_and_wait(dev, RxDiscard);
2559 boomerang_rx(struct net_device *dev)
2561 struct vortex_private *vp = netdev_priv(dev);
2562 int entry = vp->cur_rx % RX_RING_SIZE;
2563 long ioaddr = dev->base_addr;
2565 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2567 if (vortex_debug > 5)
2568 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", inw(ioaddr+EL3_STATUS));
2570 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2571 if (--rx_work_limit < 0)
2573 if (rx_status & RxDError) { /* Error, update stats. */
2574 unsigned char rx_error = rx_status >> 16;
2575 if (vortex_debug > 2)
2576 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2577 vp->stats.rx_errors++;
2578 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2579 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2580 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2581 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2582 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2584 /* The packet length: up to 4.5K!. */
2585 int pkt_len = rx_status & 0x1fff;
2586 struct sk_buff *skb;
2587 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2589 if (vortex_debug > 4)
2590 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2591 pkt_len, rx_status);
2593 /* Check if the packet is long enough to just accept without
2594 copying to a properly sized skbuff. */
2595 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2597 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2598 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2599 /* 'skb_put()' points to the start of sk_buff data area. */
2600 memcpy(skb_put(skb, pkt_len),
2601 vp->rx_skbuff[entry]->tail,
2603 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2606 /* Pass up the skbuff already on the Rx ring. */
2607 skb = vp->rx_skbuff[entry];
2608 vp->rx_skbuff[entry] = NULL;
2609 skb_put(skb, pkt_len);
2610 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2613 skb->protocol = eth_type_trans(skb, dev);
2614 { /* Use hardware checksum info. */
2615 int csum_bits = rx_status & 0xee000000;
2617 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2618 csum_bits == (IPChksumValid | UDPChksumValid))) {
2619 skb->ip_summed = CHECKSUM_UNNECESSARY;
2624 dev->last_rx = jiffies;
2625 vp->stats.rx_packets++;
2627 entry = (++vp->cur_rx) % RX_RING_SIZE;
2629 /* Refill the Rx ring buffers. */
2630 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2631 struct sk_buff *skb;
2632 entry = vp->dirty_rx % RX_RING_SIZE;
2633 if (vp->rx_skbuff[entry] == NULL) {
2634 skb = dev_alloc_skb(PKT_BUF_SZ);
2636 static unsigned long last_jif;
2637 if ((jiffies - last_jif) > 10 * HZ) {
2638 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2641 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2642 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2643 break; /* Bad news! */
2645 skb->dev = dev; /* Mark as being used by this device. */
2646 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2647 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2648 vp->rx_skbuff[entry] = skb;
2650 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2651 outw(UpUnstall, ioaddr + EL3_CMD);
2657 * If we've hit a total OOM refilling the Rx ring we poll once a second
2658 * for some memory. Otherwise there is no way to restart the rx process.
2661 rx_oom_timer(unsigned long arg)
2663 struct net_device *dev = (struct net_device *)arg;
2664 struct vortex_private *vp = netdev_priv(dev);
2666 spin_lock_irq(&vp->lock);
2667 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2669 if (vortex_debug > 1) {
2670 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2671 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2673 spin_unlock_irq(&vp->lock);
2677 vortex_down(struct net_device *dev, int final_down)
2679 struct vortex_private *vp = netdev_priv(dev);
2680 long ioaddr = dev->base_addr;
2682 netif_stop_queue (dev);
2684 del_timer_sync(&vp->rx_oom_timer);
2685 del_timer_sync(&vp->timer);
2687 /* Turn off statistics ASAP. We update vp->stats below. */
2688 outw(StatsDisable, ioaddr + EL3_CMD);
2690 /* Disable the receiver and transmitter. */
2691 outw(RxDisable, ioaddr + EL3_CMD);
2692 outw(TxDisable, ioaddr + EL3_CMD);
2694 /* Disable receiving 802.1q tagged frames */
2695 set_8021q_mode(dev, 0);
2697 if (dev->if_port == XCVR_10base2)
2698 /* Turn off thinnet power. Green! */
2699 outw(StopCoax, ioaddr + EL3_CMD);
2701 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2703 update_stats(ioaddr, dev);
2704 if (vp->full_bus_master_rx)
2705 outl(0, ioaddr + UpListPtr);
2706 if (vp->full_bus_master_tx)
2707 outl(0, ioaddr + DownListPtr);
2709 if (final_down && VORTEX_PCI(vp) && vp->enable_wol) {
2710 pci_save_state(VORTEX_PCI(vp));
2716 vortex_close(struct net_device *dev)
2718 struct vortex_private *vp = netdev_priv(dev);
2719 long ioaddr = dev->base_addr;
2722 if (netif_device_present(dev))
2723 vortex_down(dev, 1);
2725 if (vortex_debug > 1) {
2726 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2727 dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
2728 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2729 " tx_queued %d Rx pre-checksummed %d.\n",
2730 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2734 if ( vp->rx_csumhits &&
2735 ((vp->drv_flags & HAS_HWCKSM) == 0) &&
2736 (hw_checksums[vp->card_idx] == -1)) {
2737 printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
2741 free_irq(dev->irq, dev);
2743 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2744 for (i = 0; i < RX_RING_SIZE; i++)
2745 if (vp->rx_skbuff[i]) {
2746 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2747 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2748 dev_kfree_skb(vp->rx_skbuff[i]);
2749 vp->rx_skbuff[i] = NULL;
2752 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2753 for (i = 0; i < TX_RING_SIZE; i++) {
2754 if (vp->tx_skbuff[i]) {
2755 struct sk_buff *skb = vp->tx_skbuff[i];
2759 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2760 pci_unmap_single(VORTEX_PCI(vp),
2761 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2762 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2765 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2768 vp->tx_skbuff[i] = NULL;
2777 dump_tx_ring(struct net_device *dev)
2779 if (vortex_debug > 0) {
2780 struct vortex_private *vp = netdev_priv(dev);
2781 long ioaddr = dev->base_addr;
2783 if (vp->full_bus_master_tx) {
2785 int stalled = inl(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2787 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2788 vp->full_bus_master_tx,
2789 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2790 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2791 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2792 inl(ioaddr + DownListPtr),
2793 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2794 issue_and_wait(dev, DownStall);
2795 for (i = 0; i < TX_RING_SIZE; i++) {
2796 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2799 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2801 le32_to_cpu(vp->tx_ring[i].length),
2803 le32_to_cpu(vp->tx_ring[i].status));
2806 outw(DownUnstall, ioaddr + EL3_CMD);
2811 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2813 struct vortex_private *vp = netdev_priv(dev);
2814 unsigned long flags;
2816 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2817 spin_lock_irqsave (&vp->lock, flags);
2818 update_stats(dev->base_addr, dev);
2819 spin_unlock_irqrestore (&vp->lock, flags);
2824 /* Update statistics.
2825 Unlike with the EL3 we need not worry about interrupts changing
2826 the window setting from underneath us, but we must still guard
2827 against a race condition with a StatsUpdate interrupt updating the
2828 table. This is done by checking that the ASM (!) code generated uses
2829 atomic updates with '+='.
2831 static void update_stats(long ioaddr, struct net_device *dev)
2833 struct vortex_private *vp = netdev_priv(dev);
2834 int old_window = inw(ioaddr + EL3_CMD);
2836 if (old_window == 0xffff) /* Chip suspended or ejected. */
2838 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2839 /* Switch to the stats window, and read everything. */
2841 vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2842 vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2843 /* Multiple collisions. */ inb(ioaddr + 2);
2844 vp->stats.collisions += inb(ioaddr + 3);
2845 vp->stats.tx_window_errors += inb(ioaddr + 4);
2846 vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2847 vp->stats.tx_packets += inb(ioaddr + 6);
2848 vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2849 /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2850 /* Tx deferrals */ inb(ioaddr + 8);
2851 /* Don't bother with register 9, an extension of registers 6&7.
2852 If we do use the 6&7 values the atomic update assumption above
2854 vp->stats.rx_bytes += inw(ioaddr + 10);
2855 vp->stats.tx_bytes += inw(ioaddr + 12);
2856 /* New: On the Vortex we must also clear the BadSSD counter. */
2861 u8 up = inb(ioaddr + 13);
2862 vp->stats.rx_bytes += (up & 0x0f) << 16;
2863 vp->stats.tx_bytes += (up & 0xf0) << 12;
2866 EL3WINDOW(old_window >> 13);
2871 static void vortex_get_drvinfo(struct net_device *dev,
2872 struct ethtool_drvinfo *info)
2874 struct vortex_private *vp = netdev_priv(dev);
2876 strcpy(info->driver, DRV_NAME);
2877 strcpy(info->version, DRV_VERSION);
2878 if (VORTEX_PCI(vp)) {
2879 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
2881 if (VORTEX_EISA(vp))
2882 sprintf(info->bus_info, vp->gendev->bus_id);
2884 sprintf(info->bus_info, "EISA 0x%lx %d",
2885 dev->base_addr, dev->irq);
2889 static struct ethtool_ops vortex_ethtool_ops = {
2890 .get_drvinfo = vortex_get_drvinfo,
2894 static int vortex_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2896 struct vortex_private *vp = netdev_priv(dev);
2897 long ioaddr = dev->base_addr;
2898 struct mii_ioctl_data *data = if_mii(rq);
2899 int phy = vp->phys[0] & 0x1f;
2903 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2906 case SIOCGMIIREG: /* Read MII PHY register. */
2908 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2912 case SIOCSMIIREG: /* Write MII PHY register. */
2913 if (!capable(CAP_NET_ADMIN)) {
2917 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2922 retval = -EOPNOTSUPP;
2930 * Must power the device up to do MDIO operations
2932 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2935 struct vortex_private *vp = netdev_priv(dev);
2939 state = VORTEX_PCI(vp)->current_state;
2941 /* The kernel core really should have pci_get_power_state() */
2944 pci_set_power_state(VORTEX_PCI(vp), 0);
2945 err = vortex_do_ioctl(dev, rq, cmd);
2947 pci_set_power_state(VORTEX_PCI(vp), state);
2954 /* Pre-Cyclone chips have no documented multicast filter, so the only
2955 multicast setting is to receive all multicast frames. At least
2956 the chip has a very clean way to set the mode, unlike many others. */
2957 static void set_rx_mode(struct net_device *dev)
2959 long ioaddr = dev->base_addr;
2962 if (dev->flags & IFF_PROMISC) {
2963 if (vortex_debug > 0)
2964 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
2965 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2966 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2967 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2969 new_mode = SetRxFilter | RxStation | RxBroadcast;
2971 outw(new_mode, ioaddr + EL3_CMD);
2974 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
2975 /* Setup the card so that it can receive frames with an 802.1q VLAN tag.
2976 Note that this must be done after each RxReset due to some backwards
2977 compatibility logic in the Cyclone and Tornado ASICs */
2979 /* The Ethernet Type used for 802.1q tagged frames */
2980 #define VLAN_ETHER_TYPE 0x8100
2982 static void set_8021q_mode(struct net_device *dev, int enable)
2984 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2985 long ioaddr = dev->base_addr;
2986 int old_window = inw(ioaddr + EL3_CMD);
2989 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) {
2990 /* cyclone and tornado chipsets can recognize 802.1q
2991 * tagged frames and treat them correctly */
2993 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */
2995 max_pkt_size += 4; /* 802.1Q VLAN tag */
2998 outw(max_pkt_size, ioaddr+Wn3_MaxPktSize);
3000 /* set VlanEtherType to let the hardware checksumming
3001 treat tagged frames correctly */
3003 outw(VLAN_ETHER_TYPE, ioaddr+Wn7_VlanEtherType);
3005 /* on older cards we have to enable large frames */
3007 vp->large_frames = dev->mtu > 1500 || enable;
3010 mac_ctrl = inw(ioaddr+Wn3_MAC_Ctrl);
3011 if (vp->large_frames)
3015 outw(mac_ctrl, ioaddr+Wn3_MAC_Ctrl);
3018 EL3WINDOW(old_window);
3022 static void set_8021q_mode(struct net_device *dev, int enable)
3029 /* MII transceiver control section.
3030 Read and write the MII registers using software-generated serial
3031 MDIO protocol. See the MII specifications or DP83840A data sheet
3034 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
3035 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3036 "overclocking" issues. */
3037 #define mdio_delay() inl(mdio_addr)
3039 #define MDIO_SHIFT_CLK 0x01
3040 #define MDIO_DIR_WRITE 0x04
3041 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
3042 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
3043 #define MDIO_DATA_READ 0x02
3044 #define MDIO_ENB_IN 0x00
3046 /* Generate the preamble required for initial synchronization and
3047 a few older transceivers. */
3048 static void mdio_sync(long ioaddr, int bits)
3050 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3052 /* Establish sync by sending at least 32 logic ones. */
3053 while (-- bits >= 0) {
3054 outw(MDIO_DATA_WRITE1, mdio_addr);
3056 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
3061 static int mdio_read(struct net_device *dev, int phy_id, int location)
3063 struct vortex_private *vp = netdev_priv(dev);
3065 long ioaddr = dev->base_addr;
3066 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
3067 unsigned int retval = 0;
3068 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3070 spin_lock_bh(&vp->mdio_lock);
3072 if (mii_preamble_required)
3073 mdio_sync(ioaddr, 32);
3075 /* Shift the read command bits out. */
3076 for (i = 14; i >= 0; i--) {
3077 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3078 outw(dataval, mdio_addr);
3080 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3083 /* Read the two transition, 16 data, and wire-idle bits. */
3084 for (i = 19; i > 0; i--) {
3085 outw(MDIO_ENB_IN, mdio_addr);
3087 retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
3088 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3091 spin_unlock_bh(&vp->mdio_lock);
3092 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
3095 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
3097 struct vortex_private *vp = netdev_priv(dev);
3098 long ioaddr = dev->base_addr;
3099 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
3100 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3103 spin_lock_bh(&vp->mdio_lock);
3105 if (mii_preamble_required)
3106 mdio_sync(ioaddr, 32);
3108 /* Shift the command bits out. */
3109 for (i = 31; i >= 0; i--) {
3110 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3111 outw(dataval, mdio_addr);
3113 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3116 /* Leave the interface idle. */
3117 for (i = 1; i >= 0; i--) {
3118 outw(MDIO_ENB_IN, mdio_addr);
3120 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3123 spin_unlock_bh(&vp->mdio_lock);
3127 /* ACPI: Advanced Configuration and Power Interface. */
3128 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3129 static void acpi_set_WOL(struct net_device *dev)
3131 struct vortex_private *vp = netdev_priv(dev);
3132 long ioaddr = dev->base_addr;
3134 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3136 outw(2, ioaddr + 0x0c);
3137 /* The RxFilter must accept the WOL frames. */
3138 outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3139 outw(RxEnable, ioaddr + EL3_CMD);
3141 /* Change the power state to D3; RxEnable doesn't take effect. */
3142 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3143 pci_set_power_state(VORTEX_PCI(vp), 3);
3147 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3149 struct net_device *dev = pci_get_drvdata(pdev);
3150 struct vortex_private *vp;
3153 printk("vortex_remove_one called for Compaq device!\n");
3157 vp = netdev_priv(dev);
3159 /* AKPM: FIXME: we should have
3160 * if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
3163 unregister_netdev(dev);
3165 if (VORTEX_PCI(vp) && vp->enable_wol) {
3166 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
3167 if (vp->pm_state_valid)
3168 pci_restore_state(VORTEX_PCI(vp));
3170 /* Should really use issue_and_wait() here */
3171 outw(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14),
3172 dev->base_addr + EL3_CMD);
3174 pci_free_consistent(pdev,
3175 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3176 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3179 if (vp->must_free_region)
3180 release_region(dev->base_addr, vp->io_size);
3185 static struct pci_driver vortex_driver = {
3187 .probe = vortex_init_one,
3188 .remove = __devexit_p(vortex_remove_one),
3189 .id_table = vortex_pci_tbl,
3191 .suspend = vortex_suspend,
3192 .resume = vortex_resume,
3197 static int vortex_have_pci;
3198 static int vortex_have_eisa;
3201 static int __init vortex_init (void)
3203 int pci_rc, eisa_rc;
3205 pci_rc = pci_module_init(&vortex_driver);
3206 eisa_rc = vortex_eisa_init();
3209 vortex_have_pci = 1;
3211 vortex_have_eisa = 1;
3213 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3217 static void __exit vortex_eisa_cleanup (void)
3219 struct vortex_private *vp;
3223 /* Take care of the EISA devices */
3224 eisa_driver_unregister (&vortex_eisa_driver);
3227 if (compaq_net_device) {
3228 vp = compaq_net_device->priv;
3229 ioaddr = compaq_net_device->base_addr;
3231 unregister_netdev (compaq_net_device);
3232 outw (TotalReset, ioaddr + EL3_CMD);
3233 release_region (ioaddr, VORTEX_TOTAL_SIZE);
3235 free_netdev (compaq_net_device);
3240 static void __exit vortex_cleanup (void)
3242 if (vortex_have_pci)
3243 pci_unregister_driver (&vortex_driver);
3244 if (vortex_have_eisa)
3245 vortex_eisa_cleanup ();
3249 module_init(vortex_init);
3250 module_exit(vortex_cleanup);