1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
242 #error You must compile this file with the correct options!
243 #error See the last lines of the source file.
244 #error You must compile this driver with "-O".
247 #include <linux/config.h>
248 #include <linux/module.h>
249 #include <linux/kernel.h>
250 #include <linux/string.h>
251 #include <linux/timer.h>
252 #include <linux/errno.h>
253 #include <linux/in.h>
254 #include <linux/ioport.h>
255 #include <linux/slab.h>
256 #include <linux/interrupt.h>
257 #include <linux/pci.h>
258 #include <linux/mii.h>
259 #include <linux/init.h>
260 #include <linux/netdevice.h>
261 #include <linux/etherdevice.h>
262 #include <linux/skbuff.h>
263 #include <linux/ethtool.h>
264 #include <linux/highmem.h>
265 #include <linux/eisa.h>
266 #include <asm/irq.h> /* For NR_IRQS only. */
267 #include <asm/bitops.h>
269 #include <asm/uaccess.h>
271 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
272 This is only in the support-all-kernels source code. */
274 #define RUN_AT(x) (jiffies + (x))
276 #include <linux/delay.h>
279 static char version[] __devinitdata =
280 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
282 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
283 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
284 DRV_VERSION " " DRV_RELDATE);
285 MODULE_LICENSE("GPL");
287 MODULE_PARM(debug, "i");
288 MODULE_PARM(global_options, "i");
289 MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
290 MODULE_PARM(global_full_duplex, "i");
291 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
292 MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
293 MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
294 MODULE_PARM(global_enable_wol, "i");
295 MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
296 MODULE_PARM(rx_copybreak, "i");
297 MODULE_PARM(max_interrupt_work, "i");
298 MODULE_PARM(compaq_ioaddr, "i");
299 MODULE_PARM(compaq_irq, "i");
300 MODULE_PARM(compaq_device_id, "i");
301 MODULE_PARM(watchdog, "i");
302 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
303 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
304 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
305 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
306 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
307 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
308 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
309 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
310 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
311 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
312 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
313 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
314 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
315 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
316 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
318 /* Operational parameter that usually are not changed. */
320 /* The Vortex size is twice that of the original EtherLinkIII series: the
321 runtime register window, window 1, is now always mapped in.
322 The Boomerang size is twice as large as the Vortex -- it has additional
323 bus master control registers. */
324 #define VORTEX_TOTAL_SIZE 0x20
325 #define BOOMERANG_TOTAL_SIZE 0x40
327 /* Set iff a MII transceiver on any interface requires mdio preamble.
328 This only set with the original DP83840 on older 3c905 boards, so the extra
329 code size of a per-interface flag is not worthwhile. */
330 static char mii_preamble_required;
332 #define PFX DRV_NAME ": "
339 I. Board Compatibility
341 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
342 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
343 versions of the FastEtherLink cards. The supported product IDs are
344 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
346 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
347 with the kernel source or available from
348 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
350 II. Board-specific settings
352 PCI bus devices are configured by the system at boot time, so no jumpers
353 need to be set on the board. The system BIOS should be set to assign the
354 PCI INTA signal to an otherwise unused system IRQ line.
356 The EEPROM settings for media type and forced-full-duplex are observed.
357 The EEPROM media type should be left at the default "autoselect" unless using
358 10base2 or AUI connections which cannot be reliably detected.
360 III. Driver operation
362 The 3c59x series use an interface that's very similar to the previous 3c5x9
363 series. The primary interface is two programmed-I/O FIFOs, with an
364 alternate single-contiguous-region bus-master transfer (see next).
366 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
367 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
368 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
369 programmed-I/O interface that has been removed in 'B' and subsequent board
372 One extension that is advertised in a very large font is that the adapters
373 are capable of being bus masters. On the Vortex chip this capability was
374 only for a single contiguous region making it far less useful than the full
375 bus master capability. There is a significant performance impact of taking
376 an extra interrupt or polling for the completion of each transfer, as well
377 as difficulty sharing the single transfer engine between the transmit and
378 receive threads. Using DMA transfers is a win only with large blocks or
379 with the flawed versions of the Intel Orion motherboard PCI controller.
381 The Boomerang chip's full-bus-master interface is useful, and has the
382 currently-unused advantages over other similar chips that queued transmit
383 packets may be reordered and receive buffer groups are associated with a
386 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
387 Rather than a fixed intermediate receive buffer, this scheme allocates
388 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
389 the copying breakpoint: it is chosen to trade-off the memory wasted by
390 passing the full-sized skbuff to the queue layer for all frames vs. the
391 copying cost of copying a frame to a correctly-sized skbuff.
393 IIIC. Synchronization
394 The driver runs as two independent, single-threaded flows of control. One
395 is the send-packet routine, which enforces single-threaded use by the
396 dev->tbusy flag. The other thread is the interrupt handler, which is single
397 threaded by the hardware and other software.
401 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
402 3c590, 3c595, and 3c900 boards.
403 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
404 the EISA version is called "Demon". According to Terry these names come
405 from rides at the local amusement park.
407 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
408 This driver only supports ethernet packets because of the skbuff allocation
412 /* This table drives the PCI probe routines. It's mostly boilerplate in all
413 of the drivers, and will likely be provided by some future kernel.
416 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
417 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
420 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
421 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
422 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
423 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
424 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
425 EXTRA_PREAMBLE=0x8000, };
475 /* note: this array directly indexed by above enums, and MUST
476 * be kept in sync with both the enums above, and the PCI device
479 static struct vortex_chip_info {
484 } vortex_info_tbl[] __devinitdata = {
485 {"3c590 Vortex 10Mbps",
486 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
487 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
488 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
489 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
490 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
491 {"3c595 Vortex 100baseTx",
492 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
493 {"3c595 Vortex 100baseT4",
494 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
496 {"3c595 Vortex 100base-MII",
497 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
498 {"3c900 Boomerang 10baseT",
499 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
500 {"3c900 Boomerang 10Mbps Combo",
501 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
502 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
503 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
504 {"3c900 Cyclone 10Mbps Combo",
505 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
507 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
508 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
509 {"3c900B-FL Cyclone 10base-FL",
510 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
511 {"3c905 Boomerang 100baseTx",
512 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
513 {"3c905 Boomerang 100baseT4",
514 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
515 {"3c905B Cyclone 100baseTx",
516 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
518 {"3c905B Cyclone 10/100/BNC",
519 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
520 {"3c905B-FX Cyclone 100baseFx",
521 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
523 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
525 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
527 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
529 {"3cSOHO100-TX Hurricane",
530 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
531 {"3c555 Laptop Hurricane",
532 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
533 {"3c556 Laptop Tornado",
534 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
536 {"3c556B Laptop Hurricane",
537 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
538 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
539 {"3c575 [Megahertz] 10/100 LAN CardBus",
540 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
542 {"3c575 Boomerang CardBus",
543 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
544 {"3CCFE575BT Cyclone CardBus",
545 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
546 INVERT_LED_PWR|HAS_HWCKSM, 128, },
547 {"3CCFE575CT Tornado CardBus",
548 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
549 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
550 {"3CCFE656 Cyclone CardBus",
551 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
552 INVERT_LED_PWR|HAS_HWCKSM, 128, },
553 {"3CCFEM656B Cyclone+Winmodem CardBus",
554 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
555 INVERT_LED_PWR|HAS_HWCKSM, 128, },
557 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
558 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
559 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
560 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
561 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
563 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
564 {"3c982 Hydra Dual Port A",
565 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
566 {"3c982 Hydra Dual Port B",
567 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
570 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
571 {"3c920B-EMB-WNM Tornado",
572 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
574 {0,}, /* 0 terminated list. */
578 static struct pci_device_id vortex_pci_tbl[] = {
579 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
580 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
581 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
582 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
583 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
585 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
586 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
587 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
588 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
589 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
591 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
592 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
593 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
594 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
595 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
597 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
598 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
599 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
600 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
601 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
603 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
604 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
605 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
606 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
607 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
609 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
610 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
611 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
612 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
613 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
615 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
616 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
617 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
618 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
619 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
621 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
622 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
624 {0,} /* 0 terminated list. */
626 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
629 /* Operational definitions.
630 These are not used by other compilation units and thus are not
631 exported in a ".h" file.
633 First the windows. There are eight register windows, with the command
634 and status registers available in each.
636 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
638 #define EL3_STATUS 0x0e
640 /* The top five bits written to EL3_CMD are a command, the lower
641 11 bits are the parameter, if applicable.
642 Note that 11 parameters bits was fine for ethernet, but the new chip
643 can handle FDDI length frames (~4500 octets) and now parameters count
644 32-bit 'Dwords' rather than octets. */
647 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
648 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
649 UpStall = 6<<11, UpUnstall = (6<<11)+1,
650 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
651 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
652 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
653 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
654 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
655 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
656 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
658 /* The SetRxFilter command accepts the following classes: */
660 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
662 /* Bits in the general status register. */
664 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
665 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
666 IntReq = 0x0040, StatsFull = 0x0080,
667 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
668 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
669 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
672 /* Register window 1 offsets, the window used in normal operation.
673 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
675 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
676 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
677 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
680 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
681 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
682 IntrStatus=0x0E, /* Valid in all windows. */
684 enum Win0_EEPROM_bits {
685 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
686 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
687 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
689 /* EEPROM locations. */
691 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
692 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
693 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
694 DriverTune=13, Checksum=15};
696 enum Window2 { /* Window 2. */
699 enum Window3 { /* Window 3: MAC/config bits. */
700 Wn3_Config=0, Wn3_MAC_Ctrl=6, Wn3_Options=8,
703 #define BFEXT(value, offset, bitcount) \
704 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
706 #define BFINS(lhs, rhs, offset, bitcount) \
707 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
708 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
710 #define RAM_SIZE(v) BFEXT(v, 0, 3)
711 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
712 #define RAM_SPEED(v) BFEXT(v, 4, 2)
713 #define ROM_SIZE(v) BFEXT(v, 6, 2)
714 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
715 #define XCVR(v) BFEXT(v, 20, 4)
716 #define AUTOSELECT(v) BFEXT(v, 24, 1)
718 enum Window4 { /* Window 4: Xcvr/media bits. */
719 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
721 enum Win4_Media_bits {
722 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
723 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
724 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
725 Media_LnkBeat = 0x0800,
727 enum Window7 { /* Window 7: Bus Master control. */
728 Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
730 /* Boomerang bus master control registers. */
732 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
733 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
736 /* The Rx and Tx descriptor lists.
737 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
738 alignment contraint on tx_ring[] and rx_ring[]. */
739 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
740 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
741 struct boom_rx_desc {
742 u32 next; /* Last entry points to 0. */
744 u32 addr; /* Up to 63 addr/len pairs possible. */
745 s32 length; /* Set LAST_FRAG to indicate last pair. */
747 /* Values for the Rx status entry. */
748 enum rx_desc_status {
749 RxDComplete=0x00008000, RxDError=0x4000,
750 /* See boomerang_rx() for actual error bits */
751 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
752 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
756 #define DO_ZEROCOPY 1
758 #define DO_ZEROCOPY 0
761 struct boom_tx_desc {
762 u32 next; /* Last entry points to 0. */
763 s32 status; /* bits 0:12 length, others see below. */
768 } frag[1+MAX_SKB_FRAGS];
775 /* Values for the Tx status entry. */
776 enum tx_desc_status {
777 CRCDisable=0x2000, TxDComplete=0x8000,
778 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
779 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
782 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
783 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
785 struct vortex_private {
786 /* The Rx and Tx rings should be quad-word-aligned. */
787 struct boom_rx_desc* rx_ring;
788 struct boom_tx_desc* tx_ring;
789 dma_addr_t rx_ring_dma;
790 dma_addr_t tx_ring_dma;
791 /* The addresses of transmit- and receive-in-place skbuffs. */
792 struct sk_buff* rx_skbuff[RX_RING_SIZE];
793 struct sk_buff* tx_skbuff[TX_RING_SIZE];
794 unsigned int cur_rx, cur_tx; /* The next free ring entry */
795 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
796 struct net_device_stats stats;
797 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
798 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
800 /* PCI configuration space information. */
801 struct device *gendev;
802 char *cb_fn_base; /* CardBus function status addr space. */
804 /* Some values here only for performance evaluation and path-coverage */
805 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
808 /* The remainder are related to chip state, mostly media selection. */
809 struct timer_list timer; /* Media selection timer. */
810 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
811 int options; /* User-settable misc. driver options. */
812 unsigned int media_override:4, /* Passed-in media type. */
813 default_media:4, /* Read from the EEPROM/Wn3_Config. */
814 full_duplex:1, force_fd:1, autoselect:1,
815 bus_master:1, /* Vortex can only do a fragment bus-m. */
816 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
817 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
818 partner_flow_ctrl:1, /* Partner supports flow control */
820 enable_wol:1, /* Wake-on-LAN is enabled */
821 pm_state_valid:1, /* power_state[] has sane contents */
824 must_free_region:1; /* Flag: if zero, Cardbus owns the I/O region */
828 u16 available_media; /* From Wn3_Options. */
829 u16 capabilities, info1, info2; /* Various, from EEPROM. */
830 u16 advertising; /* NWay media advertisement */
831 unsigned char phys[2]; /* MII device addresses. */
832 u16 deferred; /* Resend these interrupts when we
833 * bale from the ISR */
834 u16 io_size; /* Size of PCI region (for release_region) */
835 spinlock_t lock; /* Serialise access to device & its vortex_private */
836 spinlock_t mdio_lock; /* Serialise access to mdio hardware */
841 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
843 #define DEVICE_PCI(dev) NULL
846 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
849 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
851 #define DEVICE_EISA(dev) NULL
854 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
856 /* The action to take with a media selection timer tick.
857 Note that we deviate from the 3Com order by checking 10base2 before AUI.
860 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
861 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
864 static struct media_table {
866 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
867 mask:8, /* The transceiver-present bit in Wn3_Config.*/
868 next:8; /* The media type to try next. */
869 int wait; /* Time before we check media status. */
871 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
872 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
873 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
874 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
875 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
876 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
877 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
878 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
879 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
880 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
881 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
884 static int vortex_probe1(struct device *gendev, long ioaddr, int irq,
885 int chip_idx, int card_idx);
886 static void vortex_up(struct net_device *dev);
887 static void vortex_down(struct net_device *dev);
888 static int vortex_open(struct net_device *dev);
889 static void mdio_sync(long ioaddr, int bits);
890 static int mdio_read(struct net_device *dev, int phy_id, int location);
891 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
892 static void vortex_timer(unsigned long arg);
893 static void rx_oom_timer(unsigned long arg);
894 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
895 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
896 static int vortex_rx(struct net_device *dev);
897 static int boomerang_rx(struct net_device *dev);
898 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
899 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
900 static int vortex_close(struct net_device *dev);
901 static void dump_tx_ring(struct net_device *dev);
902 static void update_stats(long ioaddr, struct net_device *dev);
903 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
904 static void set_rx_mode(struct net_device *dev);
905 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
906 static void vortex_tx_timeout(struct net_device *dev);
907 static void acpi_set_WOL(struct net_device *dev);
908 static struct ethtool_ops vortex_ethtool_ops;
910 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
911 /* Option count limit only -- unlimited interfaces are supported. */
913 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
914 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
915 static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
916 static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
917 static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
918 static int global_options = -1;
919 static int global_full_duplex = -1;
920 static int global_enable_wol = -1;
922 /* #define dev_alloc_skb dev_alloc_skb_debug */
924 /* Variables to work-around the Compaq PCI BIOS32 problem. */
925 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
926 static struct net_device *compaq_net_device;
928 static int vortex_cards_found;
930 #ifdef CONFIG_NET_POLL_CONTROLLER
931 static void poll_vortex(struct net_device *dev)
933 struct vortex_private *vp = (struct vortex_private *)dev->priv;
935 local_save_flags(flags);
937 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
938 local_irq_restore(flags);
944 static int vortex_suspend (struct pci_dev *pdev, u32 state)
946 struct net_device *dev = pci_get_drvdata(pdev);
948 if (dev && dev->priv) {
949 if (netif_running(dev)) {
950 netif_device_detach(dev);
957 static int vortex_resume (struct pci_dev *pdev)
959 struct net_device *dev = pci_get_drvdata(pdev);
961 if (dev && dev->priv) {
962 if (netif_running(dev)) {
964 netif_device_attach(dev);
970 #endif /* CONFIG_PM */
973 static struct eisa_device_id vortex_eisa_ids[] = {
974 { "TCM5920", CH_3C592 },
975 { "TCM5970", CH_3C597 },
979 static int vortex_eisa_probe (struct device *device);
980 static int vortex_eisa_remove (struct device *device);
982 static struct eisa_driver vortex_eisa_driver = {
983 .id_table = vortex_eisa_ids,
986 .probe = vortex_eisa_probe,
987 .remove = vortex_eisa_remove
991 static int vortex_eisa_probe (struct device *device)
994 struct eisa_device *edev;
996 edev = to_eisa_device (device);
997 ioaddr = edev->base_addr;
999 if (!request_region(ioaddr, VORTEX_TOTAL_SIZE, DRV_NAME))
1002 if (vortex_probe1(device, ioaddr, inw(ioaddr + 0xC88) >> 12,
1003 edev->id.driver_data, vortex_cards_found)) {
1004 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1008 vortex_cards_found++;
1013 static int vortex_eisa_remove (struct device *device)
1015 struct eisa_device *edev;
1016 struct net_device *dev;
1017 struct vortex_private *vp;
1020 edev = to_eisa_device (device);
1021 dev = eisa_get_drvdata (edev);
1024 printk("vortex_eisa_remove called for Compaq device!\n");
1028 vp = netdev_priv(dev);
1029 ioaddr = dev->base_addr;
1031 unregister_netdev (dev);
1032 outw (TotalReset|0x14, ioaddr + EL3_CMD);
1033 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1040 /* returns count found (>= 0), or negative on error */
1041 static int __init vortex_eisa_init (void)
1044 int orig_cards_found = vortex_cards_found;
1047 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1048 /* Because of the way EISA bus is probed, we cannot assume
1049 * any device have been found when we exit from
1050 * eisa_driver_register (the bus root driver may not be
1051 * initialized yet). So we blindly assume something was
1052 * found, and let the sysfs magic happend... */
1058 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1059 if (compaq_ioaddr) {
1060 vortex_probe1(NULL, compaq_ioaddr, compaq_irq,
1061 compaq_device_id, vortex_cards_found++);
1064 return vortex_cards_found - orig_cards_found + eisa_found;
1067 /* returns count (>= 0), or negative on error */
1068 static int __devinit vortex_init_one (struct pci_dev *pdev,
1069 const struct pci_device_id *ent)
1073 /* wake up and enable device */
1074 if (pci_enable_device (pdev)) {
1077 rc = vortex_probe1 (&pdev->dev, pci_resource_start (pdev, 0),
1078 pdev->irq, ent->driver_data, vortex_cards_found);
1080 vortex_cards_found++;
1086 * Start up the PCI/EISA device which is described by *gendev.
1087 * Return 0 on success.
1089 * NOTE: pdev can be NULL, for the case of a Compaq device
1091 static int __devinit vortex_probe1(struct device *gendev,
1092 long ioaddr, int irq,
1093 int chip_idx, int card_idx)
1095 struct vortex_private *vp;
1097 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1099 struct net_device *dev;
1100 static int printed_version;
1101 int retval, print_info;
1102 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1103 char *print_name = "3c59x";
1104 struct pci_dev *pdev = NULL;
1105 struct eisa_device *edev = NULL;
1107 if (!printed_version) {
1109 printed_version = 1;
1113 if ((pdev = DEVICE_PCI(gendev))) {
1114 print_name = pci_name(pdev);
1117 if ((edev = DEVICE_EISA(gendev))) {
1118 print_name = edev->dev.bus_id;
1122 dev = alloc_etherdev(sizeof(*vp));
1125 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1128 SET_MODULE_OWNER(dev);
1129 SET_NETDEV_DEV(dev, gendev);
1130 vp = netdev_priv(dev);
1132 option = global_options;
1134 /* The lower four bits are the media type. */
1135 if (dev->mem_start) {
1137 * The 'options' param is passed in as the third arg to the
1138 * LILO 'ether=' argument for non-modular use
1140 option = dev->mem_start;
1142 else if (card_idx < MAX_UNITS) {
1143 if (options[card_idx] >= 0)
1144 option = options[card_idx];
1148 if (option & 0x8000)
1150 if (option & 0x4000)
1152 if (option & 0x0400)
1156 print_info = (vortex_debug > 1);
1158 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1160 printk(KERN_INFO "%s: 3Com %s %s at 0x%lx. Vers " DRV_VERSION "\n",
1162 pdev ? "PCI" : "EISA",
1166 dev->base_addr = ioaddr;
1169 vp->drv_flags = vci->drv_flags;
1170 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1171 vp->io_size = vci->io_size;
1172 vp->card_idx = card_idx;
1174 /* module list only for Compaq device */
1175 if (gendev == NULL) {
1176 compaq_net_device = dev;
1179 /* PCI-only startup logic */
1181 /* EISA resources already marked, so only PCI needs to do this here */
1182 /* Ignore return value, because Cardbus drivers already allocate for us */
1183 if (request_region(ioaddr, vci->io_size, print_name) != NULL)
1184 vp->must_free_region = 1;
1186 /* enable bus-mastering if necessary */
1187 if (vci->flags & PCI_USES_MASTER)
1188 pci_set_master (pdev);
1190 if (vci->drv_flags & IS_VORTEX) {
1192 u8 new_latency = 248;
1194 /* Check the PCI latency value. On the 3c590 series the latency timer
1195 must be set to the maximum value to avoid data corruption that occurs
1196 when the timer expires during a transfer. This bug exists the Vortex
1198 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1199 if (pci_latency < new_latency) {
1200 printk(KERN_INFO "%s: Overriding PCI latency"
1201 " timer (CFLT) setting of %d, new value is %d.\n",
1202 print_name, pci_latency, new_latency);
1203 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1208 spin_lock_init(&vp->lock);
1209 spin_lock_init(&vp->mdio_lock);
1210 vp->gendev = gendev;
1212 /* Makes sure rings are at least 16 byte aligned. */
1213 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1214 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1217 if (vp->rx_ring == 0)
1220 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1221 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1223 /* if we are a PCI driver, we store info in pdev->driver_data
1224 * instead of a module list */
1226 pci_set_drvdata(pdev, dev);
1228 eisa_set_drvdata (edev, dev);
1230 vp->media_override = 7;
1232 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1233 if (vp->media_override != 7)
1235 vp->full_duplex = (option & 0x200) ? 1 : 0;
1236 vp->bus_master = (option & 16) ? 1 : 0;
1239 if (global_full_duplex > 0)
1240 vp->full_duplex = 1;
1241 if (global_enable_wol > 0)
1244 if (card_idx < MAX_UNITS) {
1245 if (full_duplex[card_idx] > 0)
1246 vp->full_duplex = 1;
1247 if (flow_ctrl[card_idx] > 0)
1249 if (enable_wol[card_idx] > 0)
1253 vp->force_fd = vp->full_duplex;
1254 vp->options = option;
1255 /* Read the station address from the EEPROM. */
1260 if (vci->drv_flags & EEPROM_8BIT)
1262 else if (vci->drv_flags & EEPROM_OFFSET)
1263 base = EEPROM_Read + 0x30;
1267 for (i = 0; i < 0x40; i++) {
1269 outw(base + i, ioaddr + Wn0EepromCmd);
1270 /* Pause for at least 162 us. for the read to take place. */
1271 for (timer = 10; timer >= 0; timer--) {
1273 if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1276 eeprom[i] = inw(ioaddr + Wn0EepromData);
1279 for (i = 0; i < 0x18; i++)
1280 checksum ^= eeprom[i];
1281 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1282 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1284 checksum ^= eeprom[i++];
1285 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1287 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1288 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1289 for (i = 0; i < 3; i++)
1290 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1292 for (i = 0; i < 6; i++)
1293 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1296 for (i = 0; i < 6; i++)
1297 outb(dev->dev_addr[i], ioaddr + i);
1301 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1304 printk(", IRQ %d\n", dev->irq);
1305 /* Tell them about an invalid IRQ. */
1306 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1307 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1312 step = (inb(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1314 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1315 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1316 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1320 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1321 unsigned long fn_st_addr; /* Cardbus function status space */
1324 fn_st_addr = pci_resource_start (pdev, 2);
1326 vp->cb_fn_base = ioremap(fn_st_addr, 128);
1328 if (!vp->cb_fn_base)
1332 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1333 print_name, fn_st_addr, vp->cb_fn_base);
1337 n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1338 if (vp->drv_flags & INVERT_LED_PWR)
1340 if (vp->drv_flags & INVERT_MII_PWR)
1342 outw(n, ioaddr + Wn2_ResetOptions);
1343 if (vp->drv_flags & WNO_XCVR_PWR) {
1345 outw(0x0800, ioaddr);
1349 /* Extract our information from the EEPROM data. */
1350 vp->info1 = eeprom[13];
1351 vp->info2 = eeprom[15];
1352 vp->capabilities = eeprom[16];
1354 if (vp->info1 & 0x8000) {
1355 vp->full_duplex = 1;
1357 printk(KERN_INFO "Full duplex capable\n");
1361 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1362 unsigned int config;
1364 vp->available_media = inw(ioaddr + Wn3_Options);
1365 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1366 vp->available_media = 0x40;
1367 config = inl(ioaddr + Wn3_Config);
1369 printk(KERN_DEBUG " Internal config register is %4.4x, "
1370 "transceivers %#x.\n", config, inw(ioaddr + Wn3_Options));
1371 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1372 8 << RAM_SIZE(config),
1373 RAM_WIDTH(config) ? "word" : "byte",
1374 ram_split[RAM_SPLIT(config)],
1375 AUTOSELECT(config) ? "autoselect/" : "",
1376 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1377 media_tbl[XCVR(config)].name);
1379 vp->default_media = XCVR(config);
1380 if (vp->default_media == XCVR_NWAY)
1382 vp->autoselect = AUTOSELECT(config);
1385 if (vp->media_override != 7) {
1386 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1387 print_name, vp->media_override,
1388 media_tbl[vp->media_override].name);
1389 dev->if_port = vp->media_override;
1391 dev->if_port = vp->default_media;
1393 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1394 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1395 int phy, phy_idx = 0;
1397 mii_preamble_required++;
1398 if (vp->drv_flags & EXTRA_PREAMBLE)
1399 mii_preamble_required++;
1400 mdio_sync(ioaddr, 32);
1401 mdio_read(dev, 24, 1);
1402 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1403 int mii_status, phyx;
1406 * For the 3c905CX we look at index 24 first, because it bogusly
1407 * reports an external PHY at all indices
1415 mii_status = mdio_read(dev, phyx, 1);
1416 if (mii_status && mii_status != 0xffff) {
1417 vp->phys[phy_idx++] = phyx;
1419 printk(KERN_INFO " MII transceiver found at address %d,"
1420 " status %4x.\n", phyx, mii_status);
1422 if ((mii_status & 0x0040) == 0)
1423 mii_preamble_required++;
1426 mii_preamble_required--;
1428 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1431 vp->advertising = mdio_read(dev, vp->phys[0], 4);
1432 if (vp->full_duplex) {
1433 /* Only advertise the FD media types. */
1434 vp->advertising &= ~0x02A0;
1435 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1440 if (vp->capabilities & CapBusMaster) {
1441 vp->full_bus_master_tx = 1;
1443 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1444 (vp->info2 & 1) ? "early" : "whole-frame" );
1446 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1447 vp->bus_master = 0; /* AKPM: vortex only */
1450 /* The 3c59x-specific entries in the device structure. */
1451 dev->open = vortex_open;
1452 if (vp->full_bus_master_tx) {
1453 dev->hard_start_xmit = boomerang_start_xmit;
1454 /* Actually, it still should work with iommu. */
1455 dev->features |= NETIF_F_SG;
1456 if (((hw_checksums[card_idx] == -1) && (vp->drv_flags & HAS_HWCKSM)) ||
1457 (hw_checksums[card_idx] == 1)) {
1458 dev->features |= NETIF_F_IP_CSUM;
1461 dev->hard_start_xmit = vortex_start_xmit;
1465 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1467 (dev->features & NETIF_F_SG) ? "en":"dis",
1468 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1471 dev->stop = vortex_close;
1472 dev->get_stats = vortex_get_stats;
1473 dev->do_ioctl = vortex_ioctl;
1474 dev->ethtool_ops = &vortex_ethtool_ops;
1475 dev->set_multicast_list = set_rx_mode;
1476 dev->tx_timeout = vortex_tx_timeout;
1477 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1478 #ifdef CONFIG_NET_POLL_CONTROLLER
1479 dev->poll_controller = poll_vortex;
1481 if (pdev && vp->enable_wol) {
1482 vp->pm_state_valid = 1;
1483 pci_save_state(VORTEX_PCI(vp), vp->power_state);
1486 retval = register_netdev(dev);
1491 pci_free_consistent(pdev,
1492 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1493 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1497 if (vp->must_free_region)
1498 release_region(ioaddr, vci->io_size);
1500 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1506 issue_and_wait(struct net_device *dev, int cmd)
1510 outw(cmd, dev->base_addr + EL3_CMD);
1511 for (i = 0; i < 2000; i++) {
1512 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress))
1516 /* OK, that didn't work. Do it the slow way. One second */
1517 for (i = 0; i < 100000; i++) {
1518 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress)) {
1519 if (vortex_debug > 1)
1520 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1521 dev->name, cmd, i * 10);
1526 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1527 dev->name, cmd, inw(dev->base_addr + EL3_STATUS));
1531 vortex_up(struct net_device *dev)
1533 long ioaddr = dev->base_addr;
1534 struct vortex_private *vp = netdev_priv(dev);
1535 unsigned int config;
1538 if (VORTEX_PCI(vp) && vp->enable_wol) {
1539 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
1540 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
1543 /* Before initializing select the active media port. */
1545 config = inl(ioaddr + Wn3_Config);
1547 if (vp->media_override != 7) {
1548 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1549 dev->name, vp->media_override,
1550 media_tbl[vp->media_override].name);
1551 dev->if_port = vp->media_override;
1552 } else if (vp->autoselect) {
1554 if (vortex_debug > 1)
1555 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1556 dev->name, dev->if_port);
1557 dev->if_port = XCVR_NWAY;
1559 /* Find first available media type, starting with 100baseTx. */
1560 dev->if_port = XCVR_100baseTx;
1561 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1562 dev->if_port = media_tbl[dev->if_port].next;
1563 if (vortex_debug > 1)
1564 printk(KERN_INFO "%s: first available media type: %s\n",
1565 dev->name, media_tbl[dev->if_port].name);
1568 dev->if_port = vp->default_media;
1569 if (vortex_debug > 1)
1570 printk(KERN_INFO "%s: using default media %s\n",
1571 dev->name, media_tbl[dev->if_port].name);
1574 init_timer(&vp->timer);
1575 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1576 vp->timer.data = (unsigned long)dev;
1577 vp->timer.function = vortex_timer; /* timer handler */
1578 add_timer(&vp->timer);
1580 init_timer(&vp->rx_oom_timer);
1581 vp->rx_oom_timer.data = (unsigned long)dev;
1582 vp->rx_oom_timer.function = rx_oom_timer;
1584 if (vortex_debug > 1)
1585 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1586 dev->name, media_tbl[dev->if_port].name);
1588 vp->full_duplex = vp->force_fd;
1589 config = BFINS(config, dev->if_port, 20, 4);
1590 if (vortex_debug > 6)
1591 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1592 outl(config, ioaddr + Wn3_Config);
1594 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1595 int mii_reg1, mii_reg5;
1597 /* Read BMSR (reg1) only to clear old status. */
1598 mii_reg1 = mdio_read(dev, vp->phys[0], 1);
1599 mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1600 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1601 netif_carrier_off(dev); /* No MII device or no link partner report */
1603 mii_reg5 &= vp->advertising;
1604 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1605 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1606 vp->full_duplex = 1;
1607 netif_carrier_on(dev);
1609 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1610 if (vortex_debug > 1)
1611 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1612 " info1 %04x, setting %s-duplex.\n",
1613 dev->name, vp->phys[0],
1615 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1619 /* Set the full-duplex bit. */
1620 outw( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1621 (dev->mtu > 1500 ? 0x40 : 0) |
1622 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1623 ioaddr + Wn3_MAC_Ctrl);
1625 if (vortex_debug > 1) {
1626 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1630 issue_and_wait(dev, TxReset);
1632 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1634 issue_and_wait(dev, RxReset|0x04);
1636 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1638 if (vortex_debug > 1) {
1640 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1641 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1644 /* Set the station address and mask in window 2 each time opened. */
1646 for (i = 0; i < 6; i++)
1647 outb(dev->dev_addr[i], ioaddr + i);
1648 for (; i < 12; i+=2)
1649 outw(0, ioaddr + i);
1651 if (vp->cb_fn_base) {
1652 unsigned short n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1653 if (vp->drv_flags & INVERT_LED_PWR)
1655 if (vp->drv_flags & INVERT_MII_PWR)
1657 outw(n, ioaddr + Wn2_ResetOptions);
1660 if (dev->if_port == XCVR_10base2)
1661 /* Start the thinnet transceiver. We should really wait 50ms...*/
1662 outw(StartCoax, ioaddr + EL3_CMD);
1663 if (dev->if_port != XCVR_NWAY) {
1665 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1666 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1669 /* Switch to the stats window, and clear all stats by reading. */
1670 outw(StatsDisable, ioaddr + EL3_CMD);
1672 for (i = 0; i < 10; i++)
1676 /* New: On the Vortex we must also clear the BadSSD counter. */
1679 /* ..and on the Boomerang we enable the extra statistics bits. */
1680 outw(0x0040, ioaddr + Wn4_NetDiag);
1682 /* Switch to register set 7 for normal use. */
1685 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1686 vp->cur_rx = vp->dirty_rx = 0;
1687 /* Initialize the RxEarly register as recommended. */
1688 outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1689 outl(0x0020, ioaddr + PktStatus);
1690 outl(vp->rx_ring_dma, ioaddr + UpListPtr);
1692 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1693 vp->cur_tx = vp->dirty_tx = 0;
1694 if (vp->drv_flags & IS_BOOMERANG)
1695 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1696 /* Clear the Rx, Tx rings. */
1697 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1698 vp->rx_ring[i].status = 0;
1699 for (i = 0; i < TX_RING_SIZE; i++)
1700 vp->tx_skbuff[i] = 0;
1701 outl(0, ioaddr + DownListPtr);
1703 /* Set receiver mode: presumably accept b-case and phys addr only. */
1705 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1707 // issue_and_wait(dev, SetTxStart|0x07ff);
1708 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1709 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1710 /* Allow status bits to be seen. */
1711 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1712 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1713 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1714 (vp->bus_master ? DMADone : 0);
1715 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1716 (vp->full_bus_master_rx ? 0 : RxComplete) |
1717 StatsFull | HostError | TxComplete | IntReq
1718 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1719 outw(vp->status_enable, ioaddr + EL3_CMD);
1720 /* Ack all pending events, and set active indicator mask. */
1721 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1723 outw(vp->intr_enable, ioaddr + EL3_CMD);
1724 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1725 writel(0x8000, vp->cb_fn_base + 4);
1726 netif_start_queue (dev);
1730 vortex_open(struct net_device *dev)
1732 struct vortex_private *vp = netdev_priv(dev);
1736 /* Use the now-standard shared IRQ implementation. */
1737 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1738 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1739 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1743 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1744 if (vortex_debug > 2)
1745 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1746 for (i = 0; i < RX_RING_SIZE; i++) {
1747 struct sk_buff *skb;
1748 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1749 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1750 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1751 skb = dev_alloc_skb(PKT_BUF_SZ);
1752 vp->rx_skbuff[i] = skb;
1754 break; /* Bad news! */
1755 skb->dev = dev; /* Mark as being used by this device. */
1756 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1757 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1759 if (i != RX_RING_SIZE) {
1761 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1762 for (j = 0; j < i; j++) {
1763 if (vp->rx_skbuff[j]) {
1764 dev_kfree_skb(vp->rx_skbuff[j]);
1765 vp->rx_skbuff[j] = 0;
1771 /* Wrap the ring. */
1772 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1779 free_irq(dev->irq, dev);
1781 if (vortex_debug > 1)
1782 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1787 vortex_timer(unsigned long data)
1789 struct net_device *dev = (struct net_device *)data;
1790 struct vortex_private *vp = netdev_priv(dev);
1791 long ioaddr = dev->base_addr;
1792 int next_tick = 60*HZ;
1794 int media_status, mii_status, old_window;
1796 if (vortex_debug > 2) {
1797 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1798 dev->name, media_tbl[dev->if_port].name);
1799 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1803 goto leave_media_alone;
1804 disable_irq(dev->irq);
1805 old_window = inw(ioaddr + EL3_CMD) >> 13;
1807 media_status = inw(ioaddr + Wn4_Media);
1808 switch (dev->if_port) {
1809 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1810 if (media_status & Media_LnkBeat) {
1811 netif_carrier_on(dev);
1813 if (vortex_debug > 1)
1814 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1815 dev->name, media_tbl[dev->if_port].name, media_status);
1817 netif_carrier_off(dev);
1818 if (vortex_debug > 1) {
1819 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1820 dev->name, media_tbl[dev->if_port].name, media_status);
1824 case XCVR_MII: case XCVR_NWAY:
1826 mii_status = mdio_read(dev, vp->phys[0], 1);
1828 if (vortex_debug > 2)
1829 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1830 dev->name, mii_status);
1831 if (mii_status & BMSR_LSTATUS) {
1832 int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1833 if (! vp->force_fd && mii_reg5 != 0xffff) {
1836 mii_reg5 &= vp->advertising;
1837 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1838 if (vp->full_duplex != duplex) {
1839 vp->full_duplex = duplex;
1840 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1841 "#%d link partner capability of %4.4x.\n",
1842 dev->name, vp->full_duplex ? "full" : "half",
1843 vp->phys[0], mii_reg5);
1844 /* Set the full-duplex bit. */
1846 outw( (vp->full_duplex ? 0x20 : 0) |
1847 (dev->mtu > 1500 ? 0x40 : 0) |
1848 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1849 ioaddr + Wn3_MAC_Ctrl);
1850 if (vortex_debug > 1)
1851 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1852 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1855 netif_carrier_on(dev);
1857 netif_carrier_off(dev);
1861 default: /* Other media types handled by Tx timeouts. */
1862 if (vortex_debug > 1)
1863 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1864 dev->name, media_tbl[dev->if_port].name, media_status);
1868 unsigned int config;
1871 dev->if_port = media_tbl[dev->if_port].next;
1872 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1873 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1874 dev->if_port = vp->default_media;
1875 if (vortex_debug > 1)
1876 printk(KERN_DEBUG "%s: Media selection failing, using default "
1878 dev->name, media_tbl[dev->if_port].name);
1880 if (vortex_debug > 1)
1881 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1883 dev->name, media_tbl[dev->if_port].name);
1884 next_tick = media_tbl[dev->if_port].wait;
1886 outw((media_status & ~(Media_10TP|Media_SQE)) |
1887 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1890 config = inl(ioaddr + Wn3_Config);
1891 config = BFINS(config, dev->if_port, 20, 4);
1892 outl(config, ioaddr + Wn3_Config);
1894 outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1896 if (vortex_debug > 1)
1897 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1898 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1900 EL3WINDOW(old_window);
1901 enable_irq(dev->irq);
1904 if (vortex_debug > 2)
1905 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1906 dev->name, media_tbl[dev->if_port].name);
1908 mod_timer(&vp->timer, RUN_AT(next_tick));
1910 outw(FakeIntr, ioaddr + EL3_CMD);
1914 static void vortex_tx_timeout(struct net_device *dev)
1916 struct vortex_private *vp = netdev_priv(dev);
1917 long ioaddr = dev->base_addr;
1919 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1920 dev->name, inb(ioaddr + TxStatus),
1921 inw(ioaddr + EL3_STATUS));
1923 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1924 inw(ioaddr + Wn4_NetDiag),
1925 inw(ioaddr + Wn4_Media),
1926 inl(ioaddr + PktStatus),
1927 inw(ioaddr + Wn4_FIFODiag));
1928 /* Slight code bloat to be user friendly. */
1929 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
1930 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1931 " network cable problem?\n", dev->name);
1932 if (inw(ioaddr + EL3_STATUS) & IntLatch) {
1933 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1934 " IRQ blocked by another device?\n", dev->name);
1935 /* Bad idea here.. but we might as well handle a few events. */
1938 * Block interrupts because vortex_interrupt does a bare spin_lock()
1940 unsigned long flags;
1941 local_irq_save(flags);
1942 if (vp->full_bus_master_tx)
1943 boomerang_interrupt(dev->irq, dev, 0);
1945 vortex_interrupt(dev->irq, dev, 0);
1946 local_irq_restore(flags);
1950 if (vortex_debug > 0)
1953 issue_and_wait(dev, TxReset);
1955 vp->stats.tx_errors++;
1956 if (vp->full_bus_master_tx) {
1957 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1958 if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1959 outl(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1960 ioaddr + DownListPtr);
1961 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
1962 netif_wake_queue (dev);
1963 if (vp->drv_flags & IS_BOOMERANG)
1964 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1965 outw(DownUnstall, ioaddr + EL3_CMD);
1967 vp->stats.tx_dropped++;
1968 netif_wake_queue(dev);
1971 /* Issue Tx Enable */
1972 outw(TxEnable, ioaddr + EL3_CMD);
1973 dev->trans_start = jiffies;
1975 /* Switch to register set 7 for normal use. */
1980 * Handle uncommon interrupt sources. This is a separate routine to minimize
1984 vortex_error(struct net_device *dev, int status)
1986 struct vortex_private *vp = netdev_priv(dev);
1987 long ioaddr = dev->base_addr;
1988 int do_tx_reset = 0, reset_mask = 0;
1989 unsigned char tx_status = 0;
1991 if (vortex_debug > 2) {
1992 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
1995 if (status & TxComplete) { /* Really "TxError" for us. */
1996 tx_status = inb(ioaddr + TxStatus);
1997 /* Presumably a tx-timeout. We must merely re-enable. */
1998 if (vortex_debug > 2
1999 || (tx_status != 0x88 && vortex_debug > 0)) {
2000 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2001 dev->name, tx_status);
2002 if (tx_status == 0x82) {
2003 printk(KERN_ERR "Probably a duplex mismatch. See "
2004 "Documentation/networking/vortex.txt\n");
2008 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2009 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2010 outb(0, ioaddr + TxStatus);
2011 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2013 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2015 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2016 } else { /* Merely re-enable the transmitter. */
2017 outw(TxEnable, ioaddr + EL3_CMD);
2021 if (status & RxEarly) { /* Rx early is unused. */
2023 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
2025 if (status & StatsFull) { /* Empty statistics. */
2026 static int DoneDidThat;
2027 if (vortex_debug > 4)
2028 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2029 update_stats(ioaddr, dev);
2030 /* HACK: Disable statistics as an interrupt source. */
2031 /* This occurs when we have the wrong media type! */
2032 if (DoneDidThat == 0 &&
2033 inw(ioaddr + EL3_STATUS) & StatsFull) {
2034 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2035 "stats as an interrupt source.\n", dev->name);
2037 outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2038 vp->intr_enable &= ~StatsFull;
2043 if (status & IntReq) { /* Restore all interrupt sources. */
2044 outw(vp->status_enable, ioaddr + EL3_CMD);
2045 outw(vp->intr_enable, ioaddr + EL3_CMD);
2047 if (status & HostError) {
2050 fifo_diag = inw(ioaddr + Wn4_FIFODiag);
2051 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2052 dev->name, fifo_diag);
2053 /* Adapter failure requires Tx/Rx reset and reinit. */
2054 if (vp->full_bus_master_tx) {
2055 int bus_status = inl(ioaddr + PktStatus);
2056 /* 0x80000000 PCI master abort. */
2057 /* 0x40000000 PCI target abort. */
2059 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2061 /* In this case, blow the card away */
2063 issue_and_wait(dev, TotalReset | 0xff);
2064 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2065 } else if (fifo_diag & 0x0400)
2067 if (fifo_diag & 0x3000) {
2068 /* Reset Rx fifo and upload logic */
2069 issue_and_wait(dev, RxReset|0x07);
2070 /* Set the Rx filter to the current state. */
2072 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2073 outw(AckIntr | HostError, ioaddr + EL3_CMD);
2078 issue_and_wait(dev, TxReset|reset_mask);
2079 outw(TxEnable, ioaddr + EL3_CMD);
2080 if (!vp->full_bus_master_tx)
2081 netif_wake_queue(dev);
2086 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2088 struct vortex_private *vp = netdev_priv(dev);
2089 long ioaddr = dev->base_addr;
2091 /* Put out the doubleword header... */
2092 outl(skb->len, ioaddr + TX_FIFO);
2093 if (vp->bus_master) {
2094 /* Set the bus-master controller to transfer the packet. */
2095 int len = (skb->len + 3) & ~3;
2096 outl( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2097 ioaddr + Wn7_MasterAddr);
2098 outw(len, ioaddr + Wn7_MasterLen);
2100 outw(StartDMADown, ioaddr + EL3_CMD);
2101 /* netif_wake_queue() will be called at the DMADone interrupt. */
2103 /* ... and the packet rounded to a doubleword. */
2104 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2105 dev_kfree_skb (skb);
2106 if (inw(ioaddr + TxFree) > 1536) {
2107 netif_start_queue (dev); /* AKPM: redundant? */
2109 /* Interrupt us when the FIFO has room for max-sized packet. */
2110 netif_stop_queue(dev);
2111 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2115 dev->trans_start = jiffies;
2117 /* Clear the Tx status stack. */
2122 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
2123 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2124 if (vortex_debug > 2)
2125 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2126 dev->name, tx_status);
2127 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2128 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2129 if (tx_status & 0x30) {
2130 issue_and_wait(dev, TxReset);
2132 outw(TxEnable, ioaddr + EL3_CMD);
2134 outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2141 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2143 struct vortex_private *vp = netdev_priv(dev);
2144 long ioaddr = dev->base_addr;
2145 /* Calculate the next Tx descriptor entry. */
2146 int entry = vp->cur_tx % TX_RING_SIZE;
2147 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2148 unsigned long flags;
2150 if (vortex_debug > 6) {
2151 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2152 if (vortex_debug > 3)
2153 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2154 dev->name, vp->cur_tx);
2157 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2158 if (vortex_debug > 0)
2159 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2161 netif_stop_queue(dev);
2165 vp->tx_skbuff[entry] = skb;
2167 vp->tx_ring[entry].next = 0;
2169 if (skb->ip_summed != CHECKSUM_HW)
2170 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2172 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2174 if (!skb_shinfo(skb)->nr_frags) {
2175 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2176 skb->len, PCI_DMA_TODEVICE));
2177 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2181 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2182 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2183 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2185 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2186 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2188 vp->tx_ring[entry].frag[i+1].addr =
2189 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2190 (void*)page_address(frag->page) + frag->page_offset,
2191 frag->size, PCI_DMA_TODEVICE));
2193 if (i == skb_shinfo(skb)->nr_frags-1)
2194 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2196 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2200 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2201 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2202 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2205 spin_lock_irqsave(&vp->lock, flags);
2206 /* Wait for the stall to complete. */
2207 issue_and_wait(dev, DownStall);
2208 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2209 if (inl(ioaddr + DownListPtr) == 0) {
2210 outl(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2211 vp->queued_packet++;
2215 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2216 netif_stop_queue (dev);
2217 } else { /* Clear previous interrupt enable. */
2218 #if defined(tx_interrupt_mitigation)
2219 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2220 * were selected, this would corrupt DN_COMPLETE. No?
2222 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2225 outw(DownUnstall, ioaddr + EL3_CMD);
2226 spin_unlock_irqrestore(&vp->lock, flags);
2227 dev->trans_start = jiffies;
2231 /* The interrupt handler does all of the Rx thread work and cleans up
2232 after the Tx thread. */
2235 * This is the ISR for the vortex series chips.
2236 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2240 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2242 struct net_device *dev = dev_id;
2243 struct vortex_private *vp = netdev_priv(dev);
2246 int work_done = max_interrupt_work;
2249 ioaddr = dev->base_addr;
2250 spin_lock(&vp->lock);
2252 status = inw(ioaddr + EL3_STATUS);
2254 if (vortex_debug > 6)
2255 printk("vortex_interrupt(). status=0x%4x\n", status);
2257 if ((status & IntLatch) == 0)
2258 goto handler_exit; /* No interrupt: shared IRQs cause this */
2261 if (status & IntReq) {
2262 status |= vp->deferred;
2266 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2269 if (vortex_debug > 4)
2270 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2271 dev->name, status, inb(ioaddr + Timer));
2274 if (vortex_debug > 5)
2275 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2277 if (status & RxComplete)
2280 if (status & TxAvailable) {
2281 if (vortex_debug > 5)
2282 printk(KERN_DEBUG " TX room bit was handled.\n");
2283 /* There's room in the FIFO for a full-sized packet. */
2284 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2285 netif_wake_queue (dev);
2288 if (status & DMADone) {
2289 if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
2290 outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2291 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2292 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2293 if (inw(ioaddr + TxFree) > 1536) {
2295 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2296 * insufficient FIFO room, the TxAvailable test will succeed and call
2297 * netif_wake_queue()
2299 netif_wake_queue(dev);
2300 } else { /* Interrupt when FIFO has room for max-sized packet. */
2301 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2302 netif_stop_queue(dev);
2306 /* Check for all uncommon interrupts at once. */
2307 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2308 if (status == 0xffff)
2310 vortex_error(dev, status);
2313 if (--work_done < 0) {
2314 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2315 "%4.4x.\n", dev->name, status);
2316 /* Disable all pending interrupts. */
2318 vp->deferred |= status;
2319 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2321 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2322 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2323 /* The timer will reenable interrupts. */
2324 mod_timer(&vp->timer, jiffies + 1*HZ);
2327 /* Acknowledge the IRQ. */
2328 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2329 } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2331 if (vortex_debug > 4)
2332 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2335 spin_unlock(&vp->lock);
2336 return IRQ_RETVAL(handled);
2340 * This is the ISR for the boomerang series chips.
2341 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2345 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2347 struct net_device *dev = dev_id;
2348 struct vortex_private *vp = netdev_priv(dev);
2351 int work_done = max_interrupt_work;
2353 ioaddr = dev->base_addr;
2356 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2357 * and boomerang_start_xmit
2359 spin_lock(&vp->lock);
2361 status = inw(ioaddr + EL3_STATUS);
2363 if (vortex_debug > 6)
2364 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2366 if ((status & IntLatch) == 0)
2367 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2369 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2370 if (vortex_debug > 1)
2371 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2375 if (status & IntReq) {
2376 status |= vp->deferred;
2380 if (vortex_debug > 4)
2381 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2382 dev->name, status, inb(ioaddr + Timer));
2384 if (vortex_debug > 5)
2385 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2387 if (status & UpComplete) {
2388 outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
2389 if (vortex_debug > 5)
2390 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2394 if (status & DownComplete) {
2395 unsigned int dirty_tx = vp->dirty_tx;
2397 outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
2398 while (vp->cur_tx - dirty_tx > 0) {
2399 int entry = dirty_tx % TX_RING_SIZE;
2400 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2401 if (inl(ioaddr + DownListPtr) ==
2402 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2403 break; /* It still hasn't been processed. */
2405 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2406 break; /* It still hasn't been processed. */
2409 if (vp->tx_skbuff[entry]) {
2410 struct sk_buff *skb = vp->tx_skbuff[entry];
2413 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2414 pci_unmap_single(VORTEX_PCI(vp),
2415 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2416 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2419 pci_unmap_single(VORTEX_PCI(vp),
2420 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2422 dev_kfree_skb_irq(skb);
2423 vp->tx_skbuff[entry] = 0;
2425 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2427 /* vp->stats.tx_packets++; Counted below. */
2430 vp->dirty_tx = dirty_tx;
2431 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2432 if (vortex_debug > 6)
2433 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2434 netif_wake_queue (dev);
2438 /* Check for all uncommon interrupts at once. */
2439 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2440 vortex_error(dev, status);
2442 if (--work_done < 0) {
2443 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2444 "%4.4x.\n", dev->name, status);
2445 /* Disable all pending interrupts. */
2447 vp->deferred |= status;
2448 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2450 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2451 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2452 /* The timer will reenable interrupts. */
2453 mod_timer(&vp->timer, jiffies + 1*HZ);
2456 /* Acknowledge the IRQ. */
2457 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2458 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2459 writel(0x8000, vp->cb_fn_base + 4);
2461 } while ((status = inw(ioaddr + EL3_STATUS)) & IntLatch);
2463 if (vortex_debug > 4)
2464 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2467 spin_unlock(&vp->lock);
2471 static int vortex_rx(struct net_device *dev)
2473 struct vortex_private *vp = netdev_priv(dev);
2474 long ioaddr = dev->base_addr;
2478 if (vortex_debug > 5)
2479 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2480 inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
2481 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
2482 if (rx_status & 0x4000) { /* Error, update stats. */
2483 unsigned char rx_error = inb(ioaddr + RxErrors);
2484 if (vortex_debug > 2)
2485 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2486 vp->stats.rx_errors++;
2487 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2488 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2489 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2490 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2491 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2493 /* The packet length: up to 4.5K!. */
2494 int pkt_len = rx_status & 0x1fff;
2495 struct sk_buff *skb;
2497 skb = dev_alloc_skb(pkt_len + 5);
2498 if (vortex_debug > 4)
2499 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2500 pkt_len, rx_status);
2503 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2504 /* 'skb_put()' points to the start of sk_buff data area. */
2505 if (vp->bus_master &&
2506 ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2507 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2508 pkt_len, PCI_DMA_FROMDEVICE);
2509 outl(dma, ioaddr + Wn7_MasterAddr);
2510 outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2511 outw(StartDMAUp, ioaddr + EL3_CMD);
2512 while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2514 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2516 insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2517 (pkt_len + 3) >> 2);
2519 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2520 skb->protocol = eth_type_trans(skb, dev);
2522 dev->last_rx = jiffies;
2523 vp->stats.rx_packets++;
2524 /* Wait a limited time to go to next packet. */
2525 for (i = 200; i >= 0; i--)
2526 if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2529 } else if (vortex_debug > 0)
2530 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2531 "size %d.\n", dev->name, pkt_len);
2533 vp->stats.rx_dropped++;
2534 issue_and_wait(dev, RxDiscard);
2541 boomerang_rx(struct net_device *dev)
2543 struct vortex_private *vp = netdev_priv(dev);
2544 int entry = vp->cur_rx % RX_RING_SIZE;
2545 long ioaddr = dev->base_addr;
2547 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2549 if (vortex_debug > 5)
2550 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", inw(ioaddr+EL3_STATUS));
2552 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2553 if (--rx_work_limit < 0)
2555 if (rx_status & RxDError) { /* Error, update stats. */
2556 unsigned char rx_error = rx_status >> 16;
2557 if (vortex_debug > 2)
2558 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2559 vp->stats.rx_errors++;
2560 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2561 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2562 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2563 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2564 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2566 /* The packet length: up to 4.5K!. */
2567 int pkt_len = rx_status & 0x1fff;
2568 struct sk_buff *skb;
2569 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2571 if (vortex_debug > 4)
2572 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2573 pkt_len, rx_status);
2575 /* Check if the packet is long enough to just accept without
2576 copying to a properly sized skbuff. */
2577 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2579 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2580 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2581 /* 'skb_put()' points to the start of sk_buff data area. */
2582 memcpy(skb_put(skb, pkt_len),
2583 vp->rx_skbuff[entry]->tail,
2585 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2588 /* Pass up the skbuff already on the Rx ring. */
2589 skb = vp->rx_skbuff[entry];
2590 vp->rx_skbuff[entry] = NULL;
2591 skb_put(skb, pkt_len);
2592 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2595 skb->protocol = eth_type_trans(skb, dev);
2596 { /* Use hardware checksum info. */
2597 int csum_bits = rx_status & 0xee000000;
2599 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2600 csum_bits == (IPChksumValid | UDPChksumValid))) {
2601 skb->ip_summed = CHECKSUM_UNNECESSARY;
2606 dev->last_rx = jiffies;
2607 vp->stats.rx_packets++;
2609 entry = (++vp->cur_rx) % RX_RING_SIZE;
2611 /* Refill the Rx ring buffers. */
2612 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2613 struct sk_buff *skb;
2614 entry = vp->dirty_rx % RX_RING_SIZE;
2615 if (vp->rx_skbuff[entry] == NULL) {
2616 skb = dev_alloc_skb(PKT_BUF_SZ);
2618 static unsigned long last_jif;
2619 if ((jiffies - last_jif) > 10 * HZ) {
2620 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2623 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2624 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2625 break; /* Bad news! */
2627 skb->dev = dev; /* Mark as being used by this device. */
2628 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2629 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2630 vp->rx_skbuff[entry] = skb;
2632 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2633 outw(UpUnstall, ioaddr + EL3_CMD);
2639 * If we've hit a total OOM refilling the Rx ring we poll once a second
2640 * for some memory. Otherwise there is no way to restart the rx process.
2643 rx_oom_timer(unsigned long arg)
2645 struct net_device *dev = (struct net_device *)arg;
2646 struct vortex_private *vp = netdev_priv(dev);
2648 spin_lock_irq(&vp->lock);
2649 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2651 if (vortex_debug > 1) {
2652 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2653 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2655 spin_unlock_irq(&vp->lock);
2659 vortex_down(struct net_device *dev)
2661 struct vortex_private *vp = netdev_priv(dev);
2662 long ioaddr = dev->base_addr;
2664 netif_stop_queue (dev);
2666 del_timer_sync(&vp->rx_oom_timer);
2667 del_timer_sync(&vp->timer);
2669 /* Turn off statistics ASAP. We update vp->stats below. */
2670 outw(StatsDisable, ioaddr + EL3_CMD);
2672 /* Disable the receiver and transmitter. */
2673 outw(RxDisable, ioaddr + EL3_CMD);
2674 outw(TxDisable, ioaddr + EL3_CMD);
2676 if (dev->if_port == XCVR_10base2)
2677 /* Turn off thinnet power. Green! */
2678 outw(StopCoax, ioaddr + EL3_CMD);
2680 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2682 update_stats(ioaddr, dev);
2683 if (vp->full_bus_master_rx)
2684 outl(0, ioaddr + UpListPtr);
2685 if (vp->full_bus_master_tx)
2686 outl(0, ioaddr + DownListPtr);
2688 if (VORTEX_PCI(vp) && vp->enable_wol) {
2689 pci_save_state(VORTEX_PCI(vp), vp->power_state);
2695 vortex_close(struct net_device *dev)
2697 struct vortex_private *vp = netdev_priv(dev);
2698 long ioaddr = dev->base_addr;
2701 if (netif_device_present(dev))
2704 if (vortex_debug > 1) {
2705 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2706 dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
2707 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2708 " tx_queued %d Rx pre-checksummed %d.\n",
2709 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2713 if ( vp->rx_csumhits &&
2714 ((vp->drv_flags & HAS_HWCKSM) == 0) &&
2715 (hw_checksums[vp->card_idx] == -1)) {
2716 printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
2720 free_irq(dev->irq, dev);
2722 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2723 for (i = 0; i < RX_RING_SIZE; i++)
2724 if (vp->rx_skbuff[i]) {
2725 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2726 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2727 dev_kfree_skb(vp->rx_skbuff[i]);
2728 vp->rx_skbuff[i] = 0;
2731 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2732 for (i = 0; i < TX_RING_SIZE; i++) {
2733 if (vp->tx_skbuff[i]) {
2734 struct sk_buff *skb = vp->tx_skbuff[i];
2738 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2739 pci_unmap_single(VORTEX_PCI(vp),
2740 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2741 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2744 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2747 vp->tx_skbuff[i] = 0;
2756 dump_tx_ring(struct net_device *dev)
2758 if (vortex_debug > 0) {
2759 struct vortex_private *vp = netdev_priv(dev);
2760 long ioaddr = dev->base_addr;
2762 if (vp->full_bus_master_tx) {
2764 int stalled = inl(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2766 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2767 vp->full_bus_master_tx,
2768 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2769 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2770 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2771 inl(ioaddr + DownListPtr),
2772 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2773 issue_and_wait(dev, DownStall);
2774 for (i = 0; i < TX_RING_SIZE; i++) {
2775 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2778 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2780 le32_to_cpu(vp->tx_ring[i].length),
2782 le32_to_cpu(vp->tx_ring[i].status));
2785 outw(DownUnstall, ioaddr + EL3_CMD);
2790 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2792 struct vortex_private *vp = netdev_priv(dev);
2793 unsigned long flags;
2795 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2796 spin_lock_irqsave (&vp->lock, flags);
2797 update_stats(dev->base_addr, dev);
2798 spin_unlock_irqrestore (&vp->lock, flags);
2803 /* Update statistics.
2804 Unlike with the EL3 we need not worry about interrupts changing
2805 the window setting from underneath us, but we must still guard
2806 against a race condition with a StatsUpdate interrupt updating the
2807 table. This is done by checking that the ASM (!) code generated uses
2808 atomic updates with '+='.
2810 static void update_stats(long ioaddr, struct net_device *dev)
2812 struct vortex_private *vp = netdev_priv(dev);
2813 int old_window = inw(ioaddr + EL3_CMD);
2815 if (old_window == 0xffff) /* Chip suspended or ejected. */
2817 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2818 /* Switch to the stats window, and read everything. */
2820 vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2821 vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2822 /* Multiple collisions. */ inb(ioaddr + 2);
2823 vp->stats.collisions += inb(ioaddr + 3);
2824 vp->stats.tx_window_errors += inb(ioaddr + 4);
2825 vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2826 vp->stats.tx_packets += inb(ioaddr + 6);
2827 vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2828 /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2829 /* Tx deferrals */ inb(ioaddr + 8);
2830 /* Don't bother with register 9, an extension of registers 6&7.
2831 If we do use the 6&7 values the atomic update assumption above
2833 vp->stats.rx_bytes += inw(ioaddr + 10);
2834 vp->stats.tx_bytes += inw(ioaddr + 12);
2835 /* New: On the Vortex we must also clear the BadSSD counter. */
2840 u8 up = inb(ioaddr + 13);
2841 vp->stats.rx_bytes += (up & 0x0f) << 16;
2842 vp->stats.tx_bytes += (up & 0xf0) << 12;
2845 EL3WINDOW(old_window >> 13);
2850 static void vortex_get_drvinfo(struct net_device *dev,
2851 struct ethtool_drvinfo *info)
2853 struct vortex_private *vp = netdev_priv(dev);
2855 strcpy(info->driver, DRV_NAME);
2856 strcpy(info->version, DRV_VERSION);
2857 if (VORTEX_PCI(vp)) {
2858 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
2860 if (VORTEX_EISA(vp))
2861 sprintf(info->bus_info, vp->gendev->bus_id);
2863 sprintf(info->bus_info, "EISA 0x%lx %d",
2864 dev->base_addr, dev->irq);
2868 static struct ethtool_ops vortex_ethtool_ops = {
2869 .get_drvinfo = vortex_get_drvinfo,
2872 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2874 struct vortex_private *vp = netdev_priv(dev);
2875 long ioaddr = dev->base_addr;
2876 struct mii_ioctl_data *data = if_mii(rq);
2877 int phy = vp->phys[0] & 0x1f;
2881 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2884 case SIOCGMIIREG: /* Read MII PHY register. */
2886 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2890 case SIOCSMIIREG: /* Write MII PHY register. */
2891 if (!capable(CAP_NET_ADMIN)) {
2895 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2900 retval = -EOPNOTSUPP;
2907 /* Pre-Cyclone chips have no documented multicast filter, so the only
2908 multicast setting is to receive all multicast frames. At least
2909 the chip has a very clean way to set the mode, unlike many others. */
2910 static void set_rx_mode(struct net_device *dev)
2912 long ioaddr = dev->base_addr;
2915 if (dev->flags & IFF_PROMISC) {
2916 if (vortex_debug > 0)
2917 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
2918 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2919 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2920 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2922 new_mode = SetRxFilter | RxStation | RxBroadcast;
2924 outw(new_mode, ioaddr + EL3_CMD);
2927 /* MII transceiver control section.
2928 Read and write the MII registers using software-generated serial
2929 MDIO protocol. See the MII specifications or DP83840A data sheet
2932 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
2933 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
2934 "overclocking" issues. */
2935 #define mdio_delay() inl(mdio_addr)
2937 #define MDIO_SHIFT_CLK 0x01
2938 #define MDIO_DIR_WRITE 0x04
2939 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
2940 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
2941 #define MDIO_DATA_READ 0x02
2942 #define MDIO_ENB_IN 0x00
2944 /* Generate the preamble required for initial synchronization and
2945 a few older transceivers. */
2946 static void mdio_sync(long ioaddr, int bits)
2948 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2950 /* Establish sync by sending at least 32 logic ones. */
2951 while (-- bits >= 0) {
2952 outw(MDIO_DATA_WRITE1, mdio_addr);
2954 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
2959 static int mdio_read(struct net_device *dev, int phy_id, int location)
2961 struct vortex_private *vp = netdev_priv(dev);
2963 long ioaddr = dev->base_addr;
2964 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
2965 unsigned int retval = 0;
2966 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2968 spin_lock_bh(&vp->mdio_lock);
2970 if (mii_preamble_required)
2971 mdio_sync(ioaddr, 32);
2973 /* Shift the read command bits out. */
2974 for (i = 14; i >= 0; i--) {
2975 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2976 outw(dataval, mdio_addr);
2978 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2981 /* Read the two transition, 16 data, and wire-idle bits. */
2982 for (i = 19; i > 0; i--) {
2983 outw(MDIO_ENB_IN, mdio_addr);
2985 retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
2986 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
2989 spin_unlock_bh(&vp->mdio_lock);
2990 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
2993 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
2995 struct vortex_private *vp = netdev_priv(dev);
2996 long ioaddr = dev->base_addr;
2997 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
2998 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3001 spin_lock_bh(&vp->mdio_lock);
3003 if (mii_preamble_required)
3004 mdio_sync(ioaddr, 32);
3006 /* Shift the command bits out. */
3007 for (i = 31; i >= 0; i--) {
3008 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3009 outw(dataval, mdio_addr);
3011 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3014 /* Leave the interface idle. */
3015 for (i = 1; i >= 0; i--) {
3016 outw(MDIO_ENB_IN, mdio_addr);
3018 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3021 spin_unlock_bh(&vp->mdio_lock);
3025 /* ACPI: Advanced Configuration and Power Interface. */
3026 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3027 static void acpi_set_WOL(struct net_device *dev)
3029 struct vortex_private *vp = netdev_priv(dev);
3030 long ioaddr = dev->base_addr;
3032 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3034 outw(2, ioaddr + 0x0c);
3035 /* The RxFilter must accept the WOL frames. */
3036 outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3037 outw(RxEnable, ioaddr + EL3_CMD);
3039 /* Change the power state to D3; RxEnable doesn't take effect. */
3040 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3041 pci_set_power_state(VORTEX_PCI(vp), 3);
3045 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3047 struct net_device *dev = pci_get_drvdata(pdev);
3048 struct vortex_private *vp;
3051 printk("vortex_remove_one called for Compaq device!\n");
3055 vp = netdev_priv(dev);
3057 /* AKPM: FIXME: we should have
3058 * if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
3061 unregister_netdev(dev);
3062 /* Should really use issue_and_wait() here */
3063 outw(TotalReset|0x14, dev->base_addr + EL3_CMD);
3065 if (VORTEX_PCI(vp) && vp->enable_wol) {
3066 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
3067 if (vp->pm_state_valid)
3068 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
3071 pci_free_consistent(pdev,
3072 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3073 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3076 if (vp->must_free_region)
3077 release_region(dev->base_addr, vp->io_size);
3082 static struct pci_driver vortex_driver = {
3084 .probe = vortex_init_one,
3085 .remove = __devexit_p(vortex_remove_one),
3086 .id_table = vortex_pci_tbl,
3088 .suspend = vortex_suspend,
3089 .resume = vortex_resume,
3094 static int vortex_have_pci;
3095 static int vortex_have_eisa;
3098 static int __init vortex_init (void)
3100 int pci_rc, eisa_rc;
3102 pci_rc = pci_module_init(&vortex_driver);
3103 eisa_rc = vortex_eisa_init();
3106 vortex_have_pci = 1;
3108 vortex_have_eisa = 1;
3110 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3114 static void __exit vortex_eisa_cleanup (void)
3116 struct vortex_private *vp;
3120 /* Take care of the EISA devices */
3121 eisa_driver_unregister (&vortex_eisa_driver);
3124 if (compaq_net_device) {
3125 vp = compaq_net_device->priv;
3126 ioaddr = compaq_net_device->base_addr;
3128 unregister_netdev (compaq_net_device);
3129 outw (TotalReset, ioaddr + EL3_CMD);
3130 release_region (ioaddr, VORTEX_TOTAL_SIZE);
3132 free_netdev (compaq_net_device);
3137 static void __exit vortex_cleanup (void)
3139 if (vortex_have_pci)
3140 pci_unregister_driver (&vortex_driver);
3141 if (vortex_have_eisa)
3142 vortex_eisa_cleanup ();
3146 module_init(vortex_init);
3147 module_exit(vortex_cleanup);