1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
241 #include <linux/config.h>
242 #include <linux/module.h>
243 #include <linux/kernel.h>
244 #include <linux/string.h>
245 #include <linux/timer.h>
246 #include <linux/errno.h>
247 #include <linux/in.h>
248 #include <linux/ioport.h>
249 #include <linux/slab.h>
250 #include <linux/interrupt.h>
251 #include <linux/pci.h>
252 #include <linux/mii.h>
253 #include <linux/init.h>
254 #include <linux/netdevice.h>
255 #include <linux/etherdevice.h>
256 #include <linux/skbuff.h>
257 #include <linux/ethtool.h>
258 #include <linux/highmem.h>
259 #include <linux/eisa.h>
260 #include <asm/irq.h> /* For NR_IRQS only. */
261 #include <asm/bitops.h>
263 #include <asm/uaccess.h>
265 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
266 This is only in the support-all-kernels source code. */
268 #define RUN_AT(x) (jiffies + (x))
270 #include <linux/delay.h>
273 static char version[] __devinitdata =
274 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
276 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
277 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
278 DRV_VERSION " " DRV_RELDATE);
279 MODULE_LICENSE("GPL");
280 MODULE_VERSION(DRV_VERSION);
282 MODULE_PARM(debug, "i");
283 MODULE_PARM(global_options, "i");
284 MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
285 MODULE_PARM(global_full_duplex, "i");
286 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
287 MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
288 MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
289 MODULE_PARM(global_enable_wol, "i");
290 MODULE_PARM(enable_wol, "1-" __MODULE_STRING(8) "i");
291 MODULE_PARM(rx_copybreak, "i");
292 MODULE_PARM(max_interrupt_work, "i");
293 MODULE_PARM(compaq_ioaddr, "i");
294 MODULE_PARM(compaq_irq, "i");
295 MODULE_PARM(compaq_device_id, "i");
296 MODULE_PARM(watchdog, "i");
297 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
298 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
299 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
300 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
301 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
302 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
303 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
304 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
305 MODULE_PARM_DESC(global_enable_wol, "3c59x: same as enable_wol, but applies to all NICs if options is unset");
306 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
307 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
308 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
309 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
310 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
311 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
313 /* Operational parameter that usually are not changed. */
315 /* The Vortex size is twice that of the original EtherLinkIII series: the
316 runtime register window, window 1, is now always mapped in.
317 The Boomerang size is twice as large as the Vortex -- it has additional
318 bus master control registers. */
319 #define VORTEX_TOTAL_SIZE 0x20
320 #define BOOMERANG_TOTAL_SIZE 0x40
322 /* Set iff a MII transceiver on any interface requires mdio preamble.
323 This only set with the original DP83840 on older 3c905 boards, so the extra
324 code size of a per-interface flag is not worthwhile. */
325 static char mii_preamble_required;
327 #define PFX DRV_NAME ": "
334 I. Board Compatibility
336 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
337 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
338 versions of the FastEtherLink cards. The supported product IDs are
339 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
341 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
342 with the kernel source or available from
343 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
345 II. Board-specific settings
347 PCI bus devices are configured by the system at boot time, so no jumpers
348 need to be set on the board. The system BIOS should be set to assign the
349 PCI INTA signal to an otherwise unused system IRQ line.
351 The EEPROM settings for media type and forced-full-duplex are observed.
352 The EEPROM media type should be left at the default "autoselect" unless using
353 10base2 or AUI connections which cannot be reliably detected.
355 III. Driver operation
357 The 3c59x series use an interface that's very similar to the previous 3c5x9
358 series. The primary interface is two programmed-I/O FIFOs, with an
359 alternate single-contiguous-region bus-master transfer (see next).
361 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
362 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
363 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
364 programmed-I/O interface that has been removed in 'B' and subsequent board
367 One extension that is advertised in a very large font is that the adapters
368 are capable of being bus masters. On the Vortex chip this capability was
369 only for a single contiguous region making it far less useful than the full
370 bus master capability. There is a significant performance impact of taking
371 an extra interrupt or polling for the completion of each transfer, as well
372 as difficulty sharing the single transfer engine between the transmit and
373 receive threads. Using DMA transfers is a win only with large blocks or
374 with the flawed versions of the Intel Orion motherboard PCI controller.
376 The Boomerang chip's full-bus-master interface is useful, and has the
377 currently-unused advantages over other similar chips that queued transmit
378 packets may be reordered and receive buffer groups are associated with a
381 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
382 Rather than a fixed intermediate receive buffer, this scheme allocates
383 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
384 the copying breakpoint: it is chosen to trade-off the memory wasted by
385 passing the full-sized skbuff to the queue layer for all frames vs. the
386 copying cost of copying a frame to a correctly-sized skbuff.
388 IIIC. Synchronization
389 The driver runs as two independent, single-threaded flows of control. One
390 is the send-packet routine, which enforces single-threaded use by the
391 dev->tbusy flag. The other thread is the interrupt handler, which is single
392 threaded by the hardware and other software.
396 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
397 3c590, 3c595, and 3c900 boards.
398 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
399 the EISA version is called "Demon". According to Terry these names come
400 from rides at the local amusement park.
402 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
403 This driver only supports ethernet packets because of the skbuff allocation
407 /* This table drives the PCI probe routines. It's mostly boilerplate in all
408 of the drivers, and will likely be provided by some future kernel.
411 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
412 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
415 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
416 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
417 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
418 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
419 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
420 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
471 /* note: this array directly indexed by above enums, and MUST
472 * be kept in sync with both the enums above, and the PCI device
475 static struct vortex_chip_info {
480 } vortex_info_tbl[] __devinitdata = {
481 {"3c590 Vortex 10Mbps",
482 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
483 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
484 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
485 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
486 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
487 {"3c595 Vortex 100baseTx",
488 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
489 {"3c595 Vortex 100baseT4",
490 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
492 {"3c595 Vortex 100base-MII",
493 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
494 {"3c900 Boomerang 10baseT",
495 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
496 {"3c900 Boomerang 10Mbps Combo",
497 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|EEPROM_RESET, 64, },
498 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
499 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
500 {"3c900 Cyclone 10Mbps Combo",
501 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
503 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
504 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
505 {"3c900B-FL Cyclone 10base-FL",
506 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
507 {"3c905 Boomerang 100baseTx",
508 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
509 {"3c905 Boomerang 100baseT4",
510 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_RESET, 64, },
511 {"3c905B Cyclone 100baseTx",
512 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
514 {"3c905B Cyclone 10/100/BNC",
515 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
516 {"3c905B-FX Cyclone 100baseFx",
517 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
519 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
520 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
521 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
523 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
526 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
527 {"3cSOHO100-TX Hurricane",
528 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
529 {"3c555 Laptop Hurricane",
530 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
531 {"3c556 Laptop Tornado",
532 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
534 {"3c556B Laptop Hurricane",
535 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
536 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
538 {"3c575 [Megahertz] 10/100 LAN CardBus",
539 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
540 {"3c575 Boomerang CardBus",
541 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
542 {"3CCFE575BT Cyclone CardBus",
543 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
544 INVERT_LED_PWR|HAS_HWCKSM, 128, },
545 {"3CCFE575CT Tornado CardBus",
546 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
547 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
548 {"3CCFE656 Cyclone CardBus",
549 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
550 INVERT_LED_PWR|HAS_HWCKSM, 128, },
552 {"3CCFEM656B Cyclone+Winmodem CardBus",
553 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
554 INVERT_LED_PWR|HAS_HWCKSM, 128, },
555 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
556 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
557 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
558 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
559 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
561 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
562 {"3c982 Hydra Dual Port A",
563 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
565 {"3c982 Hydra Dual Port B",
566 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
568 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
569 {"3c920B-EMB-WNM Tornado",
570 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
572 {NULL,}, /* NULL terminated list. */
576 static struct pci_device_id vortex_pci_tbl[] = {
577 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
578 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
579 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
580 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
581 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
583 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
584 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
585 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
586 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
587 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
589 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
590 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
591 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
592 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
593 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
595 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
596 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
597 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
598 { 0x10B7, 0x9202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9202 },
599 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
600 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
602 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
603 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
604 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
605 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
606 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
608 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
609 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
610 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
611 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
612 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
614 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
615 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
616 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
617 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
618 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
620 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
621 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
623 {0,} /* 0 terminated list. */
625 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
628 /* Operational definitions.
629 These are not used by other compilation units and thus are not
630 exported in a ".h" file.
632 First the windows. There are eight register windows, with the command
633 and status registers available in each.
635 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
637 #define EL3_STATUS 0x0e
639 /* The top five bits written to EL3_CMD are a command, the lower
640 11 bits are the parameter, if applicable.
641 Note that 11 parameters bits was fine for ethernet, but the new chip
642 can handle FDDI length frames (~4500 octets) and now parameters count
643 32-bit 'Dwords' rather than octets. */
646 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
647 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
648 UpStall = 6<<11, UpUnstall = (6<<11)+1,
649 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
650 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
651 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
652 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
653 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
654 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
655 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
657 /* The SetRxFilter command accepts the following classes: */
659 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
661 /* Bits in the general status register. */
663 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
664 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
665 IntReq = 0x0040, StatsFull = 0x0080,
666 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
667 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
668 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
671 /* Register window 1 offsets, the window used in normal operation.
672 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
674 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
675 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
676 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
679 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
680 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
681 IntrStatus=0x0E, /* Valid in all windows. */
683 enum Win0_EEPROM_bits {
684 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
685 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
686 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
688 /* EEPROM locations. */
690 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
691 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
692 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
693 DriverTune=13, Checksum=15};
695 enum Window2 { /* Window 2. */
698 enum Window3 { /* Window 3: MAC/config bits. */
699 Wn3_Config=0, Wn3_MaxPktSize=4, Wn3_MAC_Ctrl=6, Wn3_Options=8,
702 #define BFEXT(value, offset, bitcount) \
703 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
705 #define BFINS(lhs, rhs, offset, bitcount) \
706 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
707 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
709 #define RAM_SIZE(v) BFEXT(v, 0, 3)
710 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
711 #define RAM_SPEED(v) BFEXT(v, 4, 2)
712 #define ROM_SIZE(v) BFEXT(v, 6, 2)
713 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
714 #define XCVR(v) BFEXT(v, 20, 4)
715 #define AUTOSELECT(v) BFEXT(v, 24, 1)
717 enum Window4 { /* Window 4: Xcvr/media bits. */
718 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
720 enum Win4_Media_bits {
721 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
722 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
723 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
724 Media_LnkBeat = 0x0800,
726 enum Window7 { /* Window 7: Bus Master control. */
727 Wn7_MasterAddr = 0, Wn7_VlanEtherType=4, Wn7_MasterLen = 6,
728 Wn7_MasterStatus = 12,
730 /* Boomerang bus master control registers. */
732 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
733 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
736 /* The Rx and Tx descriptor lists.
737 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
738 alignment contraint on tx_ring[] and rx_ring[]. */
739 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
740 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
741 struct boom_rx_desc {
742 u32 next; /* Last entry points to 0. */
744 u32 addr; /* Up to 63 addr/len pairs possible. */
745 s32 length; /* Set LAST_FRAG to indicate last pair. */
747 /* Values for the Rx status entry. */
748 enum rx_desc_status {
749 RxDComplete=0x00008000, RxDError=0x4000,
750 /* See boomerang_rx() for actual error bits */
751 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
752 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
756 #define DO_ZEROCOPY 1
758 #define DO_ZEROCOPY 0
761 struct boom_tx_desc {
762 u32 next; /* Last entry points to 0. */
763 s32 status; /* bits 0:12 length, others see below. */
768 } frag[1+MAX_SKB_FRAGS];
775 /* Values for the Tx status entry. */
776 enum tx_desc_status {
777 CRCDisable=0x2000, TxDComplete=0x8000,
778 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
779 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
782 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
783 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
785 struct vortex_private {
786 /* The Rx and Tx rings should be quad-word-aligned. */
787 struct boom_rx_desc* rx_ring;
788 struct boom_tx_desc* tx_ring;
789 dma_addr_t rx_ring_dma;
790 dma_addr_t tx_ring_dma;
791 /* The addresses of transmit- and receive-in-place skbuffs. */
792 struct sk_buff* rx_skbuff[RX_RING_SIZE];
793 struct sk_buff* tx_skbuff[TX_RING_SIZE];
794 unsigned int cur_rx, cur_tx; /* The next free ring entry */
795 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
796 struct net_device_stats stats;
797 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
798 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
800 /* PCI configuration space information. */
801 struct device *gendev;
802 char *cb_fn_base; /* CardBus function status addr space. */
804 /* Some values here only for performance evaluation and path-coverage */
805 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
808 /* The remainder are related to chip state, mostly media selection. */
809 struct timer_list timer; /* Media selection timer. */
810 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
811 int options; /* User-settable misc. driver options. */
812 unsigned int media_override:4, /* Passed-in media type. */
813 default_media:4, /* Read from the EEPROM/Wn3_Config. */
814 full_duplex:1, force_fd:1, autoselect:1,
815 bus_master:1, /* Vortex can only do a fragment bus-m. */
816 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
817 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
818 partner_flow_ctrl:1, /* Partner supports flow control */
820 enable_wol:1, /* Wake-on-LAN is enabled */
821 pm_state_valid:1, /* power_state[] has sane contents */
824 must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */
825 large_frames:1; /* accept large frames */
829 u16 available_media; /* From Wn3_Options. */
830 u16 capabilities, info1, info2; /* Various, from EEPROM. */
831 u16 advertising; /* NWay media advertisement */
832 unsigned char phys[2]; /* MII device addresses. */
833 u16 deferred; /* Resend these interrupts when we
834 * bale from the ISR */
835 u16 io_size; /* Size of PCI region (for release_region) */
836 spinlock_t lock; /* Serialise access to device & its vortex_private */
837 spinlock_t mdio_lock; /* Serialise access to mdio hardware */
842 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
844 #define DEVICE_PCI(dev) NULL
847 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
850 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
852 #define DEVICE_EISA(dev) NULL
855 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
857 /* The action to take with a media selection timer tick.
858 Note that we deviate from the 3Com order by checking 10base2 before AUI.
861 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
862 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
865 static struct media_table {
867 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
868 mask:8, /* The transceiver-present bit in Wn3_Config.*/
869 next:8; /* The media type to try next. */
870 int wait; /* Time before we check media status. */
872 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
873 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
874 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
875 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
876 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
877 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
878 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
879 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
880 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
881 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
882 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
885 static int vortex_probe1(struct device *gendev, long ioaddr, int irq,
886 int chip_idx, int card_idx);
887 static void vortex_up(struct net_device *dev);
888 static void vortex_down(struct net_device *dev, int final);
889 static int vortex_open(struct net_device *dev);
890 static void mdio_sync(long ioaddr, int bits);
891 static int mdio_read(struct net_device *dev, int phy_id, int location);
892 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
893 static void vortex_timer(unsigned long arg);
894 static void rx_oom_timer(unsigned long arg);
895 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
896 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
897 static int vortex_rx(struct net_device *dev);
898 static int boomerang_rx(struct net_device *dev);
899 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
900 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
901 static int vortex_close(struct net_device *dev);
902 static void dump_tx_ring(struct net_device *dev);
903 static void update_stats(long ioaddr, struct net_device *dev);
904 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
905 static void set_rx_mode(struct net_device *dev);
907 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
909 static void vortex_tx_timeout(struct net_device *dev);
910 static void acpi_set_WOL(struct net_device *dev);
911 static struct ethtool_ops vortex_ethtool_ops;
912 static void set_8021q_mode(struct net_device *dev, int enable);
915 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
916 /* Option count limit only -- unlimited interfaces are supported. */
918 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
919 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
920 static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
921 static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
922 static int enable_wol[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
923 static int global_options = -1;
924 static int global_full_duplex = -1;
925 static int global_enable_wol = -1;
927 /* #define dev_alloc_skb dev_alloc_skb_debug */
929 /* Variables to work-around the Compaq PCI BIOS32 problem. */
930 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
931 static struct net_device *compaq_net_device;
933 static int vortex_cards_found;
935 #ifdef CONFIG_NET_POLL_CONTROLLER
936 static void poll_vortex(struct net_device *dev)
938 struct vortex_private *vp = (struct vortex_private *)dev->priv;
940 local_save_flags(flags);
942 (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev,NULL);
943 local_irq_restore(flags);
949 static int vortex_suspend (struct pci_dev *pdev, u32 state)
951 struct net_device *dev = pci_get_drvdata(pdev);
953 if (dev && dev->priv) {
954 if (netif_running(dev)) {
955 netif_device_detach(dev);
962 static int vortex_resume (struct pci_dev *pdev)
964 struct net_device *dev = pci_get_drvdata(pdev);
966 if (dev && dev->priv) {
967 if (netif_running(dev)) {
969 netif_device_attach(dev);
975 #endif /* CONFIG_PM */
978 static struct eisa_device_id vortex_eisa_ids[] = {
979 { "TCM5920", CH_3C592 },
980 { "TCM5970", CH_3C597 },
984 static int vortex_eisa_probe (struct device *device);
985 static int vortex_eisa_remove (struct device *device);
987 static struct eisa_driver vortex_eisa_driver = {
988 .id_table = vortex_eisa_ids,
991 .probe = vortex_eisa_probe,
992 .remove = vortex_eisa_remove
996 static int vortex_eisa_probe (struct device *device)
999 struct eisa_device *edev;
1001 edev = to_eisa_device (device);
1002 ioaddr = edev->base_addr;
1004 if (!request_region(ioaddr, VORTEX_TOTAL_SIZE, DRV_NAME))
1007 if (vortex_probe1(device, ioaddr, inw(ioaddr + 0xC88) >> 12,
1008 edev->id.driver_data, vortex_cards_found)) {
1009 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1013 vortex_cards_found++;
1018 static int vortex_eisa_remove (struct device *device)
1020 struct eisa_device *edev;
1021 struct net_device *dev;
1022 struct vortex_private *vp;
1025 edev = to_eisa_device (device);
1026 dev = eisa_get_drvdata (edev);
1029 printk("vortex_eisa_remove called for Compaq device!\n");
1033 vp = netdev_priv(dev);
1034 ioaddr = dev->base_addr;
1036 unregister_netdev (dev);
1037 outw (TotalReset|0x14, ioaddr + EL3_CMD);
1038 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1045 /* returns count found (>= 0), or negative on error */
1046 static int __init vortex_eisa_init (void)
1049 int orig_cards_found = vortex_cards_found;
1052 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1053 /* Because of the way EISA bus is probed, we cannot assume
1054 * any device have been found when we exit from
1055 * eisa_driver_register (the bus root driver may not be
1056 * initialized yet). So we blindly assume something was
1057 * found, and let the sysfs magic happend... */
1063 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1064 if (compaq_ioaddr) {
1065 vortex_probe1(NULL, compaq_ioaddr, compaq_irq,
1066 compaq_device_id, vortex_cards_found++);
1069 return vortex_cards_found - orig_cards_found + eisa_found;
1072 /* returns count (>= 0), or negative on error */
1073 static int __devinit vortex_init_one (struct pci_dev *pdev,
1074 const struct pci_device_id *ent)
1078 /* wake up and enable device */
1079 if (pci_enable_device (pdev)) {
1082 rc = vortex_probe1 (&pdev->dev, pci_resource_start (pdev, 0),
1083 pdev->irq, ent->driver_data, vortex_cards_found);
1085 vortex_cards_found++;
1091 * Start up the PCI/EISA device which is described by *gendev.
1092 * Return 0 on success.
1094 * NOTE: pdev can be NULL, for the case of a Compaq device
1096 static int __devinit vortex_probe1(struct device *gendev,
1097 long ioaddr, int irq,
1098 int chip_idx, int card_idx)
1100 struct vortex_private *vp;
1102 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1104 struct net_device *dev;
1105 static int printed_version;
1106 int retval, print_info;
1107 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1108 char *print_name = "3c59x";
1109 struct pci_dev *pdev = NULL;
1110 struct eisa_device *edev = NULL;
1112 if (!printed_version) {
1114 printed_version = 1;
1118 if ((pdev = DEVICE_PCI(gendev))) {
1119 print_name = pci_name(pdev);
1122 if ((edev = DEVICE_EISA(gendev))) {
1123 print_name = edev->dev.bus_id;
1127 dev = alloc_etherdev(sizeof(*vp));
1130 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1133 SET_MODULE_OWNER(dev);
1134 SET_NETDEV_DEV(dev, gendev);
1135 vp = netdev_priv(dev);
1137 option = global_options;
1139 /* The lower four bits are the media type. */
1140 if (dev->mem_start) {
1142 * The 'options' param is passed in as the third arg to the
1143 * LILO 'ether=' argument for non-modular use
1145 option = dev->mem_start;
1147 else if (card_idx < MAX_UNITS) {
1148 if (options[card_idx] >= 0)
1149 option = options[card_idx];
1153 if (option & 0x8000)
1155 if (option & 0x4000)
1157 if (option & 0x0400)
1161 print_info = (vortex_debug > 1);
1163 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1165 printk(KERN_INFO "%s: 3Com %s %s at 0x%lx. Vers " DRV_VERSION "\n",
1167 pdev ? "PCI" : "EISA",
1171 dev->base_addr = ioaddr;
1174 vp->large_frames = mtu > 1500;
1175 vp->drv_flags = vci->drv_flags;
1176 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1177 vp->io_size = vci->io_size;
1178 vp->card_idx = card_idx;
1180 /* module list only for Compaq device */
1181 if (gendev == NULL) {
1182 compaq_net_device = dev;
1185 /* PCI-only startup logic */
1187 /* EISA resources already marked, so only PCI needs to do this here */
1188 /* Ignore return value, because Cardbus drivers already allocate for us */
1189 if (request_region(ioaddr, vci->io_size, print_name) != NULL)
1190 vp->must_free_region = 1;
1192 /* enable bus-mastering if necessary */
1193 if (vci->flags & PCI_USES_MASTER)
1194 pci_set_master (pdev);
1196 if (vci->drv_flags & IS_VORTEX) {
1198 u8 new_latency = 248;
1200 /* Check the PCI latency value. On the 3c590 series the latency timer
1201 must be set to the maximum value to avoid data corruption that occurs
1202 when the timer expires during a transfer. This bug exists the Vortex
1204 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1205 if (pci_latency < new_latency) {
1206 printk(KERN_INFO "%s: Overriding PCI latency"
1207 " timer (CFLT) setting of %d, new value is %d.\n",
1208 print_name, pci_latency, new_latency);
1209 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1214 spin_lock_init(&vp->lock);
1215 spin_lock_init(&vp->mdio_lock);
1216 vp->gendev = gendev;
1218 /* Makes sure rings are at least 16 byte aligned. */
1219 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1220 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1223 if (vp->rx_ring == 0)
1226 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1227 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1229 /* if we are a PCI driver, we store info in pdev->driver_data
1230 * instead of a module list */
1232 pci_set_drvdata(pdev, dev);
1234 eisa_set_drvdata (edev, dev);
1236 vp->media_override = 7;
1238 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1239 if (vp->media_override != 7)
1241 vp->full_duplex = (option & 0x200) ? 1 : 0;
1242 vp->bus_master = (option & 16) ? 1 : 0;
1245 if (global_full_duplex > 0)
1246 vp->full_duplex = 1;
1247 if (global_enable_wol > 0)
1250 if (card_idx < MAX_UNITS) {
1251 if (full_duplex[card_idx] > 0)
1252 vp->full_duplex = 1;
1253 if (flow_ctrl[card_idx] > 0)
1255 if (enable_wol[card_idx] > 0)
1259 vp->force_fd = vp->full_duplex;
1260 vp->options = option;
1261 /* Read the station address from the EEPROM. */
1266 if (vci->drv_flags & EEPROM_8BIT)
1268 else if (vci->drv_flags & EEPROM_OFFSET)
1269 base = EEPROM_Read + 0x30;
1273 for (i = 0; i < 0x40; i++) {
1275 outw(base + i, ioaddr + Wn0EepromCmd);
1276 /* Pause for at least 162 us. for the read to take place. */
1277 for (timer = 10; timer >= 0; timer--) {
1279 if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1282 eeprom[i] = inw(ioaddr + Wn0EepromData);
1285 for (i = 0; i < 0x18; i++)
1286 checksum ^= eeprom[i];
1287 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1288 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1290 checksum ^= eeprom[i++];
1291 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1293 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1294 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1295 for (i = 0; i < 3; i++)
1296 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1298 for (i = 0; i < 6; i++)
1299 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1301 /* Unfortunately an all zero eeprom passes the checksum and this
1302 gets found in the wild in failure cases. Crypto is hard 8) */
1303 if (!is_valid_ether_addr(dev->dev_addr)) {
1305 printk(KERN_ERR "*** EEPROM MAC address is invalid.\n");
1306 goto free_ring; /* With every pack */
1309 for (i = 0; i < 6; i++)
1310 outb(dev->dev_addr[i], ioaddr + i);
1314 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1317 printk(", IRQ %d\n", dev->irq);
1318 /* Tell them about an invalid IRQ. */
1319 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1320 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1325 step = (inb(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1327 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1328 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1329 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1333 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1334 unsigned long fn_st_addr; /* Cardbus function status space */
1337 fn_st_addr = pci_resource_start (pdev, 2);
1339 vp->cb_fn_base = ioremap(fn_st_addr, 128);
1341 if (!vp->cb_fn_base)
1345 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1346 print_name, fn_st_addr, vp->cb_fn_base);
1350 n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1351 if (vp->drv_flags & INVERT_LED_PWR)
1353 if (vp->drv_flags & INVERT_MII_PWR)
1355 outw(n, ioaddr + Wn2_ResetOptions);
1356 if (vp->drv_flags & WNO_XCVR_PWR) {
1358 outw(0x0800, ioaddr);
1362 /* Extract our information from the EEPROM data. */
1363 vp->info1 = eeprom[13];
1364 vp->info2 = eeprom[15];
1365 vp->capabilities = eeprom[16];
1367 if (vp->info1 & 0x8000) {
1368 vp->full_duplex = 1;
1370 printk(KERN_INFO "Full duplex capable\n");
1374 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1375 unsigned int config;
1377 vp->available_media = inw(ioaddr + Wn3_Options);
1378 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1379 vp->available_media = 0x40;
1380 config = inl(ioaddr + Wn3_Config);
1382 printk(KERN_DEBUG " Internal config register is %4.4x, "
1383 "transceivers %#x.\n", config, inw(ioaddr + Wn3_Options));
1384 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1385 8 << RAM_SIZE(config),
1386 RAM_WIDTH(config) ? "word" : "byte",
1387 ram_split[RAM_SPLIT(config)],
1388 AUTOSELECT(config) ? "autoselect/" : "",
1389 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1390 media_tbl[XCVR(config)].name);
1392 vp->default_media = XCVR(config);
1393 if (vp->default_media == XCVR_NWAY)
1395 vp->autoselect = AUTOSELECT(config);
1398 if (vp->media_override != 7) {
1399 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1400 print_name, vp->media_override,
1401 media_tbl[vp->media_override].name);
1402 dev->if_port = vp->media_override;
1404 dev->if_port = vp->default_media;
1406 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1407 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1408 int phy, phy_idx = 0;
1410 mii_preamble_required++;
1411 if (vp->drv_flags & EXTRA_PREAMBLE)
1412 mii_preamble_required++;
1413 mdio_sync(ioaddr, 32);
1414 mdio_read(dev, 24, 1);
1415 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1416 int mii_status, phyx;
1419 * For the 3c905CX we look at index 24 first, because it bogusly
1420 * reports an external PHY at all indices
1428 mii_status = mdio_read(dev, phyx, 1);
1429 if (mii_status && mii_status != 0xffff) {
1430 vp->phys[phy_idx++] = phyx;
1432 printk(KERN_INFO " MII transceiver found at address %d,"
1433 " status %4x.\n", phyx, mii_status);
1435 if ((mii_status & 0x0040) == 0)
1436 mii_preamble_required++;
1439 mii_preamble_required--;
1441 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1444 vp->advertising = mdio_read(dev, vp->phys[0], 4);
1445 if (vp->full_duplex) {
1446 /* Only advertise the FD media types. */
1447 vp->advertising &= ~0x02A0;
1448 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1453 if (vp->capabilities & CapBusMaster) {
1454 vp->full_bus_master_tx = 1;
1456 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1457 (vp->info2 & 1) ? "early" : "whole-frame" );
1459 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1460 vp->bus_master = 0; /* AKPM: vortex only */
1463 /* The 3c59x-specific entries in the device structure. */
1464 dev->open = vortex_open;
1465 if (vp->full_bus_master_tx) {
1466 dev->hard_start_xmit = boomerang_start_xmit;
1467 /* Actually, it still should work with iommu. */
1468 dev->features |= NETIF_F_SG;
1469 if (((hw_checksums[card_idx] == -1) && (vp->drv_flags & HAS_HWCKSM)) ||
1470 (hw_checksums[card_idx] == 1)) {
1471 dev->features |= NETIF_F_IP_CSUM;
1474 dev->hard_start_xmit = vortex_start_xmit;
1478 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1480 (dev->features & NETIF_F_SG) ? "en":"dis",
1481 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1484 dev->stop = vortex_close;
1485 dev->get_stats = vortex_get_stats;
1487 dev->do_ioctl = vortex_ioctl;
1489 dev->ethtool_ops = &vortex_ethtool_ops;
1490 dev->set_multicast_list = set_rx_mode;
1491 dev->tx_timeout = vortex_tx_timeout;
1492 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1493 #ifdef CONFIG_NET_POLL_CONTROLLER
1494 dev->poll_controller = poll_vortex;
1496 if (pdev && vp->enable_wol) {
1497 vp->pm_state_valid = 1;
1498 pci_save_state(VORTEX_PCI(vp), vp->power_state);
1501 retval = register_netdev(dev);
1506 pci_free_consistent(pdev,
1507 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1508 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1512 if (vp->must_free_region)
1513 release_region(ioaddr, vci->io_size);
1515 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1521 issue_and_wait(struct net_device *dev, int cmd)
1525 outw(cmd, dev->base_addr + EL3_CMD);
1526 for (i = 0; i < 2000; i++) {
1527 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress))
1531 /* OK, that didn't work. Do it the slow way. One second */
1532 for (i = 0; i < 100000; i++) {
1533 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress)) {
1534 if (vortex_debug > 1)
1535 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1536 dev->name, cmd, i * 10);
1541 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1542 dev->name, cmd, inw(dev->base_addr + EL3_STATUS));
1546 vortex_up(struct net_device *dev)
1548 long ioaddr = dev->base_addr;
1549 struct vortex_private *vp = netdev_priv(dev);
1550 unsigned int config;
1553 if (VORTEX_PCI(vp) && vp->enable_wol) {
1554 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
1555 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
1558 /* Before initializing select the active media port. */
1560 config = inl(ioaddr + Wn3_Config);
1562 if (vp->media_override != 7) {
1563 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1564 dev->name, vp->media_override,
1565 media_tbl[vp->media_override].name);
1566 dev->if_port = vp->media_override;
1567 } else if (vp->autoselect) {
1569 if (vortex_debug > 1)
1570 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1571 dev->name, dev->if_port);
1572 dev->if_port = XCVR_NWAY;
1574 /* Find first available media type, starting with 100baseTx. */
1575 dev->if_port = XCVR_100baseTx;
1576 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1577 dev->if_port = media_tbl[dev->if_port].next;
1578 if (vortex_debug > 1)
1579 printk(KERN_INFO "%s: first available media type: %s\n",
1580 dev->name, media_tbl[dev->if_port].name);
1583 dev->if_port = vp->default_media;
1584 if (vortex_debug > 1)
1585 printk(KERN_INFO "%s: using default media %s\n",
1586 dev->name, media_tbl[dev->if_port].name);
1589 init_timer(&vp->timer);
1590 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1591 vp->timer.data = (unsigned long)dev;
1592 vp->timer.function = vortex_timer; /* timer handler */
1593 add_timer(&vp->timer);
1595 init_timer(&vp->rx_oom_timer);
1596 vp->rx_oom_timer.data = (unsigned long)dev;
1597 vp->rx_oom_timer.function = rx_oom_timer;
1599 if (vortex_debug > 1)
1600 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1601 dev->name, media_tbl[dev->if_port].name);
1603 vp->full_duplex = vp->force_fd;
1604 config = BFINS(config, dev->if_port, 20, 4);
1605 if (vortex_debug > 6)
1606 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1607 outl(config, ioaddr + Wn3_Config);
1609 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1610 int mii_reg1, mii_reg5;
1612 /* Read BMSR (reg1) only to clear old status. */
1613 mii_reg1 = mdio_read(dev, vp->phys[0], 1);
1614 mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1615 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1616 netif_carrier_off(dev); /* No MII device or no link partner report */
1618 mii_reg5 &= vp->advertising;
1619 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1620 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1621 vp->full_duplex = 1;
1622 netif_carrier_on(dev);
1624 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1625 if (vortex_debug > 1)
1626 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1627 " info1 %04x, setting %s-duplex.\n",
1628 dev->name, vp->phys[0],
1630 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1634 /* Set the full-duplex bit. */
1635 outw( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1636 (vp->large_frames ? 0x40 : 0) |
1637 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1638 ioaddr + Wn3_MAC_Ctrl);
1640 if (vortex_debug > 1) {
1641 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1645 issue_and_wait(dev, TxReset);
1647 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1649 issue_and_wait(dev, RxReset|0x04);
1651 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1653 if (vortex_debug > 1) {
1655 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1656 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1659 /* Set the station address and mask in window 2 each time opened. */
1661 for (i = 0; i < 6; i++)
1662 outb(dev->dev_addr[i], ioaddr + i);
1663 for (; i < 12; i+=2)
1664 outw(0, ioaddr + i);
1666 if (vp->cb_fn_base) {
1667 unsigned short n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1668 if (vp->drv_flags & INVERT_LED_PWR)
1670 if (vp->drv_flags & INVERT_MII_PWR)
1672 outw(n, ioaddr + Wn2_ResetOptions);
1675 if (dev->if_port == XCVR_10base2)
1676 /* Start the thinnet transceiver. We should really wait 50ms...*/
1677 outw(StartCoax, ioaddr + EL3_CMD);
1678 if (dev->if_port != XCVR_NWAY) {
1680 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1681 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1684 /* Switch to the stats window, and clear all stats by reading. */
1685 outw(StatsDisable, ioaddr + EL3_CMD);
1687 for (i = 0; i < 10; i++)
1691 /* New: On the Vortex we must also clear the BadSSD counter. */
1694 /* ..and on the Boomerang we enable the extra statistics bits. */
1695 outw(0x0040, ioaddr + Wn4_NetDiag);
1697 /* Switch to register set 7 for normal use. */
1700 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1701 vp->cur_rx = vp->dirty_rx = 0;
1702 /* Initialize the RxEarly register as recommended. */
1703 outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1704 outl(0x0020, ioaddr + PktStatus);
1705 outl(vp->rx_ring_dma, ioaddr + UpListPtr);
1707 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1708 vp->cur_tx = vp->dirty_tx = 0;
1709 if (vp->drv_flags & IS_BOOMERANG)
1710 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1711 /* Clear the Rx, Tx rings. */
1712 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1713 vp->rx_ring[i].status = 0;
1714 for (i = 0; i < TX_RING_SIZE; i++)
1715 vp->tx_skbuff[i] = NULL;
1716 outl(0, ioaddr + DownListPtr);
1718 /* Set receiver mode: presumably accept b-case and phys addr only. */
1720 /* enable 802.1q tagged frames */
1721 set_8021q_mode(dev, 1);
1722 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1724 // issue_and_wait(dev, SetTxStart|0x07ff);
1725 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1726 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1727 /* Allow status bits to be seen. */
1728 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1729 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1730 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1731 (vp->bus_master ? DMADone : 0);
1732 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1733 (vp->full_bus_master_rx ? 0 : RxComplete) |
1734 StatsFull | HostError | TxComplete | IntReq
1735 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1736 outw(vp->status_enable, ioaddr + EL3_CMD);
1737 /* Ack all pending events, and set active indicator mask. */
1738 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1740 outw(vp->intr_enable, ioaddr + EL3_CMD);
1741 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1742 writel(0x8000, vp->cb_fn_base + 4);
1743 netif_start_queue (dev);
1747 vortex_open(struct net_device *dev)
1749 struct vortex_private *vp = netdev_priv(dev);
1753 /* Use the now-standard shared IRQ implementation. */
1754 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1755 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1756 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1760 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1761 if (vortex_debug > 2)
1762 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1763 for (i = 0; i < RX_RING_SIZE; i++) {
1764 struct sk_buff *skb;
1765 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1766 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1767 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1768 skb = dev_alloc_skb(PKT_BUF_SZ);
1769 vp->rx_skbuff[i] = skb;
1771 break; /* Bad news! */
1772 skb->dev = dev; /* Mark as being used by this device. */
1773 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1774 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1776 if (i != RX_RING_SIZE) {
1778 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1779 for (j = 0; j < i; j++) {
1780 if (vp->rx_skbuff[j]) {
1781 dev_kfree_skb(vp->rx_skbuff[j]);
1782 vp->rx_skbuff[j] = NULL;
1788 /* Wrap the ring. */
1789 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1796 free_irq(dev->irq, dev);
1798 if (vortex_debug > 1)
1799 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1804 vortex_timer(unsigned long data)
1806 struct net_device *dev = (struct net_device *)data;
1807 struct vortex_private *vp = netdev_priv(dev);
1808 long ioaddr = dev->base_addr;
1809 int next_tick = 10*HZ;
1811 int media_status, mii_status, old_window;
1813 if (vortex_debug > 2) {
1814 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1815 dev->name, media_tbl[dev->if_port].name);
1816 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1820 goto leave_media_alone;
1821 disable_irq(dev->irq);
1822 old_window = inw(ioaddr + EL3_CMD) >> 13;
1824 media_status = inw(ioaddr + Wn4_Media);
1825 switch (dev->if_port) {
1826 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1827 if (media_status & Media_LnkBeat) {
1828 netif_carrier_on(dev);
1830 if (vortex_debug > 1)
1831 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1832 dev->name, media_tbl[dev->if_port].name, media_status);
1834 netif_carrier_off(dev);
1835 if (vortex_debug > 1) {
1836 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1837 dev->name, media_tbl[dev->if_port].name, media_status);
1841 case XCVR_MII: case XCVR_NWAY:
1843 mii_status = mdio_read(dev, vp->phys[0], 1);
1845 if (vortex_debug > 2)
1846 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1847 dev->name, mii_status);
1848 if (mii_status & BMSR_LSTATUS) {
1849 int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1850 if (! vp->force_fd && mii_reg5 != 0xffff) {
1853 mii_reg5 &= vp->advertising;
1854 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1855 if (vp->full_duplex != duplex) {
1856 vp->full_duplex = duplex;
1857 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1858 "#%d link partner capability of %4.4x.\n",
1859 dev->name, vp->full_duplex ? "full" : "half",
1860 vp->phys[0], mii_reg5);
1861 /* Set the full-duplex bit. */
1863 outw( (vp->full_duplex ? 0x20 : 0) |
1864 (vp->large_frames ? 0x40 : 0) |
1865 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1866 ioaddr + Wn3_MAC_Ctrl);
1867 if (vortex_debug > 1)
1868 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1869 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1872 netif_carrier_on(dev);
1874 netif_carrier_off(dev);
1878 default: /* Other media types handled by Tx timeouts. */
1879 if (vortex_debug > 1)
1880 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1881 dev->name, media_tbl[dev->if_port].name, media_status);
1885 unsigned int config;
1888 dev->if_port = media_tbl[dev->if_port].next;
1889 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1890 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1891 dev->if_port = vp->default_media;
1892 if (vortex_debug > 1)
1893 printk(KERN_DEBUG "%s: Media selection failing, using default "
1895 dev->name, media_tbl[dev->if_port].name);
1897 if (vortex_debug > 1)
1898 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1900 dev->name, media_tbl[dev->if_port].name);
1901 next_tick = media_tbl[dev->if_port].wait;
1903 outw((media_status & ~(Media_10TP|Media_SQE)) |
1904 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1907 config = inl(ioaddr + Wn3_Config);
1908 config = BFINS(config, dev->if_port, 20, 4);
1909 outl(config, ioaddr + Wn3_Config);
1911 outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1913 if (vortex_debug > 1)
1914 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1915 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1917 EL3WINDOW(old_window);
1918 enable_irq(dev->irq);
1921 if (vortex_debug > 2)
1922 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1923 dev->name, media_tbl[dev->if_port].name);
1925 mod_timer(&vp->timer, RUN_AT(next_tick));
1927 outw(FakeIntr, ioaddr + EL3_CMD);
1931 static void vortex_tx_timeout(struct net_device *dev)
1933 struct vortex_private *vp = netdev_priv(dev);
1934 long ioaddr = dev->base_addr;
1936 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1937 dev->name, inb(ioaddr + TxStatus),
1938 inw(ioaddr + EL3_STATUS));
1940 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1941 inw(ioaddr + Wn4_NetDiag),
1942 inw(ioaddr + Wn4_Media),
1943 inl(ioaddr + PktStatus),
1944 inw(ioaddr + Wn4_FIFODiag));
1945 /* Slight code bloat to be user friendly. */
1946 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
1947 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1948 " network cable problem?\n", dev->name);
1949 if (inw(ioaddr + EL3_STATUS) & IntLatch) {
1950 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1951 " IRQ blocked by another device?\n", dev->name);
1952 /* Bad idea here.. but we might as well handle a few events. */
1955 * Block interrupts because vortex_interrupt does a bare spin_lock()
1957 unsigned long flags;
1958 local_irq_save(flags);
1959 if (vp->full_bus_master_tx)
1960 boomerang_interrupt(dev->irq, dev, NULL);
1962 vortex_interrupt(dev->irq, dev, NULL);
1963 local_irq_restore(flags);
1967 if (vortex_debug > 0)
1970 issue_and_wait(dev, TxReset);
1972 vp->stats.tx_errors++;
1973 if (vp->full_bus_master_tx) {
1974 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1975 if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1976 outl(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1977 ioaddr + DownListPtr);
1978 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
1979 netif_wake_queue (dev);
1980 if (vp->drv_flags & IS_BOOMERANG)
1981 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1982 outw(DownUnstall, ioaddr + EL3_CMD);
1984 vp->stats.tx_dropped++;
1985 netif_wake_queue(dev);
1988 /* Issue Tx Enable */
1989 outw(TxEnable, ioaddr + EL3_CMD);
1990 dev->trans_start = jiffies;
1992 /* Switch to register set 7 for normal use. */
1997 * Handle uncommon interrupt sources. This is a separate routine to minimize
2001 vortex_error(struct net_device *dev, int status)
2003 struct vortex_private *vp = netdev_priv(dev);
2004 long ioaddr = dev->base_addr;
2005 int do_tx_reset = 0, reset_mask = 0;
2006 unsigned char tx_status = 0;
2008 if (vortex_debug > 2) {
2009 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
2012 if (status & TxComplete) { /* Really "TxError" for us. */
2013 tx_status = inb(ioaddr + TxStatus);
2014 /* Presumably a tx-timeout. We must merely re-enable. */
2015 if (vortex_debug > 2
2016 || (tx_status != 0x88 && vortex_debug > 0)) {
2017 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
2018 dev->name, tx_status);
2019 if (tx_status == 0x82) {
2020 printk(KERN_ERR "Probably a duplex mismatch. See "
2021 "Documentation/networking/vortex.txt\n");
2025 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
2026 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2027 outb(0, ioaddr + TxStatus);
2028 if (tx_status & 0x30) { /* txJabber or txUnderrun */
2030 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
2032 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
2033 } else { /* Merely re-enable the transmitter. */
2034 outw(TxEnable, ioaddr + EL3_CMD);
2038 if (status & RxEarly) { /* Rx early is unused. */
2040 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
2042 if (status & StatsFull) { /* Empty statistics. */
2043 static int DoneDidThat;
2044 if (vortex_debug > 4)
2045 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2046 update_stats(ioaddr, dev);
2047 /* HACK: Disable statistics as an interrupt source. */
2048 /* This occurs when we have the wrong media type! */
2049 if (DoneDidThat == 0 &&
2050 inw(ioaddr + EL3_STATUS) & StatsFull) {
2051 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2052 "stats as an interrupt source.\n", dev->name);
2054 outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2055 vp->intr_enable &= ~StatsFull;
2060 if (status & IntReq) { /* Restore all interrupt sources. */
2061 outw(vp->status_enable, ioaddr + EL3_CMD);
2062 outw(vp->intr_enable, ioaddr + EL3_CMD);
2064 if (status & HostError) {
2067 fifo_diag = inw(ioaddr + Wn4_FIFODiag);
2068 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2069 dev->name, fifo_diag);
2070 /* Adapter failure requires Tx/Rx reset and reinit. */
2071 if (vp->full_bus_master_tx) {
2072 int bus_status = inl(ioaddr + PktStatus);
2073 /* 0x80000000 PCI master abort. */
2074 /* 0x40000000 PCI target abort. */
2076 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2078 /* In this case, blow the card away */
2079 /* Must not enter D3 or we can't legally issue the reset! */
2080 vortex_down(dev, 0);
2081 issue_and_wait(dev, TotalReset | 0xff);
2082 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2083 } else if (fifo_diag & 0x0400)
2085 if (fifo_diag & 0x3000) {
2086 /* Reset Rx fifo and upload logic */
2087 issue_and_wait(dev, RxReset|0x07);
2088 /* Set the Rx filter to the current state. */
2090 /* enable 802.1q VLAN tagged frames */
2091 set_8021q_mode(dev, 1);
2092 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2093 outw(AckIntr | HostError, ioaddr + EL3_CMD);
2098 issue_and_wait(dev, TxReset|reset_mask);
2099 outw(TxEnable, ioaddr + EL3_CMD);
2100 if (!vp->full_bus_master_tx)
2101 netif_wake_queue(dev);
2106 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2108 struct vortex_private *vp = netdev_priv(dev);
2109 long ioaddr = dev->base_addr;
2111 /* Put out the doubleword header... */
2112 outl(skb->len, ioaddr + TX_FIFO);
2113 if (vp->bus_master) {
2114 /* Set the bus-master controller to transfer the packet. */
2115 int len = (skb->len + 3) & ~3;
2116 outl( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2117 ioaddr + Wn7_MasterAddr);
2118 outw(len, ioaddr + Wn7_MasterLen);
2120 outw(StartDMADown, ioaddr + EL3_CMD);
2121 /* netif_wake_queue() will be called at the DMADone interrupt. */
2123 /* ... and the packet rounded to a doubleword. */
2124 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2125 dev_kfree_skb (skb);
2126 if (inw(ioaddr + TxFree) > 1536) {
2127 netif_start_queue (dev); /* AKPM: redundant? */
2129 /* Interrupt us when the FIFO has room for max-sized packet. */
2130 netif_stop_queue(dev);
2131 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2135 dev->trans_start = jiffies;
2137 /* Clear the Tx status stack. */
2142 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
2143 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2144 if (vortex_debug > 2)
2145 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2146 dev->name, tx_status);
2147 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2148 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2149 if (tx_status & 0x30) {
2150 issue_and_wait(dev, TxReset);
2152 outw(TxEnable, ioaddr + EL3_CMD);
2154 outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2161 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2163 struct vortex_private *vp = netdev_priv(dev);
2164 long ioaddr = dev->base_addr;
2165 /* Calculate the next Tx descriptor entry. */
2166 int entry = vp->cur_tx % TX_RING_SIZE;
2167 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2168 unsigned long flags;
2170 if (vortex_debug > 6) {
2171 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2172 if (vortex_debug > 3)
2173 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2174 dev->name, vp->cur_tx);
2177 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2178 if (vortex_debug > 0)
2179 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2181 netif_stop_queue(dev);
2185 vp->tx_skbuff[entry] = skb;
2187 vp->tx_ring[entry].next = 0;
2189 if (skb->ip_summed != CHECKSUM_HW)
2190 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2192 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2194 if (!skb_shinfo(skb)->nr_frags) {
2195 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2196 skb->len, PCI_DMA_TODEVICE));
2197 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2201 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2202 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2203 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2205 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2206 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2208 vp->tx_ring[entry].frag[i+1].addr =
2209 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2210 (void*)page_address(frag->page) + frag->page_offset,
2211 frag->size, PCI_DMA_TODEVICE));
2213 if (i == skb_shinfo(skb)->nr_frags-1)
2214 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2216 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2220 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2221 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2222 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2225 spin_lock_irqsave(&vp->lock, flags);
2226 /* Wait for the stall to complete. */
2227 issue_and_wait(dev, DownStall);
2228 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2229 if (inl(ioaddr + DownListPtr) == 0) {
2230 outl(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2231 vp->queued_packet++;
2235 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2236 netif_stop_queue (dev);
2237 } else { /* Clear previous interrupt enable. */
2238 #if defined(tx_interrupt_mitigation)
2239 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2240 * were selected, this would corrupt DN_COMPLETE. No?
2242 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2245 outw(DownUnstall, ioaddr + EL3_CMD);
2246 spin_unlock_irqrestore(&vp->lock, flags);
2247 dev->trans_start = jiffies;
2251 /* The interrupt handler does all of the Rx thread work and cleans up
2252 after the Tx thread. */
2255 * This is the ISR for the vortex series chips.
2256 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2260 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2262 struct net_device *dev = dev_id;
2263 struct vortex_private *vp = netdev_priv(dev);
2266 int work_done = max_interrupt_work;
2269 ioaddr = dev->base_addr;
2270 spin_lock(&vp->lock);
2272 status = inw(ioaddr + EL3_STATUS);
2274 if (vortex_debug > 6)
2275 printk("vortex_interrupt(). status=0x%4x\n", status);
2277 if ((status & IntLatch) == 0)
2278 goto handler_exit; /* No interrupt: shared IRQs cause this */
2281 if (status & IntReq) {
2282 status |= vp->deferred;
2286 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2289 if (vortex_debug > 4)
2290 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2291 dev->name, status, inb(ioaddr + Timer));
2294 if (vortex_debug > 5)
2295 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2297 if (status & RxComplete)
2300 if (status & TxAvailable) {
2301 if (vortex_debug > 5)
2302 printk(KERN_DEBUG " TX room bit was handled.\n");
2303 /* There's room in the FIFO for a full-sized packet. */
2304 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2305 netif_wake_queue (dev);
2308 if (status & DMADone) {
2309 if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
2310 outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2311 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2312 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2313 if (inw(ioaddr + TxFree) > 1536) {
2315 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2316 * insufficient FIFO room, the TxAvailable test will succeed and call
2317 * netif_wake_queue()
2319 netif_wake_queue(dev);
2320 } else { /* Interrupt when FIFO has room for max-sized packet. */
2321 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2322 netif_stop_queue(dev);
2326 /* Check for all uncommon interrupts at once. */
2327 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2328 if (status == 0xffff)
2330 vortex_error(dev, status);
2333 if (--work_done < 0) {
2334 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2335 "%4.4x.\n", dev->name, status);
2336 /* Disable all pending interrupts. */
2338 vp->deferred |= status;
2339 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2341 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2342 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2343 /* The timer will reenable interrupts. */
2344 mod_timer(&vp->timer, jiffies + 1*HZ);
2347 /* Acknowledge the IRQ. */
2348 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2349 } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2351 if (vortex_debug > 4)
2352 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2355 spin_unlock(&vp->lock);
2356 return IRQ_RETVAL(handled);
2360 * This is the ISR for the boomerang series chips.
2361 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2365 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2367 struct net_device *dev = dev_id;
2368 struct vortex_private *vp = netdev_priv(dev);
2371 int work_done = max_interrupt_work;
2373 ioaddr = dev->base_addr;
2376 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2377 * and boomerang_start_xmit
2379 spin_lock(&vp->lock);
2381 status = inw(ioaddr + EL3_STATUS);
2383 if (vortex_debug > 6)
2384 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2386 if ((status & IntLatch) == 0)
2387 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2389 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2390 if (vortex_debug > 1)
2391 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2395 if (status & IntReq) {
2396 status |= vp->deferred;
2400 if (vortex_debug > 4)
2401 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2402 dev->name, status, inb(ioaddr + Timer));
2404 if (vortex_debug > 5)
2405 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2407 if (status & UpComplete) {
2408 outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
2409 if (vortex_debug > 5)
2410 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2414 if (status & DownComplete) {
2415 unsigned int dirty_tx = vp->dirty_tx;
2417 outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
2418 while (vp->cur_tx - dirty_tx > 0) {
2419 int entry = dirty_tx % TX_RING_SIZE;
2420 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2421 if (inl(ioaddr + DownListPtr) ==
2422 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2423 break; /* It still hasn't been processed. */
2425 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2426 break; /* It still hasn't been processed. */
2429 if (vp->tx_skbuff[entry]) {
2430 struct sk_buff *skb = vp->tx_skbuff[entry];
2433 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2434 pci_unmap_single(VORTEX_PCI(vp),
2435 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2436 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2439 pci_unmap_single(VORTEX_PCI(vp),
2440 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2442 dev_kfree_skb_irq(skb);
2443 vp->tx_skbuff[entry] = NULL;
2445 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2447 /* vp->stats.tx_packets++; Counted below. */
2450 vp->dirty_tx = dirty_tx;
2451 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2452 if (vortex_debug > 6)
2453 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2454 netif_wake_queue (dev);
2458 /* Check for all uncommon interrupts at once. */
2459 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2460 vortex_error(dev, status);
2462 if (--work_done < 0) {
2463 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2464 "%4.4x.\n", dev->name, status);
2465 /* Disable all pending interrupts. */
2467 vp->deferred |= status;
2468 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2470 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2471 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2472 /* The timer will reenable interrupts. */
2473 mod_timer(&vp->timer, jiffies + 1*HZ);
2476 /* Acknowledge the IRQ. */
2477 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2478 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2479 writel(0x8000, vp->cb_fn_base + 4);
2481 } while ((status = inw(ioaddr + EL3_STATUS)) & IntLatch);
2483 if (vortex_debug > 4)
2484 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2487 spin_unlock(&vp->lock);
2491 static int vortex_rx(struct net_device *dev)
2493 struct vortex_private *vp = netdev_priv(dev);
2494 long ioaddr = dev->base_addr;
2498 if (vortex_debug > 5)
2499 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2500 inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
2501 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
2502 if (rx_status & 0x4000) { /* Error, update stats. */
2503 unsigned char rx_error = inb(ioaddr + RxErrors);
2504 if (vortex_debug > 2)
2505 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2506 vp->stats.rx_errors++;
2507 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2508 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2509 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2510 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2511 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2513 /* The packet length: up to 4.5K!. */
2514 int pkt_len = rx_status & 0x1fff;
2515 struct sk_buff *skb;
2517 skb = dev_alloc_skb(pkt_len + 5);
2518 if (vortex_debug > 4)
2519 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2520 pkt_len, rx_status);
2523 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2524 /* 'skb_put()' points to the start of sk_buff data area. */
2525 if (vp->bus_master &&
2526 ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2527 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2528 pkt_len, PCI_DMA_FROMDEVICE);
2529 outl(dma, ioaddr + Wn7_MasterAddr);
2530 outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2531 outw(StartDMAUp, ioaddr + EL3_CMD);
2532 while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2534 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2536 insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2537 (pkt_len + 3) >> 2);
2539 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2540 skb->protocol = eth_type_trans(skb, dev);
2542 dev->last_rx = jiffies;
2543 vp->stats.rx_packets++;
2544 /* Wait a limited time to go to next packet. */
2545 for (i = 200; i >= 0; i--)
2546 if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2549 } else if (vortex_debug > 0)
2550 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2551 "size %d.\n", dev->name, pkt_len);
2553 vp->stats.rx_dropped++;
2554 issue_and_wait(dev, RxDiscard);
2561 boomerang_rx(struct net_device *dev)
2563 struct vortex_private *vp = netdev_priv(dev);
2564 int entry = vp->cur_rx % RX_RING_SIZE;
2565 long ioaddr = dev->base_addr;
2567 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2569 if (vortex_debug > 5)
2570 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", inw(ioaddr+EL3_STATUS));
2572 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2573 if (--rx_work_limit < 0)
2575 if (rx_status & RxDError) { /* Error, update stats. */
2576 unsigned char rx_error = rx_status >> 16;
2577 if (vortex_debug > 2)
2578 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2579 vp->stats.rx_errors++;
2580 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2581 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2582 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2583 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2584 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2586 /* The packet length: up to 4.5K!. */
2587 int pkt_len = rx_status & 0x1fff;
2588 struct sk_buff *skb;
2589 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2591 if (vortex_debug > 4)
2592 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2593 pkt_len, rx_status);
2595 /* Check if the packet is long enough to just accept without
2596 copying to a properly sized skbuff. */
2597 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2599 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2600 pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2601 /* 'skb_put()' points to the start of sk_buff data area. */
2602 memcpy(skb_put(skb, pkt_len),
2603 vp->rx_skbuff[entry]->tail,
2605 pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2608 /* Pass up the skbuff already on the Rx ring. */
2609 skb = vp->rx_skbuff[entry];
2610 vp->rx_skbuff[entry] = NULL;
2611 skb_put(skb, pkt_len);
2612 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2615 skb->protocol = eth_type_trans(skb, dev);
2616 { /* Use hardware checksum info. */
2617 int csum_bits = rx_status & 0xee000000;
2619 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2620 csum_bits == (IPChksumValid | UDPChksumValid))) {
2621 skb->ip_summed = CHECKSUM_UNNECESSARY;
2626 dev->last_rx = jiffies;
2627 vp->stats.rx_packets++;
2629 entry = (++vp->cur_rx) % RX_RING_SIZE;
2631 /* Refill the Rx ring buffers. */
2632 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2633 struct sk_buff *skb;
2634 entry = vp->dirty_rx % RX_RING_SIZE;
2635 if (vp->rx_skbuff[entry] == NULL) {
2636 skb = dev_alloc_skb(PKT_BUF_SZ);
2638 static unsigned long last_jif;
2639 if ((jiffies - last_jif) > 10 * HZ) {
2640 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2643 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2644 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2645 break; /* Bad news! */
2647 skb->dev = dev; /* Mark as being used by this device. */
2648 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2649 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2650 vp->rx_skbuff[entry] = skb;
2652 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2653 outw(UpUnstall, ioaddr + EL3_CMD);
2659 * If we've hit a total OOM refilling the Rx ring we poll once a second
2660 * for some memory. Otherwise there is no way to restart the rx process.
2663 rx_oom_timer(unsigned long arg)
2665 struct net_device *dev = (struct net_device *)arg;
2666 struct vortex_private *vp = netdev_priv(dev);
2668 spin_lock_irq(&vp->lock);
2669 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2671 if (vortex_debug > 1) {
2672 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2673 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2675 spin_unlock_irq(&vp->lock);
2679 vortex_down(struct net_device *dev, int final_down)
2681 struct vortex_private *vp = netdev_priv(dev);
2682 long ioaddr = dev->base_addr;
2684 netif_stop_queue (dev);
2686 del_timer_sync(&vp->rx_oom_timer);
2687 del_timer_sync(&vp->timer);
2689 /* Turn off statistics ASAP. We update vp->stats below. */
2690 outw(StatsDisable, ioaddr + EL3_CMD);
2692 /* Disable the receiver and transmitter. */
2693 outw(RxDisable, ioaddr + EL3_CMD);
2694 outw(TxDisable, ioaddr + EL3_CMD);
2696 /* Disable receiving 802.1q tagged frames */
2697 set_8021q_mode(dev, 0);
2699 if (dev->if_port == XCVR_10base2)
2700 /* Turn off thinnet power. Green! */
2701 outw(StopCoax, ioaddr + EL3_CMD);
2703 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2705 update_stats(ioaddr, dev);
2706 if (vp->full_bus_master_rx)
2707 outl(0, ioaddr + UpListPtr);
2708 if (vp->full_bus_master_tx)
2709 outl(0, ioaddr + DownListPtr);
2711 if (final_down && VORTEX_PCI(vp) && vp->enable_wol) {
2712 pci_save_state(VORTEX_PCI(vp), vp->power_state);
2718 vortex_close(struct net_device *dev)
2720 struct vortex_private *vp = netdev_priv(dev);
2721 long ioaddr = dev->base_addr;
2724 if (netif_device_present(dev))
2725 vortex_down(dev, 1);
2727 if (vortex_debug > 1) {
2728 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2729 dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
2730 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2731 " tx_queued %d Rx pre-checksummed %d.\n",
2732 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2736 if ( vp->rx_csumhits &&
2737 ((vp->drv_flags & HAS_HWCKSM) == 0) &&
2738 (hw_checksums[vp->card_idx] == -1)) {
2739 printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
2743 free_irq(dev->irq, dev);
2745 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2746 for (i = 0; i < RX_RING_SIZE; i++)
2747 if (vp->rx_skbuff[i]) {
2748 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2749 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2750 dev_kfree_skb(vp->rx_skbuff[i]);
2751 vp->rx_skbuff[i] = NULL;
2754 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2755 for (i = 0; i < TX_RING_SIZE; i++) {
2756 if (vp->tx_skbuff[i]) {
2757 struct sk_buff *skb = vp->tx_skbuff[i];
2761 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2762 pci_unmap_single(VORTEX_PCI(vp),
2763 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2764 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2767 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2770 vp->tx_skbuff[i] = NULL;
2779 dump_tx_ring(struct net_device *dev)
2781 if (vortex_debug > 0) {
2782 struct vortex_private *vp = netdev_priv(dev);
2783 long ioaddr = dev->base_addr;
2785 if (vp->full_bus_master_tx) {
2787 int stalled = inl(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2789 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2790 vp->full_bus_master_tx,
2791 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2792 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2793 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2794 inl(ioaddr + DownListPtr),
2795 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2796 issue_and_wait(dev, DownStall);
2797 for (i = 0; i < TX_RING_SIZE; i++) {
2798 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2801 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2803 le32_to_cpu(vp->tx_ring[i].length),
2805 le32_to_cpu(vp->tx_ring[i].status));
2808 outw(DownUnstall, ioaddr + EL3_CMD);
2813 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2815 struct vortex_private *vp = netdev_priv(dev);
2816 unsigned long flags;
2818 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2819 spin_lock_irqsave (&vp->lock, flags);
2820 update_stats(dev->base_addr, dev);
2821 spin_unlock_irqrestore (&vp->lock, flags);
2826 /* Update statistics.
2827 Unlike with the EL3 we need not worry about interrupts changing
2828 the window setting from underneath us, but we must still guard
2829 against a race condition with a StatsUpdate interrupt updating the
2830 table. This is done by checking that the ASM (!) code generated uses
2831 atomic updates with '+='.
2833 static void update_stats(long ioaddr, struct net_device *dev)
2835 struct vortex_private *vp = netdev_priv(dev);
2836 int old_window = inw(ioaddr + EL3_CMD);
2838 if (old_window == 0xffff) /* Chip suspended or ejected. */
2840 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2841 /* Switch to the stats window, and read everything. */
2843 vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2844 vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2845 /* Multiple collisions. */ inb(ioaddr + 2);
2846 vp->stats.collisions += inb(ioaddr + 3);
2847 vp->stats.tx_window_errors += inb(ioaddr + 4);
2848 vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2849 vp->stats.tx_packets += inb(ioaddr + 6);
2850 vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2851 /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2852 /* Tx deferrals */ inb(ioaddr + 8);
2853 /* Don't bother with register 9, an extension of registers 6&7.
2854 If we do use the 6&7 values the atomic update assumption above
2856 vp->stats.rx_bytes += inw(ioaddr + 10);
2857 vp->stats.tx_bytes += inw(ioaddr + 12);
2858 /* New: On the Vortex we must also clear the BadSSD counter. */
2863 u8 up = inb(ioaddr + 13);
2864 vp->stats.rx_bytes += (up & 0x0f) << 16;
2865 vp->stats.tx_bytes += (up & 0xf0) << 12;
2868 EL3WINDOW(old_window >> 13);
2873 static void vortex_get_drvinfo(struct net_device *dev,
2874 struct ethtool_drvinfo *info)
2876 struct vortex_private *vp = netdev_priv(dev);
2878 strcpy(info->driver, DRV_NAME);
2879 strcpy(info->version, DRV_VERSION);
2880 if (VORTEX_PCI(vp)) {
2881 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
2883 if (VORTEX_EISA(vp))
2884 sprintf(info->bus_info, vp->gendev->bus_id);
2886 sprintf(info->bus_info, "EISA 0x%lx %d",
2887 dev->base_addr, dev->irq);
2891 static struct ethtool_ops vortex_ethtool_ops = {
2892 .get_drvinfo = vortex_get_drvinfo,
2896 static int vortex_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2898 struct vortex_private *vp = netdev_priv(dev);
2899 long ioaddr = dev->base_addr;
2900 struct mii_ioctl_data *data = if_mii(rq);
2901 int phy = vp->phys[0] & 0x1f;
2905 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2908 case SIOCGMIIREG: /* Read MII PHY register. */
2910 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2914 case SIOCSMIIREG: /* Write MII PHY register. */
2915 if (!capable(CAP_NET_ADMIN)) {
2919 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2924 retval = -EOPNOTSUPP;
2932 * Must power the device up to do MDIO operations
2934 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2937 struct vortex_private *vp = netdev_priv(dev);
2941 state = VORTEX_PCI(vp)->current_state;
2943 /* The kernel core really should have pci_get_power_state() */
2946 pci_set_power_state(VORTEX_PCI(vp), 0);
2947 err = vortex_do_ioctl(dev, rq, cmd);
2949 pci_set_power_state(VORTEX_PCI(vp), state);
2956 /* Pre-Cyclone chips have no documented multicast filter, so the only
2957 multicast setting is to receive all multicast frames. At least
2958 the chip has a very clean way to set the mode, unlike many others. */
2959 static void set_rx_mode(struct net_device *dev)
2961 long ioaddr = dev->base_addr;
2964 if (dev->flags & IFF_PROMISC) {
2965 if (vortex_debug > 0)
2966 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
2967 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2968 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2969 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2971 new_mode = SetRxFilter | RxStation | RxBroadcast;
2973 outw(new_mode, ioaddr + EL3_CMD);
2976 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
2977 /* Setup the card so that it can receive frames with an 802.1q VLAN tag.
2978 Note that this must be done after each RxReset due to some backwards
2979 compatibility logic in the Cyclone and Tornado ASICs */
2981 /* The Ethernet Type used for 802.1q tagged frames */
2982 #define VLAN_ETHER_TYPE 0x8100
2984 static void set_8021q_mode(struct net_device *dev, int enable)
2986 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2987 long ioaddr = dev->base_addr;
2988 int old_window = inw(ioaddr + EL3_CMD);
2991 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) {
2992 /* cyclone and tornado chipsets can recognize 802.1q
2993 * tagged frames and treat them correctly */
2995 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */
2997 max_pkt_size += 4; /* 802.1Q VLAN tag */
3000 outw(max_pkt_size, ioaddr+Wn3_MaxPktSize);
3002 /* set VlanEtherType to let the hardware checksumming
3003 treat tagged frames correctly */
3005 outw(VLAN_ETHER_TYPE, ioaddr+Wn7_VlanEtherType);
3007 /* on older cards we have to enable large frames */
3009 vp->large_frames = dev->mtu > 1500 || enable;
3012 mac_ctrl = inw(ioaddr+Wn3_MAC_Ctrl);
3013 if (vp->large_frames)
3017 outw(mac_ctrl, ioaddr+Wn3_MAC_Ctrl);
3020 EL3WINDOW(old_window);
3024 static void set_8021q_mode(struct net_device *dev, int enable)
3031 /* MII transceiver control section.
3032 Read and write the MII registers using software-generated serial
3033 MDIO protocol. See the MII specifications or DP83840A data sheet
3036 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
3037 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3038 "overclocking" issues. */
3039 #define mdio_delay() inl(mdio_addr)
3041 #define MDIO_SHIFT_CLK 0x01
3042 #define MDIO_DIR_WRITE 0x04
3043 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
3044 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
3045 #define MDIO_DATA_READ 0x02
3046 #define MDIO_ENB_IN 0x00
3048 /* Generate the preamble required for initial synchronization and
3049 a few older transceivers. */
3050 static void mdio_sync(long ioaddr, int bits)
3052 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3054 /* Establish sync by sending at least 32 logic ones. */
3055 while (-- bits >= 0) {
3056 outw(MDIO_DATA_WRITE1, mdio_addr);
3058 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
3063 static int mdio_read(struct net_device *dev, int phy_id, int location)
3065 struct vortex_private *vp = netdev_priv(dev);
3067 long ioaddr = dev->base_addr;
3068 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
3069 unsigned int retval = 0;
3070 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3072 spin_lock_bh(&vp->mdio_lock);
3074 if (mii_preamble_required)
3075 mdio_sync(ioaddr, 32);
3077 /* Shift the read command bits out. */
3078 for (i = 14; i >= 0; i--) {
3079 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3080 outw(dataval, mdio_addr);
3082 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3085 /* Read the two transition, 16 data, and wire-idle bits. */
3086 for (i = 19; i > 0; i--) {
3087 outw(MDIO_ENB_IN, mdio_addr);
3089 retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
3090 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3093 spin_unlock_bh(&vp->mdio_lock);
3094 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
3097 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
3099 struct vortex_private *vp = netdev_priv(dev);
3100 long ioaddr = dev->base_addr;
3101 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
3102 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
3105 spin_lock_bh(&vp->mdio_lock);
3107 if (mii_preamble_required)
3108 mdio_sync(ioaddr, 32);
3110 /* Shift the command bits out. */
3111 for (i = 31; i >= 0; i--) {
3112 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
3113 outw(dataval, mdio_addr);
3115 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
3118 /* Leave the interface idle. */
3119 for (i = 1; i >= 0; i--) {
3120 outw(MDIO_ENB_IN, mdio_addr);
3122 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
3125 spin_unlock_bh(&vp->mdio_lock);
3129 /* ACPI: Advanced Configuration and Power Interface. */
3130 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3131 static void acpi_set_WOL(struct net_device *dev)
3133 struct vortex_private *vp = netdev_priv(dev);
3134 long ioaddr = dev->base_addr;
3136 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3138 outw(2, ioaddr + 0x0c);
3139 /* The RxFilter must accept the WOL frames. */
3140 outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3141 outw(RxEnable, ioaddr + EL3_CMD);
3143 /* Change the power state to D3; RxEnable doesn't take effect. */
3144 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3145 pci_set_power_state(VORTEX_PCI(vp), 3);
3149 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3151 struct net_device *dev = pci_get_drvdata(pdev);
3152 struct vortex_private *vp;
3155 printk("vortex_remove_one called for Compaq device!\n");
3159 vp = netdev_priv(dev);
3161 /* AKPM: FIXME: we should have
3162 * if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
3165 unregister_netdev(dev);
3167 if (VORTEX_PCI(vp) && vp->enable_wol) {
3168 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
3169 if (vp->pm_state_valid)
3170 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
3172 /* Should really use issue_and_wait() here */
3173 outw(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14),
3174 dev->base_addr + EL3_CMD);
3176 pci_free_consistent(pdev,
3177 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3178 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3181 if (vp->must_free_region)
3182 release_region(dev->base_addr, vp->io_size);
3187 static struct pci_driver vortex_driver = {
3189 .probe = vortex_init_one,
3190 .remove = __devexit_p(vortex_remove_one),
3191 .id_table = vortex_pci_tbl,
3193 .suspend = vortex_suspend,
3194 .resume = vortex_resume,
3199 static int vortex_have_pci;
3200 static int vortex_have_eisa;
3203 static int __init vortex_init (void)
3205 int pci_rc, eisa_rc;
3207 pci_rc = pci_module_init(&vortex_driver);
3208 eisa_rc = vortex_eisa_init();
3211 vortex_have_pci = 1;
3213 vortex_have_eisa = 1;
3215 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3219 static void __exit vortex_eisa_cleanup (void)
3221 struct vortex_private *vp;
3225 /* Take care of the EISA devices */
3226 eisa_driver_unregister (&vortex_eisa_driver);
3229 if (compaq_net_device) {
3230 vp = compaq_net_device->priv;
3231 ioaddr = compaq_net_device->base_addr;
3233 unregister_netdev (compaq_net_device);
3234 outw (TotalReset, ioaddr + EL3_CMD);
3235 release_region (ioaddr, VORTEX_TOTAL_SIZE);
3237 free_netdev (compaq_net_device);
3242 static void __exit vortex_cleanup (void)
3244 if (vortex_have_pci)
3245 pci_unregister_driver (&vortex_driver);
3246 if (vortex_have_eisa)
3247 vortex_eisa_cleanup ();
3251 module_init(vortex_init);
3252 module_exit(vortex_cleanup);