3 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
5 Maintained by Jeff Garzik <jgarzik@pobox.com>
6 Copyright 2000-2002 Jeff Garzik
8 Much code comes from Donald Becker's rtl8139.c driver,
9 versions 1.13 and older. This driver was originally based
10 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13:
14 Written 1997-2001 by Donald Becker.
15 This software may be used and distributed according to the
16 terms of the GNU General Public License (GPL), incorporated
17 herein by reference. Drivers based on or derived from this
18 code fall under the GPL and must retain the authorship,
19 copyright and license notice. This file is not a complete
20 program and may only be used when the entire operating
21 system is licensed under the GPL.
23 This driver is for boards based on the RTL8129 and RTL8139
26 The author may be reached as becker@scyld.com, or C/O Scyld
27 Computing Corporation 410 Severn Ave., Suite 210 Annapolis
30 Support and updates available at
31 http://www.scyld.com/network/rtl8139.html
33 Twister-tuning table provided by Kinston
34 <shangh@realtek.com.tw>.
38 This software may be used and distributed according to the terms
39 of the GNU General Public License, incorporated herein by reference.
43 Donald Becker - he wrote the original driver, kudos to him!
44 (but please don't e-mail him for support, this isn't his driver)
46 Tigran Aivazian - bug fixes, skbuff free cleanup
48 Martin Mares - suggestions for PCI cleanup
50 David S. Miller - PCI DMA and softnet updates
52 Ernst Gill - fixes ported from BSD driver
54 Daniel Kobras - identified specific locations of
55 posted MMIO write bugginess
57 Gerard Sharp - bug fix, testing and feedback
59 David Ford - Rx ring wrap fix
61 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
62 to find and fix a crucial bug on older chipsets.
64 Donald Becker/Chris Butterworth/Marcus Westergren -
65 Noticed various Rx packet size-related buglets.
67 Santiago Garcia Mantinan - testing and feedback
69 Jens David - 2.2.x kernel backports
71 Martin Dennett - incredibly helpful insight on undocumented
72 features of the 8139 chips
74 Jean-Jacques Michel - bug fix
76 Tobias Ringström - Rx interrupt status checking suggestion
78 Andrew Morton - Clear blocked signals, avoid
79 buffer overrun setting current->comm.
81 Kalle Olavi Niemitalo - Wake-on-LAN ioctls
83 Robert Kuebel - Save kernel thread from dying on any signal.
85 Submitting bug reports:
87 "rtl8139-diag -mmmaaavvveefN" output
88 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
92 #define DRV_NAME "8139too"
93 #define DRV_VERSION "0.9.27"
96 #include <linux/config.h>
97 #include <linux/module.h>
98 #include <linux/kernel.h>
99 #include <linux/compiler.h>
100 #include <linux/pci.h>
101 #include <linux/init.h>
102 #include <linux/ioport.h>
103 #include <linux/netdevice.h>
104 #include <linux/etherdevice.h>
105 #include <linux/rtnetlink.h>
106 #include <linux/delay.h>
107 #include <linux/ethtool.h>
108 #include <linux/mii.h>
109 #include <linux/completion.h>
110 #include <linux/crc32.h>
111 #include <linux/suspend.h>
113 #include <asm/uaccess.h>
116 #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION
117 #define PFX DRV_NAME ": "
119 /* Default Message level */
120 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
125 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
126 #ifdef CONFIG_8139TOO_PIO
130 /* define to 1 to enable copious debugging info */
133 /* define to 1 to disable lightweight runtime debugging checks */
134 #undef RTL8139_NDEBUG
138 /* note: prints function name for you */
139 # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
141 # define DPRINTK(fmt, args...)
144 #ifdef RTL8139_NDEBUG
145 # define assert(expr) do {} while (0)
147 # define assert(expr) \
148 if(unlikely(!(expr))) { \
149 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
150 #expr,__FILE__,__FUNCTION__,__LINE__); \
155 /* A few user-configurable values. */
158 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
159 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
161 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
162 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
163 static int multicast_filter_limit = 32;
165 /* bitmapped message enable number */
166 static int debug = -1;
170 * Warning: 64K ring has hardware issues and may lock up.
172 #if defined(CONFIG_SH_DREAMCAST)
173 #define RX_BUF_IDX 1 /* 16K ring */
175 #define RX_BUF_IDX 2 /* 32K ring */
177 #define RX_BUF_LEN (8192 << RX_BUF_IDX)
178 #define RX_BUF_PAD 16
179 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
181 #if RX_BUF_LEN == 65536
182 #define RX_BUF_TOT_LEN RX_BUF_LEN
184 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
187 /* Number of Tx descriptor registers. */
188 #define NUM_TX_DESC 4
190 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
191 #define MAX_ETH_FRAME_SIZE 1536
193 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
194 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE
195 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC)
197 /* PCI Tuning Parameters
198 Threshold is bytes transferred to chip before transmission starts. */
199 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
201 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
202 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */
203 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
204 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
205 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */
207 /* Operational parameters that usually are not changed. */
208 /* Time in jiffies before concluding the transmitter is hung. */
209 #define TX_TIMEOUT (6*HZ)
213 HAS_MII_XCVR = 0x010000,
214 HAS_CHIP_XCVR = 0x020000,
215 HAS_LNK_CHNG = 0x040000,
218 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */
219 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */
220 #define RTL_MIN_IO_SIZE 0x80
221 #define RTL8139B_IO_SIZE 256
223 #define RTL8129_CAPS HAS_MII_XCVR
224 #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG
232 /* indexed by board_t, above */
236 } board_info[] __devinitdata = {
237 { "RealTek RTL8139", RTL8139_CAPS },
238 { "RealTek RTL8129", RTL8129_CAPS },
242 static struct pci_device_id rtl8139_pci_tbl[] = {
243 {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
244 {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
245 {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
246 {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
247 {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
248 {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
249 {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
250 {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
251 {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
252 {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
253 {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
254 {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
255 {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
256 {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
257 {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
258 {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
259 {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
260 {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
261 {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
263 #ifdef CONFIG_SH_SECUREEDGE5410
264 /* Bogus 8139 silicon reports 8129 without external PROM :-( */
265 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
267 #ifdef CONFIG_8139TOO_8129
268 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
271 /* some crazy cards report invalid vendor ids like
272 * 0x0001 here. The other ids are valid and constant,
273 * so we simply don't match on the main vendor id.
275 {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
276 {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
277 {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
281 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
284 const char str[ETH_GSTRING_LEN];
285 } ethtool_stats_keys[] = {
289 { "rx_lost_in_ring" },
292 /* The rest of these values should never change. */
294 /* Symbolic offsets to registers. */
295 enum RTL8139_registers {
296 MAC0 = 0, /* Ethernet hardware address. */
297 MAR0 = 8, /* Multicast filter. */
298 TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */
299 TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
308 Timer = 0x48, /* A general-purpose counter. */
309 RxMissed = 0x4C, /* 24 bits valid, write clears. */
316 Config4 = 0x5A, /* absent on RTL-8139A */
320 BasicModeCtrl = 0x62,
321 BasicModeStatus = 0x64,
324 NWayExpansion = 0x6A,
325 /* Undocumented registers, but required for proper operation. */
326 FIFOTMS = 0x70, /* FIFO Control and test. */
327 CSCR = 0x74, /* Chip Status and Configuration Register. */
329 PARA7c = 0x7c, /* Magic transceiver parameter register. */
330 Config5 = 0xD8, /* absent on RTL-8139A */
334 MultiIntrClear = 0xF000,
336 Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
346 /* Interrupt register bits, using my own meaningful names. */
347 enum IntrStatusBits {
358 RxAckBits = RxFIFOOver | RxOverflow | RxOK,
365 TxOutOfWindow = 0x20000000,
366 TxAborted = 0x40000000,
367 TxCarrierLost = 0x80000000,
370 RxMulticast = 0x8000,
372 RxBroadcast = 0x2000,
373 RxBadSymbol = 0x0020,
381 /* Bits in RxConfig. */
385 AcceptBroadcast = 0x08,
386 AcceptMulticast = 0x04,
388 AcceptAllPhys = 0x01,
391 /* Bits in TxConfig. */
392 enum tx_config_bits {
393 TxIFG1 = (1 << 25), /* Interframe Gap Time */
394 TxIFG0 = (1 << 24), /* Enabling these bits violates IEEE 802.3 */
395 TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
396 TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */
397 TxClearAbt = (1 << 0), /* Clear abort (WO) */
398 TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */
399 TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */
401 TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
404 /* Bits in Config1 */
406 Cfg1_PM_Enable = 0x01,
407 Cfg1_VPD_Enable = 0x02,
410 LWAKE = 0x10, /* not on 8139, 8139A */
411 Cfg1_Driver_Load = 0x20,
414 SLEEP = (1 << 1), /* only on 8139, 8139A */
415 PWRDN = (1 << 0), /* only on 8139, 8139A */
418 /* Bits in Config3 */
420 Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */
421 Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
422 Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
423 Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */
424 Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */
425 Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
426 Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */
427 Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
430 /* Bits in Config4 */
432 LWPTN = (1 << 2), /* not on 8139, 8139A */
435 /* Bits in Config5 */
437 Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */
438 Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */
439 Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */
440 Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
441 Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */
442 Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */
443 Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */
447 /* rx fifo threshold */
449 RxCfgFIFONone = (7 << RxCfgFIFOShift),
453 RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
455 /* rx ring buffer length */
457 RxCfgRcv16K = (1 << 11),
458 RxCfgRcv32K = (1 << 12),
459 RxCfgRcv64K = (1 << 11) | (1 << 12),
461 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
465 /* Twister tuning parameters from RealTek.
466 Completely undocumented, but required to tune bad links on some boards. */
468 CSCR_LinkOKBit = 0x0400,
469 CSCR_LinkChangeBit = 0x0800,
470 CSCR_LinkStatusBits = 0x0f000,
471 CSCR_LinkDownOffCmd = 0x003c0,
472 CSCR_LinkDownCmd = 0x0f3c0,
477 Cfg9346_Unlock = 0xC0,
494 HasHltClk = (1 << 0),
498 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
499 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
500 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1)
502 /* directly indexed by chip_t, above */
503 const static struct {
505 u32 version; /* from RTL8139C/RTL8139D docs */
507 } rtl_chip_info[] = {
509 HW_REVID(1, 0, 0, 0, 0, 0, 0),
514 HW_REVID(1, 1, 0, 0, 0, 0, 0),
519 HW_REVID(1, 1, 1, 0, 0, 0, 0),
520 HasHltClk, /* XXX undocumented? */
524 HW_REVID(1, 1, 1, 0, 0, 1, 0),
525 HasHltClk, /* XXX undocumented? */
529 HW_REVID(1, 1, 1, 1, 0, 0, 0),
534 HW_REVID(1, 1, 1, 1, 1, 0, 0),
539 HW_REVID(1, 1, 1, 0, 1, 0, 0),
544 HW_REVID(1, 1, 1, 1, 0, 1, 0),
549 HW_REVID(1, 1, 1, 0, 1, 0, 1),
554 HW_REVID(1, 1, 1, 0, 1, 1, 1),
559 struct rtl_extra_stats {
560 unsigned long early_rx;
561 unsigned long tx_buf_mapped;
562 unsigned long tx_timeouts;
563 unsigned long rx_lost_in_ring;
566 struct rtl8139_private {
569 struct pci_dev *pci_dev;
572 struct net_device_stats stats;
573 unsigned char *rx_ring;
574 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */
575 unsigned int tx_flag;
576 unsigned long cur_tx;
577 unsigned long dirty_tx;
578 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */
579 unsigned char *tx_bufs; /* Tx bounce buffer region. */
580 dma_addr_t rx_ring_dma;
581 dma_addr_t tx_bufs_dma;
582 signed char phys[4]; /* MII device addresses. */
583 char twistie, twist_row, twist_col; /* Twister tune state. */
584 unsigned int default_port:4; /* Last dev->if_port value. */
589 wait_queue_head_t thr_wait;
590 struct completion thr_exited;
592 struct rtl_extra_stats xstats;
594 struct mii_if_info mii;
595 unsigned int regs_len;
598 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
599 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
600 MODULE_LICENSE("GPL");
602 MODULE_PARM (multicast_filter_limit, "i");
603 MODULE_PARM (media, "1-" __MODULE_STRING(MAX_UNITS) "i");
604 MODULE_PARM (full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
605 MODULE_PARM (debug, "i");
606 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
607 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
608 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
609 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
611 static int read_eeprom (void *ioaddr, int location, int addr_len);
612 static int rtl8139_open (struct net_device *dev);
613 static int mdio_read (struct net_device *dev, int phy_id, int location);
614 static void mdio_write (struct net_device *dev, int phy_id, int location,
616 static inline void rtl8139_start_thread(struct net_device *dev);
617 static void rtl8139_tx_timeout (struct net_device *dev);
618 static void rtl8139_init_ring (struct net_device *dev);
619 static int rtl8139_start_xmit (struct sk_buff *skb,
620 struct net_device *dev);
621 static int rtl8139_poll(struct net_device *dev, int *budget);
622 #ifdef CONFIG_NET_POLL_CONTROLLER
623 static void rtl8139_poll_controller(struct net_device *dev);
625 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
626 struct pt_regs *regs);
627 static int rtl8139_close (struct net_device *dev);
628 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
629 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
630 static void rtl8139_set_rx_mode (struct net_device *dev);
631 static void __set_rx_mode (struct net_device *dev);
632 static void rtl8139_hw_start (struct net_device *dev);
633 static struct ethtool_ops rtl8139_ethtool_ops;
637 #define RTL_R8(reg) inb (((unsigned long)ioaddr) + (reg))
638 #define RTL_R16(reg) inw (((unsigned long)ioaddr) + (reg))
639 #define RTL_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg)))
640 #define RTL_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg))
641 #define RTL_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg))
642 #define RTL_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg))
643 #define RTL_W8_F RTL_W8
644 #define RTL_W16_F RTL_W16
645 #define RTL_W32_F RTL_W32
652 #define readb(addr) inb((unsigned long)(addr))
653 #define readw(addr) inw((unsigned long)(addr))
654 #define readl(addr) inl((unsigned long)(addr))
655 #define writeb(val,addr) outb((val),(unsigned long)(addr))
656 #define writew(val,addr) outw((val),(unsigned long)(addr))
657 #define writel(val,addr) outl((val),(unsigned long)(addr))
661 /* write MMIO register, with flush */
662 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
663 #define RTL_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0)
664 #define RTL_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0)
665 #define RTL_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0)
668 #define MMIO_FLUSH_AUDIT_COMPLETE 1
669 #if MMIO_FLUSH_AUDIT_COMPLETE
671 /* write MMIO register */
672 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
673 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
674 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
678 /* write MMIO register, then flush */
679 #define RTL_W8 RTL_W8_F
680 #define RTL_W16 RTL_W16_F
681 #define RTL_W32 RTL_W32_F
683 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
685 /* read MMIO register */
686 #define RTL_R8(reg) readb (ioaddr + (reg))
687 #define RTL_R16(reg) readw (ioaddr + (reg))
688 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
690 #endif /* USE_IO_OPS */
693 static const u16 rtl8139_intr_mask =
694 PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
695 TxErr | TxOK | RxErr | RxOK;
697 static const u16 rtl8139_norx_intr_mask =
698 PCIErr | PCSTimeout | RxUnderrun |
699 TxErr | TxOK | RxErr ;
702 static const unsigned int rtl8139_rx_config =
703 RxCfgRcv8K | RxNoWrap |
704 (RX_FIFO_THRESH << RxCfgFIFOShift) |
705 (RX_DMA_BURST << RxCfgDMAShift);
706 #elif RX_BUF_IDX == 1
707 static const unsigned int rtl8139_rx_config =
708 RxCfgRcv16K | RxNoWrap |
709 (RX_FIFO_THRESH << RxCfgFIFOShift) |
710 (RX_DMA_BURST << RxCfgDMAShift);
711 #elif RX_BUF_IDX == 2
712 static const unsigned int rtl8139_rx_config =
713 RxCfgRcv32K | RxNoWrap |
714 (RX_FIFO_THRESH << RxCfgFIFOShift) |
715 (RX_DMA_BURST << RxCfgDMAShift);
716 #elif RX_BUF_IDX == 3
717 static const unsigned int rtl8139_rx_config =
719 (RX_FIFO_THRESH << RxCfgFIFOShift) |
720 (RX_DMA_BURST << RxCfgDMAShift);
722 #error "Invalid configuration for 8139_RXBUF_IDX"
725 static const unsigned int rtl8139_tx_config =
726 (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
728 static void __rtl8139_cleanup_dev (struct net_device *dev)
730 struct rtl8139_private *tp;
731 struct pci_dev *pdev;
733 assert (dev != NULL);
734 assert (dev->priv != NULL);
737 assert (tp->pci_dev != NULL);
742 iounmap (tp->mmio_addr);
743 #endif /* !USE_IO_OPS */
745 /* it's ok to call this even if we have no regions to free */
746 pci_release_regions (pdev);
750 pci_set_drvdata (pdev, NULL);
754 static void rtl8139_chip_reset (void *ioaddr)
758 /* Soft reset the chip. */
759 RTL_W8 (ChipCmd, CmdReset);
761 /* Check that the chip has finished the reset. */
762 for (i = 1000; i > 0; i--) {
764 if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
771 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
772 struct net_device **dev_out)
775 struct net_device *dev;
776 struct rtl8139_private *tp;
780 unsigned long pio_start, pio_end, pio_flags, pio_len;
781 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
784 assert (pdev != NULL);
788 /* dev and dev->priv zeroed in alloc_etherdev */
789 dev = alloc_etherdev (sizeof (*tp));
791 printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pci_name(pdev));
794 SET_MODULE_OWNER(dev);
795 SET_NETDEV_DEV(dev, &pdev->dev);
800 /* enable device (incl. PCI PM wakeup and hotplug setup) */
801 rc = pci_enable_device (pdev);
805 pio_start = pci_resource_start (pdev, 0);
806 pio_end = pci_resource_end (pdev, 0);
807 pio_flags = pci_resource_flags (pdev, 0);
808 pio_len = pci_resource_len (pdev, 0);
810 mmio_start = pci_resource_start (pdev, 1);
811 mmio_end = pci_resource_end (pdev, 1);
812 mmio_flags = pci_resource_flags (pdev, 1);
813 mmio_len = pci_resource_len (pdev, 1);
815 /* set this immediately, we need to know before
816 * we talk to the chip directly */
817 DPRINTK("PIO region size == 0x%02X\n", pio_len);
818 DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
821 /* make sure PCI base addr 0 is PIO */
822 if (!(pio_flags & IORESOURCE_IO)) {
823 printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pci_name(pdev));
827 /* check for weird/broken PCI region reporting */
828 if (pio_len < RTL_MIN_IO_SIZE) {
829 printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pci_name(pdev));
834 /* make sure PCI base addr 1 is MMIO */
835 if (!(mmio_flags & IORESOURCE_MEM)) {
836 printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pci_name(pdev));
840 if (mmio_len < RTL_MIN_IO_SIZE) {
841 printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pci_name(pdev));
847 rc = pci_request_regions (pdev, "8139too");
851 /* enable PCI bus-mastering */
852 pci_set_master (pdev);
855 ioaddr = (void *) pio_start;
856 dev->base_addr = pio_start;
857 tp->mmio_addr = ioaddr;
858 tp->regs_len = pio_len;
860 /* ioremap MMIO region */
861 ioaddr = ioremap (mmio_start, mmio_len);
862 if (ioaddr == NULL) {
863 printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev));
867 dev->base_addr = (long) ioaddr;
868 tp->mmio_addr = ioaddr;
869 tp->regs_len = mmio_len;
870 #endif /* USE_IO_OPS */
872 /* Bring old chips out of low-power mode. */
873 RTL_W8 (HltClk, 'R');
875 /* check for missing/broken hardware */
876 if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
877 printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n",
883 /* identify chip attached to board */
884 version = RTL_R32 (TxConfig) & HW_REVID_MASK;
885 for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
886 if (version == rtl_chip_info[i].version) {
891 /* if unknown chip, assume array element #0, original RTL-8139 in this case */
892 printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n",
894 printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pci_name(pdev), RTL_R32 (TxConfig));
898 DPRINTK ("chipset id (%d) == index %d, '%s'\n",
899 version, i, rtl_chip_info[i].name);
901 if (tp->chipset >= CH_8139B) {
902 u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
903 DPRINTK("PCI PM wakeup\n");
904 if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
907 new_tmp8 |= Cfg1_PM_Enable;
908 if (new_tmp8 != tmp8) {
909 RTL_W8 (Cfg9346, Cfg9346_Unlock);
910 RTL_W8 (Config1, tmp8);
911 RTL_W8 (Cfg9346, Cfg9346_Lock);
913 if (rtl_chip_info[tp->chipset].flags & HasLWake) {
914 tmp8 = RTL_R8 (Config4);
916 RTL_W8 (Cfg9346, Cfg9346_Unlock);
917 RTL_W8 (Config4, tmp8 & ~LWPTN);
918 RTL_W8 (Cfg9346, Cfg9346_Lock);
922 DPRINTK("Old chip wakeup\n");
923 tmp8 = RTL_R8 (Config1);
924 tmp8 &= ~(SLEEP | PWRDN);
925 RTL_W8 (Config1, tmp8);
928 rtl8139_chip_reset (ioaddr);
934 __rtl8139_cleanup_dev (dev);
939 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
940 const struct pci_device_id *ent)
942 struct net_device *dev = NULL;
943 struct rtl8139_private *tp;
944 int i, addr_len, option;
946 static int board_idx = -1;
949 assert (pdev != NULL);
950 assert (ent != NULL);
954 /* when we're built into the kernel, the driver version message
955 * is only printed if at least one 8139 board has been found
959 static int printed_version;
960 if (!printed_version++)
961 printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
965 pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev);
967 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
968 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
969 printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
970 pci_name(pdev), pdev->vendor, pdev->device, pci_rev);
971 printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n");
974 i = rtl8139_init_board (pdev, &dev);
978 assert (dev != NULL);
981 ioaddr = tp->mmio_addr;
982 assert (ioaddr != NULL);
984 addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
985 for (i = 0; i < 3; i++)
986 ((u16 *) (dev->dev_addr))[i] =
987 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
989 /* The Rtl8139-specific entries in the device structure. */
990 dev->open = rtl8139_open;
991 dev->hard_start_xmit = rtl8139_start_xmit;
992 dev->poll = rtl8139_poll;
994 dev->stop = rtl8139_close;
995 dev->get_stats = rtl8139_get_stats;
996 dev->set_multicast_list = rtl8139_set_rx_mode;
997 dev->do_ioctl = netdev_ioctl;
998 dev->ethtool_ops = &rtl8139_ethtool_ops;
999 dev->tx_timeout = rtl8139_tx_timeout;
1000 dev->watchdog_timeo = TX_TIMEOUT;
1001 #ifdef CONFIG_NET_POLL_CONTROLLER
1002 dev->poll_controller = rtl8139_poll_controller;
1005 /* note: the hardware is not capable of sg/csum/highdma, however
1006 * through the use of skb_copy_and_csum_dev we enable these
1009 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
1011 dev->irq = pdev->irq;
1013 /* dev->priv/tp zeroed and aligned in alloc_etherdev */
1016 /* note: tp->chipset set in rtl8139_init_board */
1017 tp->drv_flags = board_info[ent->driver_data].hw_flags;
1018 tp->mmio_addr = ioaddr;
1020 (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
1021 spin_lock_init (&tp->lock);
1022 spin_lock_init (&tp->rx_lock);
1023 init_waitqueue_head (&tp->thr_wait);
1024 init_completion (&tp->thr_exited);
1026 tp->mii.mdio_read = mdio_read;
1027 tp->mii.mdio_write = mdio_write;
1028 tp->mii.phy_id_mask = 0x3f;
1029 tp->mii.reg_num_mask = 0x1f;
1031 /* dev is fully set up and ready to use now */
1032 DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
1033 i = register_netdev (dev);
1034 if (i) goto err_out;
1036 pci_set_drvdata (pdev, dev);
1038 printk (KERN_INFO "%s: %s at 0x%lx, "
1039 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1042 board_info[ent->driver_data].name,
1044 dev->dev_addr[0], dev->dev_addr[1],
1045 dev->dev_addr[2], dev->dev_addr[3],
1046 dev->dev_addr[4], dev->dev_addr[5],
1049 printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n",
1050 dev->name, rtl_chip_info[tp->chipset].name);
1052 /* Find the connected MII xcvrs.
1053 Doing this in open() would allow detecting external xcvrs later, but
1054 takes too much time. */
1055 #ifdef CONFIG_8139TOO_8129
1056 if (tp->drv_flags & HAS_MII_XCVR) {
1057 int phy, phy_idx = 0;
1058 for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
1059 int mii_status = mdio_read(dev, phy, 1);
1060 if (mii_status != 0xffff && mii_status != 0x0000) {
1061 u16 advertising = mdio_read(dev, phy, 4);
1062 tp->phys[phy_idx++] = phy;
1063 printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
1064 "advertising %4.4x.\n",
1065 dev->name, phy, mii_status, advertising);
1069 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM "
1077 tp->mii.phy_id = tp->phys[0];
1079 /* The lower four bits are the media type. */
1080 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
1082 tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
1083 tp->default_port = option & 0xFF;
1084 if (tp->default_port)
1085 tp->mii.force_media = 1;
1087 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0)
1088 tp->mii.full_duplex = full_duplex[board_idx];
1089 if (tp->mii.full_duplex) {
1090 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
1091 /* Changing the MII-advertised media because might prevent
1093 tp->mii.force_media = 1;
1095 if (tp->default_port) {
1096 printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n",
1097 (option & 0x20 ? 100 : 10),
1098 (option & 0x10 ? "full" : "half"));
1099 mdio_write(dev, tp->phys[0], 0,
1100 ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */
1101 ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
1104 /* Put the chip into low-power mode. */
1105 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1106 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
1111 __rtl8139_cleanup_dev (dev);
1116 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
1118 struct net_device *dev = pci_get_drvdata (pdev);
1119 struct rtl8139_private *np;
1121 assert (dev != NULL);
1123 assert (np != NULL);
1125 unregister_netdev (dev);
1127 __rtl8139_cleanup_dev (dev);
1131 /* Serial EEPROM section. */
1133 /* EEPROM_Ctrl bits. */
1134 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1135 #define EE_CS 0x08 /* EEPROM chip select. */
1136 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1137 #define EE_WRITE_0 0x00
1138 #define EE_WRITE_1 0x02
1139 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1140 #define EE_ENB (0x80 | EE_CS)
1142 /* Delay between EEPROM clock transitions.
1143 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1146 #define eeprom_delay() readl(ee_addr)
1148 /* The EEPROM commands include the alway-set leading bit. */
1149 #define EE_WRITE_CMD (5)
1150 #define EE_READ_CMD (6)
1151 #define EE_ERASE_CMD (7)
1153 static int __devinit read_eeprom (void *ioaddr, int location, int addr_len)
1156 unsigned retval = 0;
1157 void *ee_addr = ioaddr + Cfg9346;
1158 int read_cmd = location | (EE_READ_CMD << addr_len);
1160 writeb (EE_ENB & ~EE_CS, ee_addr);
1161 writeb (EE_ENB, ee_addr);
1164 /* Shift the read command bits out. */
1165 for (i = 4 + addr_len; i >= 0; i--) {
1166 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1167 writeb (EE_ENB | dataval, ee_addr);
1169 writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1172 writeb (EE_ENB, ee_addr);
1175 for (i = 16; i > 0; i--) {
1176 writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
1179 (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 :
1181 writeb (EE_ENB, ee_addr);
1185 /* Terminate the EEPROM access. */
1186 writeb (~EE_CS, ee_addr);
1192 /* MII serial management: mostly bogus for now. */
1193 /* Read and write the MII management registers using software-generated
1194 serial MDIO protocol.
1195 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
1196 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
1197 "overclocking" issues. */
1198 #define MDIO_DIR 0x80
1199 #define MDIO_DATA_OUT 0x04
1200 #define MDIO_DATA_IN 0x02
1201 #define MDIO_CLK 0x01
1202 #define MDIO_WRITE0 (MDIO_DIR)
1203 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
1205 #define mdio_delay(mdio_addr) readb(mdio_addr)
1208 static char mii_2_8139_map[8] = {
1220 #ifdef CONFIG_8139TOO_8129
1221 /* Syncronize the MII management interface by shifting 32 one bits out. */
1222 static void mdio_sync (void *mdio_addr)
1226 for (i = 32; i >= 0; i--) {
1227 writeb (MDIO_WRITE1, mdio_addr);
1228 mdio_delay (mdio_addr);
1229 writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr);
1230 mdio_delay (mdio_addr);
1235 static int mdio_read (struct net_device *dev, int phy_id, int location)
1237 struct rtl8139_private *tp = dev->priv;
1239 #ifdef CONFIG_8139TOO_8129
1240 void *mdio_addr = tp->mmio_addr + Config4;
1241 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
1245 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1246 return location < 8 && mii_2_8139_map[location] ?
1247 readw (tp->mmio_addr + mii_2_8139_map[location]) : 0;
1250 #ifdef CONFIG_8139TOO_8129
1251 mdio_sync (mdio_addr);
1252 /* Shift the read command bits out. */
1253 for (i = 15; i >= 0; i--) {
1254 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
1256 writeb (MDIO_DIR | dataval, mdio_addr);
1257 mdio_delay (mdio_addr);
1258 writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr);
1259 mdio_delay (mdio_addr);
1262 /* Read the two transition, 16 data, and wire-idle bits. */
1263 for (i = 19; i > 0; i--) {
1264 writeb (0, mdio_addr);
1265 mdio_delay (mdio_addr);
1266 retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0);
1267 writeb (MDIO_CLK, mdio_addr);
1268 mdio_delay (mdio_addr);
1272 return (retval >> 1) & 0xffff;
1276 static void mdio_write (struct net_device *dev, int phy_id, int location,
1279 struct rtl8139_private *tp = dev->priv;
1280 #ifdef CONFIG_8139TOO_8129
1281 void *mdio_addr = tp->mmio_addr + Config4;
1282 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
1286 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1287 void *ioaddr = tp->mmio_addr;
1288 if (location == 0) {
1289 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1290 RTL_W16 (BasicModeCtrl, value);
1291 RTL_W8 (Cfg9346, Cfg9346_Lock);
1292 } else if (location < 8 && mii_2_8139_map[location])
1293 RTL_W16 (mii_2_8139_map[location], value);
1297 #ifdef CONFIG_8139TOO_8129
1298 mdio_sync (mdio_addr);
1300 /* Shift the command bits out. */
1301 for (i = 31; i >= 0; i--) {
1303 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
1304 writeb (dataval, mdio_addr);
1305 mdio_delay (mdio_addr);
1306 writeb (dataval | MDIO_CLK, mdio_addr);
1307 mdio_delay (mdio_addr);
1309 /* Clear out extra bits. */
1310 for (i = 2; i > 0; i--) {
1311 writeb (0, mdio_addr);
1312 mdio_delay (mdio_addr);
1313 writeb (MDIO_CLK, mdio_addr);
1314 mdio_delay (mdio_addr);
1320 static int rtl8139_open (struct net_device *dev)
1322 struct rtl8139_private *tp = dev->priv;
1324 void *ioaddr = tp->mmio_addr;
1326 retval = request_irq (dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev);
1330 tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
1332 tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
1334 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
1335 free_irq(dev->irq, dev);
1338 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
1339 tp->tx_bufs, tp->tx_bufs_dma);
1341 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
1342 tp->rx_ring, tp->rx_ring_dma);
1348 tp->mii.full_duplex = tp->mii.force_media;
1349 tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
1351 rtl8139_init_ring (dev);
1352 rtl8139_hw_start (dev);
1353 netif_start_queue (dev);
1355 if (netif_msg_ifup(tp))
1356 printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#lx IRQ %d"
1357 " GP Pins %2.2x %s-duplex.\n",
1358 dev->name, pci_resource_start (tp->pci_dev, 1),
1359 dev->irq, RTL_R8 (MediaStatus),
1360 tp->mii.full_duplex ? "full" : "half");
1362 rtl8139_start_thread(dev);
1368 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
1370 struct rtl8139_private *tp = dev->priv;
1372 if (tp->phys[0] >= 0) {
1373 mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
1377 /* Start the hardware at open or resume. */
1378 static void rtl8139_hw_start (struct net_device *dev)
1380 struct rtl8139_private *tp = dev->priv;
1381 void *ioaddr = tp->mmio_addr;
1385 /* Bring old chips out of low-power mode. */
1386 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1387 RTL_W8 (HltClk, 'R');
1389 rtl8139_chip_reset (ioaddr);
1391 /* unlock Config[01234] and BMCR register writes */
1392 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1393 /* Restore our idea of the MAC address. */
1394 RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
1395 RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
1397 /* Must enable Tx/Rx before setting transfer thresholds! */
1398 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1400 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1401 RTL_W32 (RxConfig, tp->rx_config);
1403 /* Check this value: the documentation for IFG contradicts ifself. */
1404 RTL_W32 (TxConfig, rtl8139_tx_config);
1408 rtl_check_media (dev, 1);
1410 if (tp->chipset >= CH_8139B) {
1411 /* Disable magic packet scanning, which is enabled
1412 * when PM is enabled in Config1. It can be reenabled
1413 * via ETHTOOL_SWOL if desired. */
1414 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
1417 DPRINTK("init buffer addresses\n");
1419 /* Lock Config[01234] and BMCR register writes */
1420 RTL_W8 (Cfg9346, Cfg9346_Lock);
1422 /* init Rx ring buffer DMA address */
1423 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1425 /* init Tx buffer DMA addresses */
1426 for (i = 0; i < NUM_TX_DESC; i++)
1427 RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
1429 RTL_W32 (RxMissed, 0);
1431 rtl8139_set_rx_mode (dev);
1433 /* no early-rx interrupts */
1434 RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
1436 /* make sure RxTx has started */
1437 tmp = RTL_R8 (ChipCmd);
1438 if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
1439 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1441 /* Enable all known interrupts by setting the interrupt mask. */
1442 RTL_W16 (IntrMask, rtl8139_intr_mask);
1446 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1447 static void rtl8139_init_ring (struct net_device *dev)
1449 struct rtl8139_private *tp = dev->priv;
1456 for (i = 0; i < NUM_TX_DESC; i++)
1457 tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
1461 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
1462 static int next_tick = 3 * HZ;
1464 #ifndef CONFIG_8139TOO_TUNE_TWISTER
1465 static inline void rtl8139_tune_twister (struct net_device *dev,
1466 struct rtl8139_private *tp) {}
1468 enum TwisterParamVals {
1469 PARA78_default = 0x78fa8388,
1470 PARA7c_default = 0xcb38de43, /* param[0][3] */
1471 PARA7c_xxx = 0xcb38de43,
1474 static const unsigned long param[4][4] = {
1475 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
1476 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1477 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1478 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
1481 static void rtl8139_tune_twister (struct net_device *dev,
1482 struct rtl8139_private *tp)
1485 void *ioaddr = tp->mmio_addr;
1487 /* This is a complicated state machine to configure the "twister" for
1488 impedance/echos based on the cable length.
1489 All of this is magic and undocumented.
1491 switch (tp->twistie) {
1493 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
1494 /* We have link beat, let us tune the twister. */
1495 RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
1496 tp->twistie = 2; /* Change to state 2. */
1497 next_tick = HZ / 10;
1499 /* Just put in some reasonable defaults for when beat returns. */
1500 RTL_W16 (CSCR, CSCR_LinkDownCmd);
1501 RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */
1502 RTL_W32 (PARA78, PARA78_default);
1503 RTL_W32 (PARA7c, PARA7c_default);
1504 tp->twistie = 0; /* Bail from future actions. */
1508 /* Read how long it took to hear the echo. */
1509 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
1510 if (linkcase == 0x7000)
1512 else if (linkcase == 0x3000)
1514 else if (linkcase == 0x1000)
1519 tp->twistie = 3; /* Change to state 2. */
1520 next_tick = HZ / 10;
1523 /* Put out four tuning parameters, one per 100msec. */
1524 if (tp->twist_col == 0)
1525 RTL_W16 (FIFOTMS, 0);
1526 RTL_W32 (PARA7c, param[(int) tp->twist_row]
1527 [(int) tp->twist_col]);
1528 next_tick = HZ / 10;
1529 if (++tp->twist_col >= 4) {
1530 /* For short cables we are done.
1531 For long cables (row == 3) check for mistune. */
1533 (tp->twist_row == 3) ? 4 : 0;
1537 /* Special case for long cables: check for mistune. */
1538 if ((RTL_R16 (CSCR) &
1539 CSCR_LinkStatusBits) == 0x7000) {
1543 RTL_W32 (PARA7c, 0xfb38de03);
1545 next_tick = HZ / 10;
1549 /* Retune for shorter cable (column 2). */
1550 RTL_W32 (FIFOTMS, 0x20);
1551 RTL_W32 (PARA78, PARA78_default);
1552 RTL_W32 (PARA7c, PARA7c_default);
1553 RTL_W32 (FIFOTMS, 0x00);
1557 next_tick = HZ / 10;
1565 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
1567 static inline void rtl8139_thread_iter (struct net_device *dev,
1568 struct rtl8139_private *tp,
1573 mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
1575 if (!tp->mii.force_media && mii_lpa != 0xffff) {
1576 int duplex = (mii_lpa & LPA_100FULL)
1577 || (mii_lpa & 0x01C0) == 0x0040;
1578 if (tp->mii.full_duplex != duplex) {
1579 tp->mii.full_duplex = duplex;
1583 "%s: Setting %s-duplex based on MII #%d link"
1584 " partner ability of %4.4x.\n",
1586 tp->mii.full_duplex ? "full" : "half",
1587 tp->phys[0], mii_lpa);
1589 printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
1593 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1594 RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
1595 RTL_W8 (Cfg9346, Cfg9346_Lock);
1600 next_tick = HZ * 60;
1602 rtl8139_tune_twister (dev, tp);
1604 DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
1605 dev->name, RTL_R16 (NWayLPAR));
1606 DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n",
1607 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
1608 DPRINTK ("%s: Chip config %2.2x %2.2x.\n",
1609 dev->name, RTL_R8 (Config0),
1613 static int rtl8139_thread (void *data)
1615 struct net_device *dev = data;
1616 struct rtl8139_private *tp = dev->priv;
1617 unsigned long timeout;
1619 daemonize("%s", dev->name);
1620 allow_signal(SIGTERM);
1623 timeout = next_tick;
1625 timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout);
1626 /* make swsusp happy with our thread */
1627 if (current->flags & PF_FREEZE)
1628 refrigerator(PF_FREEZE);
1629 } while (!signal_pending (current) && (timeout > 0));
1631 if (signal_pending (current)) {
1632 flush_signals(current);
1635 if (tp->time_to_die)
1639 rtl8139_thread_iter (dev, tp, tp->mmio_addr);
1643 complete_and_exit (&tp->thr_exited, 0);
1646 static inline void rtl8139_start_thread(struct net_device *dev)
1648 struct rtl8139_private *tp = dev->priv;
1652 tp->time_to_die = 0;
1653 if (tp->chipset == CH_8139_K)
1655 else if (tp->drv_flags & HAS_LNK_CHNG)
1658 tp->thr_pid = kernel_thread(rtl8139_thread, dev, CLONE_FS|CLONE_FILES);
1659 if (tp->thr_pid < 0) {
1660 printk (KERN_WARNING "%s: unable to start kernel thread\n",
1665 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
1670 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */
1674 static void rtl8139_tx_timeout (struct net_device *dev)
1676 struct rtl8139_private *tp = dev->priv;
1677 void *ioaddr = tp->mmio_addr;
1680 unsigned long flags;
1682 printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
1683 "media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
1684 RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
1685 /* Emit info to figure out what went wrong. */
1686 printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n",
1687 dev->name, tp->cur_tx, tp->dirty_tx);
1688 for (i = 0; i < NUM_TX_DESC; i++)
1689 printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n",
1690 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
1691 i == tp->dirty_tx % NUM_TX_DESC ?
1692 " (queue head)" : "");
1694 tp->xstats.tx_timeouts++;
1696 /* disable Tx ASAP, if not already */
1697 tmp8 = RTL_R8 (ChipCmd);
1698 if (tmp8 & CmdTxEnb)
1699 RTL_W8 (ChipCmd, CmdRxEnb);
1701 spin_lock(&tp->rx_lock);
1702 /* Disable interrupts by clearing the interrupt mask. */
1703 RTL_W16 (IntrMask, 0x0000);
1705 /* Stop a shared interrupt from scavenging while we are. */
1706 spin_lock_irqsave (&tp->lock, flags);
1707 rtl8139_tx_clear (tp);
1708 spin_unlock_irqrestore (&tp->lock, flags);
1710 /* ...and finally, reset everything */
1711 if (netif_running(dev)) {
1712 rtl8139_hw_start (dev);
1713 netif_wake_queue (dev);
1715 spin_unlock(&tp->rx_lock);
1719 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
1721 struct rtl8139_private *tp = dev->priv;
1722 void *ioaddr = tp->mmio_addr;
1724 unsigned int len = skb->len;
1726 /* Calculate the next Tx descriptor entry. */
1727 entry = tp->cur_tx % NUM_TX_DESC;
1729 /* Note: the chip doesn't have auto-pad! */
1730 if (likely(len < TX_BUF_SIZE)) {
1732 memset(tp->tx_buf[entry], 0, ETH_ZLEN);
1733 skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
1737 tp->stats.tx_dropped++;
1741 spin_lock_irq(&tp->lock);
1742 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
1743 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
1745 dev->trans_start = jiffies;
1750 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
1751 netif_stop_queue (dev);
1752 spin_unlock_irq(&tp->lock);
1754 if (netif_msg_tx_queued(tp))
1755 printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
1756 dev->name, len, entry);
1762 static void rtl8139_tx_interrupt (struct net_device *dev,
1763 struct rtl8139_private *tp,
1766 unsigned long dirty_tx, tx_left;
1768 assert (dev != NULL);
1769 assert (tp != NULL);
1770 assert (ioaddr != NULL);
1772 dirty_tx = tp->dirty_tx;
1773 tx_left = tp->cur_tx - dirty_tx;
1774 while (tx_left > 0) {
1775 int entry = dirty_tx % NUM_TX_DESC;
1778 txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
1780 if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
1781 break; /* It still hasn't been Txed */
1783 /* Note: TxCarrierLost is always asserted at 100mbps. */
1784 if (txstatus & (TxOutOfWindow | TxAborted)) {
1785 /* There was an major error, log it. */
1786 if (netif_msg_tx_err(tp))
1787 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
1788 dev->name, txstatus);
1789 tp->stats.tx_errors++;
1790 if (txstatus & TxAborted) {
1791 tp->stats.tx_aborted_errors++;
1792 RTL_W32 (TxConfig, TxClearAbt);
1793 RTL_W16 (IntrStatus, TxErr);
1796 if (txstatus & TxCarrierLost)
1797 tp->stats.tx_carrier_errors++;
1798 if (txstatus & TxOutOfWindow)
1799 tp->stats.tx_window_errors++;
1801 if (txstatus & TxUnderrun) {
1802 /* Add 64 to the Tx FIFO threshold. */
1803 if (tp->tx_flag < 0x00300000)
1804 tp->tx_flag += 0x00020000;
1805 tp->stats.tx_fifo_errors++;
1807 tp->stats.collisions += (txstatus >> 24) & 15;
1808 tp->stats.tx_bytes += txstatus & 0x7ff;
1809 tp->stats.tx_packets++;
1816 #ifndef RTL8139_NDEBUG
1817 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1818 printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
1819 dev->name, dirty_tx, tp->cur_tx);
1820 dirty_tx += NUM_TX_DESC;
1822 #endif /* RTL8139_NDEBUG */
1824 /* only wake the queue if we did work, and the queue is stopped */
1825 if (tp->dirty_tx != dirty_tx) {
1826 tp->dirty_tx = dirty_tx;
1828 netif_wake_queue (dev);
1833 /* TODO: clean this up! Rx reset need not be this intensive */
1834 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1835 struct rtl8139_private *tp, void *ioaddr)
1838 #ifdef CONFIG_8139_OLD_RX_RESET
1842 if (netif_msg_rx_err (tp))
1843 printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
1844 dev->name, rx_status);
1845 tp->stats.rx_errors++;
1846 if (!(rx_status & RxStatusOK)) {
1847 if (rx_status & RxTooLong) {
1848 DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
1849 dev->name, rx_status);
1850 /* A.C.: The chip hangs here. */
1852 if (rx_status & (RxBadSymbol | RxBadAlign))
1853 tp->stats.rx_frame_errors++;
1854 if (rx_status & (RxRunt | RxTooLong))
1855 tp->stats.rx_length_errors++;
1856 if (rx_status & RxCRCErr)
1857 tp->stats.rx_crc_errors++;
1859 tp->xstats.rx_lost_in_ring++;
1862 #ifndef CONFIG_8139_OLD_RX_RESET
1863 tmp8 = RTL_R8 (ChipCmd);
1864 RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
1865 RTL_W8 (ChipCmd, tmp8);
1866 RTL_W32 (RxConfig, tp->rx_config);
1869 /* Reset the receiver, based on RealTek recommendation. (Bug?) */
1871 /* disable receive */
1872 RTL_W8_F (ChipCmd, CmdTxEnb);
1874 while (--tmp_work > 0) {
1876 tmp8 = RTL_R8 (ChipCmd);
1877 if (!(tmp8 & CmdRxEnb))
1881 printk (KERN_WARNING PFX "rx stop wait too long\n");
1882 /* restart receive */
1884 while (--tmp_work > 0) {
1885 RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
1887 tmp8 = RTL_R8 (ChipCmd);
1888 if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
1892 printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
1894 /* and reinitialize all rx related registers */
1895 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1896 /* Must enable Tx/Rx before setting transfer thresholds! */
1897 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1899 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1900 RTL_W32 (RxConfig, tp->rx_config);
1903 DPRINTK("init buffer addresses\n");
1905 /* Lock Config[01234] and BMCR register writes */
1906 RTL_W8 (Cfg9346, Cfg9346_Lock);
1908 /* init Rx ring buffer DMA address */
1909 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1911 /* A.C.: Reset the multicast list. */
1912 __set_rx_mode (dev);
1917 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
1918 u32 offset, unsigned int size)
1920 u32 left = RX_BUF_LEN - offset;
1923 memcpy(skb->data, ring + offset, left);
1924 memcpy(skb->data+left, ring, size - left);
1926 memcpy(skb->data, ring + offset, size);
1930 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1933 void *ioaddr = tp->mmio_addr;
1935 unsigned char *rx_ring = tp->rx_ring;
1936 unsigned int cur_rx = tp->cur_rx;
1938 DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
1939 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
1940 RTL_R16 (RxBufAddr),
1941 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
1943 while (netif_running(dev) && received < budget
1944 && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
1945 u32 ring_offset = cur_rx % RX_BUF_LEN;
1947 unsigned int rx_size;
1948 unsigned int pkt_size;
1949 struct sk_buff *skb;
1954 /* read size+status of next frame from DMA ring buffer */
1955 rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
1956 rx_size = rx_status >> 16;
1957 pkt_size = rx_size - 4;
1959 if (netif_msg_rx_status(tp))
1960 printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x,"
1961 " cur %4.4x.\n", dev->name, rx_status,
1963 #if RTL8139_DEBUG > 2
1966 DPRINTK ("%s: Frame contents ", dev->name);
1967 for (i = 0; i < 70; i++)
1969 rx_ring[ring_offset + i]);
1974 /* Packet copy from FIFO still in progress.
1975 * Theoretically, this should never happen
1976 * since EarlyRx is disabled.
1978 if (unlikely(rx_size == 0xfff0)) {
1979 tp->xstats.early_rx++;
1983 /* If Rx err or invalid rx_size/rx_status received
1984 * (which happens if we get lost in the ring),
1985 * Rx process gets reset, so we abort any further
1988 if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
1990 (!(rx_status & RxStatusOK)))) {
1991 rtl8139_rx_err (rx_status, dev, tp, ioaddr);
1995 /* Malloc up new buffer, compatible with net-2e. */
1996 /* Omit the four octet CRC from the length. */
1998 skb = dev_alloc_skb (pkt_size + 2);
2001 skb_reserve (skb, 2); /* 16 byte align the IP fields. */
2003 wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
2005 eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0);
2007 skb_put (skb, pkt_size);
2009 skb->protocol = eth_type_trans (skb, dev);
2011 dev->last_rx = jiffies;
2012 tp->stats.rx_bytes += pkt_size;
2013 tp->stats.rx_packets++;
2015 netif_receive_skb (skb);
2017 if (net_ratelimit())
2018 printk (KERN_WARNING
2019 "%s: Memory squeeze, dropping packet.\n",
2021 tp->stats.rx_dropped++;
2025 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
2026 RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
2028 /* Clear out errors and receive interrupts */
2029 status = RTL_R16 (IntrStatus) & RxAckBits;
2030 if (likely(status != 0)) {
2031 if (unlikely(status & (RxFIFOOver | RxOverflow))) {
2032 tp->stats.rx_errors++;
2033 if (status & RxFIFOOver)
2034 tp->stats.rx_fifo_errors++;
2036 RTL_W16_F (IntrStatus, RxAckBits);
2042 #if RTL8139_DEBUG > 1
2043 DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
2044 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
2045 RTL_R16 (RxBufAddr),
2046 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
2049 tp->cur_rx = cur_rx;
2054 static void rtl8139_weird_interrupt (struct net_device *dev,
2055 struct rtl8139_private *tp,
2057 int status, int link_changed)
2059 DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
2062 assert (dev != NULL);
2063 assert (tp != NULL);
2064 assert (ioaddr != NULL);
2066 /* Update the error count. */
2067 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2068 RTL_W32 (RxMissed, 0);
2070 if ((status & RxUnderrun) && link_changed &&
2071 (tp->drv_flags & HAS_LNK_CHNG)) {
2072 rtl_check_media(dev, 0);
2073 status &= ~RxUnderrun;
2076 if (status & (RxUnderrun | RxErr))
2077 tp->stats.rx_errors++;
2079 if (status & PCSTimeout)
2080 tp->stats.rx_length_errors++;
2081 if (status & RxUnderrun)
2082 tp->stats.rx_fifo_errors++;
2083 if (status & PCIErr) {
2085 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
2086 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
2088 printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
2089 dev->name, pci_cmd_status);
2093 static int rtl8139_poll(struct net_device *dev, int *budget)
2095 struct rtl8139_private *tp = dev->priv;
2096 void *ioaddr = tp->mmio_addr;
2097 int orig_budget = min(*budget, dev->quota);
2100 spin_lock(&tp->rx_lock);
2101 if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
2104 work_done = rtl8139_rx(dev, tp, orig_budget);
2105 if (likely(work_done > 0)) {
2106 *budget -= work_done;
2107 dev->quota -= work_done;
2108 done = (work_done < orig_budget);
2114 * Order is important since data can get interrupted
2115 * again when we think we are done.
2117 local_irq_disable();
2118 RTL_W16_F(IntrMask, rtl8139_intr_mask);
2119 __netif_rx_complete(dev);
2122 spin_unlock(&tp->rx_lock);
2127 /* The interrupt handler does all of the Rx thread work and cleans up
2128 after the Tx thread. */
2129 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
2130 struct pt_regs *regs)
2132 struct net_device *dev = (struct net_device *) dev_instance;
2133 struct rtl8139_private *tp = dev->priv;
2134 void *ioaddr = tp->mmio_addr;
2135 u16 status, ackstat;
2136 int link_changed = 0; /* avoid bogus "uninit" warning */
2139 spin_lock (&tp->lock);
2140 status = RTL_R16 (IntrStatus);
2143 if (unlikely((status & rtl8139_intr_mask) == 0))
2148 /* h/w no longer present (hotplug?) or major error, bail */
2149 if (unlikely(status == 0xFFFF))
2152 /* close possible race's with dev_close */
2153 if (unlikely(!netif_running(dev))) {
2154 RTL_W16 (IntrMask, 0);
2158 /* Acknowledge all of the current interrupt sources ASAP, but
2159 an first get an additional status bit from CSCR. */
2160 if (unlikely(status & RxUnderrun))
2161 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
2163 ackstat = status & ~(RxAckBits | TxErr);
2165 RTL_W16 (IntrStatus, ackstat);
2167 /* Receive packets are processed by poll routine.
2168 If not running start it now. */
2169 if (status & RxAckBits){
2170 if (netif_rx_schedule_prep(dev)) {
2171 RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
2172 __netif_rx_schedule (dev);
2176 /* Check uncommon events with one test. */
2177 if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
2178 rtl8139_weird_interrupt (dev, tp, ioaddr,
2179 status, link_changed);
2181 if (status & (TxOK | TxErr)) {
2182 rtl8139_tx_interrupt (dev, tp, ioaddr);
2184 RTL_W16 (IntrStatus, TxErr);
2187 spin_unlock (&tp->lock);
2189 DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
2190 dev->name, RTL_R16 (IntrStatus));
2191 return IRQ_RETVAL(handled);
2194 #ifdef CONFIG_NET_POLL_CONTROLLER
2196 * Polling receive - used by netconsole and other diagnostic tools
2197 * to allow network i/o with interrupts disabled.
2199 static void rtl8139_poll_controller(struct net_device *dev)
2201 disable_irq(dev->irq);
2202 rtl8139_interrupt(dev->irq, dev, NULL);
2203 enable_irq(dev->irq);
2207 static int rtl8139_close (struct net_device *dev)
2209 struct rtl8139_private *tp = dev->priv;
2210 void *ioaddr = tp->mmio_addr;
2212 unsigned long flags;
2214 netif_stop_queue (dev);
2216 if (tp->thr_pid >= 0) {
2217 tp->time_to_die = 1;
2219 ret = kill_proc (tp->thr_pid, SIGTERM, 1);
2221 printk (KERN_ERR "%s: unable to signal thread\n", dev->name);
2224 wait_for_completion (&tp->thr_exited);
2227 if (netif_msg_ifdown(tp))
2228 printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
2229 dev->name, RTL_R16 (IntrStatus));
2231 spin_lock_irqsave (&tp->lock, flags);
2233 /* Stop the chip's Tx and Rx DMA processes. */
2234 RTL_W8 (ChipCmd, 0);
2236 /* Disable interrupts by clearing the interrupt mask. */
2237 RTL_W16 (IntrMask, 0);
2239 /* Update the error counts. */
2240 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2241 RTL_W32 (RxMissed, 0);
2243 spin_unlock_irqrestore (&tp->lock, flags);
2245 synchronize_irq (dev->irq); /* racy, but that's ok here */
2246 free_irq (dev->irq, dev);
2248 rtl8139_tx_clear (tp);
2250 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
2251 tp->rx_ring, tp->rx_ring_dma);
2252 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
2253 tp->tx_bufs, tp->tx_bufs_dma);
2257 /* Green! Put the chip in low-power mode. */
2258 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2260 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
2261 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
2267 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to
2268 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
2269 other threads or interrupts aren't messing with the 8139. */
2270 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2272 struct rtl8139_private *np = dev->priv;
2273 void *ioaddr = np->mmio_addr;
2275 spin_lock_irq(&np->lock);
2276 if (rtl_chip_info[np->chipset].flags & HasLWake) {
2277 u8 cfg3 = RTL_R8 (Config3);
2278 u8 cfg5 = RTL_R8 (Config5);
2280 wol->supported = WAKE_PHY | WAKE_MAGIC
2281 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
2284 if (cfg3 & Cfg3_LinkUp)
2285 wol->wolopts |= WAKE_PHY;
2286 if (cfg3 & Cfg3_Magic)
2287 wol->wolopts |= WAKE_MAGIC;
2288 /* (KON)FIXME: See how netdev_set_wol() handles the
2289 following constants. */
2290 if (cfg5 & Cfg5_UWF)
2291 wol->wolopts |= WAKE_UCAST;
2292 if (cfg5 & Cfg5_MWF)
2293 wol->wolopts |= WAKE_MCAST;
2294 if (cfg5 & Cfg5_BWF)
2295 wol->wolopts |= WAKE_BCAST;
2297 spin_unlock_irq(&np->lock);
2301 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes
2302 that wol points to kernel memory and other threads or interrupts
2303 aren't messing with the 8139. */
2304 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2306 struct rtl8139_private *np = dev->priv;
2307 void *ioaddr = np->mmio_addr;
2311 support = ((rtl_chip_info[np->chipset].flags & HasLWake)
2312 ? (WAKE_PHY | WAKE_MAGIC
2313 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
2315 if (wol->wolopts & ~support)
2318 spin_lock_irq(&np->lock);
2319 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
2320 if (wol->wolopts & WAKE_PHY)
2321 cfg3 |= Cfg3_LinkUp;
2322 if (wol->wolopts & WAKE_MAGIC)
2324 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2325 RTL_W8 (Config3, cfg3);
2326 RTL_W8 (Cfg9346, Cfg9346_Lock);
2328 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
2329 /* (KON)FIXME: These are untested. We may have to set the
2330 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
2332 if (wol->wolopts & WAKE_UCAST)
2334 if (wol->wolopts & WAKE_MCAST)
2336 if (wol->wolopts & WAKE_BCAST)
2338 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */
2339 spin_unlock_irq(&np->lock);
2344 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2346 struct rtl8139_private *np = dev->priv;
2347 strcpy(info->driver, DRV_NAME);
2348 strcpy(info->version, DRV_VERSION);
2349 strcpy(info->bus_info, pci_name(np->pci_dev));
2350 info->regdump_len = np->regs_len;
2353 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2355 struct rtl8139_private *np = dev->priv;
2356 spin_lock_irq(&np->lock);
2357 mii_ethtool_gset(&np->mii, cmd);
2358 spin_unlock_irq(&np->lock);
2362 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2364 struct rtl8139_private *np = dev->priv;
2366 spin_lock_irq(&np->lock);
2367 rc = mii_ethtool_sset(&np->mii, cmd);
2368 spin_unlock_irq(&np->lock);
2372 static int rtl8139_nway_reset(struct net_device *dev)
2374 struct rtl8139_private *np = dev->priv;
2375 return mii_nway_restart(&np->mii);
2378 static u32 rtl8139_get_link(struct net_device *dev)
2380 struct rtl8139_private *np = dev->priv;
2381 return mii_link_ok(&np->mii);
2384 static u32 rtl8139_get_msglevel(struct net_device *dev)
2386 struct rtl8139_private *np = dev->priv;
2387 return np->msg_enable;
2390 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
2392 struct rtl8139_private *np = dev->priv;
2393 np->msg_enable = datum;
2396 /* TODO: we are too slack to do reg dumping for pio, for now */
2397 #ifdef CONFIG_8139TOO_PIO
2398 #define rtl8139_get_regs_len NULL
2399 #define rtl8139_get_regs NULL
2401 static int rtl8139_get_regs_len(struct net_device *dev)
2403 struct rtl8139_private *np = dev->priv;
2404 return np->regs_len;
2407 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
2409 struct rtl8139_private *np = dev->priv;
2411 regs->version = RTL_REGS_VER;
2413 spin_lock_irq(&np->lock);
2414 memcpy_fromio(regbuf, np->mmio_addr, regs->len);
2415 spin_unlock_irq(&np->lock);
2417 #endif /* CONFIG_8139TOO_MMIO */
2419 static int rtl8139_get_stats_count(struct net_device *dev)
2421 return RTL_NUM_STATS;
2424 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2426 struct rtl8139_private *np = dev->priv;
2428 data[0] = np->xstats.early_rx;
2429 data[1] = np->xstats.tx_buf_mapped;
2430 data[2] = np->xstats.tx_timeouts;
2431 data[3] = np->xstats.rx_lost_in_ring;
2434 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2436 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2439 static struct ethtool_ops rtl8139_ethtool_ops = {
2440 .get_drvinfo = rtl8139_get_drvinfo,
2441 .get_settings = rtl8139_get_settings,
2442 .set_settings = rtl8139_set_settings,
2443 .get_regs_len = rtl8139_get_regs_len,
2444 .get_regs = rtl8139_get_regs,
2445 .nway_reset = rtl8139_nway_reset,
2446 .get_link = rtl8139_get_link,
2447 .get_msglevel = rtl8139_get_msglevel,
2448 .set_msglevel = rtl8139_set_msglevel,
2449 .get_wol = rtl8139_get_wol,
2450 .set_wol = rtl8139_set_wol,
2451 .get_strings = rtl8139_get_strings,
2452 .get_stats_count = rtl8139_get_stats_count,
2453 .get_ethtool_stats = rtl8139_get_ethtool_stats,
2456 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2458 struct rtl8139_private *np = dev->priv;
2461 if (!netif_running(dev))
2464 spin_lock_irq(&np->lock);
2465 rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
2466 spin_unlock_irq(&np->lock);
2472 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
2474 struct rtl8139_private *tp = dev->priv;
2475 void *ioaddr = tp->mmio_addr;
2476 unsigned long flags;
2478 if (netif_running(dev)) {
2479 spin_lock_irqsave (&tp->lock, flags);
2480 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2481 RTL_W32 (RxMissed, 0);
2482 spin_unlock_irqrestore (&tp->lock, flags);
2488 /* Set or clear the multicast filter for this adaptor.
2489 This routine is not state sensitive and need not be SMP locked. */
2491 static void __set_rx_mode (struct net_device *dev)
2493 struct rtl8139_private *tp = dev->priv;
2494 void *ioaddr = tp->mmio_addr;
2495 u32 mc_filter[2]; /* Multicast hash filter */
2499 DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
2500 dev->name, dev->flags, RTL_R32 (RxConfig));
2502 /* Note: do not reorder, GCC is clever about common statements. */
2503 if (dev->flags & IFF_PROMISC) {
2504 /* Unconditionally log net taps. */
2505 printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2508 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2510 mc_filter[1] = mc_filter[0] = 0xffffffff;
2511 } else if ((dev->mc_count > multicast_filter_limit)
2512 || (dev->flags & IFF_ALLMULTI)) {
2513 /* Too many to filter perfectly -- accept all multicasts. */
2514 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2515 mc_filter[1] = mc_filter[0] = 0xffffffff;
2517 struct dev_mc_list *mclist;
2518 rx_mode = AcceptBroadcast | AcceptMyPhys;
2519 mc_filter[1] = mc_filter[0] = 0;
2520 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2521 i++, mclist = mclist->next) {
2522 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2524 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2525 rx_mode |= AcceptMulticast;
2529 /* We can safely update without stopping the chip. */
2530 tmp = rtl8139_rx_config | rx_mode;
2531 if (tp->rx_config != tmp) {
2532 RTL_W32_F (RxConfig, tmp);
2533 tp->rx_config = tmp;
2535 RTL_W32_F (MAR0 + 0, mc_filter[0]);
2536 RTL_W32_F (MAR0 + 4, mc_filter[1]);
2539 static void rtl8139_set_rx_mode (struct net_device *dev)
2541 unsigned long flags;
2542 struct rtl8139_private *tp = dev->priv;
2544 spin_lock_irqsave (&tp->lock, flags);
2546 spin_unlock_irqrestore (&tp->lock, flags);
2551 static int rtl8139_suspend (struct pci_dev *pdev, u32 state)
2553 struct net_device *dev = pci_get_drvdata (pdev);
2554 struct rtl8139_private *tp = dev->priv;
2555 void *ioaddr = tp->mmio_addr;
2556 unsigned long flags;
2558 pci_save_state (pdev, tp->pci_state);
2560 if (!netif_running (dev))
2563 netif_device_detach (dev);
2565 spin_lock_irqsave (&tp->lock, flags);
2567 /* Disable interrupts, stop Tx and Rx. */
2568 RTL_W16 (IntrMask, 0);
2569 RTL_W8 (ChipCmd, 0);
2571 /* Update the error counts. */
2572 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2573 RTL_W32 (RxMissed, 0);
2575 spin_unlock_irqrestore (&tp->lock, flags);
2577 pci_set_power_state (pdev, 3);
2583 static int rtl8139_resume (struct pci_dev *pdev)
2585 struct net_device *dev = pci_get_drvdata (pdev);
2586 struct rtl8139_private *tp = dev->priv;
2588 pci_restore_state (pdev, tp->pci_state);
2589 if (!netif_running (dev))
2591 pci_set_power_state (pdev, 0);
2592 rtl8139_init_ring (dev);
2593 rtl8139_hw_start (dev);
2594 netif_device_attach (dev);
2598 #endif /* CONFIG_PM */
2601 static struct pci_driver rtl8139_pci_driver = {
2603 .id_table = rtl8139_pci_tbl,
2604 .probe = rtl8139_init_one,
2605 .remove = __devexit_p(rtl8139_remove_one),
2607 .suspend = rtl8139_suspend,
2608 .resume = rtl8139_resume,
2609 #endif /* CONFIG_PM */
2613 static int __init rtl8139_init_module (void)
2615 /* when we're a module, we always print a version message,
2616 * even if no 8139 board is found.
2619 printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
2622 return pci_module_init (&rtl8139_pci_driver);
2626 static void __exit rtl8139_cleanup_module (void)
2628 pci_unregister_driver (&rtl8139_pci_driver);
2632 module_init(rtl8139_init_module);
2633 module_exit(rtl8139_cleanup_module);