2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/config.h>
54 #include <linux/module.h>
55 #include <linux/version.h>
56 #include <linux/types.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
70 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
71 #include <linux/if_vlan.h>
75 #include <linux/ethtool.h>
81 #include <asm/system.h>
84 #include <asm/byteorder.h>
85 #include <asm/uaccess.h>
90 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
91 #define ACE_IS_TIGON_I(ap) 0
92 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
94 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
95 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
98 #ifndef PCI_VENDOR_ID_ALTEON
99 #define PCI_VENDOR_ID_ALTEON 0x12ae
101 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
102 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
103 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
105 #ifndef PCI_DEVICE_ID_3COM_3C985
106 #define PCI_DEVICE_ID_3COM_3C985 0x0001
108 #ifndef PCI_VENDOR_ID_NETGEAR
109 #define PCI_VENDOR_ID_NETGEAR 0x1385
110 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
112 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
113 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
118 * Farallon used the DEC vendor ID by mistake and they seem not
121 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
122 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
125 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
127 #ifndef PCI_VENDOR_ID_SGI
128 #define PCI_VENDOR_ID_SGI 0x10a9
130 #ifndef PCI_DEVICE_ID_SGI_ACENIC
131 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
134 static struct pci_device_id acenic_pci_tbl[] = {
135 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
136 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
137 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
138 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
142 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
143 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
144 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 * Farallon used the DEC vendor ID on their cards incorrectly,
147 * then later Alteon's ID.
149 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
150 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
151 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
152 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
153 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
154 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
157 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
159 #ifndef SET_NETDEV_DEV
160 #define SET_NETDEV_DEV(net, pdev) do{} while(0)
163 #if LINUX_VERSION_CODE >= 0x2051c
164 #define ace_sync_irq(irq) synchronize_irq(irq)
166 #define ace_sync_irq(irq) synchronize_irq()
169 #ifndef offset_in_page
170 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
173 #define ACE_MAX_MOD_PARMS 8
174 #define BOARD_IDX_STATIC 0
175 #define BOARD_IDX_OVERFLOW -1
177 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
178 defined(NETIF_F_HW_VLAN_RX)
179 #define ACENIC_DO_VLAN 1
180 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
182 #define ACENIC_DO_VLAN 0
183 #define ACE_RCB_VLAN_FLAG 0
189 * These must be defined before the firmware is included.
191 #define MAX_TEXT_LEN 96*1024
192 #define MAX_RODATA_LEN 8*1024
193 #define MAX_DATA_LEN 2*1024
195 #include "acenic_firmware.h"
197 #ifndef tigon2FwReleaseLocal
198 #define tigon2FwReleaseLocal 0
202 * This driver currently supports Tigon I and Tigon II based cards
203 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
204 * GA620. The driver should also work on the SGI, DEC and Farallon
205 * versions of the card, however I have not been able to test that
208 * This card is really neat, it supports receive hardware checksumming
209 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
210 * firmware. Also the programming interface is quite neat, except for
211 * the parts dealing with the i2c eeprom on the card ;-)
213 * Using jumbo frames:
215 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
216 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
217 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
218 * interface number and <MTU> being the MTU value.
222 * When compiled as a loadable module, the driver allows for a number
223 * of module parameters to be specified. The driver supports the
224 * following module parameters:
226 * trace=<val> - Firmware trace level. This requires special traced
227 * firmware to replace the firmware supplied with
228 * the driver - for debugging purposes only.
230 * link=<val> - Link state. Normally you want to use the default link
231 * parameters set by the driver. This can be used to
232 * override these in case your switch doesn't negotiate
233 * the link properly. Valid values are:
234 * 0x0001 - Force half duplex link.
235 * 0x0002 - Do not negotiate line speed with the other end.
236 * 0x0010 - 10Mbit/sec link.
237 * 0x0020 - 100Mbit/sec link.
238 * 0x0040 - 1000Mbit/sec link.
239 * 0x0100 - Do not negotiate flow control.
240 * 0x0200 - Enable RX flow control Y
241 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
242 * Default value is 0x0270, ie. enable link+flow
243 * control negotiation. Negotiating the highest
244 * possible link speed with RX flow control enabled.
246 * When disabling link speed negotiation, only one link
247 * speed is allowed to be specified!
249 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
250 * to wait for more packets to arive before
251 * interrupting the host, from the time the first
254 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
255 * to wait for more packets to arive in the transmit ring,
256 * before interrupting the host, after transmitting the
257 * first packet in the ring.
259 * max_tx_desc=<val> - maximum number of transmit descriptors
260 * (packets) transmitted before interrupting the host.
262 * max_rx_desc=<val> - maximum number of receive descriptors
263 * (packets) received before interrupting the host.
265 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
266 * increments of the NIC's on board memory to be used for
267 * transmit and receive buffers. For the 1MB NIC app. 800KB
268 * is available, on the 1/2MB NIC app. 300KB is available.
269 * 68KB will always be available as a minimum for both
270 * directions. The default value is a 50/50 split.
271 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
272 * operations, default (1) is to always disable this as
273 * that is what Alteon does on NT. I have not been able
274 * to measure any real performance differences with
275 * this on my systems. Set <val>=0 if you want to
276 * enable these operations.
278 * If you use more than one NIC, specify the parameters for the
279 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
280 * run tracing on NIC #2 but not on NIC #1 and #3.
284 * - Proper multicast support.
285 * - NIC dump support.
286 * - More tuning parameters.
288 * The mini ring is not used under Linux and I am not sure it makes sense
289 * to actually use it.
291 * New interrupt handler strategy:
293 * The old interrupt handler worked using the traditional method of
294 * replacing an skbuff with a new one when a packet arrives. However
295 * the rx rings do not need to contain a static number of buffer
296 * descriptors, thus it makes sense to move the memory allocation out
297 * of the main interrupt handler and do it in a bottom half handler
298 * and only allocate new buffers when the number of buffers in the
299 * ring is below a certain threshold. In order to avoid starving the
300 * NIC under heavy load it is however necessary to force allocation
301 * when hitting a minimum threshold. The strategy for alloction is as
304 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
305 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
306 * the buffers in the interrupt handler
307 * RX_RING_THRES - maximum number of buffers in the rx ring
308 * RX_MINI_THRES - maximum number of buffers in the mini ring
309 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
311 * One advantagous side effect of this allocation approach is that the
312 * entire rx processing can be done without holding any spin lock
313 * since the rx rings and registers are totally independent of the tx
314 * ring and its registers. This of course includes the kmalloc's of
315 * new skb's. Thus start_xmit can run in parallel with rx processing
316 * and the memory allocation on SMP systems.
318 * Note that running the skb reallocation in a bottom half opens up
319 * another can of races which needs to be handled properly. In
320 * particular it can happen that the interrupt handler tries to run
321 * the reallocation while the bottom half is either running on another
322 * CPU or was interrupted on the same CPU. To get around this the
323 * driver uses bitops to prevent the reallocation routines from being
326 * TX handling can also be done without holding any spin lock, wheee
327 * this is fun! since tx_ret_csm is only written to by the interrupt
328 * handler. The case to be aware of is when shutting down the device
329 * and cleaning up where it is necessary to make sure that
330 * start_xmit() is not running while this is happening. Well DaveM
331 * informs me that this case is already protected against ... bye bye
332 * Mr. Spin Lock, it was nice to know you.
334 * TX interrupts are now partly disabled so the NIC will only generate
335 * TX interrupts for the number of coal ticks, not for the number of
336 * TX packets in the queue. This should reduce the number of TX only,
337 * ie. when no RX processing is done, interrupts seen.
341 * Threshold values for RX buffer allocation - the low water marks for
342 * when to start refilling the rings are set to 75% of the ring
343 * sizes. It seems to make sense to refill the rings entirely from the
344 * intrrupt handler once it gets below the panic threshold, that way
345 * we don't risk that the refilling is moved to another CPU when the
346 * one running the interrupt handler just got the slab code hot in its
349 #define RX_RING_SIZE 72
350 #define RX_MINI_SIZE 64
351 #define RX_JUMBO_SIZE 48
353 #define RX_PANIC_STD_THRES 16
354 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
355 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
356 #define RX_PANIC_MINI_THRES 12
357 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
358 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
359 #define RX_PANIC_JUMBO_THRES 6
360 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
361 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
365 * Size of the mini ring entries, basically these just should be big
366 * enough to take TCP ACKs
368 #define ACE_MINI_SIZE 100
370 #define ACE_MINI_BUFSIZE (ACE_MINI_SIZE + 2 + 16)
371 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 2+4+16)
372 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 2+4+16)
375 * There seems to be a magic difference in the effect between 995 and 996
376 * but little difference between 900 and 995 ... no idea why.
378 * There is now a default set of tuning parameters which is set, depending
379 * on whether or not the user enables Jumbo frames. It's assumed that if
380 * Jumbo frames are enabled, the user wants optimal tuning for that case.
382 #define DEF_TX_COAL 400 /* 996 */
383 #define DEF_TX_MAX_DESC 60 /* was 40 */
384 #define DEF_RX_COAL 120 /* 1000 */
385 #define DEF_RX_MAX_DESC 25
386 #define DEF_TX_RATIO 21 /* 24 */
388 #define DEF_JUMBO_TX_COAL 20
389 #define DEF_JUMBO_TX_MAX_DESC 60
390 #define DEF_JUMBO_RX_COAL 30
391 #define DEF_JUMBO_RX_MAX_DESC 6
392 #define DEF_JUMBO_TX_RATIO 21
394 #if tigon2FwReleaseLocal < 20001118
396 * Standard firmware and early modifications duplicate
397 * IRQ load without this flag (coal timer is never reset).
398 * Note that with this flag tx_coal should be less than
399 * time to xmit full tx ring.
400 * 400usec is not so bad for tx ring size of 128.
402 #define TX_COAL_INTS_ONLY 1 /* worth it */
405 * With modified firmware, this is not necessary, but still useful.
407 #define TX_COAL_INTS_ONLY 1
411 #define DEF_STAT (2 * TICKS_PER_SEC)
414 static int link[ACE_MAX_MOD_PARMS];
415 static int trace[ACE_MAX_MOD_PARMS];
416 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
417 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
418 static int max_tx_desc[ACE_MAX_MOD_PARMS];
419 static int max_rx_desc[ACE_MAX_MOD_PARMS];
420 static int tx_ratio[ACE_MAX_MOD_PARMS];
421 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
423 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
424 MODULE_LICENSE("GPL");
425 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
426 MODULE_PARM(link, "1-" __MODULE_STRING(8) "i");
427 MODULE_PARM(trace, "1-" __MODULE_STRING(8) "i");
428 MODULE_PARM(tx_coal_tick, "1-" __MODULE_STRING(8) "i");
429 MODULE_PARM(max_tx_desc, "1-" __MODULE_STRING(8) "i");
430 MODULE_PARM(rx_coal_tick, "1-" __MODULE_STRING(8) "i");
431 MODULE_PARM(max_rx_desc, "1-" __MODULE_STRING(8) "i");
432 MODULE_PARM(tx_ratio, "1-" __MODULE_STRING(8) "i");
433 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
434 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
435 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
436 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
437 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
438 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
439 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
442 static char version[] __initdata =
443 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
444 " http://home.cern.ch/~jes/gige/acenic.html\n";
446 static int __devinit acenic_probe_one(struct pci_dev *pdev,
447 const struct pci_device_id *id)
449 struct net_device *dev;
450 struct ace_private *ap;
451 static int boards_found;
453 dev = alloc_etherdev(sizeof(struct ace_private));
455 printk(KERN_ERR "acenic: Unable to allocate "
456 "net_device structure!\n");
460 SET_MODULE_OWNER(dev);
461 SET_NETDEV_DEV(dev, &pdev->dev);
466 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
468 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
469 dev->vlan_rx_register = ace_vlan_rx_register;
470 dev->vlan_rx_kill_vid = ace_vlan_rx_kill_vid;
473 static void ace_watchdog(struct net_device *dev);
474 dev->tx_timeout = &ace_watchdog;
475 dev->watchdog_timeo = 5*HZ;
478 dev->open = &ace_open;
479 dev->stop = &ace_close;
480 dev->hard_start_xmit = &ace_start_xmit;
481 dev->get_stats = &ace_get_stats;
482 dev->set_multicast_list = &ace_set_multicast_list;
483 dev->do_ioctl = &ace_ioctl;
484 dev->set_mac_address = &ace_set_mac_addr;
485 dev->change_mtu = &ace_change_mtu;
487 /* we only display this string ONCE */
491 if (pci_enable_device(pdev))
492 goto fail_free_netdev;
495 * Enable master mode before we start playing with the
496 * pci_command word since pci_set_master() will modify
499 pci_set_master(pdev);
501 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
503 /* OpenFirmware on Mac's does not set this - DOH.. */
504 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
505 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
506 "access - was not enabled by BIOS/Firmware\n",
508 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
509 pci_write_config_word(ap->pdev, PCI_COMMAND,
514 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
515 if (ap->pci_latency <= 0x40) {
516 ap->pci_latency = 0x40;
517 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
521 * Remap the regs into kernel space - this is abuse of
522 * dev->base_addr since it was means for I/O port
523 * addresses but who gives a damn.
525 dev->base_addr = pci_resource_start(pdev, 0);
526 ap->regs = (struct ace_regs *)ioremap(dev->base_addr, 0x4000);
528 printk(KERN_ERR "%s: Unable to map I/O register, "
529 "AceNIC %i will be disabled.\n",
530 dev->name, boards_found);
531 goto fail_free_netdev;
534 switch(pdev->vendor) {
535 case PCI_VENDOR_ID_ALTEON:
536 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
537 strncpy(ap->name, "Farallon PN9100-T "
538 "Gigabit Ethernet", sizeof (ap->name));
539 printk(KERN_INFO "%s: Farallon PN9100-T ",
542 strncpy(ap->name, "AceNIC Gigabit Ethernet",
544 printk(KERN_INFO "%s: Alteon AceNIC ",
548 case PCI_VENDOR_ID_3COM:
549 strncpy(ap->name, "3Com 3C985 Gigabit Ethernet",
551 printk(KERN_INFO "%s: 3Com 3C985 ", dev->name);
553 case PCI_VENDOR_ID_NETGEAR:
554 strncpy(ap->name, "NetGear GA620 Gigabit Ethernet",
556 printk(KERN_INFO "%s: NetGear GA620 ", dev->name);
558 case PCI_VENDOR_ID_DEC:
559 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
560 strncpy(ap->name, "Farallon PN9000-SX "
561 "Gigabit Ethernet", sizeof (ap->name));
562 printk(KERN_INFO "%s: Farallon PN9000-SX ",
566 case PCI_VENDOR_ID_SGI:
567 strncpy(ap->name, "SGI AceNIC Gigabit Ethernet",
569 printk(KERN_INFO "%s: SGI AceNIC ", dev->name);
572 strncpy(ap->name, "Unknown AceNIC based Gigabit "
573 "Ethernet", sizeof (ap->name));
574 printk(KERN_INFO "%s: Unknown AceNIC ", dev->name);
578 ap->name [sizeof (ap->name) - 1] = '\0';
579 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
581 printk("irq %s\n", __irq_itoa(pdev->irq));
583 printk("irq %i\n", pdev->irq);
586 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
587 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
588 printk(KERN_ERR "%s: Driver compiled without Tigon I"
589 " support - NIC disabled\n", dev->name);
594 if (ace_allocate_descriptors(dev))
595 goto fail_free_netdev;
598 if (boards_found >= ACE_MAX_MOD_PARMS)
599 ap->board_idx = BOARD_IDX_OVERFLOW;
601 ap->board_idx = boards_found;
603 ap->board_idx = BOARD_IDX_STATIC;
607 goto fail_free_netdev;
609 if (register_netdev(dev)) {
610 printk(KERN_ERR "acenic: device registration failed\n");
614 if (ap->pci_using_dac)
615 dev->features |= NETIF_F_HIGHDMA;
617 pci_set_drvdata(pdev, dev);
623 ace_init_cleanup(dev);
629 static void __devexit acenic_remove_one(struct pci_dev *pdev)
631 struct net_device *dev = pci_get_drvdata(pdev);
632 struct ace_private *ap = dev->priv;
633 struct ace_regs *regs = ap->regs;
636 unregister_netdev(dev);
638 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
639 if (ap->version >= 2)
640 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
643 * This clears any pending interrupts
645 writel(1, ®s->Mb0Lo);
646 readl(®s->CpuCtrl); /* flush */
649 * Make sure no other CPUs are processing interrupts
650 * on the card before the buffers are being released.
651 * Otherwise one might experience some `interesting'
654 * Then release the RX buffers - jumbo buffers were
655 * already released in ace_close().
657 ace_sync_irq(dev->irq);
659 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
660 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
663 struct ring_info *ringp;
666 ringp = &ap->skb->rx_std_skbuff[i];
667 mapping = pci_unmap_addr(ringp, mapping);
668 pci_unmap_page(ap->pdev, mapping,
669 ACE_STD_BUFSIZE - (2 + 16),
672 ap->rx_std_ring[i].size = 0;
673 ap->skb->rx_std_skbuff[i].skb = NULL;
678 if (ap->version >= 2) {
679 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
680 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
683 struct ring_info *ringp;
686 ringp = &ap->skb->rx_mini_skbuff[i];
687 mapping = pci_unmap_addr(ringp,mapping);
688 pci_unmap_page(ap->pdev, mapping,
689 ACE_MINI_BUFSIZE - (2 + 16),
692 ap->rx_mini_ring[i].size = 0;
693 ap->skb->rx_mini_skbuff[i].skb = NULL;
699 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
700 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
702 struct ring_info *ringp;
705 ringp = &ap->skb->rx_jumbo_skbuff[i];
706 mapping = pci_unmap_addr(ringp, mapping);
707 pci_unmap_page(ap->pdev, mapping,
708 ACE_JUMBO_BUFSIZE - (2 + 16),
711 ap->rx_jumbo_ring[i].size = 0;
712 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
717 ace_init_cleanup(dev);
721 static struct pci_driver acenic_pci_driver = {
723 .id_table = acenic_pci_tbl,
724 .probe = acenic_probe_one,
725 .remove = __devexit_p(acenic_remove_one),
728 static int __init acenic_init(void)
730 return pci_module_init(&acenic_pci_driver);
733 static void __exit acenic_exit(void)
735 pci_unregister_driver(&acenic_pci_driver);
738 module_init(acenic_init);
739 module_exit(acenic_exit);
741 static void ace_free_descriptors(struct net_device *dev)
743 struct ace_private *ap = dev->priv;
746 if (ap->rx_std_ring != NULL) {
747 size = (sizeof(struct rx_desc) *
748 (RX_STD_RING_ENTRIES +
749 RX_JUMBO_RING_ENTRIES +
750 RX_MINI_RING_ENTRIES +
751 RX_RETURN_RING_ENTRIES));
752 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
753 ap->rx_ring_base_dma);
754 ap->rx_std_ring = NULL;
755 ap->rx_jumbo_ring = NULL;
756 ap->rx_mini_ring = NULL;
757 ap->rx_return_ring = NULL;
759 if (ap->evt_ring != NULL) {
760 size = (sizeof(struct event) * EVT_RING_ENTRIES);
761 pci_free_consistent(ap->pdev, size, ap->evt_ring,
765 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
766 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
767 pci_free_consistent(ap->pdev, size, ap->tx_ring,
772 if (ap->evt_prd != NULL) {
773 pci_free_consistent(ap->pdev, sizeof(u32),
774 (void *)ap->evt_prd, ap->evt_prd_dma);
777 if (ap->rx_ret_prd != NULL) {
778 pci_free_consistent(ap->pdev, sizeof(u32),
779 (void *)ap->rx_ret_prd,
781 ap->rx_ret_prd = NULL;
783 if (ap->tx_csm != NULL) {
784 pci_free_consistent(ap->pdev, sizeof(u32),
785 (void *)ap->tx_csm, ap->tx_csm_dma);
791 static int ace_allocate_descriptors(struct net_device *dev)
793 struct ace_private *ap = dev->priv;
796 size = (sizeof(struct rx_desc) *
797 (RX_STD_RING_ENTRIES +
798 RX_JUMBO_RING_ENTRIES +
799 RX_MINI_RING_ENTRIES +
800 RX_RETURN_RING_ENTRIES));
802 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
803 &ap->rx_ring_base_dma);
804 if (ap->rx_std_ring == NULL)
807 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
808 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
809 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
811 size = (sizeof(struct event) * EVT_RING_ENTRIES);
813 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
815 if (ap->evt_ring == NULL)
819 * Only allocate a host TX ring for the Tigon II, the Tigon I
820 * has to use PCI registers for this ;-(
822 if (!ACE_IS_TIGON_I(ap)) {
823 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
825 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
828 if (ap->tx_ring == NULL)
832 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
834 if (ap->evt_prd == NULL)
837 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
838 &ap->rx_ret_prd_dma);
839 if (ap->rx_ret_prd == NULL)
842 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
844 if (ap->tx_csm == NULL)
851 ace_init_cleanup(dev);
857 * Generic cleanup handling data allocated during init. Used when the
858 * module is unloaded or if an error occurs during initialization
860 static void ace_init_cleanup(struct net_device *dev)
862 struct ace_private *ap;
866 ace_free_descriptors(dev);
869 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
870 ap->info, ap->info_dma);
874 kfree(ap->trace_buf);
877 free_irq(dev->irq, dev);
884 * Commands are considered to be slow.
886 static inline void ace_issue_cmd(struct ace_regs *regs, struct cmd *cmd)
890 idx = readl(®s->CmdPrd);
892 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
893 idx = (idx + 1) % CMD_RING_ENTRIES;
895 writel(idx, ®s->CmdPrd);
899 static int __init ace_init(struct net_device *dev)
901 struct ace_private *ap;
902 struct ace_regs *regs;
903 struct ace_info *info = NULL;
904 struct pci_dev *pdev;
907 u32 tig_ver, mac1, mac2, tmp, pci_state;
908 int board_idx, ecode = 0;
910 unsigned char cache_size;
915 board_idx = ap->board_idx;
918 * aman@sgi.com - its useful to do a NIC reset here to
919 * address the `Firmware not running' problem subsequent
920 * to any crashes involving the NIC
922 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
923 readl(®s->HostCtrl); /* PCI write posting */
927 * Don't access any other registers before this point!
931 * This will most likely need BYTE_SWAP once we switch
932 * to using __raw_writel()
934 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
937 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
940 readl(®s->HostCtrl); /* PCI write posting */
943 * Stop the NIC CPU and clear pending interrupts
945 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
946 readl(®s->CpuCtrl); /* PCI write posting */
947 writel(0, ®s->Mb0Lo);
949 tig_ver = readl(®s->HostCtrl) >> 28;
952 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
955 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
956 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
958 writel(0, ®s->LocalCtrl);
960 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
964 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
965 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
967 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
968 readl(®s->CpuBCtrl); /* PCI write posting */
970 * The SRAM bank size does _not_ indicate the amount
971 * of memory on the card, it controls the _bank_ size!
972 * Ie. a 1MB AceNIC will have two banks of 512KB.
974 writel(SRAM_BANK_512K, ®s->LocalCtrl);
975 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
977 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
980 printk(KERN_WARNING " Unsupported Tigon version detected "
987 * ModeStat _must_ be set after the SRAM settings as this change
988 * seems to corrupt the ModeStat and possible other registers.
989 * The SRAM settings survive resets and setting it to the same
990 * value a second time works as well. This is what caused the
991 * `Firmware not running' problem on the Tigon II.
994 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
995 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
997 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
998 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1000 readl(®s->ModeStat); /* PCI write posting */
1003 for(i = 0; i < 4; i++) {
1005 tmp = read_eeprom_byte(dev, 0x8c+i);
1010 mac1 |= (tmp & 0xff);
1013 for(i = 4; i < 8; i++) {
1015 tmp = read_eeprom_byte(dev, 0x8c+i);
1020 mac2 |= (tmp & 0xff);
1023 writel(mac1, ®s->MacAddrHi);
1024 writel(mac2, ®s->MacAddrLo);
1026 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1027 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1028 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1030 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1031 dev->dev_addr[1] = mac1 & 0xff;
1032 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1033 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1034 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1035 dev->dev_addr[5] = mac2 & 0xff;
1038 * Looks like this is necessary to deal with on all architectures,
1039 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1040 * Ie. having two NICs in the machine, one will have the cache
1041 * line set at boot time, the other will not.
1044 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1046 if (cache_size != SMP_CACHE_BYTES) {
1047 printk(KERN_INFO " PCI cache line size set incorrectly "
1048 "(%i bytes) by BIOS/FW, ", cache_size);
1049 if (cache_size > SMP_CACHE_BYTES)
1050 printk("expecting %i\n", SMP_CACHE_BYTES);
1052 printk("correcting to %i\n", SMP_CACHE_BYTES);
1053 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1054 SMP_CACHE_BYTES >> 2);
1058 pci_state = readl(®s->PciState);
1059 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1060 "latency: %i clks\n",
1061 (pci_state & PCI_32BIT) ? 32 : 64,
1062 (pci_state & PCI_66MHZ) ? 66 : 33,
1066 * Set the max DMA transfer size. Seems that for most systems
1067 * the performance is better when no MAX parameter is
1068 * set. However for systems enabling PCI write and invalidate,
1069 * DMA writes must be set to the L1 cache line size to get
1070 * optimal performance.
1072 * The default is now to turn the PCI write and invalidate off
1073 * - that is what Alteon does for NT.
1075 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1076 if (ap->version >= 2) {
1077 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1079 * Tuning parameters only supported for 8 cards
1081 if (board_idx == BOARD_IDX_OVERFLOW ||
1082 dis_pci_mem_inval[board_idx]) {
1083 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1084 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1085 pci_write_config_word(pdev, PCI_COMMAND,
1087 printk(KERN_INFO " Disabling PCI memory "
1088 "write and invalidate\n");
1090 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1091 printk(KERN_INFO " PCI memory write & invalidate "
1092 "enabled by BIOS, enabling counter measures\n");
1094 switch(SMP_CACHE_BYTES) {
1096 tmp |= DMA_WRITE_MAX_16;
1099 tmp |= DMA_WRITE_MAX_32;
1102 tmp |= DMA_WRITE_MAX_64;
1105 tmp |= DMA_WRITE_MAX_128;
1108 printk(KERN_INFO " Cache line size %i not "
1109 "supported, PCI write and invalidate "
1110 "disabled\n", SMP_CACHE_BYTES);
1111 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1112 pci_write_config_word(pdev, PCI_COMMAND,
1120 * On this platform, we know what the best dma settings
1121 * are. We use 64-byte maximum bursts, because if we
1122 * burst larger than the cache line size (or even cross
1123 * a 64byte boundary in a single burst) the UltraSparc
1124 * PCI controller will disconnect at 64-byte multiples.
1126 * Read-multiple will be properly enabled above, and when
1127 * set will give the PCI controller proper hints about
1130 tmp &= ~DMA_READ_WRITE_MASK;
1131 tmp |= DMA_READ_MAX_64;
1132 tmp |= DMA_WRITE_MAX_64;
1135 tmp &= ~DMA_READ_WRITE_MASK;
1136 tmp |= DMA_READ_MAX_128;
1138 * All the docs say MUST NOT. Well, I did.
1139 * Nothing terrible happens, if we load wrong size.
1140 * Bit w&i still works better!
1142 tmp |= DMA_WRITE_MAX_128;
1144 writel(tmp, ®s->PciState);
1148 * The Host PCI bus controller driver has to set FBB.
1149 * If all devices on that PCI bus support FBB, then the controller
1150 * can enable FBB support in the Host PCI Bus controller (or on
1151 * the PCI-PCI bridge if that applies).
1155 * I have received reports from people having problems when this
1158 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1159 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1160 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1161 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1166 * Configure DMA attributes.
1168 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
1169 ap->pci_using_dac = 1;
1170 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
1171 ap->pci_using_dac = 0;
1178 * Initialize the generic info block and the command+event rings
1179 * and the control blocks for the transmit and receive rings
1180 * as they need to be setup once and for all.
1182 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1190 * Get the memory for the skb rings.
1192 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1197 ecode = request_irq(pdev->irq, ace_interrupt, SA_SHIRQ,
1200 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1201 dev->name, pdev->irq);
1204 dev->irq = pdev->irq;
1207 spin_lock_init(&ap->debug_lock);
1208 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1209 ap->last_std_rx = 0;
1210 ap->last_mini_rx = 0;
1213 memset(ap->info, 0, sizeof(struct ace_info));
1214 memset(ap->skb, 0, sizeof(struct ace_skb));
1216 ace_load_firmware(dev);
1219 tmp_ptr = ap->info_dma;
1220 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1221 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1223 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1225 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1226 info->evt_ctrl.flags = 0;
1230 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1231 writel(0, ®s->EvtCsm);
1233 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1234 info->cmd_ctrl.flags = 0;
1235 info->cmd_ctrl.max_len = 0;
1237 for (i = 0; i < CMD_RING_ENTRIES; i++)
1238 writel(0, ®s->CmdRng[i]);
1240 writel(0, ®s->CmdPrd);
1241 writel(0, ®s->CmdCsm);
1243 tmp_ptr = ap->info_dma;
1244 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1245 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1247 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1248 info->rx_std_ctrl.max_len = ACE_STD_MTU + ETH_HLEN + 4;
1249 info->rx_std_ctrl.flags =
1250 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1252 memset(ap->rx_std_ring, 0,
1253 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1255 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1256 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1258 ap->rx_std_skbprd = 0;
1259 atomic_set(&ap->cur_rx_bufs, 0);
1261 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1262 (ap->rx_ring_base_dma +
1263 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1264 info->rx_jumbo_ctrl.max_len = 0;
1265 info->rx_jumbo_ctrl.flags =
1266 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1268 memset(ap->rx_jumbo_ring, 0,
1269 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1271 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1272 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1274 ap->rx_jumbo_skbprd = 0;
1275 atomic_set(&ap->cur_jumbo_bufs, 0);
1277 memset(ap->rx_mini_ring, 0,
1278 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1280 if (ap->version >= 2) {
1281 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1282 (ap->rx_ring_base_dma +
1283 (sizeof(struct rx_desc) *
1284 (RX_STD_RING_ENTRIES +
1285 RX_JUMBO_RING_ENTRIES))));
1286 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1287 info->rx_mini_ctrl.flags =
1288 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1290 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1291 ap->rx_mini_ring[i].flags =
1292 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1294 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1295 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1296 info->rx_mini_ctrl.max_len = 0;
1299 ap->rx_mini_skbprd = 0;
1300 atomic_set(&ap->cur_mini_bufs, 0);
1302 set_aceaddr(&info->rx_return_ctrl.rngptr,
1303 (ap->rx_ring_base_dma +
1304 (sizeof(struct rx_desc) *
1305 (RX_STD_RING_ENTRIES +
1306 RX_JUMBO_RING_ENTRIES +
1307 RX_MINI_RING_ENTRIES))));
1308 info->rx_return_ctrl.flags = 0;
1309 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1311 memset(ap->rx_return_ring, 0,
1312 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1314 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1315 *(ap->rx_ret_prd) = 0;
1317 writel(TX_RING_BASE, ®s->WinBase);
1319 if (ACE_IS_TIGON_I(ap)) {
1320 ap->tx_ring = (struct tx_desc *)regs->Window;
1321 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES *
1322 sizeof(struct tx_desc) / 4); i++) {
1323 writel(0, (unsigned long)ap->tx_ring + i * 4);
1326 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1328 memset(ap->tx_ring, 0,
1329 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1331 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1334 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1335 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1338 * The Tigon I does not like having the TX ring in host memory ;-(
1340 if (!ACE_IS_TIGON_I(ap))
1341 tmp |= RCB_FLG_TX_HOST_RING;
1342 #if TX_COAL_INTS_ONLY
1343 tmp |= RCB_FLG_COAL_INT_ONLY;
1345 info->tx_ctrl.flags = tmp;
1347 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1350 * Potential item for tuning parameter
1353 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1354 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1356 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1357 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1360 writel(0, ®s->MaskInt);
1361 writel(1, ®s->IfIdx);
1364 * McKinley boxes do not like us fiddling with AssistState
1367 writel(1, ®s->AssistState);
1370 writel(DEF_STAT, ®s->TuneStatTicks);
1371 writel(DEF_TRACE, ®s->TuneTrace);
1373 ace_set_rxtx_parms(dev, 0);
1375 if (board_idx == BOARD_IDX_OVERFLOW) {
1376 printk(KERN_WARNING "%s: more than %i NICs detected, "
1377 "ignoring module parameters!\n",
1378 dev->name, ACE_MAX_MOD_PARMS);
1379 } else if (board_idx >= 0) {
1380 if (tx_coal_tick[board_idx])
1381 writel(tx_coal_tick[board_idx],
1382 ®s->TuneTxCoalTicks);
1383 if (max_tx_desc[board_idx])
1384 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1386 if (rx_coal_tick[board_idx])
1387 writel(rx_coal_tick[board_idx],
1388 ®s->TuneRxCoalTicks);
1389 if (max_rx_desc[board_idx])
1390 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1392 if (trace[board_idx])
1393 writel(trace[board_idx], ®s->TuneTrace);
1395 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1396 writel(tx_ratio[board_idx], ®s->TxBufRat);
1400 * Default link parameters
1402 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1403 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1404 if(ap->version >= 2)
1405 tmp |= LNK_TX_FLOW_CTL_Y;
1408 * Override link default parameters
1410 if ((board_idx >= 0) && link[board_idx]) {
1411 int option = link[board_idx];
1415 if (option & 0x01) {
1416 printk(KERN_INFO "%s: Setting half duplex link\n",
1418 tmp &= ~LNK_FULL_DUPLEX;
1421 tmp &= ~LNK_NEGOTIATE;
1428 if ((option & 0x70) == 0) {
1429 printk(KERN_WARNING "%s: No media speed specified, "
1430 "forcing auto negotiation\n", dev->name);
1431 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1432 LNK_100MB | LNK_10MB;
1434 if ((option & 0x100) == 0)
1435 tmp |= LNK_NEG_FCTL;
1437 printk(KERN_INFO "%s: Disabling flow control "
1438 "negotiation\n", dev->name);
1440 tmp |= LNK_RX_FLOW_CTL_Y;
1441 if ((option & 0x400) && (ap->version >= 2)) {
1442 printk(KERN_INFO "%s: Enabling TX flow control\n",
1444 tmp |= LNK_TX_FLOW_CTL_Y;
1449 writel(tmp, ®s->TuneLink);
1450 if (ap->version >= 2)
1451 writel(tmp, ®s->TuneFastLink);
1453 if (ACE_IS_TIGON_I(ap))
1454 writel(tigonFwStartAddr, ®s->Pc);
1455 if (ap->version == 2)
1456 writel(tigon2FwStartAddr, ®s->Pc);
1458 writel(0, ®s->Mb0Lo);
1461 * Set tx_csm before we start receiving interrupts, otherwise
1462 * the interrupt handler might think it is supposed to process
1463 * tx ints before we are up and running, which may cause a null
1464 * pointer access in the int handler.
1467 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1470 ace_set_txprd(regs, ap, 0);
1471 writel(0, ®s->RxRetCsm);
1474 * Zero the stats before starting the interface
1476 memset(&ap->stats, 0, sizeof(ap->stats));
1479 * Enable DMA engine now.
1480 * If we do this sooner, Mckinley box pukes.
1481 * I assume it's because Tigon II DMA engine wants to check
1482 * *something* even before the CPU is started.
1484 writel(1, ®s->AssistState); /* enable DMA */
1489 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1490 readl(®s->CpuCtrl);
1493 * Wait for the firmware to spin up - max 3 seconds.
1495 myjif = jiffies + 3 * HZ;
1496 while (time_before(jiffies, myjif) && !ap->fw_running)
1499 if (!ap->fw_running) {
1500 printk(KERN_ERR "%s: Firmware NOT running!\n", dev->name);
1503 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1504 readl(®s->CpuCtrl);
1506 /* aman@sgi.com - account for badly behaving firmware/NIC:
1507 * - have observed that the NIC may continue to generate
1508 * interrupts for some reason; attempt to stop it - halt
1509 * second CPU for Tigon II cards, and also clear Mb0
1510 * - if we're a module, we'll fail to load if this was
1511 * the only GbE card in the system => if the kernel does
1512 * see an interrupt from the NIC, code to handle it is
1513 * gone and OOps! - so free_irq also
1515 if (ap->version >= 2)
1516 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1518 writel(0, ®s->Mb0Lo);
1519 readl(®s->Mb0Lo);
1526 * We load the ring here as there seem to be no way to tell the
1527 * firmware to wipe the ring without re-initializing it.
1529 if (!test_and_set_bit(0, &ap->std_refill_busy))
1530 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1532 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1534 if (ap->version >= 2) {
1535 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1536 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1538 printk(KERN_ERR "%s: Someone is busy refilling "
1539 "the RX mini ring\n", dev->name);
1544 ace_init_cleanup(dev);
1549 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1551 struct ace_private *ap;
1552 struct ace_regs *regs;
1558 board_idx = ap->board_idx;
1560 if (board_idx >= 0) {
1562 if (!tx_coal_tick[board_idx])
1563 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1564 if (!max_tx_desc[board_idx])
1565 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1566 if (!rx_coal_tick[board_idx])
1567 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1568 if (!max_rx_desc[board_idx])
1569 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1570 if (!tx_ratio[board_idx])
1571 writel(DEF_TX_RATIO, ®s->TxBufRat);
1573 if (!tx_coal_tick[board_idx])
1574 writel(DEF_JUMBO_TX_COAL,
1575 ®s->TuneTxCoalTicks);
1576 if (!max_tx_desc[board_idx])
1577 writel(DEF_JUMBO_TX_MAX_DESC,
1578 ®s->TuneMaxTxDesc);
1579 if (!rx_coal_tick[board_idx])
1580 writel(DEF_JUMBO_RX_COAL,
1581 ®s->TuneRxCoalTicks);
1582 if (!max_rx_desc[board_idx])
1583 writel(DEF_JUMBO_RX_MAX_DESC,
1584 ®s->TuneMaxRxDesc);
1585 if (!tx_ratio[board_idx])
1586 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1592 static void ace_watchdog(struct net_device *data)
1594 struct net_device *dev = data;
1595 struct ace_private *ap = dev->priv;
1596 struct ace_regs *regs = ap->regs;
1599 * We haven't received a stats update event for more than 2.5
1600 * seconds and there is data in the transmit queue, thus we
1601 * asume the card is stuck.
1603 if (*ap->tx_csm != ap->tx_ret_csm) {
1604 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1605 dev->name, (unsigned int)readl(®s->HostCtrl));
1606 /* This can happen due to ieee flow control. */
1608 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1611 netif_wake_queue(dev);
1617 static void ace_tasklet(unsigned long dev)
1619 struct ace_private *ap = ((struct net_device *)dev)->priv;
1622 cur_size = atomic_read(&ap->cur_rx_bufs);
1623 if ((cur_size < RX_LOW_STD_THRES) &&
1624 !test_and_set_bit(0, &ap->std_refill_busy)) {
1626 printk("refilling buffers (current %i)\n", cur_size);
1628 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1631 if (ap->version >= 2) {
1632 cur_size = atomic_read(&ap->cur_mini_bufs);
1633 if ((cur_size < RX_LOW_MINI_THRES) &&
1634 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1636 printk("refilling mini buffers (current %i)\n",
1639 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1643 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1644 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1645 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1647 printk("refilling jumbo buffers (current %i)\n", cur_size);
1649 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1651 ap->tasklet_pending = 0;
1656 * Copy the contents of the NIC's trace buffer to kernel memory.
1658 static void ace_dump_trace(struct ace_private *ap)
1662 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1669 * Load the standard rx ring.
1671 * Loading rings is safe without holding the spin lock since this is
1672 * done only before the device is enabled, thus no interrupts are
1673 * generated and by the interrupt handler/tasklet handler.
1675 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1677 struct ace_regs *regs;
1682 prefetchw(&ap->cur_rx_bufs);
1684 idx = ap->rx_std_skbprd;
1686 for (i = 0; i < nr_bufs; i++) {
1687 struct sk_buff *skb;
1691 skb = alloc_skb(ACE_STD_BUFSIZE, GFP_ATOMIC);
1696 * Make sure IP header starts on a fresh cache line.
1698 skb_reserve(skb, 2 + 16);
1699 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1700 offset_in_page(skb->data),
1701 ACE_STD_BUFSIZE - (2 + 16),
1702 PCI_DMA_FROMDEVICE);
1703 ap->skb->rx_std_skbuff[idx].skb = skb;
1704 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1707 rd = &ap->rx_std_ring[idx];
1708 set_aceaddr(&rd->addr, mapping);
1709 rd->size = ACE_STD_MTU + ETH_HLEN + 4;
1711 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1717 atomic_add(i, &ap->cur_rx_bufs);
1718 ap->rx_std_skbprd = idx;
1720 if (ACE_IS_TIGON_I(ap)) {
1722 cmd.evt = C_SET_RX_PRD_IDX;
1724 cmd.idx = ap->rx_std_skbprd;
1725 ace_issue_cmd(regs, &cmd);
1727 writel(idx, ®s->RxStdPrd);
1732 clear_bit(0, &ap->std_refill_busy);
1736 printk(KERN_INFO "Out of memory when allocating "
1737 "standard receive buffers\n");
1742 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1744 struct ace_regs *regs;
1749 prefetchw(&ap->cur_mini_bufs);
1751 idx = ap->rx_mini_skbprd;
1752 for (i = 0; i < nr_bufs; i++) {
1753 struct sk_buff *skb;
1757 skb = alloc_skb(ACE_MINI_BUFSIZE, GFP_ATOMIC);
1762 * Make sure the IP header ends up on a fresh cache line
1764 skb_reserve(skb, 2 + 16);
1765 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1766 offset_in_page(skb->data),
1767 ACE_MINI_BUFSIZE - (2 + 16),
1768 PCI_DMA_FROMDEVICE);
1769 ap->skb->rx_mini_skbuff[idx].skb = skb;
1770 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1773 rd = &ap->rx_mini_ring[idx];
1774 set_aceaddr(&rd->addr, mapping);
1775 rd->size = ACE_MINI_SIZE;
1777 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1783 atomic_add(i, &ap->cur_mini_bufs);
1785 ap->rx_mini_skbprd = idx;
1787 writel(idx, ®s->RxMiniPrd);
1791 clear_bit(0, &ap->mini_refill_busy);
1794 printk(KERN_INFO "Out of memory when allocating "
1795 "mini receive buffers\n");
1801 * Load the jumbo rx ring, this may happen at any time if the MTU
1802 * is changed to a value > 1500.
1804 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1806 struct ace_regs *regs;
1811 idx = ap->rx_jumbo_skbprd;
1813 for (i = 0; i < nr_bufs; i++) {
1814 struct sk_buff *skb;
1818 skb = alloc_skb(ACE_JUMBO_BUFSIZE, GFP_ATOMIC);
1823 * Make sure the IP header ends up on a fresh cache line
1825 skb_reserve(skb, 2 + 16);
1826 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1827 offset_in_page(skb->data),
1828 ACE_JUMBO_BUFSIZE - (2 + 16),
1829 PCI_DMA_FROMDEVICE);
1830 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1831 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1834 rd = &ap->rx_jumbo_ring[idx];
1835 set_aceaddr(&rd->addr, mapping);
1836 rd->size = ACE_JUMBO_MTU + ETH_HLEN + 4;
1838 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1844 atomic_add(i, &ap->cur_jumbo_bufs);
1845 ap->rx_jumbo_skbprd = idx;
1847 if (ACE_IS_TIGON_I(ap)) {
1849 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1851 cmd.idx = ap->rx_jumbo_skbprd;
1852 ace_issue_cmd(regs, &cmd);
1854 writel(idx, ®s->RxJumboPrd);
1859 clear_bit(0, &ap->jumbo_refill_busy);
1862 if (net_ratelimit())
1863 printk(KERN_INFO "Out of memory when allocating "
1864 "jumbo receive buffers\n");
1870 * All events are considered to be slow (RX/TX ints do not generate
1871 * events) and are handled here, outside the main interrupt handler,
1872 * to reduce the size of the handler.
1874 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1876 struct ace_private *ap;
1880 while (evtcsm != evtprd) {
1881 switch (ap->evt_ring[evtcsm].evt) {
1883 printk(KERN_INFO "%s: Firmware up and running\n",
1888 case E_STATS_UPDATED:
1892 u16 code = ap->evt_ring[evtcsm].code;
1896 u32 state = readl(&ap->regs->GigLnkState);
1897 printk(KERN_WARNING "%s: Optical link UP "
1898 "(%s Duplex, Flow Control: %s%s)\n",
1900 state & LNK_FULL_DUPLEX ? "Full":"Half",
1901 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1902 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1906 printk(KERN_WARNING "%s: Optical link DOWN\n",
1909 case E_C_LINK_10_100:
1910 printk(KERN_WARNING "%s: 10/100BaseT link "
1914 printk(KERN_ERR "%s: Unknown optical link "
1915 "state %02x\n", dev->name, code);
1920 switch(ap->evt_ring[evtcsm].code) {
1921 case E_C_ERR_INVAL_CMD:
1922 printk(KERN_ERR "%s: invalid command error\n",
1925 case E_C_ERR_UNIMP_CMD:
1926 printk(KERN_ERR "%s: unimplemented command "
1927 "error\n", dev->name);
1929 case E_C_ERR_BAD_CFG:
1930 printk(KERN_ERR "%s: bad config error\n",
1934 printk(KERN_ERR "%s: unknown error %02x\n",
1935 dev->name, ap->evt_ring[evtcsm].code);
1938 case E_RESET_JUMBO_RNG:
1941 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1942 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1943 ap->rx_jumbo_ring[i].size = 0;
1944 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1945 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1946 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1950 if (ACE_IS_TIGON_I(ap)) {
1952 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1955 ace_issue_cmd(ap->regs, &cmd);
1957 writel(0, &((ap->regs)->RxJumboPrd));
1962 ap->rx_jumbo_skbprd = 0;
1963 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1965 clear_bit(0, &ap->jumbo_refill_busy);
1969 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1970 dev->name, ap->evt_ring[evtcsm].evt);
1972 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1979 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1981 struct ace_private *ap = dev->priv;
1983 int mini_count = 0, std_count = 0;
1987 prefetchw(&ap->cur_rx_bufs);
1988 prefetchw(&ap->cur_mini_bufs);
1990 while (idx != rxretprd) {
1991 struct ring_info *rip;
1992 struct sk_buff *skb;
1993 struct rx_desc *rxdesc, *retdesc;
1995 int bd_flags, desc_type, mapsize;
1998 retdesc = &ap->rx_return_ring[idx];
1999 skbidx = retdesc->idx;
2000 bd_flags = retdesc->flags;
2001 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
2005 * Normal frames do not have any flags set
2007 * Mini and normal frames arrive frequently,
2008 * so use a local counter to avoid doing
2009 * atomic operations for each packet arriving.
2012 rip = &ap->skb->rx_std_skbuff[skbidx];
2013 mapsize = ACE_STD_BUFSIZE - (2 + 16);
2014 rxdesc = &ap->rx_std_ring[skbidx];
2018 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2019 mapsize = ACE_JUMBO_BUFSIZE - (2 + 16);
2020 rxdesc = &ap->rx_jumbo_ring[skbidx];
2021 atomic_dec(&ap->cur_jumbo_bufs);
2024 rip = &ap->skb->rx_mini_skbuff[skbidx];
2025 mapsize = ACE_MINI_BUFSIZE - (2 + 16);
2026 rxdesc = &ap->rx_mini_ring[skbidx];
2030 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2031 "returned by NIC\n", dev->name,
2038 pci_unmap_page(ap->pdev,
2039 pci_unmap_addr(rip, mapping),
2041 PCI_DMA_FROMDEVICE);
2042 skb_put(skb, retdesc->size);
2047 csum = retdesc->tcp_udp_csum;
2050 skb->protocol = eth_type_trans(skb, dev);
2053 * Instead of forcing the poor tigon mips cpu to calculate
2054 * pseudo hdr checksum, we do this ourselves.
2056 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2057 skb->csum = htons(csum);
2058 skb->ip_summed = CHECKSUM_HW;
2060 skb->ip_summed = CHECKSUM_NONE;
2065 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2066 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2071 dev->last_rx = jiffies;
2072 ap->stats.rx_packets++;
2073 ap->stats.rx_bytes += retdesc->size;
2075 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2078 atomic_sub(std_count, &ap->cur_rx_bufs);
2079 if (!ACE_IS_TIGON_I(ap))
2080 atomic_sub(mini_count, &ap->cur_mini_bufs);
2084 * According to the documentation RxRetCsm is obsolete with
2085 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2087 if (ACE_IS_TIGON_I(ap)) {
2088 struct ace_regs *regs = ap->regs;
2089 writel(idx, ®s->RxRetCsm);
2100 static inline void ace_tx_int(struct net_device *dev,
2103 struct ace_private *ap = dev->priv;
2106 struct sk_buff *skb;
2108 struct tx_ring_info *info;
2110 info = ap->skb->tx_skbuff + idx;
2112 mapping = pci_unmap_addr(info, mapping);
2115 pci_unmap_page(ap->pdev, mapping,
2116 pci_unmap_len(info, maplen),
2118 pci_unmap_addr_set(info, mapping, 0);
2122 ap->stats.tx_packets++;
2123 ap->stats.tx_bytes += skb->len;
2124 dev_kfree_skb_irq(skb);
2128 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2129 } while (idx != txcsm);
2131 if (netif_queue_stopped(dev))
2132 netif_wake_queue(dev);
2135 ap->tx_ret_csm = txcsm;
2137 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2139 * We could try to make it before. In this case we would get
2140 * the following race condition: hard_start_xmit on other cpu
2141 * enters after we advanced tx_ret_csm and fills space,
2142 * which we have just freed, so that we make illegal device wakeup.
2143 * There is no good way to workaround this (at entry
2144 * to ace_start_xmit detects this condition and prevents
2145 * ring corruption, but it is not a good workaround.)
2147 * When tx_ret_csm is advanced after, we wake up device _only_
2148 * if we really have some space in ring (though the core doing
2149 * hard_start_xmit can see full ring for some period and has to
2150 * synchronize.) Superb.
2151 * BUT! We get another subtle race condition. hard_start_xmit
2152 * may think that ring is full between wakeup and advancing
2153 * tx_ret_csm and will stop device instantly! It is not so bad.
2154 * We are guaranteed that there is something in ring, so that
2155 * the next irq will resume transmission. To speedup this we could
2156 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2157 * (see ace_start_xmit).
2159 * Well, this dilemma exists in all lock-free devices.
2160 * We, following scheme used in drivers by Donald Becker,
2161 * select the least dangerous.
2167 static irqreturn_t ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2169 struct ace_private *ap;
2170 struct ace_regs *regs;
2171 struct net_device *dev = (struct net_device *)dev_id;
2173 u32 txcsm, rxretcsm, rxretprd;
2180 * In case of PCI shared interrupts or spurious interrupts,
2181 * we want to make sure it is actually our interrupt before
2182 * spending any time in here.
2184 if (!(readl(®s->HostCtrl) & IN_INT))
2188 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2189 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2190 * writel(0, ®s->Mb0Lo).
2192 * "IRQ avoidance" recommended in docs applies to IRQs served
2193 * threads and it is wrong even for that case.
2195 writel(0, ®s->Mb0Lo);
2196 readl(®s->Mb0Lo);
2199 * There is no conflict between transmit handling in
2200 * start_xmit and receive processing, thus there is no reason
2201 * to take a spin lock for RX handling. Wait until we start
2202 * working on the other stuff - hey we don't need a spin lock
2205 rxretprd = *ap->rx_ret_prd;
2206 rxretcsm = ap->cur_rx;
2208 if (rxretprd != rxretcsm)
2209 ace_rx_int(dev, rxretprd, rxretcsm);
2211 txcsm = *ap->tx_csm;
2212 idx = ap->tx_ret_csm;
2216 * If each skb takes only one descriptor this check degenerates
2217 * to identity, because new space has just been opened.
2218 * But if skbs are fragmented we must check that this index
2219 * update releases enough of space, otherwise we just
2220 * wait for device to make more work.
2222 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2223 ace_tx_int(dev, txcsm, idx);
2226 evtcsm = readl(®s->EvtCsm);
2227 evtprd = *ap->evt_prd;
2229 if (evtcsm != evtprd) {
2230 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2231 writel(evtcsm, ®s->EvtCsm);
2235 * This has to go last in the interrupt handler and run with
2236 * the spin lock released ... what lock?
2238 if (netif_running(dev)) {
2240 int run_tasklet = 0;
2242 cur_size = atomic_read(&ap->cur_rx_bufs);
2243 if (cur_size < RX_LOW_STD_THRES) {
2244 if ((cur_size < RX_PANIC_STD_THRES) &&
2245 !test_and_set_bit(0, &ap->std_refill_busy)) {
2247 printk("low on std buffers %i\n", cur_size);
2249 ace_load_std_rx_ring(ap,
2250 RX_RING_SIZE - cur_size);
2255 if (!ACE_IS_TIGON_I(ap)) {
2256 cur_size = atomic_read(&ap->cur_mini_bufs);
2257 if (cur_size < RX_LOW_MINI_THRES) {
2258 if ((cur_size < RX_PANIC_MINI_THRES) &&
2259 !test_and_set_bit(0,
2260 &ap->mini_refill_busy)) {
2262 printk("low on mini buffers %i\n",
2265 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2272 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2273 if (cur_size < RX_LOW_JUMBO_THRES) {
2274 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2275 !test_and_set_bit(0,
2276 &ap->jumbo_refill_busy)){
2278 printk("low on jumbo buffers %i\n",
2281 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2286 if (run_tasklet && !ap->tasklet_pending) {
2287 ap->tasklet_pending = 1;
2288 tasklet_schedule(&ap->ace_tasklet);
2297 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2299 struct ace_private *ap = dev->priv;
2300 unsigned long flags;
2302 local_irq_save(flags);
2307 ace_unmask_irq(dev);
2308 local_irq_restore(flags);
2312 static void ace_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
2314 struct ace_private *ap = dev->priv;
2315 unsigned long flags;
2317 local_irq_save(flags);
2321 ap->vlgrp->vlan_devices[vid] = NULL;
2323 ace_unmask_irq(dev);
2324 local_irq_restore(flags);
2326 #endif /* ACENIC_DO_VLAN */
2329 static int ace_open(struct net_device *dev)
2331 struct ace_private *ap;
2332 struct ace_regs *regs;
2338 if (!(ap->fw_running)) {
2339 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2343 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2345 cmd.evt = C_CLEAR_STATS;
2348 ace_issue_cmd(regs, &cmd);
2350 cmd.evt = C_HOST_STATE;
2351 cmd.code = C_C_STACK_UP;
2353 ace_issue_cmd(regs, &cmd);
2356 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2357 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2359 if (dev->flags & IFF_PROMISC) {
2360 cmd.evt = C_SET_PROMISC_MODE;
2361 cmd.code = C_C_PROMISC_ENABLE;
2363 ace_issue_cmd(regs, &cmd);
2371 cmd.evt = C_LNK_NEGOTIATION;
2374 ace_issue_cmd(regs, &cmd);
2377 netif_start_queue(dev);
2380 * Setup the bottom half rx ring refill handler
2382 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2387 static int ace_close(struct net_device *dev)
2389 struct ace_private *ap;
2390 struct ace_regs *regs;
2392 unsigned long flags;
2396 * Without (or before) releasing irq and stopping hardware, this
2397 * is an absolute non-sense, by the way. It will be reset instantly
2400 netif_stop_queue(dev);
2406 cmd.evt = C_SET_PROMISC_MODE;
2407 cmd.code = C_C_PROMISC_DISABLE;
2409 ace_issue_cmd(regs, &cmd);
2413 cmd.evt = C_HOST_STATE;
2414 cmd.code = C_C_STACK_DOWN;
2416 ace_issue_cmd(regs, &cmd);
2418 tasklet_kill(&ap->ace_tasklet);
2421 * Make sure one CPU is not processing packets while
2422 * buffers are being released by another.
2425 local_irq_save(flags);
2428 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2429 struct sk_buff *skb;
2431 struct tx_ring_info *info;
2433 info = ap->skb->tx_skbuff + i;
2435 mapping = pci_unmap_addr(info, mapping);
2438 if (ACE_IS_TIGON_I(ap)) {
2439 writel(0, &ap->tx_ring[i].addr.addrhi);
2440 writel(0, &ap->tx_ring[i].addr.addrlo);
2441 writel(0, &ap->tx_ring[i].flagsize);
2443 memset(ap->tx_ring + i, 0,
2444 sizeof(struct tx_desc));
2445 pci_unmap_page(ap->pdev, mapping,
2446 pci_unmap_len(info, maplen),
2448 pci_unmap_addr_set(info, mapping, 0);
2457 cmd.evt = C_RESET_JUMBO_RNG;
2460 ace_issue_cmd(regs, &cmd);
2463 ace_unmask_irq(dev);
2464 local_irq_restore(flags);
2470 static inline dma_addr_t
2471 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2472 struct sk_buff *tail, u32 idx)
2475 struct tx_ring_info *info;
2477 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2478 offset_in_page(skb->data),
2479 skb->len, PCI_DMA_TODEVICE);
2481 info = ap->skb->tx_skbuff + idx;
2483 pci_unmap_addr_set(info, mapping, mapping);
2484 pci_unmap_len_set(info, maplen, skb->len);
2490 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2491 u32 flagsize, u32 vlan_tag)
2493 #if !USE_TX_COAL_NOW
2494 flagsize &= ~BD_FLG_COAL_NOW;
2497 if (ACE_IS_TIGON_I(ap)) {
2498 writel(addr >> 32, &desc->addr.addrhi);
2499 writel(addr & 0xffffffff, &desc->addr.addrlo);
2500 writel(flagsize, &desc->flagsize);
2502 writel(vlan_tag, &desc->vlanres);
2505 desc->addr.addrhi = addr >> 32;
2506 desc->addr.addrlo = addr;
2507 desc->flagsize = flagsize;
2509 desc->vlanres = vlan_tag;
2515 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2517 struct ace_private *ap = dev->priv;
2518 struct ace_regs *regs = ap->regs;
2519 struct tx_desc *desc;
2525 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2529 if (!skb_shinfo(skb)->nr_frags)
2535 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2536 flagsize = (skb->len << 16) | (BD_FLG_END);
2537 if (skb->ip_summed == CHECKSUM_HW)
2538 flagsize |= BD_FLG_TCP_UDP_SUM;
2540 if (vlan_tx_tag_present(skb)) {
2541 flagsize |= BD_FLG_VLAN_TAG;
2542 vlan_tag = vlan_tx_tag_get(skb);
2545 desc = ap->tx_ring + idx;
2546 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2548 /* Look at ace_tx_int for explanations. */
2549 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2550 flagsize |= BD_FLG_COAL_NOW;
2552 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2560 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2561 flagsize = (skb_headlen(skb) << 16);
2562 if (skb->ip_summed == CHECKSUM_HW)
2563 flagsize |= BD_FLG_TCP_UDP_SUM;
2565 if (vlan_tx_tag_present(skb)) {
2566 flagsize |= BD_FLG_VLAN_TAG;
2567 vlan_tag = vlan_tx_tag_get(skb);
2571 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2573 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2575 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2576 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2577 struct tx_ring_info *info;
2580 info = ap->skb->tx_skbuff + idx;
2581 desc = ap->tx_ring + idx;
2583 mapping = pci_map_page(ap->pdev, frag->page,
2584 frag->page_offset, frag->size,
2587 flagsize = (frag->size << 16);
2588 if (skb->ip_summed == CHECKSUM_HW)
2589 flagsize |= BD_FLG_TCP_UDP_SUM;
2590 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2592 if (i == skb_shinfo(skb)->nr_frags - 1) {
2593 flagsize |= BD_FLG_END;
2594 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2595 flagsize |= BD_FLG_COAL_NOW;
2598 * Only the last fragment frees
2605 pci_unmap_addr_set(info, mapping, mapping);
2606 pci_unmap_len_set(info, maplen, frag->size);
2607 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2614 ace_set_txprd(regs, ap, idx);
2616 if (flagsize & BD_FLG_COAL_NOW) {
2617 netif_stop_queue(dev);
2620 * A TX-descriptor producer (an IRQ) might have gotten
2621 * inbetween, making the ring free again. Since xmit is
2622 * serialized, this is the only situation we have to
2625 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2626 netif_wake_queue(dev);
2629 dev->trans_start = jiffies;
2634 * This race condition is unavoidable with lock-free drivers.
2635 * We wake up the queue _before_ tx_prd is advanced, so that we can
2636 * enter hard_start_xmit too early, while tx ring still looks closed.
2637 * This happens ~1-4 times per 100000 packets, so that we can allow
2638 * to loop syncing to other CPU. Probably, we need an additional
2639 * wmb() in ace_tx_intr as well.
2641 * Note that this race is relieved by reserving one more entry
2642 * in tx ring than it is necessary (see original non-SG driver).
2643 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2644 * is already overkill.
2646 * Alternative is to return with 1 not throttling queue. In this
2647 * case loop becomes longer, no more useful effects.
2654 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2656 struct ace_private *ap = dev->priv;
2657 struct ace_regs *regs = ap->regs;
2659 if (new_mtu > ACE_JUMBO_MTU)
2662 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2665 if (new_mtu > ACE_STD_MTU) {
2667 printk(KERN_INFO "%s: Enabling Jumbo frame "
2668 "support\n", dev->name);
2670 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2671 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2672 ace_set_rxtx_parms(dev, 1);
2675 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2676 ace_sync_irq(dev->irq);
2677 ace_set_rxtx_parms(dev, 0);
2681 cmd.evt = C_RESET_JUMBO_RNG;
2684 ace_issue_cmd(regs, &cmd);
2692 static int ace_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2694 struct ace_private *ap = dev->priv;
2695 struct ace_regs *regs = ap->regs;
2697 struct ethtool_cmd ecmd;
2700 if (cmd != SIOCETHTOOL)
2702 if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
2707 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2708 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2709 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2710 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2712 ecmd.port = PORT_FIBRE;
2713 ecmd.transceiver = XCVR_INTERNAL;
2714 ecmd.phy_address = 0;
2716 link = readl(®s->GigLnkState);
2717 if (link & LNK_1000MB)
2718 ecmd.speed = SPEED_1000;
2720 link = readl(®s->FastLnkState);
2721 if (link & LNK_100MB)
2722 ecmd.speed = SPEED_100;
2723 else if (link & LNK_100MB)
2724 ecmd.speed = SPEED_10;
2728 if (link & LNK_FULL_DUPLEX)
2729 ecmd.duplex = DUPLEX_FULL;
2731 ecmd.duplex = DUPLEX_HALF;
2733 if (link & LNK_NEGOTIATE)
2734 ecmd.autoneg = AUTONEG_ENABLE;
2736 ecmd.autoneg = AUTONEG_DISABLE;
2740 * Current struct ethtool_cmd is insufficient
2742 ecmd.trace = readl(®s->TuneTrace);
2744 ecmd.txcoal = readl(®s->TuneTxCoalTicks);
2745 ecmd.rxcoal = readl(®s->TuneRxCoalTicks);
2747 ecmd.maxtxpkt = readl(®s->TuneMaxTxDesc);
2748 ecmd.maxrxpkt = readl(®s->TuneMaxRxDesc);
2750 if(copy_to_user(ifr->ifr_data, &ecmd, sizeof(ecmd)))
2755 link = readl(®s->GigLnkState);
2756 if (link & LNK_1000MB)
2759 link = readl(®s->FastLnkState);
2760 if (link & LNK_100MB)
2762 else if (link & LNK_100MB)
2768 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2769 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2770 if (!ACE_IS_TIGON_I(ap))
2771 link |= LNK_TX_FLOW_CTL_Y;
2772 if (ecmd.autoneg == AUTONEG_ENABLE)
2773 link |= LNK_NEGOTIATE;
2774 if (ecmd.speed != speed) {
2775 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2788 if (ecmd.duplex == DUPLEX_FULL)
2789 link |= LNK_FULL_DUPLEX;
2791 if (link != ap->link) {
2793 printk(KERN_INFO "%s: Renegotiating link state\n",
2797 writel(link, ®s->TuneLink);
2798 if (!ACE_IS_TIGON_I(ap))
2799 writel(link, ®s->TuneFastLink);
2802 cmd.evt = C_LNK_NEGOTIATION;
2805 ace_issue_cmd(regs, &cmd);
2809 case ETHTOOL_GDRVINFO: {
2810 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
2811 strncpy(info.driver, "acenic", sizeof(info.driver) - 1);
2812 sprintf(info.fw_version, "%i.%i.%i",
2813 tigonFwReleaseMajor, tigonFwReleaseMinor,
2815 strncpy(info.version, version, sizeof(info.version) - 1);
2817 strcpy(info.bus_info, pci_name(ap->pdev));
2818 if (copy_to_user(ifr->ifr_data, &info, sizeof(info)))
2833 * Set the hardware MAC address.
2835 static int ace_set_mac_addr(struct net_device *dev, void *p)
2837 struct sockaddr *addr=p;
2838 struct ace_regs *regs;
2842 if(netif_running(dev))
2845 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2847 da = (u8 *)dev->dev_addr;
2849 regs = ((struct ace_private *)dev->priv)->regs;
2850 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2851 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2854 cmd.evt = C_SET_MAC_ADDR;
2857 ace_issue_cmd(regs, &cmd);
2863 static void ace_set_multicast_list(struct net_device *dev)
2865 struct ace_private *ap = dev->priv;
2866 struct ace_regs *regs = ap->regs;
2869 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2870 cmd.evt = C_SET_MULTICAST_MODE;
2871 cmd.code = C_C_MCAST_ENABLE;
2873 ace_issue_cmd(regs, &cmd);
2875 } else if (ap->mcast_all) {
2876 cmd.evt = C_SET_MULTICAST_MODE;
2877 cmd.code = C_C_MCAST_DISABLE;
2879 ace_issue_cmd(regs, &cmd);
2883 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2884 cmd.evt = C_SET_PROMISC_MODE;
2885 cmd.code = C_C_PROMISC_ENABLE;
2887 ace_issue_cmd(regs, &cmd);
2889 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2890 cmd.evt = C_SET_PROMISC_MODE;
2891 cmd.code = C_C_PROMISC_DISABLE;
2893 ace_issue_cmd(regs, &cmd);
2898 * For the time being multicast relies on the upper layers
2899 * filtering it properly. The Firmware does not allow one to
2900 * set the entire multicast list at a time and keeping track of
2901 * it here is going to be messy.
2903 if ((dev->mc_count) && !(ap->mcast_all)) {
2904 cmd.evt = C_SET_MULTICAST_MODE;
2905 cmd.code = C_C_MCAST_ENABLE;
2907 ace_issue_cmd(regs, &cmd);
2908 }else if (!ap->mcast_all) {
2909 cmd.evt = C_SET_MULTICAST_MODE;
2910 cmd.code = C_C_MCAST_DISABLE;
2912 ace_issue_cmd(regs, &cmd);
2917 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2919 struct ace_private *ap = dev->priv;
2920 struct ace_mac_stats *mac_stats =
2921 (struct ace_mac_stats *)ap->regs->Stats;
2923 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2924 ap->stats.multicast = readl(&mac_stats->kept_mc);
2925 ap->stats.collisions = readl(&mac_stats->coll);
2931 static void __init ace_copy(struct ace_regs *regs, void *src,
2934 unsigned long tdest;
2942 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2943 min_t(u32, size, ACE_WINDOW_SIZE));
2944 tdest = (unsigned long)®s->Window +
2945 (dest & (ACE_WINDOW_SIZE - 1));
2946 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2948 * This requires byte swapping on big endian, however
2949 * writel does that for us
2952 for (i = 0; i < (tsize / 4); i++) {
2953 writel(wsrc[i], tdest + i*4);
2964 static void __init ace_clear(struct ace_regs *regs, u32 dest, int size)
2966 unsigned long tdest;
2973 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2974 min_t(u32, size, ACE_WINDOW_SIZE));
2975 tdest = (unsigned long)®s->Window +
2976 (dest & (ACE_WINDOW_SIZE - 1));
2977 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2979 for (i = 0; i < (tsize / 4); i++) {
2980 writel(0, tdest + i*4);
2992 * Download the firmware into the SRAM on the NIC
2994 * This operation requires the NIC to be halted and is performed with
2995 * interrupts disabled and with the spinlock hold.
2997 int __init ace_load_firmware(struct net_device *dev)
2999 struct ace_private *ap;
3000 struct ace_regs *regs;
3005 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
3006 printk(KERN_ERR "%s: trying to download firmware while the "
3007 "CPU is running!\n", dev->name);
3012 * Do not try to clear more than 512KB or we end up seeing
3013 * funny things on NICs with only 512KB SRAM
3015 ace_clear(regs, 0x2000, 0x80000-0x2000);
3016 if (ACE_IS_TIGON_I(ap)) {
3017 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
3018 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
3019 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
3021 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
3022 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
3023 }else if (ap->version == 2) {
3024 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
3025 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
3026 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
3027 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
3029 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
3037 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3039 * Accessing the EEPROM is `interesting' to say the least - don't read
3040 * this code right after dinner.
3042 * This is all about black magic and bit-banging the device .... I
3043 * wonder in what hospital they have put the guy who designed the i2c
3046 * Oh yes, this is only the beginning!
3048 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3049 * code i2c readout code by beta testing all my hacks.
3051 static void __init eeprom_start(struct ace_regs *regs)
3055 readl(®s->LocalCtrl);
3056 udelay(ACE_SHORT_DELAY);
3057 local = readl(®s->LocalCtrl);
3058 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3059 writel(local, ®s->LocalCtrl);
3060 readl(®s->LocalCtrl);
3062 udelay(ACE_SHORT_DELAY);
3063 local |= EEPROM_CLK_OUT;
3064 writel(local, ®s->LocalCtrl);
3065 readl(®s->LocalCtrl);
3067 udelay(ACE_SHORT_DELAY);
3068 local &= ~EEPROM_DATA_OUT;
3069 writel(local, ®s->LocalCtrl);
3070 readl(®s->LocalCtrl);
3072 udelay(ACE_SHORT_DELAY);
3073 local &= ~EEPROM_CLK_OUT;
3074 writel(local, ®s->LocalCtrl);
3075 readl(®s->LocalCtrl);
3080 static void __init eeprom_prep(struct ace_regs *regs, u8 magic)
3085 udelay(ACE_SHORT_DELAY);
3086 local = readl(®s->LocalCtrl);
3087 local &= ~EEPROM_DATA_OUT;
3088 local |= EEPROM_WRITE_ENABLE;
3089 writel(local, ®s->LocalCtrl);
3090 readl(®s->LocalCtrl);
3093 for (i = 0; i < 8; i++, magic <<= 1) {
3094 udelay(ACE_SHORT_DELAY);
3096 local |= EEPROM_DATA_OUT;
3098 local &= ~EEPROM_DATA_OUT;
3099 writel(local, ®s->LocalCtrl);
3100 readl(®s->LocalCtrl);
3103 udelay(ACE_SHORT_DELAY);
3104 local |= EEPROM_CLK_OUT;
3105 writel(local, ®s->LocalCtrl);
3106 readl(®s->LocalCtrl);
3108 udelay(ACE_SHORT_DELAY);
3109 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3110 writel(local, ®s->LocalCtrl);
3111 readl(®s->LocalCtrl);
3117 static int __init eeprom_check_ack(struct ace_regs *regs)
3122 local = readl(®s->LocalCtrl);
3123 local &= ~EEPROM_WRITE_ENABLE;
3124 writel(local, ®s->LocalCtrl);
3125 readl(®s->LocalCtrl);
3127 udelay(ACE_LONG_DELAY);
3128 local |= EEPROM_CLK_OUT;
3129 writel(local, ®s->LocalCtrl);
3130 readl(®s->LocalCtrl);
3132 udelay(ACE_SHORT_DELAY);
3133 /* sample data in middle of high clk */
3134 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3135 udelay(ACE_SHORT_DELAY);
3137 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3138 readl(®s->LocalCtrl);
3145 static void __init eeprom_stop(struct ace_regs *regs)
3149 udelay(ACE_SHORT_DELAY);
3150 local = readl(®s->LocalCtrl);
3151 local |= EEPROM_WRITE_ENABLE;
3152 writel(local, ®s->LocalCtrl);
3153 readl(®s->LocalCtrl);
3155 udelay(ACE_SHORT_DELAY);
3156 local &= ~EEPROM_DATA_OUT;
3157 writel(local, ®s->LocalCtrl);
3158 readl(®s->LocalCtrl);
3160 udelay(ACE_SHORT_DELAY);
3161 local |= EEPROM_CLK_OUT;
3162 writel(local, ®s->LocalCtrl);
3163 readl(®s->LocalCtrl);
3165 udelay(ACE_SHORT_DELAY);
3166 local |= EEPROM_DATA_OUT;
3167 writel(local, ®s->LocalCtrl);
3168 readl(®s->LocalCtrl);
3170 udelay(ACE_LONG_DELAY);
3171 local &= ~EEPROM_CLK_OUT;
3172 writel(local, ®s->LocalCtrl);
3178 * Read a whole byte from the EEPROM.
3180 static int __init read_eeprom_byte(struct net_device *dev,
3181 unsigned long offset)
3183 struct ace_regs *regs;
3184 unsigned long flags;
3190 printk(KERN_ERR "No device!\n");
3192 goto eeprom_read_error;
3195 regs = ((struct ace_private *)dev->priv)->regs;
3198 * Don't take interrupts on this CPU will bit banging
3199 * the %#%#@$ I2C device
3201 local_irq_save(flags);
3205 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3206 if (eeprom_check_ack(regs)) {
3207 local_irq_restore(flags);
3208 printk(KERN_ERR "%s: Unable to sync eeprom\n", dev->name);
3210 goto eeprom_read_error;
3213 eeprom_prep(regs, (offset >> 8) & 0xff);
3214 if (eeprom_check_ack(regs)) {
3215 local_irq_restore(flags);
3216 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3219 goto eeprom_read_error;
3222 eeprom_prep(regs, offset & 0xff);
3223 if (eeprom_check_ack(regs)) {
3224 local_irq_restore(flags);
3225 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3228 goto eeprom_read_error;
3232 eeprom_prep(regs, EEPROM_READ_SELECT);
3233 if (eeprom_check_ack(regs)) {
3234 local_irq_restore(flags);
3235 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3238 goto eeprom_read_error;
3241 for (i = 0; i < 8; i++) {
3242 local = readl(®s->LocalCtrl);
3243 local &= ~EEPROM_WRITE_ENABLE;
3244 writel(local, ®s->LocalCtrl);
3245 readl(®s->LocalCtrl);
3246 udelay(ACE_LONG_DELAY);
3248 local |= EEPROM_CLK_OUT;
3249 writel(local, ®s->LocalCtrl);
3250 readl(®s->LocalCtrl);
3252 udelay(ACE_SHORT_DELAY);
3253 /* sample data mid high clk */
3254 result = (result << 1) |
3255 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3256 udelay(ACE_SHORT_DELAY);
3258 local = readl(®s->LocalCtrl);
3259 local &= ~EEPROM_CLK_OUT;
3260 writel(local, ®s->LocalCtrl);
3261 readl(®s->LocalCtrl);
3262 udelay(ACE_SHORT_DELAY);
3265 local |= EEPROM_WRITE_ENABLE;
3266 writel(local, ®s->LocalCtrl);
3267 readl(®s->LocalCtrl);
3269 udelay(ACE_SHORT_DELAY);
3273 local |= EEPROM_DATA_OUT;
3274 writel(local, ®s->LocalCtrl);
3275 readl(®s->LocalCtrl);
3277 udelay(ACE_SHORT_DELAY);
3278 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3279 readl(®s->LocalCtrl);
3280 udelay(ACE_LONG_DELAY);
3281 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3282 readl(®s->LocalCtrl);
3284 udelay(ACE_SHORT_DELAY);
3287 local_irq_restore(flags);
3292 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3300 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"