1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
24 http://www.parl.clemson.edu/~keithu/hamachi.html
28 Linux kernel changelog:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
36 #define DRV_NAME "hamachi"
37 #define DRV_VERSION "1.01+LK1.0.1"
38 #define DRV_RELDATE "5/18/2001"
41 /* A few user-configurable values. */
43 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
45 #define hamachi_debug debug
46 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47 static int max_interrupt_work = 40;
49 /* Default values selected by testing on a dual processor PIII-450 */
50 /* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
53 static int max_rx_latency = 0x11;
54 static int max_rx_gap = 0x05;
55 static int min_rx_pkt = 0x18;
56 static int max_tx_latency = 0x00;
57 static int max_tx_gap = 0x00;
58 static int min_tx_pkt = 0x30;
60 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
64 static int rx_copybreak;
66 /* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
73 /* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
92 #define MAX_UNITS 8 /* More are supported, limit only on options */
93 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
110 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
113 /* Operational parameters that are set at compile time. */
115 /* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121 /* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
126 #define TX_RING_SIZE 64
127 #define RX_RING_SIZE 512
128 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
136 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137 /* #define ADDRLEN 64 */
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
151 /* Operational parameters that usually are not changed. */
152 /* Time in jiffies before concluding the transmitter is hung. */
153 #define TX_TIMEOUT (5*HZ)
155 #include <linux/module.h>
156 #include <linux/kernel.h>
157 #include <linux/string.h>
158 #include <linux/timer.h>
159 #include <linux/time.h>
160 #include <linux/errno.h>
161 #include <linux/ioport.h>
162 #include <linux/slab.h>
163 #include <linux/interrupt.h>
164 #include <linux/pci.h>
165 #include <linux/init.h>
166 #include <linux/ethtool.h>
167 #include <linux/mii.h>
168 #include <linux/netdevice.h>
169 #include <linux/etherdevice.h>
170 #include <linux/skbuff.h>
171 #include <linux/ip.h>
172 #include <linux/delay.h>
173 #include <linux/bitops.h>
175 #include <asm/uaccess.h>
176 #include <asm/processor.h> /* Processor type for cache alignment. */
178 #include <asm/unaligned.h>
179 #include <asm/cache.h>
181 static char version[] __devinitdata =
182 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
187 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
188 we need it for hardware checksumming support. FYI... some of
189 the definitions in <netinet/ip.h> conflict/duplicate those in
190 other linux headers causing many compiler warnings.
193 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
196 /* Define IP_OFFSET to be IPOPT_OFFSET */
199 #define IP_OFFSET IPOPT_OFFSET
205 #define RUN_AT(x) (jiffies + (x))
207 /* Condensed bus+endian portability operations. */
209 #define cpu_to_leXX(addr) cpu_to_le64(addr)
211 #define cpu_to_leXX(addr) cpu_to_le32(addr)
218 I. Board Compatibility
220 This device driver is designed for the Packet Engines "Hamachi"
221 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
224 II. Board-specific settings
226 No jumpers exist on the board. The chip supports software correction of
227 various motherboard wiring errors, however this driver does not support
230 III. Driver operation
234 The Hamachi uses a typical descriptor based bus-master architecture.
235 The descriptor list is similar to that used by the Digital Tulip.
236 This driver uses two statically allocated fixed-size descriptor lists
237 formed into rings by a branch from the final descriptor to the beginning of
238 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
240 This driver uses a zero-copy receive and transmit scheme similar my other
242 The driver allocates full frame size skbuffs for the Rx ring buffers at
243 open() time and passes the skb->data field to the Hamachi as receive data
244 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
245 a fresh skbuff is allocated and the frame is copied to the new skbuff.
246 When the incoming frame is larger, the skbuff is passed directly up the
247 protocol stack and replaced by a newly allocated skbuff.
249 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
250 using a full-sized skbuff for small frames vs. the copying costs of larger
251 frames. Gigabit cards are typically used on generously configured machines
252 and the underfilled buffers have negligible impact compared to the benefit of
253 a single allocation size, so the default value of zero results in never
256 IIIb/c. Transmit/Receive Structure
258 The Rx and Tx descriptor structure are straight-forward, with no historical
259 baggage that must be explained. Unlike the awkward DBDMA structure, there
260 are no unused fields or option bits that had only one allowable setting.
262 Two details should be noted about the descriptors: The chip supports both 32
263 bit and 64 bit address structures, and the length field is overwritten on
264 the receive descriptors. The descriptor length is set in the control word
265 for each channel. The development driver uses 32 bit addresses only, however
266 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
268 IIId. Synchronization
270 This driver is very similar to my other network drivers.
271 The driver runs as two independent, single-threaded flows of control. One
272 is the send-packet routine, which enforces single-threaded use by the
273 dev->tbusy flag. The other thread is the interrupt handler, which is single
274 threaded by the hardware and other software.
276 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
277 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
278 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
279 the 'hmp->tx_full' flag.
281 The interrupt handler has exclusive control over the Rx ring and records stats
282 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
283 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
284 clears both the tx_full and tbusy flags.
288 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
292 Hamachi Engineering Design Specification, 5/15/97
293 (Note: This version was marked "Confidential".)
301 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
302 to help avoid some stall conditions -- this needs further research.
304 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
305 the Tx ring and is called from hamachi_start_xmit (this used to be
306 called from hamachi_interrupt but it tends to delay execution of the
307 interrupt handler and thus reduce bandwidth by reducing the latency
308 between hamachi_rx()'s). Notably, some modification has been made so
309 that the cleaning loop checks only to make sure that the DescOwn bit
310 isn't set in the status flag since the card is not required
311 to set the entire flag to zero after processing.
313 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
314 checked before attempting to add a buffer to the ring. If the ring is full
315 an attempt is made to free any dirty buffers and thus find space for
316 the new buffer or the function returns non-zero which should case the
317 scheduler to reschedule the buffer later.
319 01/15/1999 EPK Some adjustments were made to the chip initialization.
320 End-to-end flow control should now be fully active and the interrupt
321 algorithm vars have been changed. These could probably use further tuning.
323 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
324 set the rx and tx latencies for the Hamachi interrupts. If you're having
325 problems with network stalls, try setting these to higher values.
326 Valid values are 0x00 through 0xff.
328 01/15/1999 EPK In general, the overall bandwidth has increased and
329 latencies are better (sometimes by a factor of 2). Stalls are rare at
330 this point, however there still appears to be a bug somewhere between the
331 hardware and driver. TCP checksum errors under load also appear to be
332 eliminated at this point.
334 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
335 Rx and Tx rings. This appears to have been affecting whether a particular
336 peer-to-peer connection would hang under high load. I believe the Rx
337 rings was typically getting set correctly, but the Tx ring wasn't getting
338 the DescEndRing bit set during initialization. ??? Does this mean the
339 hamachi card is using the DescEndRing in processing even if a particular
340 slot isn't in use -- hypothetically, the card might be searching the
341 entire Tx ring for slots with the DescOwn bit set and then processing
342 them. If the DescEndRing bit isn't set, then it might just wander off
343 through memory until it hits a chunk of data with that bit set
344 and then looping back.
346 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
347 problem (TxCmd and RxCmd need only to be set when idle or stopped.
349 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
350 (Michel Mueller pointed out the ``permanently busy'' potential
353 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
355 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
356 incorrectly defined and corrected (as per Michel Mueller).
358 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
359 were available before reseting the tbusy and tx_full flags
360 (as per Michel Mueller).
362 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
364 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
367 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
368 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
369 re-structuring I would like to do.
371 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
372 parameters on a dual P3-450 setup yielded the new default interrupt
373 mitigation parameters. Tx should interrupt VERY infrequently due to
374 Eric's scheme. Rx should be more often...
376 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
377 nicely with non-linux machines.
379 03/13/2000 KDU Experimented with some of the configuration values:
381 -It seems that enabling PCI performance commands for descriptors
382 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
383 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
384 leave them that way until I hear further feedback.
386 -Increasing the PCI_LATENCY_TIMER to 130
387 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
388 degrade performance. Leaving default at 64 pending further information.
390 03/14/2000 KDU Further tuning:
392 -adjusted boguscnt in hamachi_rx() to depend on interrupt
393 mitigation parameters chosen.
395 -Selected a set of interrupt parameters based on some extensive testing.
396 These may change with more testing.
400 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
401 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
404 -fix the reset procedure. It doesn't quite work.
407 /* A few values that may be tweaked. */
408 /* Size of each temporary Rx buffer, calculated as:
409 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
410 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
411 * 2 more because we use skb_reserve.
413 #define PKT_BUF_SZ 1538
415 /* For now, this is going to be set to the maximum size of an ethernet
416 * packet. Eventually, we may want to make it a variable that is
419 #define MAX_FRAME_SIZE 1518
421 /* The rest of these values should never change. */
423 static void hamachi_timer(unsigned long data);
425 enum capability_flags {CanHaveMII=1, };
426 static struct chip_info {
427 u16 vendor_id, device_id, device_id_mask, pad;
429 void (*media_timer)(unsigned long data);
432 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
436 /* Offsets to the Hamachi registers. Various sizes. */
437 enum hamachi_offsets {
438 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
439 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
440 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
441 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
442 TxChecksum=0x074, RxChecksum=0x076,
443 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
444 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
446 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
447 /* See enum MII_offsets below. */
448 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
449 AddrMode=0x0D0, StationAddr=0x0D2,
450 /* Gigabit AutoNegotiation. */
451 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
452 ANLinkPartnerAbility=0x0EA,
453 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
457 /* Offsets to the MII-mode registers. */
459 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
463 /* Bits in the interrupt status/mask registers. */
464 enum intr_status_bits {
465 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
466 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
467 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
469 /* The Hamachi Rx and Tx buffer descriptors. */
470 struct hamachi_desc {
480 /* Bits in hamachi_desc.status_n_length */
481 enum desc_status_bits {
482 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
486 #define PRIV_ALIGN 15 /* Required alignment mask */
488 struct hamachi_private {
489 /* Descriptor rings first for alignment. Tx requires a second descriptor
491 struct hamachi_desc *rx_ring;
492 struct hamachi_desc *tx_ring;
493 struct sk_buff* rx_skbuff[RX_RING_SIZE];
494 struct sk_buff* tx_skbuff[TX_RING_SIZE];
495 dma_addr_t tx_ring_dma;
496 dma_addr_t rx_ring_dma;
497 struct net_device_stats stats;
498 struct timer_list timer; /* Media selection timer. */
499 /* Frequently used and paired value: keep adjacent for cache effect. */
502 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
503 unsigned int cur_tx, dirty_tx;
504 unsigned int rx_buf_sz; /* Based on MTU+slack. */
505 unsigned int tx_full:1; /* The Tx queue is full. */
506 unsigned int duplex_lock:1;
507 unsigned int default_port:4; /* Last dev->if_port value. */
508 /* MII transceiver section. */
509 int mii_cnt; /* MII device addresses. */
510 struct mii_if_info mii_if; /* MII lib hooks/info */
511 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
512 u32 rx_int_var, tx_int_var; /* interrupt control variables */
513 u32 option; /* Hold on to a copy of the options */
514 struct pci_dev *pci_dev;
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
521 MODULE_PARM(max_interrupt_work, "i");
522 MODULE_PARM(mtu, "i");
523 MODULE_PARM(debug, "i");
524 MODULE_PARM(min_rx_pkt, "i");
525 MODULE_PARM(max_rx_gap, "i");
526 MODULE_PARM(max_rx_latency, "i");
527 MODULE_PARM(min_tx_pkt, "i");
528 MODULE_PARM(max_tx_gap, "i");
529 MODULE_PARM(max_tx_latency, "i");
530 MODULE_PARM(rx_copybreak, "i");
531 MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
532 MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
533 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
534 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
535 MODULE_PARM(force32, "i");
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
552 static int read_eeprom(long ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
561 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
562 static int hamachi_rx(struct net_device *dev);
563 static inline int hamachi_tx(struct net_device *dev);
564 static void hamachi_error(struct net_device *dev, int intr_status);
565 static int hamachi_close(struct net_device *dev);
566 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
567 static void set_rx_mode(struct net_device *dev);
568 static struct ethtool_ops ethtool_ops;
569 static struct ethtool_ops ethtool_ops_no_mii;
571 static int __devinit hamachi_init_one (struct pci_dev *pdev,
572 const struct pci_device_id *ent)
574 struct hamachi_private *hmp;
575 int option, i, rx_int_var, tx_int_var, boguscnt;
576 int chip_id = ent->driver_data;
580 struct net_device *dev;
585 /* when built into the kernel, we only print version if device is found */
587 static int printed_version;
588 if (!printed_version++)
592 if (pci_enable_device(pdev)) {
597 ioaddr = pci_resource_start(pdev, 0);
598 #ifdef __alpha__ /* Really "64 bit addrs" */
599 ioaddr |= (pci_resource_start(pdev, 1) << 32);
602 pci_set_master(pdev);
604 i = pci_request_regions(pdev, DRV_NAME);
608 ioaddr = (long) ioremap(ioaddr, 0x400);
610 goto err_out_release;
612 dev = alloc_etherdev(sizeof(struct hamachi_private));
614 goto err_out_iounmap;
616 SET_MODULE_OWNER(dev);
617 SET_NETDEV_DEV(dev, &pdev->dev);
620 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
621 dev->hard_header_len += 8; /* for cksum tag */
624 for (i = 0; i < 6; i++)
625 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
626 : readb(ioaddr + StationAddr + i);
628 #if ! defined(final_version)
629 if (hamachi_debug > 4)
630 for (i = 0; i < 0x10; i++)
632 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
635 hmp = netdev_priv(dev);
636 spin_lock_init(&hmp->lock);
638 hmp->mii_if.dev = dev;
639 hmp->mii_if.mdio_read = mdio_read;
640 hmp->mii_if.mdio_write = mdio_write;
641 hmp->mii_if.phy_id_mask = 0x1f;
642 hmp->mii_if.reg_num_mask = 0x1f;
644 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
646 goto err_out_cleardev;
647 hmp->tx_ring = (struct hamachi_desc *)ring_space;
648 hmp->tx_ring_dma = ring_dma;
650 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
652 goto err_out_unmap_tx;
653 hmp->rx_ring = (struct hamachi_desc *)ring_space;
654 hmp->rx_ring_dma = ring_dma;
656 /* Check for options being passed in */
657 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
659 option = dev->mem_start;
661 /* If the bus size is misidentified, do the following. */
662 force32 = force32 ? force32 :
663 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
665 writeb(force32, ioaddr + VirtualJumpers);
667 /* Hmmm, do we really need to reset the chip???. */
668 writeb(0x01, ioaddr + ChipReset);
670 /* After a reset, the clock speed measurement of the PCI bus will not
671 * be valid for a moment. Wait for a little while until it is. If
672 * it takes more than 10ms, forget it.
675 i = readb(ioaddr + PCIClkMeas);
676 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
678 i = readb(ioaddr + PCIClkMeas);
681 dev->base_addr = ioaddr;
683 pci_set_drvdata(pdev, dev);
685 hmp->chip_id = chip_id;
688 /* The lower four bits are the media type. */
690 hmp->option = option;
692 hmp->mii_if.full_duplex = 1;
693 else if (option & 0x080)
694 hmp->mii_if.full_duplex = 0;
695 hmp->default_port = option & 15;
696 if (hmp->default_port)
697 hmp->mii_if.force_media = 1;
699 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
700 hmp->mii_if.full_duplex = 1;
702 /* lock the duplex mode if someone specified a value */
703 if (hmp->mii_if.full_duplex || (option & 0x080))
704 hmp->duplex_lock = 1;
706 /* Set interrupt tuning parameters */
707 max_rx_latency = max_rx_latency & 0x00ff;
708 max_rx_gap = max_rx_gap & 0x00ff;
709 min_rx_pkt = min_rx_pkt & 0x00ff;
710 max_tx_latency = max_tx_latency & 0x00ff;
711 max_tx_gap = max_tx_gap & 0x00ff;
712 min_tx_pkt = min_tx_pkt & 0x00ff;
714 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
715 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
716 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
717 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
718 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
719 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
722 /* The Hamachi-specific entries in the device structure. */
723 dev->open = &hamachi_open;
724 dev->hard_start_xmit = &hamachi_start_xmit;
725 dev->stop = &hamachi_close;
726 dev->get_stats = &hamachi_get_stats;
727 dev->set_multicast_list = &set_rx_mode;
728 dev->do_ioctl = &netdev_ioctl;
729 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
730 SET_ETHTOOL_OPS(dev, ðtool_ops);
732 SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii);
733 dev->tx_timeout = &hamachi_tx_timeout;
734 dev->watchdog_timeo = TX_TIMEOUT;
738 i = register_netdev(dev);
741 goto err_out_unmap_rx;
744 printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
745 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
747 for (i = 0; i < 5; i++)
748 printk("%2.2x:", dev->dev_addr[i]);
749 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
750 i = readb(ioaddr + PCIClkMeas);
751 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
752 "%2.2x, LPA %4.4x.\n",
753 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
754 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
755 readw(ioaddr + ANLinkPartnerAbility));
757 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
758 int phy, phy_idx = 0;
759 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
760 int mii_status = mdio_read(dev, phy, MII_BMSR);
761 if (mii_status != 0xffff &&
762 mii_status != 0x0000) {
763 hmp->phys[phy_idx++] = phy;
764 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
765 printk(KERN_INFO "%s: MII PHY found at address %d, status "
766 "0x%4.4x advertising %4.4x.\n",
767 dev->name, phy, mii_status, hmp->mii_if.advertising);
770 hmp->mii_cnt = phy_idx;
771 if (hmp->mii_cnt > 0)
772 hmp->mii_if.phy_id = hmp->phys[0];
774 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
776 /* Configure gigabit autonegotiation. */
777 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
778 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
779 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
785 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
788 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
793 iounmap((char *)ioaddr);
795 pci_release_regions(pdev);
800 static int __devinit read_eeprom(long ioaddr, int location)
802 int bogus_cnt = 1000;
804 /* We should check busy first - per docs -KDU */
805 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
806 writew(location, ioaddr + EEAddr);
807 writeb(0x02, ioaddr + EECmdStatus);
809 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
810 if (hamachi_debug > 5)
811 printk(" EEPROM status is %2.2x after %d ticks.\n",
812 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
813 return readb(ioaddr + EEData);
816 /* MII Managemen Data I/O accesses.
817 These routines assume the MDIO controller is idle, and do not exit until
818 the command is finished. */
820 static int mdio_read(struct net_device *dev, int phy_id, int location)
822 long ioaddr = dev->base_addr;
825 /* We should check busy first - per docs -KDU */
826 for (i = 10000; i >= 0; i--)
827 if ((readw(ioaddr + MII_Status) & 1) == 0)
829 writew((phy_id<<8) + location, ioaddr + MII_Addr);
830 writew(0x0001, ioaddr + MII_Cmd);
831 for (i = 10000; i >= 0; i--)
832 if ((readw(ioaddr + MII_Status) & 1) == 0)
834 return readw(ioaddr + MII_Rd_Data);
837 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
839 long ioaddr = dev->base_addr;
842 /* We should check busy first - per docs -KDU */
843 for (i = 10000; i >= 0; i--)
844 if ((readw(ioaddr + MII_Status) & 1) == 0)
846 writew((phy_id<<8) + location, ioaddr + MII_Addr);
847 writew(value, ioaddr + MII_Wr_Data);
849 /* Wait for the command to finish. */
850 for (i = 10000; i >= 0; i--)
851 if ((readw(ioaddr + MII_Status) & 1) == 0)
857 static int hamachi_open(struct net_device *dev)
859 struct hamachi_private *hmp = netdev_priv(dev);
860 long ioaddr = dev->base_addr;
862 u32 rx_int_var, tx_int_var;
865 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
869 if (hamachi_debug > 1)
870 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
871 dev->name, dev->irq);
873 hamachi_init_ring(dev);
876 /* writellll anyone ? */
877 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
878 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
879 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
880 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
882 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
883 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
886 /* TODO: It would make sense to organize this as words since the card
887 * documentation does. -KDU
889 for (i = 0; i < 6; i++)
890 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
892 /* Initialize other registers: with so many this eventually this will
893 converted to an offset/value list. */
895 /* Configure the FIFO */
896 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
900 writew(0x0000, ioaddr + FIFOcfg);
903 /* Configure the FIFO for 512K external, 16K used for Tx. */
904 writew(0x0028, ioaddr + FIFOcfg);
907 /* Configure the FIFO for 1024 external, 32K used for Tx. */
908 writew(0x004C, ioaddr + FIFOcfg);
911 /* Configure the FIFO for 2048 external, 32K used for Tx. */
912 writew(0x006C, ioaddr + FIFOcfg);
915 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
917 /* Default to no FIFO */
918 writew(0x0000, ioaddr + FIFOcfg);
922 if (dev->if_port == 0)
923 dev->if_port = hmp->default_port;
926 /* Setting the Rx mode will start the Rx process. */
927 /* If someone didn't choose a duplex, default to full-duplex */
928 if (hmp->duplex_lock != 1)
929 hmp->mii_if.full_duplex = 1;
931 /* always 1, takes no more time to do it */
932 writew(0x0001, ioaddr + RxChecksum);
934 writew(0x0001, ioaddr + TxChecksum);
936 writew(0x0000, ioaddr + TxChecksum);
938 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
939 writew(0x215F, ioaddr + MACCnfg);
940 writew(0x000C, ioaddr + FrameGap0);
941 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
942 writew(0x1018, ioaddr + FrameGap1);
943 /* Why do we enable receives/transmits here? -KDU */
944 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
945 /* Enable automatic generation of flow control frames, period 0xffff. */
946 writel(0x0030FFFF, ioaddr + FlowCtrl);
947 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
949 /* Enable legacy links. */
950 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
951 /* Initial Link LED to blinking red. */
952 writeb(0x03, ioaddr + LEDCtrl);
954 /* Configure interrupt mitigation. This has a great effect on
955 performance, so systems tuning should start here!. */
957 rx_int_var = hmp->rx_int_var;
958 tx_int_var = hmp->tx_int_var;
960 if (hamachi_debug > 1) {
961 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
962 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
963 (tx_int_var & 0x00ff0000) >> 16);
964 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
965 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
966 (rx_int_var & 0x00ff0000) >> 16);
967 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
970 writel(tx_int_var, ioaddr + TxIntrCtrl);
971 writel(rx_int_var, ioaddr + RxIntrCtrl);
975 netif_start_queue(dev);
977 /* Enable interrupts by setting the interrupt mask. */
978 writel(0x80878787, ioaddr + InterruptEnable);
979 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
981 /* Configure and start the DMA channels. */
982 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
984 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
985 writew(0x005D, ioaddr + TxDMACtrl);
987 writew(0x001D, ioaddr + RxDMACtrl);
988 writew(0x001D, ioaddr + TxDMACtrl);
990 writew(0x0001, dev->base_addr + RxCmd);
992 if (hamachi_debug > 2) {
993 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
994 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
996 /* Set the timer to check for link beat. */
997 init_timer(&hmp->timer);
998 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
999 hmp->timer.data = (unsigned long)dev;
1000 hmp->timer.function = &hamachi_timer; /* timer handler */
1001 add_timer(&hmp->timer);
1006 static inline int hamachi_tx(struct net_device *dev)
1008 struct hamachi_private *hmp = netdev_priv(dev);
1010 /* Update the dirty pointer until we find an entry that is
1011 still owned by the card */
1012 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1013 int entry = hmp->dirty_tx % TX_RING_SIZE;
1014 struct sk_buff *skb;
1016 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1018 /* Free the original skb. */
1019 skb = hmp->tx_skbuff[entry];
1021 pci_unmap_single(hmp->pci_dev,
1022 hmp->tx_ring[entry].addr, skb->len,
1025 hmp->tx_skbuff[entry] = NULL;
1027 hmp->tx_ring[entry].status_n_length = 0;
1028 if (entry >= TX_RING_SIZE-1)
1029 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1030 cpu_to_le32(DescEndRing);
1031 hmp->stats.tx_packets++;
1037 static void hamachi_timer(unsigned long data)
1039 struct net_device *dev = (struct net_device *)data;
1040 struct hamachi_private *hmp = netdev_priv(dev);
1041 long ioaddr = dev->base_addr;
1042 int next_tick = 10*HZ;
1044 if (hamachi_debug > 2) {
1045 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1046 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1047 readw(ioaddr + ANLinkPartnerAbility));
1048 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1049 "%4.4x %4.4x %4.4x.\n", dev->name,
1050 readw(ioaddr + 0x0e0),
1051 readw(ioaddr + 0x0e2),
1052 readw(ioaddr + 0x0e4),
1053 readw(ioaddr + 0x0e6),
1054 readw(ioaddr + 0x0e8),
1055 readw(ioaddr + 0x0eA));
1057 /* We could do something here... nah. */
1058 hmp->timer.expires = RUN_AT(next_tick);
1059 add_timer(&hmp->timer);
1062 static void hamachi_tx_timeout(struct net_device *dev)
1065 struct hamachi_private *hmp = netdev_priv(dev);
1066 long ioaddr = dev->base_addr;
1068 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1069 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1073 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1074 for (i = 0; i < RX_RING_SIZE; i++)
1075 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1076 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1077 for (i = 0; i < TX_RING_SIZE; i++)
1078 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1082 /* Reinit the hardware and make sure the Rx and Tx processes
1086 /* The right way to do Reset. -KDU
1087 * -Clear OWN bit in all Rx/Tx descriptors
1088 * -Wait 50 uS for channels to go idle
1089 * -Turn off MAC receiver
1093 for (i = 0; i < RX_RING_SIZE; i++)
1094 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1096 /* Presume that all packets in the Tx queue are gone if we have to
1097 * re-init the hardware.
1099 for (i = 0; i < TX_RING_SIZE; i++){
1100 struct sk_buff *skb;
1102 if (i >= TX_RING_SIZE - 1)
1103 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1105 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1107 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1108 skb = hmp->tx_skbuff[i];
1110 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1111 skb->len, PCI_DMA_TODEVICE);
1113 hmp->tx_skbuff[i] = NULL;
1117 udelay(60); /* Sleep 60 us just for safety sake */
1118 writew(0x0002, dev->base_addr + RxCmd); /* STOP Rx */
1120 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1123 hmp->cur_rx = hmp->cur_tx = 0;
1124 hmp->dirty_rx = hmp->dirty_tx = 0;
1125 /* Rx packets are also presumed lost; however, we need to make sure a
1126 * ring of buffers is in tact. -KDU
1128 for (i = 0; i < RX_RING_SIZE; i++){
1129 struct sk_buff *skb = hmp->rx_skbuff[i];
1132 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1133 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1135 hmp->rx_skbuff[i] = NULL;
1138 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1139 for (i = 0; i < RX_RING_SIZE; i++) {
1140 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1141 hmp->rx_skbuff[i] = skb;
1144 skb->dev = dev; /* Mark as being used by this device. */
1145 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1146 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1147 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1148 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1149 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1151 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1152 /* Mark the last entry as wrapping the ring. */
1153 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1155 /* Trigger an immediate transmit demand. */
1156 dev->trans_start = jiffies;
1157 hmp->stats.tx_errors++;
1159 /* Restart the chip's Tx/Rx processes . */
1160 writew(0x0002, dev->base_addr + TxCmd); /* STOP Tx */
1161 writew(0x0001, dev->base_addr + TxCmd); /* START Tx */
1162 writew(0x0001, dev->base_addr + RxCmd); /* START Rx */
1164 netif_wake_queue(dev);
1168 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1169 static void hamachi_init_ring(struct net_device *dev)
1171 struct hamachi_private *hmp = netdev_priv(dev);
1175 hmp->cur_rx = hmp->cur_tx = 0;
1176 hmp->dirty_rx = hmp->dirty_tx = 0;
1179 /* This is wrong. I'm not sure what the original plan was, but this
1180 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1181 * of 1501 gets a buffer of 1533? -KDU
1183 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1185 /* My attempt at a reasonable correction */
1186 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1187 * card needs room to do 8 byte alignment, +2 so we can reserve
1188 * the first 2 bytes, and +16 gets room for the status word from the
1191 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1192 (((dev->mtu+26+7) & ~7) + 2 + 16));
1194 /* Initialize all Rx descriptors. */
1195 for (i = 0; i < RX_RING_SIZE; i++) {
1196 hmp->rx_ring[i].status_n_length = 0;
1197 hmp->rx_skbuff[i] = NULL;
1199 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1200 for (i = 0; i < RX_RING_SIZE; i++) {
1201 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1202 hmp->rx_skbuff[i] = skb;
1205 skb->dev = dev; /* Mark as being used by this device. */
1206 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1207 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1208 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1209 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1210 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1211 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1213 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1214 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1216 for (i = 0; i < TX_RING_SIZE; i++) {
1217 hmp->tx_skbuff[i] = NULL;
1218 hmp->tx_ring[i].status_n_length = 0;
1220 /* Mark the last entry of the ring */
1221 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1228 #define csum_add(it, val) \
1230 it += (u16) (val); \
1231 if (it & 0xffff0000) { \
1236 /* printk("add %04x --> %04x\n", val, it); \ */
1238 /* uh->len already network format, do not swap */
1239 #define pseudo_csum_udp(sum,ih,uh) do { \
1241 csum_add(sum, (ih)->saddr >> 16); \
1242 csum_add(sum, (ih)->saddr & 0xffff); \
1243 csum_add(sum, (ih)->daddr >> 16); \
1244 csum_add(sum, (ih)->daddr & 0xffff); \
1245 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1246 csum_add(sum, (uh)->len); \
1250 #define pseudo_csum_tcp(sum,ih,len) do { \
1252 csum_add(sum, (ih)->saddr >> 16); \
1253 csum_add(sum, (ih)->saddr & 0xffff); \
1254 csum_add(sum, (ih)->daddr >> 16); \
1255 csum_add(sum, (ih)->daddr & 0xffff); \
1256 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1257 csum_add(sum, htons(len)); \
1261 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1263 struct hamachi_private *hmp = netdev_priv(dev);
1267 /* Ok, now make sure that the queue has space before trying to
1268 add another skbuff. if we return non-zero the scheduler
1269 should interpret this as a queue full and requeue the buffer
1273 /* We should NEVER reach this point -KDU */
1274 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1276 /* Wake the potentially-idle transmit channel. */
1277 /* If we don't need to read status, DON'T -KDU */
1278 status=readw(dev->base_addr + TxStatus);
1279 if( !(status & 0x0001) || (status & 0x0002))
1280 writew(0x0001, dev->base_addr + TxCmd);
1284 /* Caution: the write order is important here, set the field
1285 with the "ownership" bits last. */
1287 /* Calculate the next Tx descriptor entry. */
1288 entry = hmp->cur_tx % TX_RING_SIZE;
1290 hmp->tx_skbuff[entry] = skb;
1294 /* tack on checksum tag */
1296 struct ethhdr *eh = (struct ethhdr *)skb->data;
1297 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1298 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1299 if (ih->protocol == IPPROTO_UDP) {
1301 = (struct udphdr *)((char *)ih + ih->ihl*4);
1302 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1304 pseudo_csum_udp(pseudo, ih, uh);
1305 pseudo = htons(pseudo);
1306 printk("udp cksum was %04x, sending pseudo %04x\n",
1308 uh->check = 0; /* zero out uh->check before card calc */
1310 * start at 14 (skip ethhdr), store at offset (uh->check),
1311 * use pseudo value given.
1313 tagval = (14 << 24) | (offset << 16) | pseudo;
1314 } else if (ih->protocol == IPPROTO_TCP) {
1315 printk("tcp, no auto cksum\n");
1318 *(u32 *)skb_push(skb, 8) = tagval;
1322 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1323 skb->data, skb->len, PCI_DMA_TODEVICE));
1325 /* Hmmmm, could probably put a DescIntr on these, but the way
1326 the driver is currently coded makes Tx interrupts unnecessary
1327 since the clearing of the Tx ring is handled by the start_xmit
1328 routine. This organization helps mitigate the interrupts a
1329 bit and probably renders the max_tx_latency param useless.
1331 Update: Putting a DescIntr bit on all of the descriptors and
1332 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1334 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1335 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1336 DescEndPacket | DescEndRing | DescIntr | skb->len);
1338 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1339 DescEndPacket | DescIntr | skb->len);
1342 /* Non-x86 Todo: explicitly flush cache lines here. */
1344 /* Wake the potentially-idle transmit channel. */
1345 /* If we don't need to read status, DON'T -KDU */
1346 status=readw(dev->base_addr + TxStatus);
1347 if( !(status & 0x0001) || (status & 0x0002))
1348 writew(0x0001, dev->base_addr + TxCmd);
1350 /* Immediately before returning, let's clear as many entries as we can. */
1353 /* We should kick the bottom half here, since we are not accepting
1354 * interrupts with every packet. i.e. realize that Gigabit ethernet
1355 * can transmit faster than ordinary machines can load packets;
1356 * hence, any packet that got put off because we were in the transmit
1357 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1359 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1360 netif_wake_queue(dev); /* Typical path */
1363 netif_stop_queue(dev);
1365 dev->trans_start = jiffies;
1367 if (hamachi_debug > 4) {
1368 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1369 dev->name, hmp->cur_tx, entry);
1374 /* The interrupt handler does all of the Rx thread work and cleans up
1375 after the Tx thread. */
1376 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1378 struct net_device *dev = dev_instance;
1379 struct hamachi_private *hmp;
1380 long ioaddr, boguscnt = max_interrupt_work;
1383 #ifndef final_version /* Can never occur. */
1385 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1390 ioaddr = dev->base_addr;
1391 hmp = netdev_priv(dev);
1392 spin_lock(&hmp->lock);
1395 u32 intr_status = readl(ioaddr + InterruptClear);
1397 if (hamachi_debug > 4)
1398 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1399 dev->name, intr_status);
1401 if (intr_status == 0)
1406 if (intr_status & IntrRxDone)
1409 if (intr_status & IntrTxDone){
1410 /* This code should RARELY need to execute. After all, this is
1411 * a gigabit link, it should consume packets as fast as we put
1412 * them in AND we clear the Tx ring in hamachi_start_xmit().
1415 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1416 int entry = hmp->dirty_tx % TX_RING_SIZE;
1417 struct sk_buff *skb;
1419 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1421 skb = hmp->tx_skbuff[entry];
1422 /* Free the original skb. */
1424 pci_unmap_single(hmp->pci_dev,
1425 hmp->tx_ring[entry].addr,
1428 dev_kfree_skb_irq(skb);
1429 hmp->tx_skbuff[entry] = NULL;
1431 hmp->tx_ring[entry].status_n_length = 0;
1432 if (entry >= TX_RING_SIZE-1)
1433 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1434 cpu_to_le32(DescEndRing);
1435 hmp->stats.tx_packets++;
1437 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1438 /* The ring is no longer full */
1440 netif_wake_queue(dev);
1443 netif_wake_queue(dev);
1448 /* Abnormal error summary/uncommon events handlers. */
1450 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1451 LinkChange | NegotiationChange | StatsMax))
1452 hamachi_error(dev, intr_status);
1454 if (--boguscnt < 0) {
1455 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1456 dev->name, intr_status);
1461 if (hamachi_debug > 3)
1462 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1463 dev->name, readl(ioaddr + IntrStatus));
1465 #ifndef final_version
1466 /* Code that should never be run! Perhaps remove after testing.. */
1468 static int stopit = 10;
1469 if (dev->start == 0 && --stopit < 0) {
1470 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1477 spin_unlock(&hmp->lock);
1478 return IRQ_RETVAL(handled);
1481 /* This routine is logically part of the interrupt handler, but separated
1482 for clarity and better register allocation. */
1483 static int hamachi_rx(struct net_device *dev)
1485 struct hamachi_private *hmp = netdev_priv(dev);
1486 int entry = hmp->cur_rx % RX_RING_SIZE;
1487 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1489 if (hamachi_debug > 4) {
1490 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1491 entry, hmp->rx_ring[entry].status_n_length);
1494 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1496 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1497 u32 desc_status = le32_to_cpu(desc->status_n_length);
1498 u16 data_size = desc_status; /* Implicit truncate */
1502 if (desc_status & DescOwn)
1504 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1507 PCI_DMA_FROMDEVICE);
1508 buf_addr = (u8 *) hmp->rx_skbuff[entry]->tail;
1509 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1510 if (hamachi_debug > 4)
1511 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1515 if ( ! (desc_status & DescEndPacket)) {
1516 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1517 "multiple buffers, entry %#x length %d status %4.4x!\n",
1518 dev->name, hmp->cur_rx, data_size, desc_status);
1519 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1520 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1521 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1523 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1524 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1525 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1526 hmp->stats.rx_length_errors++;
1527 } /* else Omit for prototype errata??? */
1528 if (frame_status & 0x00380000) {
1529 /* There was an error. */
1530 if (hamachi_debug > 2)
1531 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1533 hmp->stats.rx_errors++;
1534 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1535 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1536 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1537 if (frame_status < 0) hmp->stats.rx_dropped++;
1539 struct sk_buff *skb;
1541 u16 pkt_len = (frame_status & 0x07ff) - 4;
1543 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1547 #ifndef final_version
1548 if (hamachi_debug > 4)
1549 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1550 " of %d, bogus_cnt %d.\n",
1551 pkt_len, data_size, boguscnt);
1552 if (hamachi_debug > 5)
1553 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1555 *(s32*)&(buf_addr[data_size - 20]),
1556 *(s32*)&(buf_addr[data_size - 16]),
1557 *(s32*)&(buf_addr[data_size - 12]),
1558 *(s32*)&(buf_addr[data_size - 8]),
1559 *(s32*)&(buf_addr[data_size - 4]));
1561 /* Check if the packet is long enough to accept without copying
1562 to a minimally-sized skbuff. */
1563 if (pkt_len < rx_copybreak
1564 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1566 printk(KERN_ERR "%s: rx_copybreak non-zero "
1567 "not good with RX_CHECKSUM\n", dev->name);
1570 skb_reserve(skb, 2); /* 16 byte align the IP header */
1571 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1572 hmp->rx_ring[entry].addr,
1574 PCI_DMA_FROMDEVICE);
1575 /* Call copy + cksum if available. */
1576 #if 1 || USE_IP_COPYSUM
1577 eth_copy_and_sum(skb,
1578 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1579 skb_put(skb, pkt_len);
1581 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1582 + entry*sizeof(*desc), pkt_len);
1584 pci_dma_sync_single_for_device(hmp->pci_dev,
1585 hmp->rx_ring[entry].addr,
1587 PCI_DMA_FROMDEVICE);
1589 pci_unmap_single(hmp->pci_dev,
1590 hmp->rx_ring[entry].addr,
1591 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1592 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1593 hmp->rx_skbuff[entry] = NULL;
1595 skb->protocol = eth_type_trans(skb, dev);
1599 /* TCP or UDP on ipv4, DIX encoding */
1600 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1601 struct iphdr *ih = (struct iphdr *) skb->data;
1602 /* Check that IP packet is at least 46 bytes, otherwise,
1603 * there may be pad bytes included in the hardware checksum.
1604 * This wouldn't happen if everyone padded with 0.
1606 if (ntohs(ih->tot_len) >= 46){
1607 /* don't worry about frags */
1608 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1609 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1610 u32 *p = (u32 *) &buf_addr[data_size - 20];
1611 register u32 crc, p_r, p_r1;
1621 crc = (p_r & 0xffff) + (p_r >> 16);
1624 crc = (p_r >> 16) + (p_r & 0xffff)
1625 + (p_r1 >> 16 & 0xff00);
1628 crc = p_r + (p_r1 >> 16);
1631 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1633 default: /*NOTREACHED*/ crc = 0;
1635 if (crc & 0xffff0000) {
1639 /* tcp/udp will add in pseudo */
1640 skb->csum = ntohs(pfck & 0xffff);
1641 if (skb->csum > crc)
1644 skb->csum += (~crc & 0xffff);
1646 * could do the pseudo myself and return
1647 * CHECKSUM_UNNECESSARY
1649 skb->ip_summed = CHECKSUM_HW;
1653 #endif /* RX_CHECKSUM */
1656 dev->last_rx = jiffies;
1657 hmp->stats.rx_packets++;
1659 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1662 /* Refill the Rx ring buffers. */
1663 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1664 struct hamachi_desc *desc;
1666 entry = hmp->dirty_rx % RX_RING_SIZE;
1667 desc = &(hmp->rx_ring[entry]);
1668 if (hmp->rx_skbuff[entry] == NULL) {
1669 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1671 hmp->rx_skbuff[entry] = skb;
1673 break; /* Better luck next round. */
1674 skb->dev = dev; /* Mark as being used by this device. */
1675 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1676 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1677 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1679 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1680 if (entry >= RX_RING_SIZE-1)
1681 desc->status_n_length |= cpu_to_le32(DescOwn |
1682 DescEndPacket | DescEndRing | DescIntr);
1684 desc->status_n_length |= cpu_to_le32(DescOwn |
1685 DescEndPacket | DescIntr);
1688 /* Restart Rx engine if stopped. */
1689 /* If we don't need to check status, don't. -KDU */
1690 if (readw(dev->base_addr + RxStatus) & 0x0002)
1691 writew(0x0001, dev->base_addr + RxCmd);
1696 /* This is more properly named "uncommon interrupt events", as it covers more
1697 than just errors. */
1698 static void hamachi_error(struct net_device *dev, int intr_status)
1700 long ioaddr = dev->base_addr;
1701 struct hamachi_private *hmp = netdev_priv(dev);
1703 if (intr_status & (LinkChange|NegotiationChange)) {
1704 if (hamachi_debug > 1)
1705 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1706 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1707 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1708 readw(ioaddr + ANLinkPartnerAbility),
1709 readl(ioaddr + IntrStatus));
1710 if (readw(ioaddr + ANStatus) & 0x20)
1711 writeb(0x01, ioaddr + LEDCtrl);
1713 writeb(0x03, ioaddr + LEDCtrl);
1715 if (intr_status & StatsMax) {
1716 hamachi_get_stats(dev);
1717 /* Read the overflow bits to clear. */
1718 readl(ioaddr + 0x370);
1719 readl(ioaddr + 0x3F0);
1721 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1723 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1724 dev->name, intr_status);
1725 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1726 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1727 hmp->stats.tx_fifo_errors++;
1728 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1729 hmp->stats.rx_fifo_errors++;
1732 static int hamachi_close(struct net_device *dev)
1734 long ioaddr = dev->base_addr;
1735 struct hamachi_private *hmp = netdev_priv(dev);
1736 struct sk_buff *skb;
1739 netif_stop_queue(dev);
1741 if (hamachi_debug > 1) {
1742 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1743 dev->name, readw(ioaddr + TxStatus),
1744 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1745 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1746 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1749 /* Disable interrupts by clearing the interrupt mask. */
1750 writel(0x0000, ioaddr + InterruptEnable);
1752 /* Stop the chip's Tx and Rx processes. */
1753 writel(2, ioaddr + RxCmd);
1754 writew(2, ioaddr + TxCmd);
1757 if (hamachi_debug > 2) {
1758 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1759 (int)hmp->tx_ring_dma);
1760 for (i = 0; i < TX_RING_SIZE; i++)
1761 printk(" %c #%d desc. %8.8x %8.8x.\n",
1762 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1763 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1764 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1765 (int)hmp->rx_ring_dma);
1766 for (i = 0; i < RX_RING_SIZE; i++) {
1767 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1768 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1769 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1770 if (hamachi_debug > 6) {
1771 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1773 hmp->rx_skbuff[i]->tail;
1776 for (j = 0; j < 0x50; j++)
1777 printk(" %4.4x", addr[j]);
1783 #endif /* __i386__ debugging only */
1785 free_irq(dev->irq, dev);
1787 del_timer_sync(&hmp->timer);
1789 /* Free all the skbuffs in the Rx queue. */
1790 for (i = 0; i < RX_RING_SIZE; i++) {
1791 skb = hmp->rx_skbuff[i];
1792 hmp->rx_ring[i].status_n_length = 0;
1793 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1795 pci_unmap_single(hmp->pci_dev,
1796 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1797 PCI_DMA_FROMDEVICE);
1799 hmp->rx_skbuff[i] = NULL;
1802 for (i = 0; i < TX_RING_SIZE; i++) {
1803 skb = hmp->tx_skbuff[i];
1805 pci_unmap_single(hmp->pci_dev,
1806 hmp->tx_ring[i].addr, skb->len,
1809 hmp->tx_skbuff[i] = NULL;
1813 writeb(0x00, ioaddr + LEDCtrl);
1818 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1820 long ioaddr = dev->base_addr;
1821 struct hamachi_private *hmp = netdev_priv(dev);
1823 /* We should lock this segment of code for SMP eventually, although
1824 the vulnerability window is very small and statistics are
1826 /* Ok, what goes here? This appears to be stuck at 21 packets
1827 according to ifconfig. It does get incremented in hamachi_tx(),
1828 so I think I'll comment it out here and see if better things
1831 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1833 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1834 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1835 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1837 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1838 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1839 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1840 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1841 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1846 static void set_rx_mode(struct net_device *dev)
1848 long ioaddr = dev->base_addr;
1850 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1851 /* Unconditionally log net taps. */
1852 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1853 writew(0x000F, ioaddr + AddrMode);
1854 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1855 /* Too many to match, or accept all multicasts. */
1856 writew(0x000B, ioaddr + AddrMode);
1857 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1858 struct dev_mc_list *mclist;
1860 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1861 i++, mclist = mclist->next) {
1862 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1863 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1864 ioaddr + 0x104 + i*8);
1866 /* Clear remaining entries. */
1868 writel(0, ioaddr + 0x104 + i*8);
1869 writew(0x0003, ioaddr + AddrMode);
1870 } else { /* Normal, unicast/broadcast-only mode. */
1871 writew(0x0001, ioaddr + AddrMode);
1875 static int check_if_running(struct net_device *dev)
1877 if (!netif_running(dev))
1882 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1884 struct hamachi_private *np = netdev_priv(dev);
1885 strcpy(info->driver, DRV_NAME);
1886 strcpy(info->version, DRV_VERSION);
1887 strcpy(info->bus_info, pci_name(np->pci_dev));
1890 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1892 struct hamachi_private *np = netdev_priv(dev);
1893 spin_lock_irq(&np->lock);
1894 mii_ethtool_gset(&np->mii_if, ecmd);
1895 spin_unlock_irq(&np->lock);
1899 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1901 struct hamachi_private *np = netdev_priv(dev);
1903 spin_lock_irq(&np->lock);
1904 res = mii_ethtool_sset(&np->mii_if, ecmd);
1905 spin_unlock_irq(&np->lock);
1909 static int hamachi_nway_reset(struct net_device *dev)
1911 struct hamachi_private *np = netdev_priv(dev);
1912 return mii_nway_restart(&np->mii_if);
1915 static u32 hamachi_get_link(struct net_device *dev)
1917 struct hamachi_private *np = netdev_priv(dev);
1918 return mii_link_ok(&np->mii_if);
1921 static struct ethtool_ops ethtool_ops = {
1922 .begin = check_if_running,
1923 .get_drvinfo = hamachi_get_drvinfo,
1924 .get_settings = hamachi_get_settings,
1925 .set_settings = hamachi_set_settings,
1926 .nway_reset = hamachi_nway_reset,
1927 .get_link = hamachi_get_link,
1930 static struct ethtool_ops ethtool_ops_no_mii = {
1931 .begin = check_if_running,
1932 .get_drvinfo = hamachi_get_drvinfo,
1935 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1937 struct hamachi_private *np = netdev_priv(dev);
1938 struct mii_ioctl_data *data = if_mii(rq);
1941 if (!netif_running(dev))
1944 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1945 u32 *d = (u32 *)&rq->ifr_ifru;
1946 /* Should add this check here or an ordinary user can do nasty
1949 * TODO: Shut down the Rx and Tx engines while doing this.
1951 if (!capable(CAP_NET_ADMIN))
1953 writel(d[0], dev->base_addr + TxIntrCtrl);
1954 writel(d[1], dev->base_addr + RxIntrCtrl);
1955 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1956 (u32) readl(dev->base_addr + TxIntrCtrl),
1957 (u32) readl(dev->base_addr + RxIntrCtrl));
1962 spin_lock_irq(&np->lock);
1963 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1964 spin_unlock_irq(&np->lock);
1971 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1973 struct net_device *dev = pci_get_drvdata(pdev);
1976 struct hamachi_private *hmp = netdev_priv(dev);
1978 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1980 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1982 unregister_netdev(dev);
1983 iounmap((char *)dev->base_addr);
1985 pci_release_regions(pdev);
1986 pci_set_drvdata(pdev, NULL);
1990 static struct pci_device_id hamachi_pci_tbl[] = {
1991 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1994 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1996 static struct pci_driver hamachi_driver = {
1998 .id_table = hamachi_pci_tbl,
1999 .probe = hamachi_init_one,
2000 .remove = __devexit_p(hamachi_remove_one),
2003 static int __init hamachi_init (void)
2005 /* when a module, this is printed whether or not devices are found in probe */
2009 return pci_register_driver(&hamachi_driver);
2012 static void __exit hamachi_exit (void)
2014 pci_unregister_driver(&hamachi_driver);
2018 module_init(hamachi_init);
2019 module_exit(hamachi_exit);