1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
24 http://www.parl.clemson.edu/~keithu/hamachi.html
28 Linux kernel changelog:
31 - fix lack of pci_dev<->dev association
32 - ethtool support (jgarzik)
36 #define DRV_NAME "hamachi"
37 #define DRV_VERSION "1.01+LK1.0.1"
38 #define DRV_RELDATE "5/18/2001"
41 /* A few user-configurable values. */
43 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
45 #define hamachi_debug debug
46 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
47 static int max_interrupt_work = 40;
49 /* Default values selected by testing on a dual processor PIII-450 */
50 /* These six interrupt control parameters may be set directly when loading the
51 * module, or through the rx_params and tx_params variables
53 static int max_rx_latency = 0x11;
54 static int max_rx_gap = 0x05;
55 static int min_rx_pkt = 0x18;
56 static int max_tx_latency = 0x00;
57 static int max_tx_gap = 0x00;
58 static int min_tx_pkt = 0x30;
60 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
61 -Setting to > 1518 causes all frames to be copied
62 -Setting to 0 disables copies
64 static int rx_copybreak;
66 /* An override for the hardware detection of bus width.
67 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
68 Add 2 to disable parity detection.
73 /* Used to pass the media type, etc.
74 These exist for driver interoperability.
75 No media types are currently defined.
76 - The lower 4 bits are reserved for the media type.
77 - The next three bits may be set to one of the following:
78 0x00000000 : Autodetect PCI bus
79 0x00000010 : Force 32 bit PCI bus
80 0x00000020 : Disable parity detection
81 0x00000040 : Force 64 bit PCI bus
83 - The next bit can be used to force half-duplex. This is a bad
84 idea since no known implementations implement half-duplex, and,
85 in general, half-duplex for gigabit ethernet is a bad idea.
86 0x00000080 : Force half-duplex
87 Default is full-duplex.
88 - In the original driver, the ninth bit could be used to force
89 full-duplex. Maintain that for compatibility
90 0x00000200 : Force full-duplex
92 #define MAX_UNITS 8 /* More are supported, limit only on options */
93 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
94 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
95 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
96 * interruput management. Parameters will be loaded as specified into
97 * the TxIntControl and RxIntControl registers.
99 * The registers are arranged as follows:
100 * 23 - 16 15 - 8 7 - 0
101 * _________________________________
102 * | min_pkt | max_gap | max_latency |
103 * ---------------------------------
104 * min_pkt : The minimum number of packets processed between
106 * max_gap : The maximum inter-packet gap in units of 8.192 us
107 * max_latency : The absolute time between interrupts in units of 8.192 us
110 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
111 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
113 /* Operational parameters that are set at compile time. */
115 /* Keep the ring sizes a power of two for compile efficiency.
116 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
117 Making the Tx ring too large decreases the effectiveness of channel
118 bonding and packet priority.
119 There are no ill effects from too-large receive rings, except for
120 excessive memory usage */
121 /* Empirically it appears that the Tx ring needs to be a little bigger
122 for these Gbit adapters or you get into an overrun condition really
123 easily. Also, things appear to work a bit better in back-to-back
124 configurations if the Rx ring is 8 times the size of the Tx ring
126 #define TX_RING_SIZE 64
127 #define RX_RING_SIZE 512
128 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
129 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
132 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
133 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
136 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
137 /* #define ADDRLEN 64 */
140 * RX_CHECKSUM turns on card-generated receive checksum generation for
141 * TCP and UDP packets. Otherwise the upper layers do the calculation.
142 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
143 * easy mechanism by which to tell the TCP/UDP stack that it need not
144 * generate checksums for this device. But if somebody can find a way
145 * to get that to work, most of the card work is in here already.
146 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
151 /* Operational parameters that usually are not changed. */
152 /* Time in jiffies before concluding the transmitter is hung. */
153 #define TX_TIMEOUT (5*HZ)
155 #include <linux/module.h>
156 #include <linux/kernel.h>
157 #include <linux/string.h>
158 #include <linux/timer.h>
159 #include <linux/time.h>
160 #include <linux/errno.h>
161 #include <linux/ioport.h>
162 #include <linux/slab.h>
163 #include <linux/interrupt.h>
164 #include <linux/pci.h>
165 #include <linux/init.h>
166 #include <linux/ethtool.h>
167 #include <linux/mii.h>
168 #include <linux/netdevice.h>
169 #include <linux/etherdevice.h>
170 #include <linux/skbuff.h>
171 #include <linux/ip.h>
172 #include <linux/delay.h>
174 #include <asm/uaccess.h>
175 #include <asm/processor.h> /* Processor type for cache alignment. */
176 #include <asm/bitops.h>
178 #include <asm/unaligned.h>
179 #include <asm/cache.h>
181 static char version[] __devinitdata =
182 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
183 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
184 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
187 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
188 we need it for hardware checksumming support. FYI... some of
189 the definitions in <netinet/ip.h> conflict/duplicate those in
190 other linux headers causing many compiler warnings.
193 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
196 /* Define IP_OFFSET to be IPOPT_OFFSET */
199 #define IP_OFFSET IPOPT_OFFSET
205 #define RUN_AT(x) (jiffies + (x))
207 /* Condensed bus+endian portability operations. */
209 #define cpu_to_leXX(addr) cpu_to_le64(addr)
211 #define cpu_to_leXX(addr) cpu_to_le32(addr)
218 I. Board Compatibility
220 This device driver is designed for the Packet Engines "Hamachi"
221 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
224 II. Board-specific settings
226 No jumpers exist on the board. The chip supports software correction of
227 various motherboard wiring errors, however this driver does not support
230 III. Driver operation
234 The Hamachi uses a typical descriptor based bus-master architecture.
235 The descriptor list is similar to that used by the Digital Tulip.
236 This driver uses two statically allocated fixed-size descriptor lists
237 formed into rings by a branch from the final descriptor to the beginning of
238 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
240 This driver uses a zero-copy receive and transmit scheme similar my other
242 The driver allocates full frame size skbuffs for the Rx ring buffers at
243 open() time and passes the skb->data field to the Hamachi as receive data
244 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
245 a fresh skbuff is allocated and the frame is copied to the new skbuff.
246 When the incoming frame is larger, the skbuff is passed directly up the
247 protocol stack and replaced by a newly allocated skbuff.
249 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
250 using a full-sized skbuff for small frames vs. the copying costs of larger
251 frames. Gigabit cards are typically used on generously configured machines
252 and the underfilled buffers have negligible impact compared to the benefit of
253 a single allocation size, so the default value of zero results in never
256 IIIb/c. Transmit/Receive Structure
258 The Rx and Tx descriptor structure are straight-forward, with no historical
259 baggage that must be explained. Unlike the awkward DBDMA structure, there
260 are no unused fields or option bits that had only one allowable setting.
262 Two details should be noted about the descriptors: The chip supports both 32
263 bit and 64 bit address structures, and the length field is overwritten on
264 the receive descriptors. The descriptor length is set in the control word
265 for each channel. The development driver uses 32 bit addresses only, however
266 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
268 IIId. Synchronization
270 This driver is very similar to my other network drivers.
271 The driver runs as two independent, single-threaded flows of control. One
272 is the send-packet routine, which enforces single-threaded use by the
273 dev->tbusy flag. The other thread is the interrupt handler, which is single
274 threaded by the hardware and other software.
276 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
277 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
278 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
279 the 'hmp->tx_full' flag.
281 The interrupt handler has exclusive control over the Rx ring and records stats
282 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
283 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
284 clears both the tx_full and tbusy flags.
288 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
292 Hamachi Engineering Design Specification, 5/15/97
293 (Note: This version was marked "Confidential".)
301 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
302 to help avoid some stall conditions -- this needs further research.
304 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
305 the Tx ring and is called from hamachi_start_xmit (this used to be
306 called from hamachi_interrupt but it tends to delay execution of the
307 interrupt handler and thus reduce bandwidth by reducing the latency
308 between hamachi_rx()'s). Notably, some modification has been made so
309 that the cleaning loop checks only to make sure that the DescOwn bit
310 isn't set in the status flag since the card is not required
311 to set the entire flag to zero after processing.
313 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
314 checked before attempting to add a buffer to the ring. If the ring is full
315 an attempt is made to free any dirty buffers and thus find space for
316 the new buffer or the function returns non-zero which should case the
317 scheduler to reschedule the buffer later.
319 01/15/1999 EPK Some adjustments were made to the chip initialization.
320 End-to-end flow control should now be fully active and the interrupt
321 algorithm vars have been changed. These could probably use further tuning.
323 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
324 set the rx and tx latencies for the Hamachi interrupts. If you're having
325 problems with network stalls, try setting these to higher values.
326 Valid values are 0x00 through 0xff.
328 01/15/1999 EPK In general, the overall bandwidth has increased and
329 latencies are better (sometimes by a factor of 2). Stalls are rare at
330 this point, however there still appears to be a bug somewhere between the
331 hardware and driver. TCP checksum errors under load also appear to be
332 eliminated at this point.
334 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
335 Rx and Tx rings. This appears to have been affecting whether a particular
336 peer-to-peer connection would hang under high load. I believe the Rx
337 rings was typically getting set correctly, but the Tx ring wasn't getting
338 the DescEndRing bit set during initialization. ??? Does this mean the
339 hamachi card is using the DescEndRing in processing even if a particular
340 slot isn't in use -- hypothetically, the card might be searching the
341 entire Tx ring for slots with the DescOwn bit set and then processing
342 them. If the DescEndRing bit isn't set, then it might just wander off
343 through memory until it hits a chunk of data with that bit set
344 and then looping back.
346 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
347 problem (TxCmd and RxCmd need only to be set when idle or stopped.
349 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
350 (Michel Mueller pointed out the ``permanently busy'' potential
353 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
355 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
356 incorrectly defined and corrected (as per Michel Mueller).
358 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
359 were available before reseting the tbusy and tx_full flags
360 (as per Michel Mueller).
362 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
364 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
367 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
368 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
369 re-structuring I would like to do.
371 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
372 parameters on a dual P3-450 setup yielded the new default interrupt
373 mitigation parameters. Tx should interrupt VERY infrequently due to
374 Eric's scheme. Rx should be more often...
376 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
377 nicely with non-linux machines.
379 03/13/2000 KDU Experimented with some of the configuration values:
381 -It seems that enabling PCI performance commands for descriptors
382 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
383 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
384 leave them that way until I hear further feedback.
386 -Increasing the PCI_LATENCY_TIMER to 130
387 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
388 degrade performance. Leaving default at 64 pending further information.
390 03/14/2000 KDU Further tuning:
392 -adjusted boguscnt in hamachi_rx() to depend on interrupt
393 mitigation parameters chosen.
395 -Selected a set of interrupt parameters based on some extensive testing.
396 These may change with more testing.
400 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
401 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
404 -fix the reset procedure. It doesn't quite work.
407 /* A few values that may be tweaked. */
408 /* Size of each temporary Rx buffer, calculated as:
409 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
410 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
411 * 2 more because we use skb_reserve.
413 #define PKT_BUF_SZ 1538
415 /* For now, this is going to be set to the maximum size of an ethernet
416 * packet. Eventually, we may want to make it a variable that is
419 #define MAX_FRAME_SIZE 1518
421 /* The rest of these values should never change. */
423 static void hamachi_timer(unsigned long data);
425 enum capability_flags {CanHaveMII=1, };
426 static struct chip_info {
427 u16 vendor_id, device_id, device_id_mask, pad;
429 void (*media_timer)(unsigned long data);
432 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
436 /* Offsets to the Hamachi registers. Various sizes. */
437 enum hamachi_offsets {
438 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
439 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
440 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
441 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
442 TxChecksum=0x074, RxChecksum=0x076,
443 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
444 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
446 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
447 /* See enum MII_offsets below. */
448 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
449 AddrMode=0x0D0, StationAddr=0x0D2,
450 /* Gigabit AutoNegotiation. */
451 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
452 ANLinkPartnerAbility=0x0EA,
453 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
457 /* Offsets to the MII-mode registers. */
459 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
463 /* Bits in the interrupt status/mask registers. */
464 enum intr_status_bits {
465 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
466 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
467 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
469 /* The Hamachi Rx and Tx buffer descriptors. */
470 struct hamachi_desc {
480 /* Bits in hamachi_desc.status_n_length */
481 enum desc_status_bits {
482 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
486 #define PRIV_ALIGN 15 /* Required alignment mask */
488 struct hamachi_private {
489 /* Descriptor rings first for alignment. Tx requires a second descriptor
491 struct hamachi_desc *rx_ring;
492 struct hamachi_desc *tx_ring;
493 struct sk_buff* rx_skbuff[RX_RING_SIZE];
494 struct sk_buff* tx_skbuff[TX_RING_SIZE];
495 dma_addr_t tx_ring_dma;
496 dma_addr_t rx_ring_dma;
497 struct net_device_stats stats;
498 struct timer_list timer; /* Media selection timer. */
499 /* Frequently used and paired value: keep adjacent for cache effect. */
502 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
503 unsigned int cur_tx, dirty_tx;
504 unsigned int rx_buf_sz; /* Based on MTU+slack. */
505 unsigned int tx_full:1; /* The Tx queue is full. */
506 unsigned int duplex_lock:1;
507 unsigned int default_port:4; /* Last dev->if_port value. */
508 /* MII transceiver section. */
509 int mii_cnt; /* MII device addresses. */
510 struct mii_if_info mii_if; /* MII lib hooks/info */
511 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
512 u32 rx_int_var, tx_int_var; /* interrupt control variables */
513 u32 option; /* Hold on to a copy of the options */
514 struct pci_dev *pci_dev;
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
521 MODULE_PARM(max_interrupt_work, "i");
522 MODULE_PARM(mtu, "i");
523 MODULE_PARM(debug, "i");
524 MODULE_PARM(min_rx_pkt, "i");
525 MODULE_PARM(max_rx_gap, "i");
526 MODULE_PARM(max_rx_latency, "i");
527 MODULE_PARM(min_tx_pkt, "i");
528 MODULE_PARM(max_tx_gap, "i");
529 MODULE_PARM(max_tx_latency, "i");
530 MODULE_PARM(rx_copybreak, "i");
531 MODULE_PARM(rx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
532 MODULE_PARM(tx_params, "1-" __MODULE_STRING(MAX_UNITS) "i");
533 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
534 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
535 MODULE_PARM(force32, "i");
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
552 static int read_eeprom(long ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
561 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
562 static inline int hamachi_rx(struct net_device *dev);
563 static inline int hamachi_tx(struct net_device *dev);
564 static void hamachi_error(struct net_device *dev, int intr_status);
565 static int hamachi_close(struct net_device *dev);
566 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
567 static void set_rx_mode(struct net_device *dev);
570 static int __devinit hamachi_init_one (struct pci_dev *pdev,
571 const struct pci_device_id *ent)
573 struct hamachi_private *hmp;
574 int option, i, rx_int_var, tx_int_var, boguscnt;
575 int chip_id = ent->driver_data;
579 struct net_device *dev;
584 /* when built into the kernel, we only print version if device is found */
586 static int printed_version;
587 if (!printed_version++)
591 if (pci_enable_device(pdev)) {
596 ioaddr = pci_resource_start(pdev, 0);
597 #ifdef __alpha__ /* Really "64 bit addrs" */
598 ioaddr |= (pci_resource_start(pdev, 1) << 32);
601 pci_set_master(pdev);
603 i = pci_request_regions(pdev, DRV_NAME);
607 ioaddr = (long) ioremap(ioaddr, 0x400);
609 goto err_out_release;
611 dev = alloc_etherdev(sizeof(struct hamachi_private));
613 goto err_out_iounmap;
615 SET_MODULE_OWNER(dev);
616 SET_NETDEV_DEV(dev, &pdev->dev);
619 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
620 dev->hard_header_len += 8; /* for cksum tag */
623 for (i = 0; i < 6; i++)
624 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
625 : readb(ioaddr + StationAddr + i);
627 #if ! defined(final_version)
628 if (hamachi_debug > 4)
629 for (i = 0; i < 0x10; i++)
631 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
635 spin_lock_init(&hmp->lock);
637 hmp->mii_if.dev = dev;
638 hmp->mii_if.mdio_read = mdio_read;
639 hmp->mii_if.mdio_write = mdio_write;
640 hmp->mii_if.phy_id_mask = 0x1f;
641 hmp->mii_if.reg_num_mask = 0x1f;
643 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
645 goto err_out_cleardev;
646 hmp->tx_ring = (struct hamachi_desc *)ring_space;
647 hmp->tx_ring_dma = ring_dma;
649 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
651 goto err_out_unmap_tx;
652 hmp->rx_ring = (struct hamachi_desc *)ring_space;
653 hmp->rx_ring_dma = ring_dma;
655 /* Check for options being passed in */
656 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
658 option = dev->mem_start;
660 /* If the bus size is misidentified, do the following. */
661 force32 = force32 ? force32 :
662 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
664 writeb(force32, ioaddr + VirtualJumpers);
666 /* Hmmm, do we really need to reset the chip???. */
667 writeb(0x01, ioaddr + ChipReset);
669 /* After a reset, the clock speed measurement of the PCI bus will not
670 * be valid for a moment. Wait for a little while until it is. If
671 * it takes more than 10ms, forget it.
674 i = readb(ioaddr + PCIClkMeas);
675 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
677 i = readb(ioaddr + PCIClkMeas);
680 dev->base_addr = ioaddr;
682 pci_set_drvdata(pdev, dev);
684 hmp->chip_id = chip_id;
687 /* The lower four bits are the media type. */
689 hmp->option = option;
691 hmp->mii_if.full_duplex = 1;
692 else if (option & 0x080)
693 hmp->mii_if.full_duplex = 0;
694 hmp->default_port = option & 15;
695 if (hmp->default_port)
696 hmp->mii_if.force_media = 1;
698 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
699 hmp->mii_if.full_duplex = 1;
701 /* lock the duplex mode if someone specified a value */
702 if (hmp->mii_if.full_duplex || (option & 0x080))
703 hmp->duplex_lock = 1;
705 /* Set interrupt tuning parameters */
706 max_rx_latency = max_rx_latency & 0x00ff;
707 max_rx_gap = max_rx_gap & 0x00ff;
708 min_rx_pkt = min_rx_pkt & 0x00ff;
709 max_tx_latency = max_tx_latency & 0x00ff;
710 max_tx_gap = max_tx_gap & 0x00ff;
711 min_tx_pkt = min_tx_pkt & 0x00ff;
713 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
714 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
715 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
716 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
717 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
718 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
721 /* The Hamachi-specific entries in the device structure. */
722 dev->open = &hamachi_open;
723 dev->hard_start_xmit = &hamachi_start_xmit;
724 dev->stop = &hamachi_close;
725 dev->get_stats = &hamachi_get_stats;
726 dev->set_multicast_list = &set_rx_mode;
727 dev->do_ioctl = &netdev_ioctl;
728 dev->tx_timeout = &hamachi_tx_timeout;
729 dev->watchdog_timeo = TX_TIMEOUT;
733 i = register_netdev(dev);
736 goto err_out_unmap_rx;
739 printk(KERN_INFO "%s: %s type %x at 0x%lx, ",
740 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
742 for (i = 0; i < 5; i++)
743 printk("%2.2x:", dev->dev_addr[i]);
744 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
745 i = readb(ioaddr + PCIClkMeas);
746 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
747 "%2.2x, LPA %4.4x.\n",
748 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
749 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
750 readw(ioaddr + ANLinkPartnerAbility));
752 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
753 int phy, phy_idx = 0;
754 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
755 int mii_status = mdio_read(dev, phy, MII_BMSR);
756 if (mii_status != 0xffff &&
757 mii_status != 0x0000) {
758 hmp->phys[phy_idx++] = phy;
759 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
760 printk(KERN_INFO "%s: MII PHY found at address %d, status "
761 "0x%4.4x advertising %4.4x.\n",
762 dev->name, phy, mii_status, hmp->mii_if.advertising);
765 hmp->mii_cnt = phy_idx;
766 if (hmp->mii_cnt > 0)
767 hmp->mii_if.phy_id = hmp->phys[0];
769 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
771 /* Configure gigabit autonegotiation. */
772 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
773 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
774 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
780 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
783 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
788 iounmap((char *)ioaddr);
790 pci_release_regions(pdev);
795 static int __devinit read_eeprom(long ioaddr, int location)
797 int bogus_cnt = 1000;
799 /* We should check busy first - per docs -KDU */
800 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
801 writew(location, ioaddr + EEAddr);
802 writeb(0x02, ioaddr + EECmdStatus);
804 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
805 if (hamachi_debug > 5)
806 printk(" EEPROM status is %2.2x after %d ticks.\n",
807 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
808 return readb(ioaddr + EEData);
811 /* MII Managemen Data I/O accesses.
812 These routines assume the MDIO controller is idle, and do not exit until
813 the command is finished. */
815 static int mdio_read(struct net_device *dev, int phy_id, int location)
817 long ioaddr = dev->base_addr;
820 /* We should check busy first - per docs -KDU */
821 for (i = 10000; i >= 0; i--)
822 if ((readw(ioaddr + MII_Status) & 1) == 0)
824 writew((phy_id<<8) + location, ioaddr + MII_Addr);
825 writew(0x0001, ioaddr + MII_Cmd);
826 for (i = 10000; i >= 0; i--)
827 if ((readw(ioaddr + MII_Status) & 1) == 0)
829 return readw(ioaddr + MII_Rd_Data);
832 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
834 long ioaddr = dev->base_addr;
837 /* We should check busy first - per docs -KDU */
838 for (i = 10000; i >= 0; i--)
839 if ((readw(ioaddr + MII_Status) & 1) == 0)
841 writew((phy_id<<8) + location, ioaddr + MII_Addr);
842 writew(value, ioaddr + MII_Wr_Data);
844 /* Wait for the command to finish. */
845 for (i = 10000; i >= 0; i--)
846 if ((readw(ioaddr + MII_Status) & 1) == 0)
852 static int hamachi_open(struct net_device *dev)
854 struct hamachi_private *hmp = dev->priv;
855 long ioaddr = dev->base_addr;
857 u32 rx_int_var, tx_int_var;
860 i = request_irq(dev->irq, &hamachi_interrupt, SA_SHIRQ, dev->name, dev);
864 if (hamachi_debug > 1)
865 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
866 dev->name, dev->irq);
868 hamachi_init_ring(dev);
871 /* writellll anyone ? */
872 writel(cpu_to_le64(hmp->rx_ring_dma), ioaddr + RxPtr);
873 writel(cpu_to_le64(hmp->rx_ring_dma) >> 32, ioaddr + RxPtr + 4);
874 writel(cpu_to_le64(hmp->tx_ring_dma), ioaddr + TxPtr);
875 writel(cpu_to_le64(hmp->tx_ring_dma) >> 32, ioaddr + TxPtr + 4);
877 writel(cpu_to_le32(hmp->rx_ring_dma), ioaddr + RxPtr);
878 writel(cpu_to_le32(hmp->tx_ring_dma), ioaddr + TxPtr);
881 /* TODO: It would make sense to organize this as words since the card
882 * documentation does. -KDU
884 for (i = 0; i < 6; i++)
885 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
887 /* Initialize other registers: with so many this eventually this will
888 converted to an offset/value list. */
890 /* Configure the FIFO */
891 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
895 writew(0x0000, ioaddr + FIFOcfg);
898 /* Configure the FIFO for 512K external, 16K used for Tx. */
899 writew(0x0028, ioaddr + FIFOcfg);
902 /* Configure the FIFO for 1024 external, 32K used for Tx. */
903 writew(0x004C, ioaddr + FIFOcfg);
906 /* Configure the FIFO for 2048 external, 32K used for Tx. */
907 writew(0x006C, ioaddr + FIFOcfg);
910 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
912 /* Default to no FIFO */
913 writew(0x0000, ioaddr + FIFOcfg);
917 if (dev->if_port == 0)
918 dev->if_port = hmp->default_port;
921 /* Setting the Rx mode will start the Rx process. */
922 /* If someone didn't choose a duplex, default to full-duplex */
923 if (hmp->duplex_lock != 1)
924 hmp->mii_if.full_duplex = 1;
926 /* always 1, takes no more time to do it */
927 writew(0x0001, ioaddr + RxChecksum);
929 writew(0x0001, ioaddr + TxChecksum);
931 writew(0x0000, ioaddr + TxChecksum);
933 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
934 writew(0x215F, ioaddr + MACCnfg);
935 writew(0x000C, ioaddr + FrameGap0);
936 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
937 writew(0x1018, ioaddr + FrameGap1);
938 /* Why do we enable receives/transmits here? -KDU */
939 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
940 /* Enable automatic generation of flow control frames, period 0xffff. */
941 writel(0x0030FFFF, ioaddr + FlowCtrl);
942 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
944 /* Enable legacy links. */
945 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
946 /* Initial Link LED to blinking red. */
947 writeb(0x03, ioaddr + LEDCtrl);
949 /* Configure interrupt mitigation. This has a great effect on
950 performance, so systems tuning should start here!. */
952 rx_int_var = hmp->rx_int_var;
953 tx_int_var = hmp->tx_int_var;
955 if (hamachi_debug > 1) {
956 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
957 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
958 (tx_int_var & 0x00ff0000) >> 16);
959 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
960 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
961 (rx_int_var & 0x00ff0000) >> 16);
962 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
965 writel(tx_int_var, ioaddr + TxIntrCtrl);
966 writel(rx_int_var, ioaddr + RxIntrCtrl);
970 netif_start_queue(dev);
972 /* Enable interrupts by setting the interrupt mask. */
973 writel(0x80878787, ioaddr + InterruptEnable);
974 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
976 /* Configure and start the DMA channels. */
977 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
979 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
980 writew(0x005D, ioaddr + TxDMACtrl);
982 writew(0x001D, ioaddr + RxDMACtrl);
983 writew(0x001D, ioaddr + TxDMACtrl);
985 writew(0x0001, dev->base_addr + RxCmd);
987 if (hamachi_debug > 2) {
988 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
989 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
991 /* Set the timer to check for link beat. */
992 init_timer(&hmp->timer);
993 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
994 hmp->timer.data = (unsigned long)dev;
995 hmp->timer.function = &hamachi_timer; /* timer handler */
996 add_timer(&hmp->timer);
1001 static inline int hamachi_tx(struct net_device *dev)
1003 struct hamachi_private *hmp = dev->priv;
1005 /* Update the dirty pointer until we find an entry that is
1006 still owned by the card */
1007 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1008 int entry = hmp->dirty_tx % TX_RING_SIZE;
1009 struct sk_buff *skb;
1011 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1013 /* Free the original skb. */
1014 skb = hmp->tx_skbuff[entry];
1016 pci_unmap_single(hmp->pci_dev,
1017 hmp->tx_ring[entry].addr, skb->len,
1020 hmp->tx_skbuff[entry] = 0;
1022 hmp->tx_ring[entry].status_n_length = 0;
1023 if (entry >= TX_RING_SIZE-1)
1024 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1025 cpu_to_le32(DescEndRing);
1026 hmp->stats.tx_packets++;
1032 static void hamachi_timer(unsigned long data)
1034 struct net_device *dev = (struct net_device *)data;
1035 struct hamachi_private *hmp = dev->priv;
1036 long ioaddr = dev->base_addr;
1037 int next_tick = 10*HZ;
1039 if (hamachi_debug > 2) {
1040 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1041 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1042 readw(ioaddr + ANLinkPartnerAbility));
1043 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1044 "%4.4x %4.4x %4.4x.\n", dev->name,
1045 readw(ioaddr + 0x0e0),
1046 readw(ioaddr + 0x0e2),
1047 readw(ioaddr + 0x0e4),
1048 readw(ioaddr + 0x0e6),
1049 readw(ioaddr + 0x0e8),
1050 readw(ioaddr + 0x0eA));
1052 /* We could do something here... nah. */
1053 hmp->timer.expires = RUN_AT(next_tick);
1054 add_timer(&hmp->timer);
1057 static void hamachi_tx_timeout(struct net_device *dev)
1060 struct hamachi_private *hmp = dev->priv;
1061 long ioaddr = dev->base_addr;
1063 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1064 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1068 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1069 for (i = 0; i < RX_RING_SIZE; i++)
1070 printk(" %8.8x", (unsigned int)hmp->rx_ring[i].status_n_length);
1071 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1072 for (i = 0; i < TX_RING_SIZE; i++)
1073 printk(" %4.4x", hmp->tx_ring[i].status_n_length);
1077 /* Reinit the hardware and make sure the Rx and Tx processes
1081 /* The right way to do Reset. -KDU
1082 * -Clear OWN bit in all Rx/Tx descriptors
1083 * -Wait 50 uS for channels to go idle
1084 * -Turn off MAC receiver
1088 for (i = 0; i < RX_RING_SIZE; i++)
1089 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1091 /* Presume that all packets in the Tx queue are gone if we have to
1092 * re-init the hardware.
1094 for (i = 0; i < TX_RING_SIZE; i++){
1095 struct sk_buff *skb;
1097 if (i >= TX_RING_SIZE - 1)
1098 hmp->tx_ring[i].status_n_length = cpu_to_le32(
1100 (hmp->tx_ring[i].status_n_length & 0x0000FFFF));
1102 hmp->tx_ring[i].status_n_length &= 0x0000ffff;
1103 skb = hmp->tx_skbuff[i];
1105 pci_unmap_single(hmp->pci_dev, hmp->tx_ring[i].addr,
1106 skb->len, PCI_DMA_TODEVICE);
1108 hmp->tx_skbuff[i] = 0;
1112 udelay(60); /* Sleep 60 us just for safety sake */
1113 writew(0x0002, dev->base_addr + RxCmd); /* STOP Rx */
1115 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1118 hmp->cur_rx = hmp->cur_tx = 0;
1119 hmp->dirty_rx = hmp->dirty_tx = 0;
1120 /* Rx packets are also presumed lost; however, we need to make sure a
1121 * ring of buffers is in tact. -KDU
1123 for (i = 0; i < RX_RING_SIZE; i++){
1124 struct sk_buff *skb = hmp->rx_skbuff[i];
1127 pci_unmap_single(hmp->pci_dev, hmp->rx_ring[i].addr,
1128 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1130 hmp->rx_skbuff[i] = 0;
1133 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1134 for (i = 0; i < RX_RING_SIZE; i++) {
1135 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1136 hmp->rx_skbuff[i] = skb;
1139 skb->dev = dev; /* Mark as being used by this device. */
1140 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1141 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1142 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1143 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1144 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1146 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1147 /* Mark the last entry as wrapping the ring. */
1148 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1150 /* Trigger an immediate transmit demand. */
1151 dev->trans_start = jiffies;
1152 hmp->stats.tx_errors++;
1154 /* Restart the chip's Tx/Rx processes . */
1155 writew(0x0002, dev->base_addr + TxCmd); /* STOP Tx */
1156 writew(0x0001, dev->base_addr + TxCmd); /* START Tx */
1157 writew(0x0001, dev->base_addr + RxCmd); /* START Rx */
1159 netif_wake_queue(dev);
1163 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1164 static void hamachi_init_ring(struct net_device *dev)
1166 struct hamachi_private *hmp = dev->priv;
1170 hmp->cur_rx = hmp->cur_tx = 0;
1171 hmp->dirty_rx = hmp->dirty_tx = 0;
1174 /* This is wrong. I'm not sure what the original plan was, but this
1175 * is wrong. An MTU of 1 gets you a buffer of 1536, while an MTU
1176 * of 1501 gets a buffer of 1533? -KDU
1178 hmp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1180 /* My attempt at a reasonable correction */
1181 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1182 * card needs room to do 8 byte alignment, +2 so we can reserve
1183 * the first 2 bytes, and +16 gets room for the status word from the
1186 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1187 (((dev->mtu+26+7) & ~7) + 2 + 16));
1189 /* Initialize all Rx descriptors. */
1190 for (i = 0; i < RX_RING_SIZE; i++) {
1191 hmp->rx_ring[i].status_n_length = 0;
1192 hmp->rx_skbuff[i] = 0;
1194 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1195 for (i = 0; i < RX_RING_SIZE; i++) {
1196 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1197 hmp->rx_skbuff[i] = skb;
1200 skb->dev = dev; /* Mark as being used by this device. */
1201 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1202 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1203 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1204 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1205 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1206 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1208 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1209 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1211 for (i = 0; i < TX_RING_SIZE; i++) {
1212 hmp->tx_skbuff[i] = 0;
1213 hmp->tx_ring[i].status_n_length = 0;
1215 /* Mark the last entry of the ring */
1216 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1223 #define csum_add(it, val) \
1225 it += (u16) (val); \
1226 if (it & 0xffff0000) { \
1231 /* printk("add %04x --> %04x\n", val, it); \ */
1233 /* uh->len already network format, do not swap */
1234 #define pseudo_csum_udp(sum,ih,uh) do { \
1236 csum_add(sum, (ih)->saddr >> 16); \
1237 csum_add(sum, (ih)->saddr & 0xffff); \
1238 csum_add(sum, (ih)->daddr >> 16); \
1239 csum_add(sum, (ih)->daddr & 0xffff); \
1240 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1241 csum_add(sum, (uh)->len); \
1245 #define pseudo_csum_tcp(sum,ih,len) do { \
1247 csum_add(sum, (ih)->saddr >> 16); \
1248 csum_add(sum, (ih)->saddr & 0xffff); \
1249 csum_add(sum, (ih)->daddr >> 16); \
1250 csum_add(sum, (ih)->daddr & 0xffff); \
1251 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1252 csum_add(sum, htons(len)); \
1256 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1258 struct hamachi_private *hmp = dev->priv;
1262 /* Ok, now make sure that the queue has space before trying to
1263 add another skbuff. if we return non-zero the scheduler
1264 should interpret this as a queue full and requeue the buffer
1268 /* We should NEVER reach this point -KDU */
1269 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1271 /* Wake the potentially-idle transmit channel. */
1272 /* If we don't need to read status, DON'T -KDU */
1273 status=readw(dev->base_addr + TxStatus);
1274 if( !(status & 0x0001) || (status & 0x0002))
1275 writew(0x0001, dev->base_addr + TxCmd);
1279 /* Caution: the write order is important here, set the field
1280 with the "ownership" bits last. */
1282 /* Calculate the next Tx descriptor entry. */
1283 entry = hmp->cur_tx % TX_RING_SIZE;
1285 hmp->tx_skbuff[entry] = skb;
1289 /* tack on checksum tag */
1291 struct ethhdr *eh = (struct ethhdr *)skb->data;
1292 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1293 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1294 if (ih->protocol == IPPROTO_UDP) {
1296 = (struct udphdr *)((char *)ih + ih->ihl*4);
1297 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1299 pseudo_csum_udp(pseudo, ih, uh);
1300 pseudo = htons(pseudo);
1301 printk("udp cksum was %04x, sending pseudo %04x\n",
1303 uh->check = 0; /* zero out uh->check before card calc */
1305 * start at 14 (skip ethhdr), store at offset (uh->check),
1306 * use pseudo value given.
1308 tagval = (14 << 24) | (offset << 16) | pseudo;
1309 } else if (ih->protocol == IPPROTO_TCP) {
1310 printk("tcp, no auto cksum\n");
1313 *(u32 *)skb_push(skb, 8) = tagval;
1317 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1318 skb->data, skb->len, PCI_DMA_TODEVICE));
1320 /* Hmmmm, could probably put a DescIntr on these, but the way
1321 the driver is currently coded makes Tx interrupts unnecessary
1322 since the clearing of the Tx ring is handled by the start_xmit
1323 routine. This organization helps mitigate the interrupts a
1324 bit and probably renders the max_tx_latency param useless.
1326 Update: Putting a DescIntr bit on all of the descriptors and
1327 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1329 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1330 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1331 DescEndPacket | DescEndRing | DescIntr | skb->len);
1333 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1334 DescEndPacket | DescIntr | skb->len);
1337 /* Non-x86 Todo: explicitly flush cache lines here. */
1339 /* Wake the potentially-idle transmit channel. */
1340 /* If we don't need to read status, DON'T -KDU */
1341 status=readw(dev->base_addr + TxStatus);
1342 if( !(status & 0x0001) || (status & 0x0002))
1343 writew(0x0001, dev->base_addr + TxCmd);
1345 /* Immediately before returning, let's clear as many entries as we can. */
1348 /* We should kick the bottom half here, since we are not accepting
1349 * interrupts with every packet. i.e. realize that Gigabit ethernet
1350 * can transmit faster than ordinary machines can load packets;
1351 * hence, any packet that got put off because we were in the transmit
1352 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1354 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1355 netif_wake_queue(dev); /* Typical path */
1358 netif_stop_queue(dev);
1360 dev->trans_start = jiffies;
1362 if (hamachi_debug > 4) {
1363 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1364 dev->name, hmp->cur_tx, entry);
1369 /* The interrupt handler does all of the Rx thread work and cleans up
1370 after the Tx thread. */
1371 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance, struct pt_regs *rgs)
1373 struct net_device *dev = dev_instance;
1374 struct hamachi_private *hmp;
1375 long ioaddr, boguscnt = max_interrupt_work;
1378 #ifndef final_version /* Can never occur. */
1380 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1385 ioaddr = dev->base_addr;
1387 spin_lock(&hmp->lock);
1390 u32 intr_status = readl(ioaddr + InterruptClear);
1392 if (hamachi_debug > 4)
1393 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1394 dev->name, intr_status);
1396 if (intr_status == 0)
1401 if (intr_status & IntrRxDone)
1404 if (intr_status & IntrTxDone){
1405 /* This code should RARELY need to execute. After all, this is
1406 * a gigabit link, it should consume packets as fast as we put
1407 * them in AND we clear the Tx ring in hamachi_start_xmit().
1410 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1411 int entry = hmp->dirty_tx % TX_RING_SIZE;
1412 struct sk_buff *skb;
1414 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1416 skb = hmp->tx_skbuff[entry];
1417 /* Free the original skb. */
1419 pci_unmap_single(hmp->pci_dev,
1420 hmp->tx_ring[entry].addr,
1423 dev_kfree_skb_irq(skb);
1424 hmp->tx_skbuff[entry] = 0;
1426 hmp->tx_ring[entry].status_n_length = 0;
1427 if (entry >= TX_RING_SIZE-1)
1428 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1429 cpu_to_le32(DescEndRing);
1430 hmp->stats.tx_packets++;
1432 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1433 /* The ring is no longer full */
1435 netif_wake_queue(dev);
1438 netif_wake_queue(dev);
1443 /* Abnormal error summary/uncommon events handlers. */
1445 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1446 LinkChange | NegotiationChange | StatsMax))
1447 hamachi_error(dev, intr_status);
1449 if (--boguscnt < 0) {
1450 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1451 dev->name, intr_status);
1456 if (hamachi_debug > 3)
1457 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1458 dev->name, readl(ioaddr + IntrStatus));
1460 #ifndef final_version
1461 /* Code that should never be run! Perhaps remove after testing.. */
1463 static int stopit = 10;
1464 if (dev->start == 0 && --stopit < 0) {
1465 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1472 spin_unlock(&hmp->lock);
1473 return IRQ_RETVAL(handled);
1476 /* This routine is logically part of the interrupt handler, but separated
1477 for clarity and better register allocation. */
1478 static int hamachi_rx(struct net_device *dev)
1480 struct hamachi_private *hmp = dev->priv;
1481 int entry = hmp->cur_rx % RX_RING_SIZE;
1482 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1484 if (hamachi_debug > 4) {
1485 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1486 entry, hmp->rx_ring[entry].status_n_length);
1489 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1491 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1492 u32 desc_status = le32_to_cpu(desc->status_n_length);
1493 u16 data_size = desc_status; /* Implicit truncate */
1497 if (desc_status & DescOwn)
1499 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1502 PCI_DMA_FROMDEVICE);
1503 buf_addr = (u8 *) hmp->rx_skbuff[entry]->tail;
1504 frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12])));
1505 if (hamachi_debug > 4)
1506 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1510 if ( ! (desc_status & DescEndPacket)) {
1511 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1512 "multiple buffers, entry %#x length %d status %4.4x!\n",
1513 dev->name, hmp->cur_rx, data_size, desc_status);
1514 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1515 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1516 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1518 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0xffff0000,
1519 hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length & 0x0000ffff,
1520 hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length);
1521 hmp->stats.rx_length_errors++;
1522 } /* else Omit for prototype errata??? */
1523 if (frame_status & 0x00380000) {
1524 /* There was an error. */
1525 if (hamachi_debug > 2)
1526 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1528 hmp->stats.rx_errors++;
1529 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1530 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1531 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1532 if (frame_status < 0) hmp->stats.rx_dropped++;
1534 struct sk_buff *skb;
1536 u16 pkt_len = (frame_status & 0x07ff) - 4;
1538 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1542 #ifndef final_version
1543 if (hamachi_debug > 4)
1544 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1545 " of %d, bogus_cnt %d.\n",
1546 pkt_len, data_size, boguscnt);
1547 if (hamachi_debug > 5)
1548 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1550 *(s32*)&(buf_addr[data_size - 20]),
1551 *(s32*)&(buf_addr[data_size - 16]),
1552 *(s32*)&(buf_addr[data_size - 12]),
1553 *(s32*)&(buf_addr[data_size - 8]),
1554 *(s32*)&(buf_addr[data_size - 4]));
1556 /* Check if the packet is long enough to accept without copying
1557 to a minimally-sized skbuff. */
1558 if (pkt_len < rx_copybreak
1559 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1561 printk(KERN_ERR "%s: rx_copybreak non-zero "
1562 "not good with RX_CHECKSUM\n", dev->name);
1565 skb_reserve(skb, 2); /* 16 byte align the IP header */
1566 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1567 hmp->rx_ring[entry].addr,
1569 PCI_DMA_FROMDEVICE);
1570 /* Call copy + cksum if available. */
1571 #if 1 || USE_IP_COPYSUM
1572 eth_copy_and_sum(skb,
1573 hmp->rx_skbuff[entry]->data, pkt_len, 0);
1574 skb_put(skb, pkt_len);
1576 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1577 + entry*sizeof(*desc), pkt_len);
1579 pci_dma_sync_single_for_device(hmp->pci_dev,
1580 hmp->rx_ring[entry].addr,
1582 PCI_DMA_FROMDEVICE);
1584 pci_unmap_single(hmp->pci_dev,
1585 hmp->rx_ring[entry].addr,
1586 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1587 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1588 hmp->rx_skbuff[entry] = NULL;
1590 skb->protocol = eth_type_trans(skb, dev);
1594 /* TCP or UDP on ipv4, DIX encoding */
1595 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1596 struct iphdr *ih = (struct iphdr *) skb->data;
1597 /* Check that IP packet is at least 46 bytes, otherwise,
1598 * there may be pad bytes included in the hardware checksum.
1599 * This wouldn't happen if everyone padded with 0.
1601 if (ntohs(ih->tot_len) >= 46){
1602 /* don't worry about frags */
1603 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1604 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1605 u32 *p = (u32 *) &buf_addr[data_size - 20];
1606 register u32 crc, p_r, p_r1;
1616 crc = (p_r & 0xffff) + (p_r >> 16);
1619 crc = (p_r >> 16) + (p_r & 0xffff)
1620 + (p_r1 >> 16 & 0xff00);
1623 crc = p_r + (p_r1 >> 16);
1626 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1628 default: /*NOTREACHED*/ crc = 0;
1630 if (crc & 0xffff0000) {
1634 /* tcp/udp will add in pseudo */
1635 skb->csum = ntohs(pfck & 0xffff);
1636 if (skb->csum > crc)
1639 skb->csum += (~crc & 0xffff);
1641 * could do the pseudo myself and return
1642 * CHECKSUM_UNNECESSARY
1644 skb->ip_summed = CHECKSUM_HW;
1648 #endif /* RX_CHECKSUM */
1651 dev->last_rx = jiffies;
1652 hmp->stats.rx_packets++;
1654 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1657 /* Refill the Rx ring buffers. */
1658 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1659 struct hamachi_desc *desc;
1661 entry = hmp->dirty_rx % RX_RING_SIZE;
1662 desc = &(hmp->rx_ring[entry]);
1663 if (hmp->rx_skbuff[entry] == NULL) {
1664 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1666 hmp->rx_skbuff[entry] = skb;
1668 break; /* Better luck next round. */
1669 skb->dev = dev; /* Mark as being used by this device. */
1670 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1671 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1672 skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1674 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1675 if (entry >= RX_RING_SIZE-1)
1676 desc->status_n_length |= cpu_to_le32(DescOwn |
1677 DescEndPacket | DescEndRing | DescIntr);
1679 desc->status_n_length |= cpu_to_le32(DescOwn |
1680 DescEndPacket | DescIntr);
1683 /* Restart Rx engine if stopped. */
1684 /* If we don't need to check status, don't. -KDU */
1685 if (readw(dev->base_addr + RxStatus) & 0x0002)
1686 writew(0x0001, dev->base_addr + RxCmd);
1691 /* This is more properly named "uncommon interrupt events", as it covers more
1692 than just errors. */
1693 static void hamachi_error(struct net_device *dev, int intr_status)
1695 long ioaddr = dev->base_addr;
1696 struct hamachi_private *hmp = dev->priv;
1698 if (intr_status & (LinkChange|NegotiationChange)) {
1699 if (hamachi_debug > 1)
1700 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1701 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1702 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1703 readw(ioaddr + ANLinkPartnerAbility),
1704 readl(ioaddr + IntrStatus));
1705 if (readw(ioaddr + ANStatus) & 0x20)
1706 writeb(0x01, ioaddr + LEDCtrl);
1708 writeb(0x03, ioaddr + LEDCtrl);
1710 if (intr_status & StatsMax) {
1711 hamachi_get_stats(dev);
1712 /* Read the overflow bits to clear. */
1713 readl(ioaddr + 0x370);
1714 readl(ioaddr + 0x3F0);
1716 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1718 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1719 dev->name, intr_status);
1720 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1721 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1722 hmp->stats.tx_fifo_errors++;
1723 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1724 hmp->stats.rx_fifo_errors++;
1727 static int hamachi_close(struct net_device *dev)
1729 long ioaddr = dev->base_addr;
1730 struct hamachi_private *hmp = dev->priv;
1731 struct sk_buff *skb;
1734 netif_stop_queue(dev);
1736 if (hamachi_debug > 1) {
1737 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1738 dev->name, readw(ioaddr + TxStatus),
1739 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1740 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1741 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1744 /* Disable interrupts by clearing the interrupt mask. */
1745 writel(0x0000, ioaddr + InterruptEnable);
1747 /* Stop the chip's Tx and Rx processes. */
1748 writel(2, ioaddr + RxCmd);
1749 writew(2, ioaddr + TxCmd);
1752 if (hamachi_debug > 2) {
1753 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1754 (int)hmp->tx_ring_dma);
1755 for (i = 0; i < TX_RING_SIZE; i++)
1756 printk(" %c #%d desc. %8.8x %8.8x.\n",
1757 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1758 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1759 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1760 (int)hmp->rx_ring_dma);
1761 for (i = 0; i < RX_RING_SIZE; i++) {
1762 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1763 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1764 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1765 if (hamachi_debug > 6) {
1766 if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) {
1768 hmp->rx_skbuff[i]->tail;
1771 for (j = 0; j < 0x50; j++)
1772 printk(" %4.4x", addr[j]);
1778 #endif /* __i386__ debugging only */
1780 free_irq(dev->irq, dev);
1782 del_timer_sync(&hmp->timer);
1784 /* Free all the skbuffs in the Rx queue. */
1785 for (i = 0; i < RX_RING_SIZE; i++) {
1786 skb = hmp->rx_skbuff[i];
1787 hmp->rx_ring[i].status_n_length = 0;
1788 hmp->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
1790 pci_unmap_single(hmp->pci_dev,
1791 hmp->rx_ring[i].addr, hmp->rx_buf_sz,
1792 PCI_DMA_FROMDEVICE);
1794 hmp->rx_skbuff[i] = 0;
1797 for (i = 0; i < TX_RING_SIZE; i++) {
1798 skb = hmp->tx_skbuff[i];
1800 pci_unmap_single(hmp->pci_dev,
1801 hmp->tx_ring[i].addr, skb->len,
1804 hmp->tx_skbuff[i] = 0;
1808 writeb(0x00, ioaddr + LEDCtrl);
1813 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1815 long ioaddr = dev->base_addr;
1816 struct hamachi_private *hmp = dev->priv;
1818 /* We should lock this segment of code for SMP eventually, although
1819 the vulnerability window is very small and statistics are
1821 /* Ok, what goes here? This appears to be stuck at 21 packets
1822 according to ifconfig. It does get incremented in hamachi_tx(),
1823 so I think I'll comment it out here and see if better things
1826 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1828 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1829 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1830 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1832 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1833 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1834 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1835 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1836 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1841 static void set_rx_mode(struct net_device *dev)
1843 long ioaddr = dev->base_addr;
1845 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1846 /* Unconditionally log net taps. */
1847 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1848 writew(0x000F, ioaddr + AddrMode);
1849 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1850 /* Too many to match, or accept all multicasts. */
1851 writew(0x000B, ioaddr + AddrMode);
1852 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1853 struct dev_mc_list *mclist;
1855 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1856 i++, mclist = mclist->next) {
1857 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1858 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1859 ioaddr + 0x104 + i*8);
1861 /* Clear remaining entries. */
1863 writel(0, ioaddr + 0x104 + i*8);
1864 writew(0x0003, ioaddr + AddrMode);
1865 } else { /* Normal, unicast/broadcast-only mode. */
1866 writew(0x0001, ioaddr + AddrMode);
1870 static int netdev_ethtool_ioctl(struct net_device *dev, void __user *useraddr)
1872 struct hamachi_private *np = dev->priv;
1875 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
1879 case ETHTOOL_GDRVINFO: {
1880 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
1881 strcpy(info.driver, DRV_NAME);
1882 strcpy(info.version, DRV_VERSION);
1883 strcpy(info.bus_info, pci_name(np->pci_dev));
1884 if (copy_to_user(useraddr, &info, sizeof(info)))
1890 case ETHTOOL_GSET: {
1891 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1892 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1894 spin_lock_irq(&np->lock);
1895 mii_ethtool_gset(&np->mii_if, &ecmd);
1896 spin_unlock_irq(&np->lock);
1897 if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
1902 case ETHTOOL_SSET: {
1904 struct ethtool_cmd ecmd;
1905 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1907 if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
1909 spin_lock_irq(&np->lock);
1910 r = mii_ethtool_sset(&np->mii_if, &ecmd);
1911 spin_unlock_irq(&np->lock);
1914 /* restart autonegotiation */
1915 case ETHTOOL_NWAY_RST: {
1916 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1918 return mii_nway_restart(&np->mii_if);
1920 /* get link status */
1921 case ETHTOOL_GLINK: {
1922 struct ethtool_value edata = {ETHTOOL_GLINK};
1923 if (!(chip_tbl[np->chip_id].flags & CanHaveMII))
1925 edata.data = mii_link_ok(&np->mii_if);
1926 if (copy_to_user(useraddr, &edata, sizeof(edata)))
1935 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1937 struct hamachi_private *np = dev->priv;
1938 struct mii_ioctl_data *data = if_mii(rq);
1941 if (!netif_running(dev))
1944 if (cmd == SIOCETHTOOL)
1945 rc = netdev_ethtool_ioctl(dev, rq->ifr_data);
1947 else if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1948 u32 *d = (u32 *)&rq->ifr_ifru;
1949 /* Should add this check here or an ordinary user can do nasty
1952 * TODO: Shut down the Rx and Tx engines while doing this.
1954 if (!capable(CAP_NET_ADMIN))
1956 writel(d[0], dev->base_addr + TxIntrCtrl);
1957 writel(d[1], dev->base_addr + RxIntrCtrl);
1958 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1959 (u32) readl(dev->base_addr + TxIntrCtrl),
1960 (u32) readl(dev->base_addr + RxIntrCtrl));
1965 spin_lock_irq(&np->lock);
1966 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1967 spin_unlock_irq(&np->lock);
1974 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1976 struct net_device *dev = pci_get_drvdata(pdev);
1979 struct hamachi_private *hmp = dev->priv;
1981 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1983 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1985 unregister_netdev(dev);
1986 iounmap((char *)dev->base_addr);
1988 pci_release_regions(pdev);
1989 pci_set_drvdata(pdev, NULL);
1993 static struct pci_device_id hamachi_pci_tbl[] = {
1994 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1997 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1999 static struct pci_driver hamachi_driver = {
2001 .id_table = hamachi_pci_tbl,
2002 .probe = hamachi_init_one,
2003 .remove = __devexit_p(hamachi_remove_one),
2006 static int __init hamachi_init (void)
2008 /* when a module, this is printed whether or not devices are found in probe */
2012 if (pci_register_driver(&hamachi_driver) > 0)
2014 pci_unregister_driver(&hamachi_driver);
2018 static void __exit hamachi_exit (void)
2020 pci_unregister_driver(&hamachi_driver);
2024 module_init(hamachi_init);
2025 module_exit(hamachi_exit);