drivers/net/irda/smsc-ircc2.c

   1 /*********************************************************************
   2  * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
   3  *
   4  * Description:   Driver for the SMC Infrared Communications Controller
   5  * Status:        Experimental.
   6  * Author:        Daniele Peri (peri@csai.unipa.it)
   7  * Created at:
   8  * Modified at:
   9  * Modified by:
  10  *
  11  *     Copyright (c) 2002      Daniele Peri
  12  *     All Rights Reserved.
  13  *     Copyright (c) 2002      Jean Tourrilhes
  14  *
  15  *
  16  * Based on smc-ircc.c:
  17  *
  18  *     Copyright (c) 2001      Stefani Seibold
  19  *     Copyright (c) 1999-2001 Dag Brattli
  20  *     Copyright (c) 1998-1999 Thomas Davis,
  21  *
  22  *      and irport.c:
  23  *
  24  *     Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
  25  *
  26  *
  27  *     This program is free software; you can redistribute it and/or
  28  *     modify it under the terms of the GNU General Public License as
  29  *     published by the Free Software Foundation; either version 2 of
  30  *     the License, or (at your option) any later version.
  31  *
  32  *     This program is distributed in the hope that it will be useful,
  33  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  34  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  35  *     GNU General Public License for more details.
  36  *
  37  *     You should have received a copy of the GNU General Public License
  38  *     along with this program; if not, write to the Free Software
  39  *     Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  40  *     MA 02111-1307 USA
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45 #include <linux/kernel.h>
  46 #include <linux/types.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/netdevice.h>
  49 #include <linux/ioport.h>
  50 #include <linux/delay.h>
  51 #include <linux/slab.h>
  52 #include <linux/init.h>
  53 #include <linux/rtnetlink.h>
  54 #include <linux/serial_reg.h>
  55 #include <linux/dma-mapping.h>
  56 #include <linux/platform_device.h>
  57
  58 #include <asm/io.h>
  59 #include <asm/dma.h>
  60 #include <asm/byteorder.h>
  61
  62 #include <linux/spinlock.h>
  63 #include <linux/pm.h>
  64
  65 #include <net/irda/wrapper.h>
  66 #include <net/irda/irda.h>
  67 #include <net/irda/irda_device.h>
  68
  69 #include "smsc-ircc2.h"
  70 #include "smsc-sio.h"
  71
  72
  73 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
  74 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
  75 MODULE_LICENSE("GPL");
  76
  77 static int ircc_dma = 255;
  78 module_param(ircc_dma, int, 0);
  79 MODULE_PARM_DESC(ircc_dma, "DMA channel");
  80
  81 static int ircc_irq = 255;
  82 module_param(ircc_irq, int, 0);
  83 MODULE_PARM_DESC(ircc_irq, "IRQ line");
  84
  85 static int ircc_fir;
  86 module_param(ircc_fir, int, 0);
  87 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
  88
  89 static int ircc_sir;
  90 module_param(ircc_sir, int, 0);
  91 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
  92
  93 static int ircc_cfg;
  94 module_param(ircc_cfg, int, 0);
  95 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
  96
  97 static int ircc_transceiver;
  98 module_param(ircc_transceiver, int, 0);
  99 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
 100
 101 /* Types */
 102
 103 struct smsc_transceiver {
 104         char *name;
 105         void (*set_for_speed)(int fir_base, u32 speed);
 106         int  (*probe)(int fir_base);
 107 };
 108
 109 struct smsc_chip {
 110         char *name;
 111         #if 0
 112         u8      type;
 113         #endif
 114         u16 flags;
 115         u8 devid;
 116         u8 rev;
 117 };
 118
 119 struct smsc_chip_address {
 120         unsigned int cfg_base;
 121         unsigned int type;
 122 };
 123
 124 /* Private data for each instance */
 125 struct smsc_ircc_cb {
 126         struct net_device *netdev;     /* Yes! we are some kind of netdevice */
 127         struct net_device_stats stats;
 128         struct irlap_cb    *irlap; /* The link layer we are binded to */
 129
 130         chipio_t io;               /* IrDA controller information */
 131         iobuff_t tx_buff;          /* Transmit buffer */
 132         iobuff_t rx_buff;          /* Receive buffer */
 133         dma_addr_t tx_buff_dma;
 134         dma_addr_t rx_buff_dma;
 135
 136         struct qos_info qos;       /* QoS capabilities for this device */
 137
 138         spinlock_t lock;           /* For serializing operations */
 139
 140         __u32 new_speed;
 141         __u32 flags;               /* Interface flags */
 142
 143         int tx_buff_offsets[10];   /* Offsets between frames in tx_buff */
 144         int tx_len;                /* Number of frames in tx_buff */
 145
 146         int transceiver;
 147         struct platform_device *pldev;
 148 };
 149
 150 /* Constants */
 151
 152 #define SMSC_IRCC2_DRIVER_NAME                  "smsc-ircc2"
 153
 154 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED        9600
 155 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER        1
 156 #define SMSC_IRCC2_C_NET_TIMEOUT                0
 157 #define SMSC_IRCC2_C_SIR_STOP                   0
 158
 159 static const char *driver_name = SMSC_IRCC2_DRIVER_NAME;
 160
 161 /* Prototypes */
 162
 163 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
 164 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
 165 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
 166 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
 167 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
 168 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
 169 static int  smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
 170 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
 171 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
 172 static int  smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 173 static int  smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 174 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
 175 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
 176 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed);
 177 static void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, u32 speed);
 178 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 179 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
 180 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
 181 #if SMSC_IRCC2_C_SIR_STOP
 182 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
 183 #endif
 184 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
 185 static int  smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
 186 static int  smsc_ircc_net_open(struct net_device *dev);
 187 static int  smsc_ircc_net_close(struct net_device *dev);
 188 static int  smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 189 #if SMSC_IRCC2_C_NET_TIMEOUT
 190 static void smsc_ircc_timeout(struct net_device *dev);
 191 #endif
 192 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
 193 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
 194 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
 195 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
 196 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
 197
 198 /* Probing */
 199 static int __init smsc_ircc_look_for_chips(void);
 200 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
 201 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 202 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 203 static int __init smsc_superio_fdc(unsigned short cfg_base);
 204 static int __init smsc_superio_lpc(unsigned short cfg_base);
 205
 206 /* Transceivers specific functions */
 207
 208 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
 209 static int  smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
 210 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
 211 static int  smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
 212 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
 213 static int  smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
 214
 215 /* Power Management */
 216
 217 static int smsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
 218 static int smsc_ircc_resume(struct platform_device *dev);
 219
 220 static struct platform_driver smsc_ircc_driver = {
 221         .suspend        = smsc_ircc_suspend,
 222         .resume         = smsc_ircc_resume,
 223         .driver         = {
 224                 .name   = SMSC_IRCC2_DRIVER_NAME,
 225         },
 226 };
 227
 228 /* Transceivers for SMSC-ircc */
 229
 230 static struct smsc_transceiver smsc_transceivers[] =
 231 {
 232         { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
 233         { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
 234         { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
 235         { NULL, NULL }
 236 };
 237 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
 238
 239 /*  SMC SuperIO chipsets definitions */
 240
 241 #define KEY55_1 0       /* SuperIO Configuration mode with Key <0x55> */
 242 #define KEY55_2 1       /* SuperIO Configuration mode with Key <0x55,0x55> */
 243 #define NoIRDA  2       /* SuperIO Chip has no IRDA Port */
 244 #define SIR     0       /* SuperIO Chip has only slow IRDA */
 245 #define FIR     4       /* SuperIO Chip has fast IRDA */
 246 #define SERx4   8       /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
 247
 248 static struct smsc_chip __initdata fdc_chips_flat[] =
 249 {
 250         /* Base address 0x3f0 or 0x370 */
 251         { "37C44",      KEY55_1|NoIRDA,         0x00, 0x00 }, /* This chip cannot be detected */
 252         { "37C665GT",   KEY55_2|NoIRDA,         0x65, 0x01 },
 253         { "37C665GT",   KEY55_2|NoIRDA,         0x66, 0x01 },
 254         { "37C669",     KEY55_2|SIR|SERx4,      0x03, 0x02 },
 255         { "37C669",     KEY55_2|SIR|SERx4,      0x04, 0x02 }, /* ID? */
 256         { "37C78",      KEY55_2|NoIRDA,         0x78, 0x00 },
 257         { "37N769",     KEY55_1|FIR|SERx4,      0x28, 0x00 },
 258         { "37N869",     KEY55_1|FIR|SERx4,      0x29, 0x00 },
 259         { NULL }
 260 };
 261
 262 static struct smsc_chip __initdata fdc_chips_paged[] =
 263 {
 264         /* Base address 0x3f0 or 0x370 */
 265         { "37B72X",     KEY55_1|SIR|SERx4,      0x4c, 0x00 },
 266         { "37B77X",     KEY55_1|SIR|SERx4,      0x43, 0x00 },
 267         { "37B78X",     KEY55_1|SIR|SERx4,      0x44, 0x00 },
 268         { "37B80X",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 269         { "37C67X",     KEY55_1|FIR|SERx4,      0x40, 0x00 },
 270         { "37C93X",     KEY55_2|SIR|SERx4,      0x02, 0x01 },
 271         { "37C93XAPM",  KEY55_1|SIR|SERx4,      0x30, 0x01 },
 272         { "37C93XFR",   KEY55_2|FIR|SERx4,      0x03, 0x01 },
 273         { "37M707",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 274         { "37M81X",     KEY55_1|SIR|SERx4,      0x4d, 0x00 },
 275         { "37N958FR",   KEY55_1|FIR|SERx4,      0x09, 0x04 },
 276         { "37N971",     KEY55_1|FIR|SERx4,      0x0a, 0x00 },
 277         { "37N972",     KEY55_1|FIR|SERx4,      0x0b, 0x00 },
 278         { NULL }
 279 };
 280
 281 static struct smsc_chip __initdata lpc_chips_flat[] =
 282 {
 283         /* Base address 0x2E or 0x4E */
 284         { "47N227",     KEY55_1|FIR|SERx4,      0x5a, 0x00 },
 285         { "47N267",     KEY55_1|FIR|SERx4,      0x5e, 0x00 },
 286         { NULL }
 287 };
 288
 289 static struct smsc_chip __initdata lpc_chips_paged[] =
 290 {
 291         /* Base address 0x2E or 0x4E */
 292         { "47B27X",     KEY55_1|SIR|SERx4,      0x51, 0x00 },
 293         { "47B37X",     KEY55_1|SIR|SERx4,      0x52, 0x00 },
 294         { "47M10X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 295         { "47M120",     KEY55_1|NoIRDA|SERx4,   0x5c, 0x00 },
 296         { "47M13X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 297         { "47M14X",     KEY55_1|SIR|SERx4,      0x5f, 0x00 },
 298         { "47N252",     KEY55_1|FIR|SERx4,      0x0e, 0x00 },
 299         { "47S42X",     KEY55_1|SIR|SERx4,      0x57, 0x00 },
 300         { NULL }
 301 };
 302
 303 #define SMSCSIO_TYPE_FDC        1
 304 #define SMSCSIO_TYPE_LPC        2
 305 #define SMSCSIO_TYPE_FLAT       4
 306 #define SMSCSIO_TYPE_PAGED      8
 307
 308 static struct smsc_chip_address __initdata possible_addresses[] =
 309 {
 310         { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 311         { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 312         { 0xe0,  SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 313         { 0x2e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 314         { 0x4e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 315         { 0, 0 }
 316 };
 317
 318 /* Globals */
 319
 320 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
 321 static unsigned short dev_count;
 322
 323 static inline void register_bank(int iobase, int bank)
 324 {
 325         outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
 326                iobase + IRCC_MASTER);
 327 }
 328
 329
 330 /*******************************************************************************
 331  *
 332  *
 333  * SMSC-ircc stuff
 334  *
 335  *
 336  *******************************************************************************/
 337
 338 /*
 339  * Function smsc_ircc_init ()
 340  *
 341  *    Initialize chip. Just try to find out how many chips we are dealing with
 342  *    and where they are
 343  */
 344 static int __init smsc_ircc_init(void)
 345 {
 346         int ret;
 347
 348         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 349
 350         ret = platform_driver_register(&smsc_ircc_driver);
 351         if (ret) {
 352                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
 353                 return ret;
 354         }
 355
 356         dev_count = 0;
 357
 358         if (ircc_fir > 0 && ircc_sir > 0) {
 359                 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
 360                 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
 361
 362                 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq))
 363                         ret = -ENODEV;
 364         } else {
 365                 ret = -ENODEV;
 366
 367                 /* try user provided configuration register base address */
 368                 if (ircc_cfg > 0) {
 369                         IRDA_MESSAGE(" Overriding configuration address "
 370                                      "0x%04x\n", ircc_cfg);
 371                         if (!smsc_superio_fdc(ircc_cfg))
 372                                 ret = 0;
 373                         if (!smsc_superio_lpc(ircc_cfg))
 374                                 ret = 0;
 375                 }
 376
 377                 if (smsc_ircc_look_for_chips() > 0)
 378                         ret = 0;
 379         }
 380
 381         if (ret)
 382                 platform_driver_unregister(&smsc_ircc_driver);
 383
 384         return ret;
 385 }
 386
 387 /*
 388  * Function smsc_ircc_open (firbase, sirbase, dma, irq)
 389  *
 390  *    Try to open driver instance
 391  *
 392  */
 393 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
 394 {
 395         struct smsc_ircc_cb *self;
 396         struct net_device *dev;
 397         int err;
 398
 399         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 400
 401         err = smsc_ircc_present(fir_base, sir_base);
 402         if (err)
 403                 goto err_out;
 404
 405         err = -ENOMEM;
 406         if (dev_count >= ARRAY_SIZE(dev_self)) {
 407                 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
 408                 goto err_out1;
 409         }
 410
 411         /*
 412          *  Allocate new instance of the driver
 413          */
 414         dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
 415         if (!dev) {
 416                 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
 417                 goto err_out1;
 418         }
 419
 420         SET_MODULE_OWNER(dev);
 421
 422         dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
 423 #if SMSC_IRCC2_C_NET_TIMEOUT
 424         dev->tx_timeout      = smsc_ircc_timeout;
 425         dev->watchdog_timeo  = HZ * 2;  /* Allow enough time for speed change */
 426 #endif
 427         dev->open            = smsc_ircc_net_open;
 428         dev->stop            = smsc_ircc_net_close;
 429         dev->do_ioctl        = smsc_ircc_net_ioctl;
 430         dev->get_stats       = smsc_ircc_net_get_stats;
 431
 432         self = netdev_priv(dev);
 433         self->netdev = dev;
 434
 435         /* Make ifconfig display some details */
 436         dev->base_addr = self->io.fir_base = fir_base;
 437         dev->irq = self->io.irq = irq;
 438
 439         /* Need to store self somewhere */
 440         dev_self[dev_count] = self;
 441         spin_lock_init(&self->lock);
 442
 443         self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
 444         self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
 445
 446         self->rx_buff.head =
 447                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 448                                    &self->rx_buff_dma, GFP_KERNEL);
 449         if (self->rx_buff.head == NULL) {
 450                 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
 451                            driver_name);
 452                 goto err_out2;
 453         }
 454
 455         self->tx_buff.head =
 456                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 457                                    &self->tx_buff_dma, GFP_KERNEL);
 458         if (self->tx_buff.head == NULL) {
 459                 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
 460                            driver_name);
 461                 goto err_out3;
 462         }
 463
 464         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 465         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 466
 467         self->rx_buff.in_frame = FALSE;
 468         self->rx_buff.state = OUTSIDE_FRAME;
 469         self->tx_buff.data = self->tx_buff.head;
 470         self->rx_buff.data = self->rx_buff.head;
 471
 472         smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
 473         smsc_ircc_setup_qos(self);
 474         smsc_ircc_init_chip(self);
 475
 476         if (ircc_transceiver > 0  &&
 477             ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
 478                 self->transceiver = ircc_transceiver;
 479         else
 480                 smsc_ircc_probe_transceiver(self);
 481
 482         err = register_netdev(self->netdev);
 483         if (err) {
 484                 IRDA_ERROR("%s, Network device registration failed!\n",
 485                            driver_name);
 486                 goto err_out4;
 487         }
 488
 489         self->pldev = platform_device_register_simple(SMSC_IRCC2_DRIVER_NAME,
 490                                                       dev_count, NULL, 0);
 491         if (IS_ERR(self->pldev)) {
 492                 err = PTR_ERR(self->pldev);
 493                 goto err_out5;
 494         }
 495         platform_set_drvdata(self->pldev, self);
 496
 497         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
 498         dev_count++;
 499
 500         return 0;
 501
 502  err_out5:
 503         unregister_netdev(self->netdev);
 504
 505  err_out4:
 506         dma_free_coherent(NULL, self->tx_buff.truesize,
 507                           self->tx_buff.head, self->tx_buff_dma);
 508  err_out3:
 509         dma_free_coherent(NULL, self->rx_buff.truesize,
 510                           self->rx_buff.head, self->rx_buff_dma);
 511  err_out2:
 512         free_netdev(self->netdev);
 513         dev_self[dev_count] = NULL;
 514  err_out1:
 515         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 516         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 517  err_out:
 518         return err;
 519 }
 520
 521 /*
 522  * Function smsc_ircc_present(fir_base, sir_base)
 523  *
 524  *    Check the smsc-ircc chip presence
 525  *
 526  */
 527 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
 528 {
 529         unsigned char low, high, chip, config, dma, irq, version;
 530
 531         if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
 532                             driver_name)) {
 533                 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
 534                              __FUNCTION__, fir_base);
 535                 goto out1;
 536         }
 537
 538         if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
 539                             driver_name)) {
 540                 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
 541                              __FUNCTION__, sir_base);
 542                 goto out2;
 543         }
 544
 545         register_bank(fir_base, 3);
 546
 547         high    = inb(fir_base + IRCC_ID_HIGH);
 548         low     = inb(fir_base + IRCC_ID_LOW);
 549         chip    = inb(fir_base + IRCC_CHIP_ID);
 550         version = inb(fir_base + IRCC_VERSION);
 551         config  = inb(fir_base + IRCC_INTERFACE);
 552         dma     = config & IRCC_INTERFACE_DMA_MASK;
 553         irq     = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 554
 555         if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
 556                 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
 557                              __FUNCTION__, fir_base);
 558                 goto out3;
 559         }
 560         IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
 561                      "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
 562                      chip & 0x0f, version, fir_base, sir_base, dma, irq);
 563
 564         return 0;
 565
 566  out3:
 567         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 568  out2:
 569         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 570  out1:
 571         return -ENODEV;
 572 }
 573
 574 /*
 575  * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
 576  *
 577  *    Setup I/O
 578  *
 579  */
 580 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
 581                                unsigned int fir_base, unsigned int sir_base,
 582                                u8 dma, u8 irq)
 583 {
 584         unsigned char config, chip_dma, chip_irq;
 585
 586         register_bank(fir_base, 3);
 587         config = inb(fir_base + IRCC_INTERFACE);
 588         chip_dma = config & IRCC_INTERFACE_DMA_MASK;
 589         chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 590
 591         self->io.fir_base  = fir_base;
 592         self->io.sir_base  = sir_base;
 593         self->io.fir_ext   = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
 594         self->io.sir_ext   = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
 595         self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
 596         self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
 597
 598         if (irq < 255) {
 599                 if (irq != chip_irq)
 600                         IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
 601                                      driver_name, chip_irq, irq);
 602                 self->io.irq = irq;
 603         } else
 604                 self->io.irq = chip_irq;
 605
 606         if (dma < 255) {
 607                 if (dma != chip_dma)
 608                         IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
 609                                      driver_name, chip_dma, dma);
 610                 self->io.dma = dma;
 611         } else
 612                 self->io.dma = chip_dma;
 613
 614 }
 615
 616 /*
 617  * Function smsc_ircc_setup_qos(self)
 618  *
 619  *    Setup qos
 620  *
 621  */
 622 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
 623 {
 624         /* Initialize QoS for this device */
 625         irda_init_max_qos_capabilies(&self->qos);
 626
 627         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 628                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
 629
 630         self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
 631         self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
 632         irda_qos_bits_to_value(&self->qos);
 633 }
 634
 635 /*
 636  * Function smsc_ircc_init_chip(self)
 637  *
 638  *    Init chip
 639  *
 640  */
 641 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
 642 {
 643         int iobase = self->io.fir_base;
 644
 645         register_bank(iobase, 0);
 646         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
 647         outb(0x00, iobase + IRCC_MASTER);
 648
 649         register_bank(iobase, 1);
 650         outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | IRCC_CFGA_IRDA_SIR_A),
 651              iobase + IRCC_SCE_CFGA);
 652
 653 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
 654         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 655              iobase + IRCC_SCE_CFGB);
 656 #else
 657         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 658              iobase + IRCC_SCE_CFGB);
 659 #endif
 660         (void) inb(iobase + IRCC_FIFO_THRESHOLD);
 661         outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
 662
 663         register_bank(iobase, 4);
 664         outb((inb(iobase + IRCC_CONTROL) & 0x30), iobase + IRCC_CONTROL);
 665
 666         register_bank(iobase, 0);
 667         outb(0, iobase + IRCC_LCR_A);
 668
 669         smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
 670
 671         /* Power on device */
 672         outb(0x00, iobase + IRCC_MASTER);
 673 }
 674
 675 /*
 676  * Function smsc_ircc_net_ioctl (dev, rq, cmd)
 677  *
 678  *    Process IOCTL commands for this device
 679  *
 680  */
 681 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 682 {
 683         struct if_irda_req *irq = (struct if_irda_req *) rq;
 684         struct smsc_ircc_cb *self;
 685         unsigned long flags;
 686         int ret = 0;
 687
 688         IRDA_ASSERT(dev != NULL, return -1;);
 689
 690         self = netdev_priv(dev);
 691
 692         IRDA_ASSERT(self != NULL, return -1;);
 693
 694         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
 695
 696         switch (cmd) {
 697         case SIOCSBANDWIDTH: /* Set bandwidth */
 698                 if (!capable(CAP_NET_ADMIN))
 699                         ret = -EPERM;
 700                 else {
 701                         /* Make sure we are the only one touching
 702                          * self->io.speed and the hardware - Jean II */
 703                         spin_lock_irqsave(&self->lock, flags);
 704                         smsc_ircc_change_speed(self, irq->ifr_baudrate);
 705                         spin_unlock_irqrestore(&self->lock, flags);
 706                 }
 707                 break;
 708         case SIOCSMEDIABUSY: /* Set media busy */
 709                 if (!capable(CAP_NET_ADMIN)) {
 710                         ret = -EPERM;
 711                         break;
 712                 }
 713
 714                 irda_device_set_media_busy(self->netdev, TRUE);
 715                 break;
 716         case SIOCGRECEIVING: /* Check if we are receiving right now */
 717                 irq->ifr_receiving = smsc_ircc_is_receiving(self);
 718                 break;
 719         #if 0
 720         case SIOCSDTRRTS:
 721                 if (!capable(CAP_NET_ADMIN)) {
 722                         ret = -EPERM;
 723                         break;
 724                 }
 725                 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
 726                 break;
 727         #endif
 728         default:
 729                 ret = -EOPNOTSUPP;
 730         }
 731
 732         return ret;
 733 }
 734
 735 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
 736 {
 737         struct smsc_ircc_cb *self = netdev_priv(dev);
 738
 739         return &self->stats;
 740 }
 741
 742 #if SMSC_IRCC2_C_NET_TIMEOUT
 743 /*
 744  * Function smsc_ircc_timeout (struct net_device *dev)
 745  *
 746  *    The networking timeout management.
 747  *
 748  */
 749
 750 static void smsc_ircc_timeout(struct net_device *dev)
 751 {
 752         struct smsc_ircc_cb *self = netdev_priv(dev);
 753         unsigned long flags;
 754
 755         IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
 756                      dev->name, self->io.speed);
 757         spin_lock_irqsave(&self->lock, flags);
 758         smsc_ircc_sir_start(self);
 759         smsc_ircc_change_speed(self, self->io.speed);
 760         dev->trans_start = jiffies;
 761         netif_wake_queue(dev);
 762         spin_unlock_irqrestore(&self->lock, flags);
 763 }
 764 #endif
 765
 766 /*
 767  * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
 768  *
 769  *    Transmits the current frame until FIFO is full, then
 770  *    waits until the next transmit interrupt, and continues until the
 771  *    frame is transmitted.
 772  */
 773 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
 774 {
 775         struct smsc_ircc_cb *self;
 776         unsigned long flags;
 777         s32 speed;
 778
 779         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 780
 781         IRDA_ASSERT(dev != NULL, return 0;);
 782
 783         self = netdev_priv(dev);
 784         IRDA_ASSERT(self != NULL, return 0;);
 785
 786         netif_stop_queue(dev);
 787
 788         /* Make sure test of self->io.speed & speed change are atomic */
 789         spin_lock_irqsave(&self->lock, flags);
 790
 791         /* Check if we need to change the speed */
 792         speed = irda_get_next_speed(skb);
 793         if (speed != self->io.speed && speed != -1) {
 794                 /* Check for empty frame */
 795                 if (!skb->len) {
 796                         /*
 797                          * We send frames one by one in SIR mode (no
 798                          * pipelining), so at this point, if we were sending
 799                          * a previous frame, we just received the interrupt
 800                          * telling us it is finished (UART_IIR_THRI).
 801                          * Therefore, waiting for the transmitter to really
 802                          * finish draining the fifo won't take too long.
 803                          * And the interrupt handler is not expected to run.
 804                          * - Jean II */
 805                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
 806                         smsc_ircc_change_speed(self, speed);
 807                         spin_unlock_irqrestore(&self->lock, flags);
 808                         dev_kfree_skb(skb);
 809                         return 0;
 810                 }
 811                 self->new_speed = speed;
 812         }
 813
 814         /* Init tx buffer */
 815         self->tx_buff.data = self->tx_buff.head;
 816
 817         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
 818         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
 819                                            self->tx_buff.truesize);
 820
 821         self->stats.tx_bytes += self->tx_buff.len;
 822
 823         /* Turn on transmit finished interrupt. Will fire immediately!  */
 824         outb(UART_IER_THRI, self->io.sir_base + UART_IER);
 825
 826         spin_unlock_irqrestore(&self->lock, flags);
 827
 828         dev_kfree_skb(skb);
 829
 830         return 0;
 831 }
 832
 833 /*
 834  * Function smsc_ircc_set_fir_speed (self, baud)
 835  *
 836  *    Change the speed of the device
 837  *
 838  */
 839 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
 840 {
 841         int fir_base, ir_mode, ctrl, fast;
 842
 843         IRDA_ASSERT(self != NULL, return;);
 844         fir_base = self->io.fir_base;
 845
 846         self->io.speed = speed;
 847
 848         switch (speed) {
 849         default:
 850         case 576000:
 851                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 852                 ctrl = IRCC_CRC;
 853                 fast = 0;
 854                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
 855                 break;
 856         case 1152000:
 857                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 858                 ctrl = IRCC_1152 | IRCC_CRC;
 859                 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
 860                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
 861                            __FUNCTION__);
 862                 break;
 863         case 4000000:
 864                 ir_mode = IRCC_CFGA_IRDA_4PPM;
 865                 ctrl = IRCC_CRC;
 866                 fast = IRCC_LCR_A_FAST;
 867                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
 868                            __FUNCTION__);
 869                 break;
 870         }
 871         #if 0
 872         Now in tranceiver!
 873         /* This causes an interrupt */
 874         register_bank(fir_base, 0);
 875         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast, fir_base + IRCC_LCR_A);
 876         #endif
 877
 878         register_bank(fir_base, 1);
 879         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
 880
 881         register_bank(fir_base, 4);
 882         outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
 883 }
 884
 885 /*
 886  * Function smsc_ircc_fir_start(self)
 887  *
 888  *    Change the speed of the device
 889  *
 890  */
 891 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
 892 {
 893         struct net_device *dev;
 894         int fir_base;
 895
 896         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 897
 898         IRDA_ASSERT(self != NULL, return;);
 899         dev = self->netdev;
 900         IRDA_ASSERT(dev != NULL, return;);
 901
 902         fir_base = self->io.fir_base;
 903
 904         /* Reset everything */
 905
 906         /* Install FIR transmit handler */
 907         dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
 908
 909         /* Clear FIFO */
 910         outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
 911
 912         /* Enable interrupt */
 913         /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
 914
 915         register_bank(fir_base, 1);
 916
 917         /* Select the TX/RX interface */
 918 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
 919         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 920              fir_base + IRCC_SCE_CFGB);
 921 #else
 922         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 923              fir_base + IRCC_SCE_CFGB);
 924 #endif
 925         (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
 926
 927         /* Enable SCE interrupts */
 928         outb(0, fir_base + IRCC_MASTER);
 929         register_bank(fir_base, 0);
 930         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
 931         outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
 932 }
 933
 934 /*
 935  * Function smsc_ircc_fir_stop(self, baud)
 936  *
 937  *    Change the speed of the device
 938  *
 939  */
 940 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
 941 {
 942         int fir_base;
 943
 944         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 945
 946         IRDA_ASSERT(self != NULL, return;);
 947
 948         fir_base = self->io.fir_base;
 949         register_bank(fir_base, 0);
 950         /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
 951         outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
 952 }
 953
 954
 955 /*
 956  * Function smsc_ircc_change_speed(self, baud)
 957  *
 958  *    Change the speed of the device
 959  *
 960  * This function *must* be called with spinlock held, because it may
 961  * be called from the irq handler. - Jean II
 962  */
 963 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed)
 964 {
 965         struct net_device *dev;
 966         int last_speed_was_sir;
 967
 968         IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
 969
 970         IRDA_ASSERT(self != NULL, return;);
 971         dev = self->netdev;
 972
 973         last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
 974
 975         #if 0
 976         /* Temp Hack */
 977         speed= 1152000;
 978         self->io.speed = speed;
 979         last_speed_was_sir = 0;
 980         smsc_ircc_fir_start(self);
 981         #endif
 982
 983         if (self->io.speed == 0)
 984                 smsc_ircc_sir_start(self);
 985
 986         #if 0
 987         if (!last_speed_was_sir) speed = self->io.speed;
 988         #endif
 989
 990         if (self->io.speed != speed)
 991                 smsc_ircc_set_transceiver_for_speed(self, speed);
 992
 993         self->io.speed = speed;
 994
 995         if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
 996                 if (!last_speed_was_sir) {
 997                         smsc_ircc_fir_stop(self);
 998                         smsc_ircc_sir_start(self);
 999                 }
1000                 smsc_ircc_set_sir_speed(self, speed);
1001         } else {
1002                 if (last_speed_was_sir) {
1003                         #if SMSC_IRCC2_C_SIR_STOP
1004                         smsc_ircc_sir_stop(self);
1005                         #endif
1006                         smsc_ircc_fir_start(self);
1007                 }
1008                 smsc_ircc_set_fir_speed(self, speed);
1009
1010                 #if 0
1011                 self->tx_buff.len = 10;
1012                 self->tx_buff.data = self->tx_buff.head;
1013
1014                 smsc_ircc_dma_xmit(self, 4000);
1015                 #endif
1016                 /* Be ready for incoming frames */
1017                 smsc_ircc_dma_receive(self);
1018         }
1019
1020         netif_wake_queue(dev);
1021 }
1022
1023 /*
1024  * Function smsc_ircc_set_sir_speed (self, speed)
1025  *
1026  *    Set speed of IrDA port to specified baudrate
1027  *
1028  */
1029 void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed)
1030 {
1031         int iobase;
1032         int fcr;    /* FIFO control reg */
1033         int lcr;    /* Line control reg */
1034         int divisor;
1035
1036         IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1037
1038         IRDA_ASSERT(self != NULL, return;);
1039         iobase = self->io.sir_base;
1040
1041         /* Update accounting for new speed */
1042         self->io.speed = speed;
1043
1044         /* Turn off interrupts */
1045         outb(0, iobase + UART_IER);
1046
1047         divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1048
1049         fcr = UART_FCR_ENABLE_FIFO;
1050
1051         /*
1052          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1053          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1054          * about this timeout since it will always be fast enough.
1055          */
1056         fcr |= self->io.speed < 38400 ?
1057                 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1058
1059         /* IrDA ports use 8N1 */
1060         lcr = UART_LCR_WLEN8;
1061
1062         outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1063         outb(divisor & 0xff,      iobase + UART_DLL); /* Set speed */
1064         outb(divisor >> 8,        iobase + UART_DLM);
1065         outb(lcr,                 iobase + UART_LCR); /* Set 8N1 */
1066         outb(fcr,                 iobase + UART_FCR); /* Enable FIFO's */
1067
1068         /* Turn on interrups */
1069         outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1070
1071         IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1072 }
1073
1074
1075 /*
1076  * Function smsc_ircc_hard_xmit_fir (skb, dev)
1077  *
1078  *    Transmit the frame!
1079  *
1080  */
1081 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1082 {
1083         struct smsc_ircc_cb *self;
1084         unsigned long flags;
1085         s32 speed;
1086         int mtt;
1087
1088         IRDA_ASSERT(dev != NULL, return 0;);
1089         self = netdev_priv(dev);
1090         IRDA_ASSERT(self != NULL, return 0;);
1091
1092         netif_stop_queue(dev);
1093
1094         /* Make sure test of self->io.speed & speed change are atomic */
1095         spin_lock_irqsave(&self->lock, flags);
1096
1097         /* Check if we need to change the speed after this frame */
1098         speed = irda_get_next_speed(skb);
1099         if (speed != self->io.speed && speed != -1) {
1100                 /* Check for empty frame */
1101                 if (!skb->len) {
1102                         /* Note : you should make sure that speed changes
1103                          * are not going to corrupt any outgoing frame.
1104                          * Look at nsc-ircc for the gory details - Jean II */
1105                         smsc_ircc_change_speed(self, speed);
1106                         spin_unlock_irqrestore(&self->lock, flags);
1107                         dev_kfree_skb(skb);
1108                         return 0;
1109                 }
1110
1111                 self->new_speed = speed;
1112         }
1113
1114         memcpy(self->tx_buff.head, skb->data, skb->len);
1115
1116         self->tx_buff.len = skb->len;
1117         self->tx_buff.data = self->tx_buff.head;
1118
1119         mtt = irda_get_mtt(skb);
1120         if (mtt) {
1121                 int bofs;
1122
1123                 /*
1124                  * Compute how many BOFs (STA or PA's) we need to waste the
1125                  * min turn time given the speed of the link.
1126                  */
1127                 bofs = mtt * (self->io.speed / 1000) / 8000;
1128                 if (bofs > 4095)
1129                         bofs = 4095;
1130
1131                 smsc_ircc_dma_xmit(self, bofs);
1132         } else {
1133                 /* Transmit frame */
1134                 smsc_ircc_dma_xmit(self, 0);
1135         }
1136
1137         spin_unlock_irqrestore(&self->lock, flags);
1138         dev_kfree_skb(skb);
1139
1140         return 0;
1141 }
1142
1143 /*
1144  * Function smsc_ircc_dma_xmit (self, bofs)
1145  *
1146  *    Transmit data using DMA
1147  *
1148  */
1149 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1150 {
1151         int iobase = self->io.fir_base;
1152         u8 ctrl;
1153
1154         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1155 #if 1
1156         /* Disable Rx */
1157         register_bank(iobase, 0);
1158         outb(0x00, iobase + IRCC_LCR_B);
1159 #endif
1160         register_bank(iobase, 1);
1161         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1162              iobase + IRCC_SCE_CFGB);
1163
1164         self->io.direction = IO_XMIT;
1165
1166         /* Set BOF additional count for generating the min turn time */
1167         register_bank(iobase, 4);
1168         outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1169         ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1170         outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1171
1172         /* Set max Tx frame size */
1173         outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1174         outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1175
1176         /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1177
1178         /* Enable burst mode chip Tx DMA */
1179         register_bank(iobase, 1);
1180         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1181              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1182
1183         /* Setup DMA controller (must be done after enabling chip DMA) */
1184         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1185                        DMA_TX_MODE);
1186
1187         /* Enable interrupt */
1188
1189         register_bank(iobase, 0);
1190         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1191         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1192
1193         /* Enable transmit */
1194         outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1195 }
1196
1197 /*
1198  * Function smsc_ircc_dma_xmit_complete (self)
1199  *
1200  *    The transfer of a frame in finished. This function will only be called
1201  *    by the interrupt handler
1202  *
1203  */
1204 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1205 {
1206         int iobase = self->io.fir_base;
1207
1208         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1209 #if 0
1210         /* Disable Tx */
1211         register_bank(iobase, 0);
1212         outb(0x00, iobase + IRCC_LCR_B);
1213 #endif
1214         register_bank(iobase, 1);
1215         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1216              iobase + IRCC_SCE_CFGB);
1217
1218         /* Check for underrun! */
1219         register_bank(iobase, 0);
1220         if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1221                 self->stats.tx_errors++;
1222                 self->stats.tx_fifo_errors++;
1223
1224                 /* Reset error condition */
1225                 register_bank(iobase, 0);
1226                 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1227                 outb(0x00, iobase + IRCC_MASTER);
1228         } else {
1229                 self->stats.tx_packets++;
1230                 self->stats.tx_bytes += self->tx_buff.len;
1231         }
1232
1233         /* Check if it's time to change the speed */
1234         if (self->new_speed) {
1235                 smsc_ircc_change_speed(self, self->new_speed);
1236                 self->new_speed = 0;
1237         }
1238
1239         netif_wake_queue(self->netdev);
1240 }
1241
1242 /*
1243  * Function smsc_ircc_dma_receive(self)
1244  *
1245  *    Get ready for receiving a frame. The device will initiate a DMA
1246  *    if it starts to receive a frame.
1247  *
1248  */
1249 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1250 {
1251         int iobase = self->io.fir_base;
1252 #if 0
1253         /* Turn off chip DMA */
1254         register_bank(iobase, 1);
1255         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1256              iobase + IRCC_SCE_CFGB);
1257 #endif
1258
1259         /* Disable Tx */
1260         register_bank(iobase, 0);
1261         outb(0x00, iobase + IRCC_LCR_B);
1262
1263         /* Turn off chip DMA */
1264         register_bank(iobase, 1);
1265         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1266              iobase + IRCC_SCE_CFGB);
1267
1268         self->io.direction = IO_RECV;
1269         self->rx_buff.data = self->rx_buff.head;
1270
1271         /* Set max Rx frame size */
1272         register_bank(iobase, 4);
1273         outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1274         outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1275
1276         /* Setup DMA controller */
1277         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1278                        DMA_RX_MODE);
1279
1280         /* Enable burst mode chip Rx DMA */
1281         register_bank(iobase, 1);
1282         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1283              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1284
1285         /* Enable interrupt */
1286         register_bank(iobase, 0);
1287         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1288         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1289
1290         /* Enable receiver */
1291         register_bank(iobase, 0);
1292         outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1293              iobase + IRCC_LCR_B);
1294
1295         return 0;
1296 }
1297
1298 /*
1299  * Function smsc_ircc_dma_receive_complete(self)
1300  *
1301  *    Finished with receiving frames
1302  *
1303  */
1304 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1305 {
1306         struct sk_buff *skb;
1307         int len, msgcnt, lsr;
1308         int iobase = self->io.fir_base;
1309
1310         register_bank(iobase, 0);
1311
1312         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1313 #if 0
1314         /* Disable Rx */
1315         register_bank(iobase, 0);
1316         outb(0x00, iobase + IRCC_LCR_B);
1317 #endif
1318         register_bank(iobase, 0);
1319         outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1320         lsr= inb(iobase + IRCC_LSR);
1321         msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1322
1323         IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1324                    get_dma_residue(self->io.dma));
1325
1326         len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1327
1328         /* Look for errors */
1329         if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1330                 self->stats.rx_errors++;
1331                 if (lsr & IRCC_LSR_FRAME_ERROR)
1332                         self->stats.rx_frame_errors++;
1333                 if (lsr & IRCC_LSR_CRC_ERROR)
1334                         self->stats.rx_crc_errors++;
1335                 if (lsr & IRCC_LSR_SIZE_ERROR)
1336                         self->stats.rx_length_errors++;
1337                 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1338                         self->stats.rx_length_errors++;
1339                 return;
1340         }
1341
1342         /* Remove CRC */
1343         len -= self->io.speed < 4000000 ? 2 : 4;
1344
1345         if (len < 2 || len > 2050) {
1346                 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1347                 return;
1348         }
1349         IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1350
1351         skb = dev_alloc_skb(len + 1);
1352         if (!skb) {
1353                 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1354                              __FUNCTION__);
1355                 return;
1356         }
1357         /* Make sure IP header gets aligned */
1358         skb_reserve(skb, 1);
1359
1360         memcpy(skb_put(skb, len), self->rx_buff.data, len);
1361         self->stats.rx_packets++;
1362         self->stats.rx_bytes += len;
1363
1364         skb->dev = self->netdev;
1365         skb->mac.raw  = skb->data;
1366         skb->protocol = htons(ETH_P_IRDA);
1367         netif_rx(skb);
1368 }
1369
1370 /*
1371  * Function smsc_ircc_sir_receive (self)
1372  *
1373  *    Receive one frame from the infrared port
1374  *
1375  */
1376 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1377 {
1378         int boguscount = 0;
1379         int iobase;
1380
1381         IRDA_ASSERT(self != NULL, return;);
1382
1383         iobase = self->io.sir_base;
1384
1385         /*
1386          * Receive all characters in Rx FIFO, unwrap and unstuff them.
1387          * async_unwrap_char will deliver all found frames
1388          */
1389         do {
1390                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1391                                   inb(iobase + UART_RX));
1392
1393                 /* Make sure we don't stay here to long */
1394                 if (boguscount++ > 32) {
1395                         IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1396                         break;
1397                 }
1398         } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1399 }
1400
1401
1402 /*
1403  * Function smsc_ircc_interrupt (irq, dev_id, regs)
1404  *
1405  *    An interrupt from the chip has arrived. Time to do some work
1406  *
1407  */
1408 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1409 {
1410         struct net_device *dev = (struct net_device *) dev_id;
1411         struct smsc_ircc_cb *self;
1412         int iobase, iir, lcra, lsr;
1413         irqreturn_t ret = IRQ_NONE;
1414
1415         if (dev == NULL) {
1416                 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1417                        driver_name, irq);
1418                 goto irq_ret;
1419         }
1420
1421         self = netdev_priv(dev);
1422         IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1423
1424         /* Serialise the interrupt handler in various CPUs, stop Tx path */
1425         spin_lock(&self->lock);
1426
1427         /* Check if we should use the SIR interrupt handler */
1428         if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1429                 ret = smsc_ircc_interrupt_sir(dev);
1430                 goto irq_ret_unlock;
1431         }
1432
1433         iobase = self->io.fir_base;
1434
1435         register_bank(iobase, 0);
1436         iir = inb(iobase + IRCC_IIR);
1437         if (iir == 0)
1438                 goto irq_ret_unlock;
1439         ret = IRQ_HANDLED;
1440
1441         /* Disable interrupts */
1442         outb(0, iobase + IRCC_IER);
1443         lcra = inb(iobase + IRCC_LCR_A);
1444         lsr = inb(iobase + IRCC_LSR);
1445
1446         IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1447
1448         if (iir & IRCC_IIR_EOM) {
1449                 if (self->io.direction == IO_RECV)
1450                         smsc_ircc_dma_receive_complete(self);
1451                 else
1452                         smsc_ircc_dma_xmit_complete(self);
1453
1454                 smsc_ircc_dma_receive(self);
1455         }
1456
1457         if (iir & IRCC_IIR_ACTIVE_FRAME) {
1458                 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1459         }
1460
1461         /* Enable interrupts again */
1462
1463         register_bank(iobase, 0);
1464         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1465
1466  irq_ret_unlock:
1467         spin_unlock(&self->lock);
1468  irq_ret:
1469         return ret;
1470 }
1471
1472 /*
1473  * Function irport_interrupt_sir (irq, dev_id, regs)
1474  *
1475  *    Interrupt handler for SIR modes
1476  */
1477 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1478 {
1479         struct smsc_ircc_cb *self = netdev_priv(dev);
1480         int boguscount = 0;
1481         int iobase;
1482         int iir, lsr;
1483
1484         /* Already locked comming here in smsc_ircc_interrupt() */
1485         /*spin_lock(&self->lock);*/
1486
1487         iobase = self->io.sir_base;
1488
1489         iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1490         if (iir == 0)
1491                 return IRQ_NONE;
1492         while (iir) {
1493                 /* Clear interrupt */
1494                 lsr = inb(iobase + UART_LSR);
1495
1496                 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1497                             __FUNCTION__, iir, lsr, iobase);
1498
1499                 switch (iir) {
1500                 case UART_IIR_RLSI:
1501                         IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1502                         break;
1503                 case UART_IIR_RDI:
1504                         /* Receive interrupt */
1505                         smsc_ircc_sir_receive(self);
1506                         break;
1507                 case UART_IIR_THRI:
1508                         if (lsr & UART_LSR_THRE)
1509                                 /* Transmitter ready for data */
1510                                 smsc_ircc_sir_write_wakeup(self);
1511                         break;
1512                 default:
1513                         IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1514                                    __FUNCTION__, iir);
1515                         break;
1516                 }
1517
1518                 /* Make sure we don't stay here to long */
1519                 if (boguscount++ > 100)
1520                         break;
1521
1522                 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1523         }
1524         /*spin_unlock(&self->lock);*/
1525         return IRQ_HANDLED;
1526 }
1527
1528
1529 #if 0 /* unused */
1530 /*
1531  * Function ircc_is_receiving (self)
1532  *
1533  *    Return TRUE is we are currently receiving a frame
1534  *
1535  */
1536 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1537 {
1538         int status = FALSE;
1539         /* int iobase; */
1540
1541         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1542
1543         IRDA_ASSERT(self != NULL, return FALSE;);
1544
1545         IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1546                    get_dma_residue(self->io.dma));
1547
1548         status = (self->rx_buff.state != OUTSIDE_FRAME);
1549
1550         return status;
1551 }
1552 #endif /* unused */
1553
1554 static int smsc_ircc_request_irq(struct smsc_ircc_cb *self)
1555 {
1556         int error;
1557
1558         error = request_irq(self->io.irq, smsc_ircc_interrupt, 0,
1559                             self->netdev->name, self->netdev);
1560         if (error)
1561                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d, err=%d\n",
1562                            __FUNCTION__, self->io.irq, error);
1563
1564         return error;
1565 }
1566
1567 static void smsc_ircc_start_interrupts(struct smsc_ircc_cb *self)
1568 {
1569         unsigned long flags;
1570
1571         spin_lock_irqsave(&self->lock, flags);
1572
1573         self->io.speed = 0;
1574         smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1575
1576         spin_unlock_irqrestore(&self->lock, flags);
1577 }
1578
1579 static void smsc_ircc_stop_interrupts(struct smsc_ircc_cb *self)
1580 {
1581         int iobase = self->io.fir_base;
1582         unsigned long flags;
1583
1584         spin_lock_irqsave(&self->lock, flags);
1585
1586         register_bank(iobase, 0);
1587         outb(0, iobase + IRCC_IER);
1588         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1589         outb(0x00, iobase + IRCC_MASTER);
1590
1591         spin_unlock_irqrestore(&self->lock, flags);
1592 }
1593
1594
1595 /*
1596  * Function smsc_ircc_net_open (dev)
1597  *
1598  *    Start the device
1599  *
1600  */
1601 static int smsc_ircc_net_open(struct net_device *dev)
1602 {
1603         struct smsc_ircc_cb *self;
1604         char hwname[16];
1605
1606         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1607
1608         IRDA_ASSERT(dev != NULL, return -1;);
1609         self = netdev_priv(dev);
1610         IRDA_ASSERT(self != NULL, return 0;);
1611
1612         if (self->io.suspended) {
1613                 IRDA_DEBUG(0, "%s(), device is suspended\n", __FUNCTION__);
1614                 return -EAGAIN;
1615         }
1616
1617         if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1618                         (void *) dev)) {
1619                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1620                            __FUNCTION__, self->io.irq);
1621                 return -EAGAIN;
1622         }
1623
1624         smsc_ircc_start_interrupts(self);
1625
1626         /* Give self a hardware name */
1627         /* It would be cool to offer the chip revision here - Jean II */
1628         sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1629
1630         /*
1631          * Open new IrLAP layer instance, now that everything should be
1632          * initialized properly
1633          */
1634         self->irlap = irlap_open(dev, &self->qos, hwname);
1635
1636         /*
1637          * Always allocate the DMA channel after the IRQ,
1638          * and clean up on failure.
1639          */
1640         if (request_dma(self->io.dma, dev->name)) {
1641                 smsc_ircc_net_close(dev);
1642
1643                 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1644                              __FUNCTION__, self->io.dma);
1645                 return -EAGAIN;
1646         }
1647
1648         netif_start_queue(dev);
1649
1650         return 0;
1651 }
1652
1653 /*
1654  * Function smsc_ircc_net_close (dev)
1655  *
1656  *    Stop the device
1657  *
1658  */
1659 static int smsc_ircc_net_close(struct net_device *dev)
1660 {
1661         struct smsc_ircc_cb *self;
1662
1663         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1664
1665         IRDA_ASSERT(dev != NULL, return -1;);
1666         self = netdev_priv(dev);
1667         IRDA_ASSERT(self != NULL, return 0;);
1668
1669         /* Stop device */
1670         netif_stop_queue(dev);
1671
1672         /* Stop and remove instance of IrLAP */
1673         if (self->irlap)
1674                 irlap_close(self->irlap);
1675         self->irlap = NULL;
1676
1677         smsc_ircc_stop_interrupts(self);
1678
1679         /* if we are called from smsc_ircc_resume we don't have IRQ reserved */
1680         if (!self->io.suspended)
1681                 free_irq(self->io.irq, dev);
1682
1683         disable_dma(self->io.dma);
1684         free_dma(self->io.dma);
1685
1686         return 0;
1687 }
1688
1689 static int smsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
1690 {
1691         struct smsc_ircc_cb *self = platform_get_drvdata(dev);
1692
1693         if (!self->io.suspended) {
1694                 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
1695
1696                 rtnl_lock();
1697                 if (netif_running(self->netdev)) {
1698                         netif_device_detach(self->netdev);
1699                         smsc_ircc_stop_interrupts(self);
1700                         free_irq(self->io.irq, self->netdev);
1701                         disable_dma(self->io.dma);
1702                 }
1703                 self->io.suspended = 1;
1704                 rtnl_unlock();
1705         }
1706
1707         return 0;
1708 }
1709
1710 static int smsc_ircc_resume(struct platform_device *dev)
1711 {
1712         struct smsc_ircc_cb *self = platform_get_drvdata(dev);
1713
1714         if (self->io.suspended) {
1715                 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
1716
1717                 rtnl_lock();
1718                 smsc_ircc_init_chip(self);
1719                 if (netif_running(self->netdev)) {
1720                         if (smsc_ircc_request_irq(self)) {
1721                                 /*
1722                                  * Don't fail resume process, just kill this
1723                                  * network interface
1724                                  */
1725                                 unregister_netdevice(self->netdev);
1726                         } else {
1727                                 enable_dma(self->io.dma);
1728                                 smsc_ircc_start_interrupts(self);
1729                                 netif_device_attach(self->netdev);
1730                         }
1731                 }
1732                 self->io.suspended = 0;
1733                 rtnl_unlock();
1734         }
1735         return 0;
1736 }
1737
1738 /*
1739  * Function smsc_ircc_close (self)
1740  *
1741  *    Close driver instance
1742  *
1743  */
1744 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1745 {
1746         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1747
1748         IRDA_ASSERT(self != NULL, return -1;);
1749
1750         platform_device_unregister(self->pldev);
1751
1752         /* Remove netdevice */
1753         unregister_netdev(self->netdev);
1754
1755         smsc_ircc_stop_interrupts(self);
1756
1757         /* Release the PORTS that this driver is using */
1758         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n",  __FUNCTION__,
1759                    self->io.fir_base);
1760
1761         release_region(self->io.fir_base, self->io.fir_ext);
1762
1763         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1764                    self->io.sir_base);
1765
1766         release_region(self->io.sir_base, self->io.sir_ext);
1767
1768         if (self->tx_buff.head)
1769                 dma_free_coherent(NULL, self->tx_buff.truesize,
1770                                   self->tx_buff.head, self->tx_buff_dma);
1771
1772         if (self->rx_buff.head)
1773                 dma_free_coherent(NULL, self->rx_buff.truesize,
1774                                   self->rx_buff.head, self->rx_buff_dma);
1775
1776         free_netdev(self->netdev);
1777
1778         return 0;
1779 }
1780
1781 static void __exit smsc_ircc_cleanup(void)
1782 {
1783         int i;
1784
1785         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1786
1787         for (i = 0; i < 2; i++) {
1788                 if (dev_self[i])
1789                         smsc_ircc_close(dev_self[i]);
1790         }
1791
1792         platform_driver_unregister(&smsc_ircc_driver);
1793 }
1794
1795 /*
1796  *      Start SIR operations
1797  *
1798  * This function *must* be called with spinlock held, because it may
1799  * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1800  */
1801 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1802 {
1803         struct net_device *dev;
1804         int fir_base, sir_base;
1805
1806         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1807
1808         IRDA_ASSERT(self != NULL, return;);
1809         dev = self->netdev;
1810         IRDA_ASSERT(dev != NULL, return;);
1811         dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1812
1813         fir_base = self->io.fir_base;
1814         sir_base = self->io.sir_base;
1815
1816         /* Reset everything */
1817         outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1818
1819         #if SMSC_IRCC2_C_SIR_STOP
1820         /*smsc_ircc_sir_stop(self);*/
1821         #endif
1822
1823         register_bank(fir_base, 1);
1824         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1825
1826         /* Initialize UART */
1827         outb(UART_LCR_WLEN8, sir_base + UART_LCR);  /* Reset DLAB */
1828         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1829
1830         /* Turn on interrups */
1831         outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1832
1833         IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1834
1835         outb(0x00, fir_base + IRCC_MASTER);
1836 }
1837
1838 #if SMSC_IRCC2_C_SIR_STOP
1839 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1840 {
1841         int iobase;
1842
1843         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1844         iobase = self->io.sir_base;
1845
1846         /* Reset UART */
1847         outb(0, iobase + UART_MCR);
1848
1849         /* Turn off interrupts */
1850         outb(0, iobase + UART_IER);
1851 }
1852 #endif
1853
1854 /*
1855  * Function smsc_sir_write_wakeup (self)
1856  *
1857  *    Called by the SIR interrupt handler when there's room for more data.
1858  *    If we have more packets to send, we send them here.
1859  *
1860  */
1861 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1862 {
1863         int actual = 0;
1864         int iobase;
1865         int fcr;
1866
1867         IRDA_ASSERT(self != NULL, return;);
1868
1869         IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1870
1871         iobase = self->io.sir_base;
1872
1873         /* Finished with frame?  */
1874         if (self->tx_buff.len > 0)  {
1875                 /* Write data left in transmit buffer */
1876                 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1877                                       self->tx_buff.data, self->tx_buff.len);
1878                 self->tx_buff.data += actual;
1879                 self->tx_buff.len  -= actual;
1880         } else {
1881
1882         /*if (self->tx_buff.len ==0)  {*/
1883
1884                 /*
1885                  *  Now serial buffer is almost free & we can start
1886                  *  transmission of another packet. But first we must check
1887                  *  if we need to change the speed of the hardware
1888                  */
1889                 if (self->new_speed) {
1890                         IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1891                                    __FUNCTION__, self->new_speed);
1892                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
1893                         smsc_ircc_change_speed(self, self->new_speed);
1894                         self->new_speed = 0;
1895                 } else {
1896                         /* Tell network layer that we want more frames */
1897                         netif_wake_queue(self->netdev);
1898                 }
1899                 self->stats.tx_packets++;
1900
1901                 if (self->io.speed <= 115200) {
1902                         /*
1903                          * Reset Rx FIFO to make sure that all reflected transmit data
1904                          * is discarded. This is needed for half duplex operation
1905                          */
1906                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1907                         fcr |= self->io.speed < 38400 ?
1908                                         UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1909
1910                         outb(fcr, iobase + UART_FCR);
1911
1912                         /* Turn on receive interrupts */
1913                         outb(UART_IER_RDI, iobase + UART_IER);
1914                 }
1915         }
1916 }
1917
1918 /*
1919  * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1920  *
1921  *    Fill Tx FIFO with transmit data
1922  *
1923  */
1924 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1925 {
1926         int actual = 0;
1927
1928         /* Tx FIFO should be empty! */
1929         if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1930                 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1931                 return 0;
1932         }
1933
1934         /* Fill FIFO with current frame */
1935         while (fifo_size-- > 0 && actual < len) {
1936                 /* Transmit next byte */
1937                 outb(buf[actual], iobase + UART_TX);
1938                 actual++;
1939         }
1940         return actual;
1941 }
1942
1943 /*
1944  * Function smsc_ircc_is_receiving (self)
1945  *
1946  *    Returns true is we are currently receiving data
1947  *
1948  */
1949 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1950 {
1951         return (self->rx_buff.state != OUTSIDE_FRAME);
1952 }
1953
1954
1955 /*
1956  * Function smsc_ircc_probe_transceiver(self)
1957  *
1958  *    Tries to find the used Transceiver
1959  *
1960  */
1961 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1962 {
1963         unsigned int    i;
1964
1965         IRDA_ASSERT(self != NULL, return;);
1966
1967         for (i = 0; smsc_transceivers[i].name != NULL; i++)
1968                 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1969                         IRDA_MESSAGE(" %s transceiver found\n",
1970                                      smsc_transceivers[i].name);
1971                         self->transceiver= i + 1;
1972                         return;
1973                 }
1974
1975         IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1976                      smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1977
1978         self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1979 }
1980
1981
1982 /*
1983  * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1984  *
1985  *    Set the transceiver according to the speed
1986  *
1987  */
1988 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1989 {
1990         unsigned int trx;
1991
1992         trx = self->transceiver;
1993         if (trx > 0)
1994                 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1995 }
1996
1997 /*
1998  * Function smsc_ircc_wait_hw_transmitter_finish ()
1999  *
2000  *    Wait for the real end of HW transmission
2001  *
2002  * The UART is a strict FIFO, and we get called only when we have finished
2003  * pushing data to the FIFO, so the maximum amount of time we must wait
2004  * is only for the FIFO to drain out.
2005  *
2006  * We use a simple calibrated loop. We may need to adjust the loop
2007  * delay (udelay) to balance I/O traffic and latency. And we also need to
2008  * adjust the maximum timeout.
2009  * It would probably be better to wait for the proper interrupt,
2010  * but it doesn't seem to be available.
2011  *
2012  * We can't use jiffies or kernel timers because :
2013  * 1) We are called from the interrupt handler, which disable softirqs,
2014  * so jiffies won't be increased
2015  * 2) Jiffies granularity is usually very coarse (10ms), and we don't
2016  * want to wait that long to detect stuck hardware.
2017  * Jean II
2018  */
2019
2020 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
2021 {
2022         int iobase = self->io.sir_base;
2023         int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
2024
2025         /* Calibrated busy loop */
2026         while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
2027                 udelay(1);
2028
2029         if (count == 0)
2030                 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
2031 }
2032
2033
2034 /* PROBING
2035  *
2036  *
2037  */
2038
2039 static int __init smsc_ircc_look_for_chips(void)
2040 {
2041         struct smsc_chip_address *address;
2042         char *type;
2043         unsigned int cfg_base, found;
2044
2045         found = 0;
2046         address = possible_addresses;
2047
2048         while (address->cfg_base) {
2049                 cfg_base = address->cfg_base;
2050
2051                 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2052
2053                 if (address->type & SMSCSIO_TYPE_FDC) {
2054                         type = "FDC";
2055                         if (address->type & SMSCSIO_TYPE_FLAT)
2056                                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2057                                         found++;
2058
2059                         if (address->type & SMSCSIO_TYPE_PAGED)
2060                                 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2061                                         found++;
2062                 }
2063                 if (address->type & SMSCSIO_TYPE_LPC) {
2064                         type = "LPC";
2065                         if (address->type & SMSCSIO_TYPE_FLAT)
2066                                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2067                                         found++;
2068
2069                         if (address->type & SMSCSIO_TYPE_PAGED)
2070                                 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2071                                         found++;
2072                 }
2073                 address++;
2074         }
2075         return found;
2076 }
2077
2078 /*
2079  * Function smsc_superio_flat (chip, base, type)
2080  *
2081  *    Try to get configuration of a smc SuperIO chip with flat register model
2082  *
2083  */
2084 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2085 {
2086         unsigned short firbase, sirbase;
2087         u8 mode, dma, irq;
2088         int ret = -ENODEV;
2089
2090         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2091
2092         if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2093                 return ret;
2094
2095         outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2096         mode = inb(cfgbase + 1);
2097
2098         /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2099
2100         if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2101                 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2102
2103         outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2104         sirbase = inb(cfgbase + 1) << 2;
2105
2106         /* FIR iobase */
2107         outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2108         firbase = inb(cfgbase + 1) << 3;
2109
2110         /* DMA */
2111         outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2112         dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2113
2114         /* IRQ */
2115         outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2116         irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2117
2118         IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2119
2120         if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2121                 ret = 0;
2122
2123         /* Exit configuration */
2124         outb(SMSCSIO_CFGEXITKEY, cfgbase);
2125
2126         return ret;
2127 }
2128
2129 /*
2130  * Function smsc_superio_paged (chip, base, type)
2131  *
2132  *    Try  to get configuration of a smc SuperIO chip with paged register model
2133  *
2134  */
2135 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2136 {
2137         unsigned short fir_io, sir_io;
2138         int ret = -ENODEV;
2139
2140         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2141
2142         if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2143                 return ret;
2144
2145         /* Select logical device (UART2) */
2146         outb(0x07, cfg_base);
2147         outb(0x05, cfg_base + 1);
2148
2149         /* SIR iobase */
2150         outb(0x60, cfg_base);
2151         sir_io = inb(cfg_base + 1) << 8;
2152         outb(0x61, cfg_base);
2153         sir_io |= inb(cfg_base + 1);
2154
2155         /* Read FIR base */
2156         outb(0x62, cfg_base);
2157         fir_io = inb(cfg_base + 1) << 8;
2158         outb(0x63, cfg_base);
2159         fir_io |= inb(cfg_base + 1);
2160         outb(0x2b, cfg_base); /* ??? */
2161
2162         if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2163                 ret = 0;
2164
2165         /* Exit configuration */
2166         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2167
2168         return ret;
2169 }
2170
2171
2172 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2173 {
2174         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2175
2176         outb(reg, cfg_base);
2177         return inb(cfg_base) != reg ? -1 : 0;
2178 }
2179
2180 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2181 {
2182         u8 devid, xdevid, rev;
2183
2184         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2185
2186         /* Leave configuration */
2187
2188         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2189
2190         if (inb(cfg_base) == SMSCSIO_CFGEXITKEY)        /* not a smc superio chip */
2191                 return NULL;
2192
2193         outb(reg, cfg_base);
2194
2195         xdevid = inb(cfg_base + 1);
2196
2197         /* Enter configuration */
2198
2199         outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2200
2201         #if 0
2202         if (smsc_access(cfg_base,0x55)) /* send second key and check */
2203                 return NULL;
2204         #endif
2205
2206         /* probe device ID */
2207
2208         if (smsc_access(cfg_base, reg))
2209                 return NULL;
2210
2211         devid = inb(cfg_base + 1);
2212
2213         if (devid == 0 || devid == 0xff)        /* typical values for unused port */
2214                 return NULL;
2215
2216         /* probe revision ID */
2217
2218         if (smsc_access(cfg_base, reg + 1))
2219                 return NULL;
2220
2221         rev = inb(cfg_base + 1);
2222
2223         if (rev >= 128)                 /* i think this will make no sense */
2224                 return NULL;
2225
2226         if (devid == xdevid)            /* protection against false positives */
2227                 return NULL;
2228
2229         /* Check for expected device ID; are there others? */
2230
2231         while (chip->devid != devid) {
2232
2233                 chip++;
2234
2235                 if (chip->name == NULL)
2236                         return NULL;
2237         }
2238
2239         IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2240                      devid, rev, cfg_base, type, chip->name);
2241
2242         if (chip->rev > rev) {
2243                 IRDA_MESSAGE("Revision higher than expected\n");
2244                 return NULL;
2245         }
2246
2247         if (chip->flags & NoIRDA)
2248                 IRDA_MESSAGE("chipset does not support IRDA\n");
2249
2250         return chip;
2251 }
2252
2253 static int __init smsc_superio_fdc(unsigned short cfg_base)
2254 {
2255         int ret = -1;
2256
2257         if (!request_region(cfg_base, 2, driver_name)) {
2258                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2259                              __FUNCTION__, cfg_base);
2260         } else {
2261                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2262                     !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2263                         ret =  0;
2264
2265                 release_region(cfg_base, 2);
2266         }
2267
2268         return ret;
2269 }
2270
2271 static int __init smsc_superio_lpc(unsigned short cfg_base)
2272 {
2273         int ret = -1;
2274
2275         if (!request_region(cfg_base, 2, driver_name)) {
2276                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2277                              __FUNCTION__, cfg_base);
2278         } else {
2279                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2280                     !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2281                         ret = 0;
2282
2283                 release_region(cfg_base, 2);
2284         }
2285         return ret;
2286 }
2287
2288 /************************************************
2289  *
2290  * Transceivers specific functions
2291  *
2292  ************************************************/
2293
2294
2295 /*
2296  * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2297  *
2298  *    Program transceiver through smsc-ircc ATC circuitry
2299  *
2300  */
2301
2302 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2303 {
2304         unsigned long jiffies_now, jiffies_timeout;
2305         u8 val;
2306
2307         jiffies_now = jiffies;
2308         jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2309
2310         /* ATC */
2311         register_bank(fir_base, 4);
2312         outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2313              fir_base + IRCC_ATC);
2314
2315         while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2316                 !time_after(jiffies, jiffies_timeout))
2317                 /* empty */;
2318
2319         if (val)
2320                 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2321                              inb(fir_base + IRCC_ATC));
2322 }
2323
2324 /*
2325  * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2326  *
2327  *    Probe transceiver smsc-ircc ATC circuitry
2328  *
2329  */
2330
2331 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2332 {
2333         return 0;
2334 }
2335
2336 /*
2337  * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2338  *
2339  *    Set transceiver
2340  *
2341  */
2342
2343 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2344 {
2345         u8 fast_mode;
2346
2347         switch (speed) {
2348         default:
2349         case 576000 :
2350                 fast_mode = 0;
2351                 break;
2352         case 1152000 :
2353         case 4000000 :
2354                 fast_mode = IRCC_LCR_A_FAST;
2355                 break;
2356         }
2357         register_bank(fir_base, 0);
2358         outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2359 }
2360
2361 /*
2362  * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2363  *
2364  *    Probe transceiver
2365  *
2366  */
2367
2368 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2369 {
2370         return 0;
2371 }
2372
2373 /*
2374  * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2375  *
2376  *    Set transceiver
2377  *
2378  */
2379
2380 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2381 {
2382         u8 fast_mode;
2383
2384         switch (speed) {
2385         default:
2386         case 576000 :
2387                 fast_mode = 0;
2388                 break;
2389         case 1152000 :
2390         case 4000000 :
2391                 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2392                 break;
2393
2394         }
2395         /* This causes an interrupt */
2396         register_bank(fir_base, 0);
2397         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2398 }
2399
2400 /*
2401  * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2402  *
2403  *    Probe transceiver
2404  *
2405  */
2406
2407 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2408 {
2409         return 0;
2410 }
2411
2412
2413 module_init(smsc_ircc_init);
2414 module_exit(smsc_ircc_cleanup);