1 /********************************************************************
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
30 ********************************************************************/
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/ioport.h>
37 #include <linux/delay.h>
38 #include <linux/slab.h>
39 #include <linux/init.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
46 #include <asm/byteorder.h>
50 #include <net/irda/wrapper.h>
51 #include <net/irda/irda.h>
52 #include <net/irda/irda_device.h>
63 #define DBG(x) {if (debug) x;}
65 #define VIA_MODULE_NAME "via-ircc"
66 #define CHIP_IO_EXTENT 8
67 #define BROKEN_DONGLE_ID
69 static char *driver_name = "via-ircc";
71 /* Module parameters */
72 static int qos_mtt_bits = 0x07; /* 1 ms or more */
73 static int dongle_id = 9; //defalut IBM type
75 /* Resource is allocate by BIOS user only need to supply dongle_id*/
76 MODULE_PARM(dongle_id, "i");
78 /* Max 4 instances for now */
79 static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
82 static int via_ircc_open(int i, chipio_t * info, unsigned int id);
83 static int __exit via_ircc_close(struct via_ircc_cb *self);
84 static int via_ircc_setup(chipio_t * info, unsigned int id);
85 static int via_ircc_dma_receive(struct via_ircc_cb *self);
86 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
88 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
89 struct net_device *dev);
90 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
91 struct net_device *dev);
92 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
93 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
94 struct pt_regs *regs);
95 static int via_ircc_is_receiving(struct via_ircc_cb *self);
96 static int via_ircc_read_dongle_id(int iobase);
98 static int via_ircc_net_open(struct net_device *dev);
99 static int via_ircc_net_close(struct net_device *dev);
100 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
102 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
104 static void via_ircc_change_dongle_speed(int iobase, int speed,
106 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
107 static void hwreset(struct via_ircc_cb *self);
108 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
109 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
110 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
111 static void __exit via_remove_one (struct pci_dev *pdev);
113 /* Should use udelay() instead, even if we are x86 only - Jean II */
114 static void iodelay(int udelay)
119 for (i = 0; i < udelay; i++) {
124 static struct pci_device_id via_pci_tbl[] = {
125 { PCI_VENDOR_ID_VIA, DeviceID1, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
126 { PCI_VENDOR_ID_VIA, DeviceID2, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
127 { PCI_VENDOR_ID_VIA, DeviceID3, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
128 { PCI_VENDOR_ID_VIA, DeviceID4, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
129 { PCI_VENDOR_ID_VIA, DeviceID5, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
133 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
136 static struct pci_driver via_driver = {
137 .name = VIA_MODULE_NAME,
138 .id_table = via_pci_tbl,
139 .probe = via_init_one,
140 .remove = via_remove_one,
145 * Function via_ircc_init ()
147 * Initialize chip. Just find out chip type and resource.
149 static int __init via_ircc_init(void)
154 DBG(printk(KERN_INFO "via_ircc_init ......\n"));
156 rc = pci_register_driver (&via_driver);
158 DBG(printk(KERN_INFO "via_ircc_init :rc = %d......\n",rc));
162 DBG(printk(KERN_INFO "via_ircc_init return -ENODEV......\n"));
164 if (rc == 0) pci_unregister_driver (&via_driver);
171 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
174 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
175 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
179 DBG(printk(KERN_INFO "via_init_one : Device ID=(0X%X)\n",id->device));
181 if(id->device != DeviceID1 && id->device != DeviceID2 &&
182 id->device != DeviceID3 && id->device != DeviceID4 &&
183 id->device != DeviceID5 ){
185 DBG(printk(KERN_INFO "via_init_one : Device ID(0X%X) not Supported\n",id->device));
187 return -ENODEV; //South not exist !!!!!
189 rc = pci_enable_device (pcidev);
191 DBG(printk(KERN_INFO "via_init_one : rc=%d\n",rc));
196 if ( ReadLPCReg(0x20) != 0x3C )
200 if (Chipset==0x3076) {
202 DBG(printk(KERN_INFO "via_init_one : 3076 ......\n"));
204 WriteLPCReg(7,0x0c );
205 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
206 if((temp&0x01)==1) { // BIOS close or no FIR
207 WriteLPCReg(0x1d, 0x82 );
208 WriteLPCReg(0x23,0x18);
209 temp=ReadLPCReg(0xF0);
211 temp=(ReadLPCReg(0x74)&0x03); //DMA
213 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
216 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
220 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
221 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
222 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
223 FirIOBase=FirIOBase ;
224 info.fir_base=FirIOBase;
228 pci_read_config_byte(pcidev,0x40,&bTmp);
229 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
230 pci_read_config_byte(pcidev,0x42,&bTmp);
231 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
232 pci_write_config_byte(pcidev,0x5a,0xc0);
233 WriteLPCReg(0x28, 0x70 );
234 if (via_ircc_open(0, &info,0x3076) == 0)
237 rc = -ENODEV; //IR not turn on
238 } else { //Not VT1211
240 DBG(printk(KERN_INFO "via_init_one : 3096 ......\n"));
242 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
243 if((bTmp&0x01)==1) { // BIOS enable FIR
244 //Enable Double DMA clock
245 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
246 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
247 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
248 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
249 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
250 pci_write_config_byte(pcidev,0x44,0x4e);
251 //---------- read configuration from Function0 of south bridge
253 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
254 FirDRQ0 = (bTmp1 & 0x30) >> 4;
255 pci_read_config_byte(pcidev,0x44,&bTmp1);
256 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
258 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
259 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
262 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
263 FirIRQ = bTmp1 & 0x0f;
265 pci_read_config_byte(pcidev,0x69,&bTmp);
266 FirIOBase = bTmp << 8;//hight byte
267 pci_read_config_byte(pcidev,0x68,&bTmp);
268 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
269 //-------------------------
270 info.fir_base=FirIOBase;
274 if (via_ircc_open(0, &info,0x3096) == 0)
277 rc = -ENODEV; //IR not turn on !!!!!
280 DBG(printk(KERN_INFO "via_init_one End : rc=%d\n",rc));
286 * Function via_ircc_clean ()
288 * Close all configured chips
291 static void __exit via_ircc_clean(void)
296 DBG(printk(KERN_INFO "via_ircc_clean\n"));
298 for (i=0; i < 4; i++) {
300 via_ircc_close(dev_self[i]);
304 static void __exit via_remove_one (struct pci_dev *pdev)
307 DBG(printk(KERN_INFO "via_remove_one : ......\n"));
313 static void __exit via_ircc_cleanup(void)
317 DBG(printk(KERN_INFO "via_ircc_cleanup ......\n"));
320 pci_unregister_driver (&via_driver);
324 * Function via_ircc_open (iobase, irq)
326 * Open driver instance
329 static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
331 struct net_device *dev;
332 struct via_ircc_cb *self;
335 if ((via_ircc_setup(info, id)) == -1)
338 /* Allocate new instance of the driver */
339 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
345 spin_lock_init(&self->lock);
347 /* Need to store self somewhere */
350 /* Initialize Resource */
351 self->io.cfg_base = info->cfg_base;
352 self->io.fir_base = info->fir_base;
353 self->io.irq = info->irq;
354 self->io.fir_ext = CHIP_IO_EXTENT;
355 self->io.dma = info->dma;
356 self->io.dma2 = info->dma2;
357 self->io.fifo_size = 32;
359 self->st_fifo.len = 0;
360 self->RxDataReady = 0;
362 /* Reserve the ioports that we need */
363 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
364 // WARNING("%s(), can't get iobase of 0x%03x\n", __FUNCTION__, self->io.fir_base);
369 /* Initialize QoS for this device */
370 irda_init_max_qos_capabilies(&self->qos);
371 /* The only value we must override it the baudrate */
372 // self->qos.baud_rate.bits = IR_9600;// May use this for testing
374 self->qos.baud_rate.bits =
375 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
376 IR_576000 | IR_1152000 | (IR_4000000 << 8);
378 self->qos.min_turn_time.bits = qos_mtt_bits;
379 irda_qos_bits_to_value(&self->qos);
381 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
382 self->rx_buff.truesize = 14384 + 2048;
383 self->tx_buff.truesize = 14384 + 2048;
385 /* Allocate memory if needed */
387 dma_alloc_coherent(NULL, self->rx_buff.truesize,
388 &self->rx_buff_dma, GFP_KERNEL);
389 if (self->rx_buff.head == NULL) {
393 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
396 dma_alloc_coherent(NULL, self->tx_buff.truesize,
397 &self->tx_buff_dma, GFP_KERNEL);
398 if (self->tx_buff.head == NULL) {
402 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
404 self->rx_buff.in_frame = FALSE;
405 self->rx_buff.state = OUTSIDE_FRAME;
406 self->tx_buff.data = self->tx_buff.head;
407 self->rx_buff.data = self->rx_buff.head;
409 /* Reset Tx queue info */
410 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
411 self->tx_fifo.tail = self->tx_buff.head;
413 /* Keep track of module usage */
414 SET_MODULE_OWNER(dev);
416 /* Override the network functions we need to use */
417 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
418 dev->open = via_ircc_net_open;
419 dev->stop = via_ircc_net_close;
420 dev->do_ioctl = via_ircc_net_ioctl;
421 dev->get_stats = via_ircc_net_get_stats;
423 err = register_netdev(dev);
427 MESSAGE("IrDA: Registered device %s\n", dev->name);
429 /* Check if user has supplied the dongle id or not */
431 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
432 self->io.dongle_id = dongle_id;
433 via_ircc_change_dongle_speed(self->io.fir_base, 9600,
438 dma_free_coherent(NULL, self->tx_buff.truesize,
439 self->tx_buff.head, self->tx_buff_dma);
441 dma_free_coherent(NULL, self->rx_buff.truesize,
442 self->rx_buff.head, self->rx_buff_dma);
444 release_region(self->io.fir_base, self->io.fir_ext);
452 * Function via_ircc_close (self)
454 * Close driver instance
457 static int __exit via_ircc_close(struct via_ircc_cb *self)
461 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
463 ASSERT(self != NULL, return -1;);
465 iobase = self->io.fir_base;
467 ResetChip(iobase, 5); //hardware reset.
468 /* Remove netdevice */
469 unregister_netdev(self->netdev);
471 /* Release the PORT that this driver is using */
472 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
473 __FUNCTION__, self->io.fir_base);
474 release_region(self->io.fir_base, self->io.fir_ext);
475 if (self->tx_buff.head)
476 dma_free_coherent(NULL, self->tx_buff.truesize,
477 self->tx_buff.head, self->tx_buff_dma);
478 if (self->rx_buff.head)
479 dma_free_coherent(NULL, self->rx_buff.truesize,
480 self->rx_buff.head, self->rx_buff_dma);
481 dev_self[self->index] = NULL;
483 free_netdev(self->netdev);
489 * Function via_ircc_setup (info)
491 * Returns non-negative on success.
494 static int via_ircc_setup(chipio_t * info, unsigned int chip_id)
496 int iobase = info->fir_base;
498 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
500 EnRXFIFOReadyInt(iobase, OFF);
501 EnRXFIFOHalfLevelInt(iobase, OFF);
502 EnTXFIFOHalfLevelInt(iobase, OFF);
503 EnTXFIFOUnderrunEOMInt(iobase, ON);
504 EnTXFIFOReadyInt(iobase, OFF);
505 InvertTX(iobase, OFF);
506 InvertRX(iobase, OFF);
507 if (ReadLPCReg(0x20) == 0x3c)
508 WriteLPCReg(0xF0, 0); // for VT1211
509 if (IsSIROn(iobase)) {
510 SIRFilter(iobase, ON);
511 SIRRecvAny(iobase, ON);
513 SIRFilter(iobase, OFF);
514 SIRRecvAny(iobase, OFF);
517 EnRXSpecInt(iobase, ON);
519 WriteReg(iobase, I_ST_CT_0, 0x80);
520 EnableDMA(iobase, ON);
526 * Function via_ircc_read_dongle_id (void)
529 static int via_ircc_read_dongle_id(int iobase)
537 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
538 * Change speed of the attach dongle
539 * only implement two type of dongle currently.
541 static void via_ircc_change_dongle_speed(int iobase, int speed,
546 WriteReg(iobase, I_ST_CT_0, 0x0);
547 switch (dongle_id) { //HP1100
548 case 0x00: /* same as */
549 case 0x01: /* Differential serial interface */
551 case 0x02: /* same as */
552 case 0x03: /* Reserved */
554 case 0x04: /* Sharp RY5HD01 */
556 case 0x05: /* Reserved, but this is what the Thinkpad reports */
558 case 0x06: /* Single-ended serial interface */
560 case 0x07: /* Consumer-IR only */
563 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
564 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
565 InvertTX(iobase, OFF);
566 InvertRX(iobase, OFF);
568 EnRX2(iobase, ON); //sir to rx2
569 EnGPIOtoRX2(iobase, OFF);
571 if (IsSIROn(iobase)) { //sir
573 SlowIRRXLowActive(iobase, ON);
575 SlowIRRXLowActive(iobase, OFF);
577 if (IsMIROn(iobase)) { //mir
579 SlowIRRXLowActive(iobase, OFF);
582 if (IsFIROn(iobase)) { //fir
584 SlowIRRXLowActive(iobase, OFF);
590 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
591 UseOneRX(iobase, ON); //use ONE RX....RX1
592 InvertTX(iobase, OFF);
593 InvertRX(iobase, OFF); // invert RX pin
595 EnGPIOtoRX2(iobase, OFF);
596 if (IsSIROn(iobase)) { //sir
598 SlowIRRXLowActive(iobase, ON);
601 SlowIRRXLowActive(iobase, OFF);
603 if (IsMIROn(iobase)) { //mir
605 SlowIRRXLowActive(iobase, OFF);
608 SlowIRRXLowActive(iobase, ON);
610 if (IsFIROn(iobase)) { //fir
612 SlowIRRXLowActive(iobase, OFF);
617 SlowIRRXLowActive(iobase, ON);
620 WriteTX(iobase, OFF);
625 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
626 InvertTX(iobase, OFF);
627 InvertRX(iobase, OFF);
628 SlowIRRXLowActive(iobase, OFF);
629 if (IsSIROn(iobase)) { //sir
630 EnGPIOtoRX2(iobase, OFF);
631 WriteGIO(iobase, OFF);
632 EnRX2(iobase, OFF); //sir to rx2
634 EnGPIOtoRX2(iobase, OFF);
635 WriteGIO(iobase, OFF);
636 EnRX2(iobase, OFF); //fir to rx
639 case 0x0ff: /* Vishay */
642 else if (IsMIROn(iobase))
644 else if (IsFIROn(iobase))
646 else if (IsVFIROn(iobase))
648 SI_SetMode(iobase, mode);
650 WriteReg(iobase, I_ST_CT_0, 0x80);
655 * Function via_ircc_change_speed (self, baud)
657 * Change the speed of the device
660 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
662 struct net_device *dev = self->netdev;
666 iobase = self->io.fir_base;
667 /* Update accounting for new speed */
668 self->io.speed = speed;
670 DBG(printk(KERN_INFO "change_speed =%x......\n", speed));
674 if (self->io.speed > 0x2580)
681 /* Controller mode sellection */
720 SetPulseWidth(iobase, 0);
721 SetSendPreambleCount(iobase, 14);
733 /* Set baudrate to 0x19[2..7] */
734 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
735 bTmp = bTmp | (value << 2);
736 WriteReg(iobase, I_CF_H_1, bTmp);
737 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
738 // EnTXFIFOHalfLevelInt(iobase,ON);
739 /* Set FIFO size to 64 */
741 /* Enable some interrupts so we can receive frames */
742 //EnAllInt(iobase,ON);
744 if (IsSIROn(iobase)) {
745 SIRFilter(iobase, ON);
746 SIRRecvAny(iobase, ON);
748 SIRFilter(iobase, OFF);
749 SIRRecvAny(iobase, OFF);
751 if (speed > 115200) {
752 /* Install FIR xmit handler */
753 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
754 via_ircc_dma_receive(self);
756 /* Install SIR xmit handler */
757 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
759 netif_wake_queue(dev);
763 * Function via_ircc_hard_xmit (skb, dev)
765 * Transmit the frame!
768 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
769 struct net_device *dev)
771 struct via_ircc_cb *self;
776 self = (struct via_ircc_cb *) dev->priv;
777 ASSERT(self != NULL, return 0;);
778 iobase = self->io.fir_base;
780 netif_stop_queue(dev);
781 /* Check if we need to change the speed */
782 speed = irda_get_next_speed(skb);
783 if ((speed != self->io.speed) && (speed != -1)) {
784 /* Check for empty frame */
786 via_ircc_change_speed(self, speed);
787 dev->trans_start = jiffies;
791 self->new_speed = speed;
795 SIRFilter(iobase, ON);
799 WriteReg(iobase, I_ST_CT_0, 0x00);
801 spin_lock_irqsave(&self->lock, flags);
802 self->tx_buff.data = self->tx_buff.head;
804 async_wrap_skb(skb, self->tx_buff.data,
805 self->tx_buff.truesize);
807 self->stats.tx_bytes += self->tx_buff.len;
808 SetBaudRate(iobase, speed);
809 SetPulseWidth(iobase, 12);
810 SetSendPreambleCount(iobase, 0);
811 WriteReg(iobase, I_ST_CT_0, 0x80);
813 EnableTX(iobase, ON);
814 EnableRX(iobase, OFF);
816 ResetChip(iobase, 0);
817 ResetChip(iobase, 1);
818 ResetChip(iobase, 2);
819 ResetChip(iobase, 3);
820 ResetChip(iobase, 4);
822 EnAllInt(iobase, ON);
824 EnRXDMA(iobase, OFF);
826 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
829 SetSendByte(iobase, self->tx_buff.len);
830 RXStart(iobase, OFF);
833 dev->trans_start = jiffies;
834 spin_unlock_irqrestore(&self->lock, flags);
839 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
840 struct net_device *dev)
842 struct via_ircc_cb *self;
847 self = (struct via_ircc_cb *) dev->priv;
848 iobase = self->io.fir_base;
850 if (self->st_fifo.len)
852 if (self->chip_id == 0x3076)
856 netif_stop_queue(dev);
857 speed = irda_get_next_speed(skb);
858 if ((speed != self->io.speed) && (speed != -1)) {
860 via_ircc_change_speed(self, speed);
861 dev->trans_start = jiffies;
865 self->new_speed = speed;
867 spin_lock_irqsave(&self->lock, flags);
868 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
869 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
871 self->tx_fifo.tail += skb->len;
872 self->stats.tx_bytes += skb->len;
873 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
876 self->tx_fifo.free++;
877 //F01 if (self->tx_fifo.len == 1) {
878 via_ircc_dma_xmit(self, iobase);
880 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
881 dev->trans_start = jiffies;
883 spin_unlock_irqrestore(&self->lock, flags);
888 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
893 EnTXDMA(iobase, OFF);
894 self->io.direction = IO_XMIT;
896 EnableTX(iobase, ON);
897 EnableRX(iobase, OFF);
898 ResetChip(iobase, 0);
899 ResetChip(iobase, 1);
900 ResetChip(iobase, 2);
901 ResetChip(iobase, 3);
902 ResetChip(iobase, 4);
903 EnAllInt(iobase, ON);
905 EnRXDMA(iobase, OFF);
906 irda_setup_dma(self->io.dma,
907 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
908 self->tx_buff.head) + self->tx_buff_dma,
909 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
912 (KERN_INFO "dma_xmit:tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
913 self->tx_fifo.ptr, self->tx_fifo.queue[self->tx_fifo.ptr].len,
916 ch = self->tx_fifo.queue[self->tx_fifo.ptr].start;
917 for(i=0 ; i < self->tx_fifo.queue[self->tx_fifo.ptr].len ; i++) {
918 DBG(printk(KERN_INFO "%x..\n",ch[i]));
923 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
924 RXStart(iobase, OFF);
931 * Function via_ircc_dma_xmit_complete (self)
933 * The transfer of a frame in finished. This function will only be called
934 * by the interrupt handler
937 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
943 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
944 iobase = self->io.fir_base;
946 // DisableDmaChannel(self->io.dma);
947 /* Check for underrrun! */
948 /* Clear bit, by writing 1 into it */
949 Tx_status = GetTXStatus(iobase);
950 if (Tx_status & 0x08) {
951 self->stats.tx_errors++;
952 self->stats.tx_fifo_errors++;
954 // how to clear underrrun ?
956 self->stats.tx_packets++;
957 ResetChip(iobase, 3);
958 ResetChip(iobase, 4);
960 /* Check if we need to change the speed */
961 if (self->new_speed) {
962 via_ircc_change_speed(self, self->new_speed);
966 /* Finished with this frame, so prepare for next */
967 if (IsFIROn(iobase)) {
968 if (self->tx_fifo.len) {
976 "via_ircc_dma_xmit_complete:tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
977 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free));
980 // Any frames to be sent back-to-back?
981 if (self->tx_fifo.len) {
983 via_ircc_dma_xmit(self, iobase);
987 // Reset Tx FIFO info
988 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
989 self->tx_fifo.tail = self->tx_buff.head;
992 // Make sure we have room for more frames
993 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
994 // Not busy transmitting anymore
995 // Tell the network layer, that we can accept more frames
996 netif_wake_queue(self->netdev);
1002 * Function via_ircc_dma_receive (self)
1004 * Set configuration for receive a frame.
1007 static int via_ircc_dma_receive(struct via_ircc_cb *self)
1011 iobase = self->io.fir_base;
1013 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1014 self->tx_fifo.tail = self->tx_buff.head;
1015 self->RxDataReady = 0;
1016 self->io.direction = IO_RECV;
1017 self->rx_buff.data = self->rx_buff.head;
1018 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1019 self->st_fifo.tail = self->st_fifo.head = 0;
1021 EnableTX(iobase, OFF);
1022 EnableRX(iobase, ON);
1024 ResetChip(iobase, 0);
1025 ResetChip(iobase, 1);
1026 ResetChip(iobase, 2);
1027 ResetChip(iobase, 3);
1028 ResetChip(iobase, 4);
1030 EnAllInt(iobase, ON);
1031 EnTXDMA(iobase, OFF);
1032 EnRXDMA(iobase, ON);
1033 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1034 self->rx_buff.truesize, DMA_RX_MODE);
1035 TXStart(iobase, OFF);
1036 RXStart(iobase, ON);
1042 * Function via_ircc_dma_receive_complete (self)
1044 * Controller Finished with receiving frames,
1045 * and this routine is call by ISR
1048 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1051 struct st_fifo *st_fifo;
1052 struct sk_buff *skb;
1056 iobase = self->io.fir_base;
1057 st_fifo = &self->st_fifo;
1059 if (self->io.speed < 4000000) { //Speed below FIR
1060 len = GetRecvByte(iobase, self);
1061 skb = dev_alloc_skb(len + 1);
1064 // Make sure IP header gets aligned
1065 skb_reserve(skb, 1);
1066 skb_put(skb, len - 2);
1067 if (self->chip_id == 0x3076) {
1068 for (i = 0; i < len - 2; i++)
1069 skb->data[i] = self->rx_buff.data[i * 2];
1071 if (self->chip_id == 0x3096) {
1072 for (i = 0; i < len - 2; i++)
1074 self->rx_buff.data[i];
1077 // Move to next frame
1078 self->rx_buff.data += len;
1079 self->stats.rx_bytes += len;
1080 self->stats.rx_packets++;
1081 skb->dev = self->netdev;
1082 skb->mac.raw = skb->data;
1083 skb->protocol = htons(ETH_P_IRDA);
1089 len = GetRecvByte(iobase, self);
1091 return TRUE; //interrupt only, data maybe move by RxT
1092 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1096 "receive_comple:Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1097 len, RxCurCount(iobase, self),
1098 self->RxLastCount));
1106 "recv_comple:fifo.len=%x,len=%x,CurCount=%x..\n",
1107 st_fifo->len, len - 4, RxCurCount(iobase, self)));
1109 st_fifo->entries[st_fifo->tail].status = status;
1110 st_fifo->entries[st_fifo->tail].len = len;
1111 st_fifo->pending_bytes += len;
1114 if (st_fifo->tail > MAX_RX_WINDOW)
1116 self->RxDataReady = 0;
1118 // It maybe have MAX_RX_WINDOW package receive by
1119 // receive_complete before Timer IRQ
1121 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1127 EnableRX(iobase, OFF);
1128 EnRXDMA(iobase, OFF);
1129 RXStart(iobase, OFF);
1131 // Put this entry back in fifo
1132 if (st_fifo->head > MAX_RX_WINDOW)
1134 status = st_fifo->entries[st_fifo->head].status;
1135 len = st_fifo->entries[st_fifo->head].len;
1139 skb = dev_alloc_skb(len + 1 - 4);
1141 * if frame size,data ptr,or skb ptr are wrong ,the get next
1144 if ((skb == NULL) || (skb->data == NULL)
1145 || (self->rx_buff.data == NULL) || (len < 6)) {
1146 self->stats.rx_dropped++;
1149 skb_reserve(skb, 1);
1150 skb_put(skb, len - 4);
1151 memcpy(skb->data, self->rx_buff.data, len - 4);
1154 (KERN_INFO "RxT:len=%x.rx_buff=%x\n", len - 4,
1155 self->rx_buff.data));
1156 /* for(i=0 ; i < (len-4) ; i++) {
1157 DBG(printk(KERN_INFO "%x..\n",self->rx_buff.data[i]));
1161 // Move to next frame
1162 self->rx_buff.data += len;
1163 self->stats.rx_bytes += len;
1164 self->stats.rx_packets++;
1165 skb->dev = self->netdev;
1166 skb->mac.raw = skb->data;
1167 skb->protocol = htons(ETH_P_IRDA);
1177 * if frame is received , but no INT ,then use this routine to upload frame.
1179 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1181 struct sk_buff *skb;
1183 struct st_fifo *st_fifo;
1184 st_fifo = &self->st_fifo;
1186 len = GetRecvByte(iobase, self);
1189 DBG(printk(KERN_INFO "upload_rxdata: len=%x\n", len));
1191 skb = dev_alloc_skb(len + 1);
1192 if ((skb == NULL) || ((len - 4) < 2)) {
1193 self->stats.rx_dropped++;
1196 skb_reserve(skb, 1);
1197 skb_put(skb, len - 4 + 1);
1198 memcpy(skb->data, self->rx_buff.data, len - 4 + 1);
1201 if (st_fifo->tail > MAX_RX_WINDOW)
1203 // Move to next frame
1204 self->rx_buff.data += len;
1205 self->stats.rx_bytes += len;
1206 self->stats.rx_packets++;
1207 skb->dev = self->netdev;
1208 skb->mac.raw = skb->data;
1209 skb->protocol = htons(ETH_P_IRDA);
1211 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1212 RXStart(iobase, ON);
1214 EnableRX(iobase, OFF);
1215 EnRXDMA(iobase, OFF);
1216 RXStart(iobase, OFF);
1222 * Implement back to back receive , use this routine to upload data.
1225 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1227 struct st_fifo *st_fifo;
1228 struct sk_buff *skb;
1232 st_fifo = &self->st_fifo;
1234 if (CkRxRecv(iobase, self)) {
1235 // if still receiving ,then return ,don't upload frame
1236 self->RetryCount = 0;
1237 SetTimer(iobase, 20);
1238 self->RxDataReady++;
1243 if ((self->RetryCount >= 1) ||
1244 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1245 || (st_fifo->len >= (MAX_RX_WINDOW))) {
1246 while (st_fifo->len > 0) { //upload frame
1247 // Put this entry back in fifo
1248 if (st_fifo->head > MAX_RX_WINDOW)
1250 status = st_fifo->entries[st_fifo->head].status;
1251 len = st_fifo->entries[st_fifo->head].len;
1255 skb = dev_alloc_skb(len + 1 - 4);
1257 * if frame size, data ptr, or skb ptr are wrong,
1258 * then get next entry.
1260 if ((skb == NULL) || (skb->data == NULL)
1261 || (self->rx_buff.data == NULL) || (len < 6)) {
1262 self->stats.rx_dropped++;
1265 skb_reserve(skb, 1);
1266 skb_put(skb, len - 4);
1267 memcpy(skb->data, self->rx_buff.data, len - 4);
1270 (KERN_INFO "RxT:len=%x.head=%x\n", len - 4,
1273 // Move to next frame
1274 self->rx_buff.data += len;
1275 self->stats.rx_bytes += len;
1276 self->stats.rx_packets++;
1277 skb->dev = self->netdev;
1278 skb->mac.raw = skb->data;
1279 skb->protocol = htons(ETH_P_IRDA);
1282 self->RetryCount = 0;
1286 "RxT:End of upload HostStatus=%x,RxStatus=%x\n",
1287 GetHostStatus(iobase), GetRXStatus(iobase)));
1290 * if frame is receive complete at this routine ,then upload
1293 if ((GetRXStatus(iobase) & 0x10)
1294 && (RxCurCount(iobase, self) != self->RxLastCount)) {
1295 upload_rxdata(self, iobase);
1296 if (irda_device_txqueue_empty(self->netdev))
1297 via_ircc_dma_receive(self);
1299 } // timer detect complete
1301 SetTimer(iobase, 4);
1309 * Function via_ircc_interrupt (irq, dev_id, regs)
1311 * An interrupt from the chip has arrived. Time to do some work
1314 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
1315 struct pt_regs *regs)
1317 struct net_device *dev = (struct net_device *) dev_id;
1318 struct via_ircc_cb *self;
1320 u8 iHostIntType, iRxIntType, iTxIntType;
1323 WARNING("%s: irq %d for unknown device.\n", driver_name,
1327 self = (struct via_ircc_cb *) dev->priv;
1328 iobase = self->io.fir_base;
1329 spin_lock(&self->lock);
1330 iHostIntType = GetHostStatus(iobase);
1331 if ((iHostIntType & 0x40) != 0) { //Timer Event
1332 self->EventFlag.TimeOut++;
1333 ClearTimerInt(iobase, 1);
1334 if (self->io.direction == IO_XMIT) {
1335 via_ircc_dma_xmit(self, iobase);
1337 if (self->io.direction == IO_RECV) {
1339 * frame ready hold too long, must reset.
1341 if (self->RxDataReady > 30) {
1343 if (irda_device_txqueue_empty
1345 via_ircc_dma_receive(self);
1347 } else { // call this to upload frame.
1348 RxTimerHandler(self, iobase);
1352 if ((iHostIntType & 0x20) != 0) { //Tx Event
1353 iTxIntType = GetTXStatus(iobase);
1354 if (iTxIntType & 0x4) {
1355 self->EventFlag.EOMessage++; // read and will auto clean
1356 if (via_ircc_dma_xmit_complete(self)) {
1357 if (irda_device_txqueue_empty
1359 via_ircc_dma_receive(self);
1362 self->EventFlag.Unknown++;
1366 //----------------------------------------
1367 if ((iHostIntType & 0x10) != 0) { //Rx Event
1368 /* Check if DMA has finished */
1369 iRxIntType = GetRXStatus(iobase);
1372 DBG(printk(KERN_INFO " RxIRQ =0\n"));
1374 if (iRxIntType & 0x10) {
1375 if (via_ircc_dma_receive_complete(self, iobase)) {
1376 //F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1377 via_ircc_dma_receive(self);
1384 " RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1385 iRxIntType, iHostIntType, RxCurCount(iobase,
1387 self->RxLastCount));
1389 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1390 ResetChip(iobase, 0);
1391 ResetChip(iobase, 1);
1392 } else { //PHY,CRC ERR
1394 if (iRxIntType != 0x08)
1395 hwreset(self); //F01
1397 via_ircc_dma_receive(self);
1401 spin_unlock(&self->lock);
1402 return IRQ_RETVAL(iHostIntType);
1405 static void hwreset(struct via_ircc_cb *self)
1408 iobase = self->io.fir_base;
1410 DBG(printk(KERN_INFO "hwreset ....\n"));
1412 ResetChip(iobase, 5);
1413 EnableDMA(iobase, OFF);
1414 EnableTX(iobase, OFF);
1415 EnableRX(iobase, OFF);
1416 EnRXDMA(iobase, OFF);
1417 EnTXDMA(iobase, OFF);
1418 RXStart(iobase, OFF);
1419 TXStart(iobase, OFF);
1422 SIRFilter(iobase, ON);
1426 WriteReg(iobase, I_ST_CT_0, 0x00);
1427 SetBaudRate(iobase, 9600);
1428 SetPulseWidth(iobase, 12);
1429 SetSendPreambleCount(iobase, 0);
1430 WriteReg(iobase, I_ST_CT_0, 0x80);
1431 via_ircc_change_speed(self, self->io.speed);
1432 self->st_fifo.len = 0;
1436 * Function via_ircc_is_receiving (self)
1438 * Return TRUE is we are currently receiving a frame
1441 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1446 ASSERT(self != NULL, return FALSE;);
1448 iobase = self->io.fir_base;
1449 if (CkRxRecv(iobase, self))
1452 DBG(printk(KERN_INFO "is_receiving status=%x....\n", status));
1459 * Function via_ircc_net_open (dev)
1464 static int via_ircc_net_open(struct net_device *dev)
1466 struct via_ircc_cb *self;
1470 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1472 ASSERT(dev != NULL, return -1;);
1473 self = (struct via_ircc_cb *) dev->priv;
1474 self->stats.rx_packets = 0;
1475 ASSERT(self != NULL, return 0;);
1476 iobase = self->io.fir_base;
1478 (self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1479 WARNING("%s, unable to allocate irq=%d\n", driver_name,
1484 * Always allocate the DMA channel after the IRQ, and clean up on
1487 if (request_dma(self->io.dma, dev->name)) {
1488 WARNING("%s, unable to allocate dma=%d\n", driver_name,
1490 free_irq(self->io.irq, self);
1493 if (self->io.dma2 != self->io.dma) {
1494 if (request_dma(self->io.dma2, dev->name)) {
1495 WARNING("%s, unable to allocate dma2=%d\n",
1496 driver_name, self->io.dma2);
1497 free_irq(self->io.irq, self);
1503 /* turn on interrupts */
1504 EnAllInt(iobase, ON);
1505 EnInternalLoop(iobase, OFF);
1506 EnExternalLoop(iobase, OFF);
1507 /* Ready to play! */
1508 netif_start_queue(dev);
1511 * Open new IrLAP layer instance, now that everything should be
1512 * initialized properly
1514 sprintf(hwname, "VIA");
1516 * for different kernel ,irlap_open have different parameter.
1518 self->irlap = irlap_open(dev, &self->qos, hwname);
1519 // self->irlap = irlap_open(dev, &self->qos);
1521 self->RxLastCount = 0;
1527 * Function via_ircc_net_close (dev)
1532 static int via_ircc_net_close(struct net_device *dev)
1534 struct via_ircc_cb *self;
1537 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1539 ASSERT(dev != NULL, return -1;);
1540 self = (struct via_ircc_cb *) dev->priv;
1541 ASSERT(self != NULL, return 0;);
1548 netif_stop_queue(dev);
1549 /* Stop and remove instance of IrLAP */
1551 irlap_close(self->irlap);
1553 iobase = self->io.fir_base;
1554 EnTXDMA(iobase, OFF);
1555 EnRXDMA(iobase, OFF);
1556 DisableDmaChannel(self->io.dma);
1558 /* Disable interrupts */
1559 EnAllInt(iobase, OFF);
1560 free_irq(self->io.irq, dev);
1561 free_dma(self->io.dma);
1567 * Function via_ircc_net_ioctl (dev, rq, cmd)
1569 * Process IOCTL commands for this device
1572 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1575 struct if_irda_req *irq = (struct if_irda_req *) rq;
1576 struct via_ircc_cb *self;
1577 unsigned long flags;
1580 ASSERT(dev != NULL, return -1;);
1582 ASSERT(self != NULL, return -1;);
1583 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name,
1585 /* Disable interrupts & save flags */
1586 spin_lock_irqsave(&self->lock, flags);
1588 case SIOCSBANDWIDTH: /* Set bandwidth */
1589 if (!capable(CAP_NET_ADMIN)) {
1593 via_ircc_change_speed(self, irq->ifr_baudrate);
1595 case SIOCSMEDIABUSY: /* Set media busy */
1596 if (!capable(CAP_NET_ADMIN)) {
1600 irda_device_set_media_busy(self->netdev, TRUE);
1602 case SIOCGRECEIVING: /* Check if we are receiving right now */
1603 irq->ifr_receiving = via_ircc_is_receiving(self);
1609 spin_unlock_irqrestore(&self->lock, flags);
1613 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1616 struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1618 return &self->stats;
1621 MODULE_AUTHOR("VIA Technologies,inc");
1622 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1623 MODULE_LICENSE("GPL");
1625 module_init(via_ircc_init);
1626 module_exit(via_ircc_cleanup);