1 /********************************************************************
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
30 ********************************************************************/
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/ioport.h>
37 #include <linux/delay.h>
38 #include <linux/slab.h>
39 #include <linux/init.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/pci.h>
45 #include <asm/byteorder.h>
49 #include <net/irda/wrapper.h>
50 #include <net/irda/irda.h>
51 #include <net/irda/irda_device.h>
62 #define DBG(x) {if (debug) x;}
64 #define VIA_MODULE_NAME "via-ircc"
65 #define CHIP_IO_EXTENT 8
66 #define BROKEN_DONGLE_ID
68 static char *driver_name = "via-ircc";
70 /* Module parameters */
71 static int qos_mtt_bits = 0x07; /* 1 ms or more */
72 static int dongle_id = 9; //defalut IBM type
74 /* Resource is allocate by BIOS user only need to supply dongle_id*/
75 MODULE_PARM(dongle_id, "i");
77 /* Max 4 instances for now */
78 static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
81 static int via_ircc_open(int i, chipio_t * info, unsigned int id);
82 static int __exit via_ircc_close(struct via_ircc_cb *self);
83 static int via_ircc_setup(chipio_t * info, unsigned int id);
84 static int via_ircc_dma_receive(struct via_ircc_cb *self);
85 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
87 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
88 struct net_device *dev);
89 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
90 struct net_device *dev);
91 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
92 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
93 struct pt_regs *regs);
94 static int via_ircc_is_receiving(struct via_ircc_cb *self);
95 static int via_ircc_read_dongle_id(int iobase);
97 static int via_ircc_net_open(struct net_device *dev);
98 static int via_ircc_net_close(struct net_device *dev);
99 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
101 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
103 static void via_ircc_change_dongle_speed(int iobase, int speed,
105 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
106 static void hwreset(struct via_ircc_cb *self);
107 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
108 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
109 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
110 static void __exit via_remove_one (struct pci_dev *pdev);
112 /* Should use udelay() instead, even if we are x86 only - Jean II */
113 static void iodelay(int udelay)
118 for (i = 0; i < udelay; i++) {
123 static struct pci_device_id via_pci_tbl[] = {
124 { PCI_VENDOR_ID_VIA, DeviceID1, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
125 { PCI_VENDOR_ID_VIA, DeviceID2, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
126 { PCI_VENDOR_ID_VIA, DeviceID3, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
127 { PCI_VENDOR_ID_VIA, DeviceID4, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
128 { PCI_VENDOR_ID_VIA, DeviceID5, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
132 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
135 static struct pci_driver via_driver = {
136 .name = VIA_MODULE_NAME,
137 .id_table = via_pci_tbl,
138 .probe = via_init_one,
139 .remove = via_remove_one,
144 * Function via_ircc_init ()
146 * Initialize chip. Just find out chip type and resource.
148 static int __init via_ircc_init(void)
153 DBG(printk(KERN_INFO "via_ircc_init ......\n"));
155 rc = pci_register_driver (&via_driver);
157 DBG(printk(KERN_INFO "via_ircc_init :rc = %d......\n",rc));
161 DBG(printk(KERN_INFO "via_ircc_init return -ENODEV......\n"));
163 if (rc == 0) pci_unregister_driver (&via_driver);
170 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
173 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
174 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
178 DBG(printk(KERN_INFO "via_init_one : Device ID=(0X%X)\n",id->device));
180 if(id->device != DeviceID1 && id->device != DeviceID2 &&
181 id->device != DeviceID3 && id->device != DeviceID4 &&
182 id->device != DeviceID5 ){
184 DBG(printk(KERN_INFO "via_init_one : Device ID(0X%X) not Supported\n",id->device));
186 return -ENODEV; //South not exist !!!!!
188 rc = pci_enable_device (pcidev);
190 DBG(printk(KERN_INFO "via_init_one : rc=%d\n",rc));
195 if ( ReadLPCReg(0x20) != 0x3C )
199 if (Chipset==0x3076) {
201 DBG(printk(KERN_INFO "via_init_one : 3076 ......\n"));
203 WriteLPCReg(7,0x0c );
204 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
205 if((temp&0x01)==1) { // BIOS close or no FIR
206 WriteLPCReg(0x1d, 0x82 );
207 WriteLPCReg(0x23,0x18);
208 temp=ReadLPCReg(0xF0);
210 temp=(ReadLPCReg(0x74)&0x03); //DMA
212 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
215 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
219 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
220 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
221 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
222 FirIOBase=FirIOBase ;
223 info.fir_base=FirIOBase;
227 pci_read_config_byte(pcidev,0x40,&bTmp);
228 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
229 pci_read_config_byte(pcidev,0x42,&bTmp);
230 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
231 pci_write_config_byte(pcidev,0x5a,0xc0);
232 WriteLPCReg(0x28, 0x70 );
233 if (via_ircc_open(0, &info,0x3076) == 0)
236 rc = -ENODEV; //IR not turn on
237 } else { //Not VT1211
239 DBG(printk(KERN_INFO "via_init_one : 3096 ......\n"));
241 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
242 if((bTmp&0x01)==1) { // BIOS enable FIR
243 //Enable Double DMA clock
244 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
245 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
246 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
247 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
248 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
249 pci_write_config_byte(pcidev,0x44,0x4e);
250 //---------- read configuration from Function0 of south bridge
252 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
253 FirDRQ0 = (bTmp1 & 0x30) >> 4;
254 pci_read_config_byte(pcidev,0x44,&bTmp1);
255 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
257 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
258 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
261 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
262 FirIRQ = bTmp1 & 0x0f;
264 pci_read_config_byte(pcidev,0x69,&bTmp);
265 FirIOBase = bTmp << 8;//hight byte
266 pci_read_config_byte(pcidev,0x68,&bTmp);
267 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
268 //-------------------------
269 info.fir_base=FirIOBase;
273 if (via_ircc_open(0, &info,0x3096) == 0)
276 rc = -ENODEV; //IR not turn on !!!!!
279 DBG(printk(KERN_INFO "via_init_one End : rc=%d\n",rc));
285 * Function via_ircc_clean ()
287 * Close all configured chips
290 static void __exit via_ircc_clean(void)
295 DBG(printk(KERN_INFO "via_ircc_clean\n"));
297 for (i=0; i < 4; i++) {
299 via_ircc_close(dev_self[i]);
303 static void __exit via_remove_one (struct pci_dev *pdev)
306 DBG(printk(KERN_INFO "via_remove_one : ......\n"));
312 static void __exit via_ircc_cleanup(void)
316 DBG(printk(KERN_INFO "via_ircc_cleanup ......\n"));
319 pci_unregister_driver (&via_driver);
323 * Function via_ircc_open (iobase, irq)
325 * Open driver instance
328 static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
330 struct net_device *dev;
331 struct via_ircc_cb *self;
334 if ((via_ircc_setup(info, id)) == -1)
337 /* Allocate new instance of the driver */
338 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
344 spin_lock_init(&self->lock);
346 /* Need to store self somewhere */
349 /* Initialize Resource */
350 self->io.cfg_base = info->cfg_base;
351 self->io.fir_base = info->fir_base;
352 self->io.irq = info->irq;
353 self->io.fir_ext = CHIP_IO_EXTENT;
354 self->io.dma = info->dma;
355 self->io.dma2 = info->dma2;
356 self->io.fifo_size = 32;
358 self->st_fifo.len = 0;
359 self->RxDataReady = 0;
361 /* Reserve the ioports that we need */
362 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
363 // WARNING("%s(), can't get iobase of 0x%03x\n", __FUNCTION__, self->io.fir_base);
368 /* Initialize QoS for this device */
369 irda_init_max_qos_capabilies(&self->qos);
370 /* The only value we must override it the baudrate */
371 // self->qos.baud_rate.bits = IR_9600;// May use this for testing
373 self->qos.baud_rate.bits =
374 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
375 IR_576000 | IR_1152000 | (IR_4000000 << 8);
377 self->qos.min_turn_time.bits = qos_mtt_bits;
378 irda_qos_bits_to_value(&self->qos);
380 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
381 self->rx_buff.truesize = 14384 + 2048;
382 self->tx_buff.truesize = 14384 + 2048;
384 /* Allocate memory if needed */
386 (__u8 *) kmalloc(self->rx_buff.truesize, GFP_KERNEL | GFP_DMA);
387 if (self->rx_buff.head == NULL) {
391 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
394 (__u8 *) kmalloc(self->tx_buff.truesize, GFP_KERNEL | GFP_DMA);
395 if (self->tx_buff.head == NULL) {
399 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
401 self->rx_buff.in_frame = FALSE;
402 self->rx_buff.state = OUTSIDE_FRAME;
403 self->tx_buff.data = self->tx_buff.head;
404 self->rx_buff.data = self->rx_buff.head;
406 /* Reset Tx queue info */
407 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
408 self->tx_fifo.tail = self->tx_buff.head;
410 /* Keep track of module usage */
411 SET_MODULE_OWNER(dev);
413 /* Override the network functions we need to use */
414 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
415 dev->open = via_ircc_net_open;
416 dev->stop = via_ircc_net_close;
417 dev->do_ioctl = via_ircc_net_ioctl;
418 dev->get_stats = via_ircc_net_get_stats;
420 err = register_netdev(dev);
424 MESSAGE("IrDA: Registered device %s\n", dev->name);
426 /* Check if user has supplied the dongle id or not */
428 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
429 self->io.dongle_id = dongle_id;
430 via_ircc_change_dongle_speed(self->io.fir_base, 9600,
435 kfree(self->tx_buff.head);
437 kfree(self->rx_buff.head);
439 release_region(self->io.fir_base, self->io.fir_ext);
447 * Function via_ircc_close (self)
449 * Close driver instance
452 static int __exit via_ircc_close(struct via_ircc_cb *self)
456 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
458 ASSERT(self != NULL, return -1;);
460 iobase = self->io.fir_base;
462 ResetChip(iobase, 5); //hardware reset.
463 /* Remove netdevice */
464 unregister_netdev(self->netdev);
466 /* Release the PORT that this driver is using */
467 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
468 __FUNCTION__, self->io.fir_base);
469 release_region(self->io.fir_base, self->io.fir_ext);
470 if (self->tx_buff.head)
471 kfree(self->tx_buff.head);
472 if (self->rx_buff.head)
473 kfree(self->rx_buff.head);
474 dev_self[self->index] = NULL;
476 free_netdev(self->netdev);
482 * Function via_ircc_setup (info)
484 * Returns non-negative on success.
487 static int via_ircc_setup(chipio_t * info, unsigned int chip_id)
489 int iobase = info->fir_base;
491 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
493 EnRXFIFOReadyInt(iobase, OFF);
494 EnRXFIFOHalfLevelInt(iobase, OFF);
495 EnTXFIFOHalfLevelInt(iobase, OFF);
496 EnTXFIFOUnderrunEOMInt(iobase, ON);
497 EnTXFIFOReadyInt(iobase, OFF);
498 InvertTX(iobase, OFF);
499 InvertRX(iobase, OFF);
500 if (ReadLPCReg(0x20) == 0x3c)
501 WriteLPCReg(0xF0, 0); // for VT1211
502 if (IsSIROn(iobase)) {
503 SIRFilter(iobase, ON);
504 SIRRecvAny(iobase, ON);
506 SIRFilter(iobase, OFF);
507 SIRRecvAny(iobase, OFF);
510 EnRXSpecInt(iobase, ON);
512 WriteReg(iobase, I_ST_CT_0, 0x80);
513 EnableDMA(iobase, ON);
519 * Function via_ircc_read_dongle_id (void)
522 static int via_ircc_read_dongle_id(int iobase)
530 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
531 * Change speed of the attach dongle
532 * only implement two type of dongle currently.
534 static void via_ircc_change_dongle_speed(int iobase, int speed,
539 WriteReg(iobase, I_ST_CT_0, 0x0);
540 switch (dongle_id) { //HP1100
541 case 0x00: /* same as */
542 case 0x01: /* Differential serial interface */
544 case 0x02: /* same as */
545 case 0x03: /* Reserved */
547 case 0x04: /* Sharp RY5HD01 */
549 case 0x05: /* Reserved, but this is what the Thinkpad reports */
551 case 0x06: /* Single-ended serial interface */
553 case 0x07: /* Consumer-IR only */
556 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
557 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
558 InvertTX(iobase, OFF);
559 InvertRX(iobase, OFF);
561 EnRX2(iobase, ON); //sir to rx2
562 EnGPIOtoRX2(iobase, OFF);
564 if (IsSIROn(iobase)) { //sir
566 SlowIRRXLowActive(iobase, ON);
568 SlowIRRXLowActive(iobase, OFF);
570 if (IsMIROn(iobase)) { //mir
572 SlowIRRXLowActive(iobase, OFF);
575 if (IsFIROn(iobase)) { //fir
577 SlowIRRXLowActive(iobase, OFF);
583 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
584 UseOneRX(iobase, ON); //use ONE RX....RX1
585 InvertTX(iobase, OFF);
586 InvertRX(iobase, OFF); // invert RX pin
588 EnGPIOtoRX2(iobase, OFF);
589 if (IsSIROn(iobase)) { //sir
591 SlowIRRXLowActive(iobase, ON);
594 SlowIRRXLowActive(iobase, OFF);
596 if (IsMIROn(iobase)) { //mir
598 SlowIRRXLowActive(iobase, OFF);
601 SlowIRRXLowActive(iobase, ON);
603 if (IsFIROn(iobase)) { //fir
605 SlowIRRXLowActive(iobase, OFF);
610 SlowIRRXLowActive(iobase, ON);
613 WriteTX(iobase, OFF);
618 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
619 InvertTX(iobase, OFF);
620 InvertRX(iobase, OFF);
621 SlowIRRXLowActive(iobase, OFF);
622 if (IsSIROn(iobase)) { //sir
623 EnGPIOtoRX2(iobase, OFF);
624 WriteGIO(iobase, OFF);
625 EnRX2(iobase, OFF); //sir to rx2
627 EnGPIOtoRX2(iobase, OFF);
628 WriteGIO(iobase, OFF);
629 EnRX2(iobase, OFF); //fir to rx
632 case 0x0ff: /* Vishay */
635 else if (IsMIROn(iobase))
637 else if (IsFIROn(iobase))
639 else if (IsVFIROn(iobase))
641 SI_SetMode(iobase, mode);
643 WriteReg(iobase, I_ST_CT_0, 0x80);
648 * Function via_ircc_change_speed (self, baud)
650 * Change the speed of the device
653 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
655 struct net_device *dev = self->netdev;
659 iobase = self->io.fir_base;
660 /* Update accounting for new speed */
661 self->io.speed = speed;
663 DBG(printk(KERN_INFO "change_speed =%x......\n", speed));
667 if (self->io.speed > 0x2580)
674 /* Controller mode sellection */
713 SetPulseWidth(iobase, 0);
714 SetSendPreambleCount(iobase, 14);
726 /* Set baudrate to 0x19[2..7] */
727 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
728 bTmp = bTmp | (value << 2);
729 WriteReg(iobase, I_CF_H_1, bTmp);
730 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
731 // EnTXFIFOHalfLevelInt(iobase,ON);
732 /* Set FIFO size to 64 */
734 /* Enable some interrupts so we can receive frames */
735 //EnAllInt(iobase,ON);
737 if (IsSIROn(iobase)) {
738 SIRFilter(iobase, ON);
739 SIRRecvAny(iobase, ON);
741 SIRFilter(iobase, OFF);
742 SIRRecvAny(iobase, OFF);
744 if (speed > 115200) {
745 /* Install FIR xmit handler */
746 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
747 via_ircc_dma_receive(self);
749 /* Install SIR xmit handler */
750 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
752 netif_wake_queue(dev);
756 * Function via_ircc_hard_xmit (skb, dev)
758 * Transmit the frame!
761 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
762 struct net_device *dev)
764 struct via_ircc_cb *self;
769 self = (struct via_ircc_cb *) dev->priv;
770 ASSERT(self != NULL, return 0;);
771 iobase = self->io.fir_base;
773 netif_stop_queue(dev);
774 /* Check if we need to change the speed */
775 speed = irda_get_next_speed(skb);
776 if ((speed != self->io.speed) && (speed != -1)) {
777 /* Check for empty frame */
779 via_ircc_change_speed(self, speed);
780 dev->trans_start = jiffies;
784 self->new_speed = speed;
788 SIRFilter(iobase, ON);
792 WriteReg(iobase, I_ST_CT_0, 0x00);
794 spin_lock_irqsave(&self->lock, flags);
795 self->tx_buff.data = self->tx_buff.head;
797 async_wrap_skb(skb, self->tx_buff.data,
798 self->tx_buff.truesize);
800 self->stats.tx_bytes += self->tx_buff.len;
801 SetBaudRate(iobase, speed);
802 SetPulseWidth(iobase, 12);
803 SetSendPreambleCount(iobase, 0);
804 WriteReg(iobase, I_ST_CT_0, 0x80);
806 EnableTX(iobase, ON);
807 EnableRX(iobase, OFF);
809 ResetChip(iobase, 0);
810 ResetChip(iobase, 1);
811 ResetChip(iobase, 2);
812 ResetChip(iobase, 3);
813 ResetChip(iobase, 4);
815 EnAllInt(iobase, ON);
817 EnRXDMA(iobase, OFF);
819 irda_setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
822 SetSendByte(iobase, self->tx_buff.len);
823 RXStart(iobase, OFF);
826 dev->trans_start = jiffies;
827 spin_unlock_irqrestore(&self->lock, flags);
832 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
833 struct net_device *dev)
835 struct via_ircc_cb *self;
840 self = (struct via_ircc_cb *) dev->priv;
841 iobase = self->io.fir_base;
843 if (self->st_fifo.len)
845 if (self->chip_id == 0x3076)
849 netif_stop_queue(dev);
850 speed = irda_get_next_speed(skb);
851 if ((speed != self->io.speed) && (speed != -1)) {
853 via_ircc_change_speed(self, speed);
854 dev->trans_start = jiffies;
858 self->new_speed = speed;
860 spin_lock_irqsave(&self->lock, flags);
861 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
862 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
864 self->tx_fifo.tail += skb->len;
865 self->stats.tx_bytes += skb->len;
866 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
869 self->tx_fifo.free++;
870 //F01 if (self->tx_fifo.len == 1) {
871 via_ircc_dma_xmit(self, iobase);
873 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
874 dev->trans_start = jiffies;
876 spin_unlock_irqrestore(&self->lock, flags);
881 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
886 EnTXDMA(iobase, OFF);
887 self->io.direction = IO_XMIT;
889 EnableTX(iobase, ON);
890 EnableRX(iobase, OFF);
891 ResetChip(iobase, 0);
892 ResetChip(iobase, 1);
893 ResetChip(iobase, 2);
894 ResetChip(iobase, 3);
895 ResetChip(iobase, 4);
896 EnAllInt(iobase, ON);
898 EnRXDMA(iobase, OFF);
899 irda_setup_dma(self->io.dma,
900 self->tx_fifo.queue[self->tx_fifo.ptr].start,
901 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
904 (KERN_INFO "dma_xmit:tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
905 self->tx_fifo.ptr, self->tx_fifo.queue[self->tx_fifo.ptr].len,
908 ch = self->tx_fifo.queue[self->tx_fifo.ptr].start;
909 for(i=0 ; i < self->tx_fifo.queue[self->tx_fifo.ptr].len ; i++) {
910 DBG(printk(KERN_INFO "%x..\n",ch[i]));
915 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
916 RXStart(iobase, OFF);
923 * Function via_ircc_dma_xmit_complete (self)
925 * The transfer of a frame in finished. This function will only be called
926 * by the interrupt handler
929 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
935 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
936 iobase = self->io.fir_base;
938 // DisableDmaChannel(self->io.dma);
939 /* Check for underrrun! */
940 /* Clear bit, by writing 1 into it */
941 Tx_status = GetTXStatus(iobase);
942 if (Tx_status & 0x08) {
943 self->stats.tx_errors++;
944 self->stats.tx_fifo_errors++;
946 // how to clear underrrun ?
948 self->stats.tx_packets++;
949 ResetChip(iobase, 3);
950 ResetChip(iobase, 4);
952 /* Check if we need to change the speed */
953 if (self->new_speed) {
954 via_ircc_change_speed(self, self->new_speed);
958 /* Finished with this frame, so prepare for next */
959 if (IsFIROn(iobase)) {
960 if (self->tx_fifo.len) {
968 "via_ircc_dma_xmit_complete:tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
969 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free));
972 // Any frames to be sent back-to-back?
973 if (self->tx_fifo.len) {
975 via_ircc_dma_xmit(self, iobase);
979 // Reset Tx FIFO info
980 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
981 self->tx_fifo.tail = self->tx_buff.head;
984 // Make sure we have room for more frames
985 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
986 // Not busy transmitting anymore
987 // Tell the network layer, that we can accept more frames
988 netif_wake_queue(self->netdev);
994 * Function via_ircc_dma_receive (self)
996 * Set configuration for receive a frame.
999 static int via_ircc_dma_receive(struct via_ircc_cb *self)
1003 iobase = self->io.fir_base;
1005 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1006 self->tx_fifo.tail = self->tx_buff.head;
1007 self->RxDataReady = 0;
1008 self->io.direction = IO_RECV;
1009 self->rx_buff.data = self->rx_buff.head;
1010 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1011 self->st_fifo.tail = self->st_fifo.head = 0;
1013 EnableTX(iobase, OFF);
1014 EnableRX(iobase, ON);
1016 ResetChip(iobase, 0);
1017 ResetChip(iobase, 1);
1018 ResetChip(iobase, 2);
1019 ResetChip(iobase, 3);
1020 ResetChip(iobase, 4);
1022 EnAllInt(iobase, ON);
1023 EnTXDMA(iobase, OFF);
1024 EnRXDMA(iobase, ON);
1025 irda_setup_dma(self->io.dma2, self->rx_buff.data,
1026 self->rx_buff.truesize, DMA_RX_MODE);
1027 TXStart(iobase, OFF);
1028 RXStart(iobase, ON);
1034 * Function via_ircc_dma_receive_complete (self)
1036 * Controller Finished with receiving frames,
1037 * and this routine is call by ISR
1040 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1043 struct st_fifo *st_fifo;
1044 struct sk_buff *skb;
1048 iobase = self->io.fir_base;
1049 st_fifo = &self->st_fifo;
1051 if (self->io.speed < 4000000) { //Speed below FIR
1052 len = GetRecvByte(iobase, self);
1053 skb = dev_alloc_skb(len + 1);
1056 // Make sure IP header gets aligned
1057 skb_reserve(skb, 1);
1058 skb_put(skb, len - 2);
1059 if (self->chip_id == 0x3076) {
1060 for (i = 0; i < len - 2; i++)
1061 skb->data[i] = self->rx_buff.data[i * 2];
1063 if (self->chip_id == 0x3096) {
1064 for (i = 0; i < len - 2; i++)
1066 self->rx_buff.data[i];
1069 // Move to next frame
1070 self->rx_buff.data += len;
1071 self->stats.rx_bytes += len;
1072 self->stats.rx_packets++;
1073 skb->dev = self->netdev;
1074 skb->mac.raw = skb->data;
1075 skb->protocol = htons(ETH_P_IRDA);
1081 len = GetRecvByte(iobase, self);
1083 return TRUE; //interrupt only, data maybe move by RxT
1084 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1088 "receive_comple:Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1089 len, RxCurCount(iobase, self),
1090 self->RxLastCount));
1098 "recv_comple:fifo.len=%x,len=%x,CurCount=%x..\n",
1099 st_fifo->len, len - 4, RxCurCount(iobase, self)));
1101 st_fifo->entries[st_fifo->tail].status = status;
1102 st_fifo->entries[st_fifo->tail].len = len;
1103 st_fifo->pending_bytes += len;
1106 if (st_fifo->tail > MAX_RX_WINDOW)
1108 self->RxDataReady = 0;
1110 // It maybe have MAX_RX_WINDOW package receive by
1111 // receive_complete before Timer IRQ
1113 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1119 EnableRX(iobase, OFF);
1120 EnRXDMA(iobase, OFF);
1121 RXStart(iobase, OFF);
1123 // Put this entry back in fifo
1124 if (st_fifo->head > MAX_RX_WINDOW)
1126 status = st_fifo->entries[st_fifo->head].status;
1127 len = st_fifo->entries[st_fifo->head].len;
1131 skb = dev_alloc_skb(len + 1 - 4);
1133 * if frame size,data ptr,or skb ptr are wrong ,the get next
1136 if ((skb == NULL) || (skb->data == NULL)
1137 || (self->rx_buff.data == NULL) || (len < 6)) {
1138 self->stats.rx_dropped++;
1141 skb_reserve(skb, 1);
1142 skb_put(skb, len - 4);
1143 memcpy(skb->data, self->rx_buff.data, len - 4);
1146 (KERN_INFO "RxT:len=%x.rx_buff=%x\n", len - 4,
1147 self->rx_buff.data));
1148 /* for(i=0 ; i < (len-4) ; i++) {
1149 DBG(printk(KERN_INFO "%x..\n",self->rx_buff.data[i]));
1153 // Move to next frame
1154 self->rx_buff.data += len;
1155 self->stats.rx_bytes += len;
1156 self->stats.rx_packets++;
1157 skb->dev = self->netdev;
1158 skb->mac.raw = skb->data;
1159 skb->protocol = htons(ETH_P_IRDA);
1169 * if frame is received , but no INT ,then use this routine to upload frame.
1171 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1173 struct sk_buff *skb;
1175 struct st_fifo *st_fifo;
1176 st_fifo = &self->st_fifo;
1178 len = GetRecvByte(iobase, self);
1181 DBG(printk(KERN_INFO "upload_rxdata: len=%x\n", len));
1183 skb = dev_alloc_skb(len + 1);
1184 if ((skb == NULL) || ((len - 4) < 2)) {
1185 self->stats.rx_dropped++;
1188 skb_reserve(skb, 1);
1189 skb_put(skb, len - 4 + 1);
1190 memcpy(skb->data, self->rx_buff.data, len - 4 + 1);
1193 if (st_fifo->tail > MAX_RX_WINDOW)
1195 // Move to next frame
1196 self->rx_buff.data += len;
1197 self->stats.rx_bytes += len;
1198 self->stats.rx_packets++;
1199 skb->dev = self->netdev;
1200 skb->mac.raw = skb->data;
1201 skb->protocol = htons(ETH_P_IRDA);
1203 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1204 RXStart(iobase, ON);
1206 EnableRX(iobase, OFF);
1207 EnRXDMA(iobase, OFF);
1208 RXStart(iobase, OFF);
1214 * Implement back to back receive , use this routine to upload data.
1217 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1219 struct st_fifo *st_fifo;
1220 struct sk_buff *skb;
1224 st_fifo = &self->st_fifo;
1226 if (CkRxRecv(iobase, self)) {
1227 // if still receiving ,then return ,don't upload frame
1228 self->RetryCount = 0;
1229 SetTimer(iobase, 20);
1230 self->RxDataReady++;
1235 if ((self->RetryCount >= 1) ||
1236 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1237 || (st_fifo->len >= (MAX_RX_WINDOW))) {
1238 while (st_fifo->len > 0) { //upload frame
1239 // Put this entry back in fifo
1240 if (st_fifo->head > MAX_RX_WINDOW)
1242 status = st_fifo->entries[st_fifo->head].status;
1243 len = st_fifo->entries[st_fifo->head].len;
1247 skb = dev_alloc_skb(len + 1 - 4);
1249 * if frame size, data ptr, or skb ptr are wrong,
1250 * then get next entry.
1252 if ((skb == NULL) || (skb->data == NULL)
1253 || (self->rx_buff.data == NULL) || (len < 6)) {
1254 self->stats.rx_dropped++;
1257 skb_reserve(skb, 1);
1258 skb_put(skb, len - 4);
1259 memcpy(skb->data, self->rx_buff.data, len - 4);
1262 (KERN_INFO "RxT:len=%x.head=%x\n", len - 4,
1265 // Move to next frame
1266 self->rx_buff.data += len;
1267 self->stats.rx_bytes += len;
1268 self->stats.rx_packets++;
1269 skb->dev = self->netdev;
1270 skb->mac.raw = skb->data;
1271 skb->protocol = htons(ETH_P_IRDA);
1274 self->RetryCount = 0;
1278 "RxT:End of upload HostStatus=%x,RxStatus=%x\n",
1279 GetHostStatus(iobase), GetRXStatus(iobase)));
1282 * if frame is receive complete at this routine ,then upload
1285 if ((GetRXStatus(iobase) & 0x10)
1286 && (RxCurCount(iobase, self) != self->RxLastCount)) {
1287 upload_rxdata(self, iobase);
1288 if (irda_device_txqueue_empty(self->netdev))
1289 via_ircc_dma_receive(self);
1291 } // timer detect complete
1293 SetTimer(iobase, 4);
1301 * Function via_ircc_interrupt (irq, dev_id, regs)
1303 * An interrupt from the chip has arrived. Time to do some work
1306 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
1307 struct pt_regs *regs)
1309 struct net_device *dev = (struct net_device *) dev_id;
1310 struct via_ircc_cb *self;
1312 u8 iHostIntType, iRxIntType, iTxIntType;
1315 WARNING("%s: irq %d for unknown device.\n", driver_name,
1319 self = (struct via_ircc_cb *) dev->priv;
1320 iobase = self->io.fir_base;
1321 spin_lock(&self->lock);
1322 iHostIntType = GetHostStatus(iobase);
1323 if ((iHostIntType & 0x40) != 0) { //Timer Event
1324 self->EventFlag.TimeOut++;
1325 ClearTimerInt(iobase, 1);
1326 if (self->io.direction == IO_XMIT) {
1327 via_ircc_dma_xmit(self, iobase);
1329 if (self->io.direction == IO_RECV) {
1331 * frame ready hold too long, must reset.
1333 if (self->RxDataReady > 30) {
1335 if (irda_device_txqueue_empty
1337 via_ircc_dma_receive(self);
1339 } else { // call this to upload frame.
1340 RxTimerHandler(self, iobase);
1344 if ((iHostIntType & 0x20) != 0) { //Tx Event
1345 iTxIntType = GetTXStatus(iobase);
1346 if (iTxIntType & 0x4) {
1347 self->EventFlag.EOMessage++; // read and will auto clean
1348 if (via_ircc_dma_xmit_complete(self)) {
1349 if (irda_device_txqueue_empty
1351 via_ircc_dma_receive(self);
1354 self->EventFlag.Unknown++;
1358 //----------------------------------------
1359 if ((iHostIntType & 0x10) != 0) { //Rx Event
1360 /* Check if DMA has finished */
1361 iRxIntType = GetRXStatus(iobase);
1364 DBG(printk(KERN_INFO " RxIRQ =0\n"));
1366 if (iRxIntType & 0x10) {
1367 if (via_ircc_dma_receive_complete(self, iobase)) {
1368 //F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1369 via_ircc_dma_receive(self);
1376 " RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1377 iRxIntType, iHostIntType, RxCurCount(iobase,
1379 self->RxLastCount));
1381 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1382 ResetChip(iobase, 0);
1383 ResetChip(iobase, 1);
1384 } else { //PHY,CRC ERR
1386 if (iRxIntType != 0x08)
1387 hwreset(self); //F01
1389 via_ircc_dma_receive(self);
1393 spin_unlock(&self->lock);
1394 return IRQ_RETVAL(iHostIntType);
1397 static void hwreset(struct via_ircc_cb *self)
1400 iobase = self->io.fir_base;
1402 DBG(printk(KERN_INFO "hwreset ....\n"));
1404 ResetChip(iobase, 5);
1405 EnableDMA(iobase, OFF);
1406 EnableTX(iobase, OFF);
1407 EnableRX(iobase, OFF);
1408 EnRXDMA(iobase, OFF);
1409 EnTXDMA(iobase, OFF);
1410 RXStart(iobase, OFF);
1411 TXStart(iobase, OFF);
1414 SIRFilter(iobase, ON);
1418 WriteReg(iobase, I_ST_CT_0, 0x00);
1419 SetBaudRate(iobase, 9600);
1420 SetPulseWidth(iobase, 12);
1421 SetSendPreambleCount(iobase, 0);
1422 WriteReg(iobase, I_ST_CT_0, 0x80);
1423 via_ircc_change_speed(self, self->io.speed);
1424 self->st_fifo.len = 0;
1428 * Function via_ircc_is_receiving (self)
1430 * Return TRUE is we are currently receiving a frame
1433 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1438 ASSERT(self != NULL, return FALSE;);
1440 iobase = self->io.fir_base;
1441 if (CkRxRecv(iobase, self))
1444 DBG(printk(KERN_INFO "is_receiving status=%x....\n", status));
1451 * Function via_ircc_net_open (dev)
1456 static int via_ircc_net_open(struct net_device *dev)
1458 struct via_ircc_cb *self;
1462 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1464 ASSERT(dev != NULL, return -1;);
1465 self = (struct via_ircc_cb *) dev->priv;
1466 self->stats.rx_packets = 0;
1467 ASSERT(self != NULL, return 0;);
1468 iobase = self->io.fir_base;
1470 (self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1471 WARNING("%s, unable to allocate irq=%d\n", driver_name,
1476 * Always allocate the DMA channel after the IRQ, and clean up on
1479 if (request_dma(self->io.dma, dev->name)) {
1480 WARNING("%s, unable to allocate dma=%d\n", driver_name,
1482 free_irq(self->io.irq, self);
1485 if (self->io.dma2 != self->io.dma) {
1486 if (request_dma(self->io.dma2, dev->name)) {
1487 WARNING("%s, unable to allocate dma2=%d\n",
1488 driver_name, self->io.dma2);
1489 free_irq(self->io.irq, self);
1495 /* turn on interrupts */
1496 EnAllInt(iobase, ON);
1497 EnInternalLoop(iobase, OFF);
1498 EnExternalLoop(iobase, OFF);
1499 /* Ready to play! */
1500 netif_start_queue(dev);
1503 * Open new IrLAP layer instance, now that everything should be
1504 * initialized properly
1506 sprintf(hwname, "VIA");
1508 * for different kernel ,irlap_open have different parameter.
1510 self->irlap = irlap_open(dev, &self->qos, hwname);
1511 // self->irlap = irlap_open(dev, &self->qos);
1513 self->RxLastCount = 0;
1519 * Function via_ircc_net_close (dev)
1524 static int via_ircc_net_close(struct net_device *dev)
1526 struct via_ircc_cb *self;
1529 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1531 ASSERT(dev != NULL, return -1;);
1532 self = (struct via_ircc_cb *) dev->priv;
1533 ASSERT(self != NULL, return 0;);
1540 netif_stop_queue(dev);
1541 /* Stop and remove instance of IrLAP */
1543 irlap_close(self->irlap);
1545 iobase = self->io.fir_base;
1546 EnTXDMA(iobase, OFF);
1547 EnRXDMA(iobase, OFF);
1548 DisableDmaChannel(self->io.dma);
1550 /* Disable interrupts */
1551 EnAllInt(iobase, OFF);
1552 free_irq(self->io.irq, dev);
1553 free_dma(self->io.dma);
1559 * Function via_ircc_net_ioctl (dev, rq, cmd)
1561 * Process IOCTL commands for this device
1564 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1567 struct if_irda_req *irq = (struct if_irda_req *) rq;
1568 struct via_ircc_cb *self;
1569 unsigned long flags;
1572 ASSERT(dev != NULL, return -1;);
1574 ASSERT(self != NULL, return -1;);
1575 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name,
1577 /* Disable interrupts & save flags */
1578 spin_lock_irqsave(&self->lock, flags);
1580 case SIOCSBANDWIDTH: /* Set bandwidth */
1581 if (!capable(CAP_NET_ADMIN)) {
1585 via_ircc_change_speed(self, irq->ifr_baudrate);
1587 case SIOCSMEDIABUSY: /* Set media busy */
1588 if (!capable(CAP_NET_ADMIN)) {
1592 irda_device_set_media_busy(self->netdev, TRUE);
1594 case SIOCGRECEIVING: /* Check if we are receiving right now */
1595 irq->ifr_receiving = via_ircc_is_receiving(self);
1601 spin_unlock_irqrestore(&self->lock, flags);
1605 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1608 struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1610 return &self->stats;
1613 MODULE_AUTHOR("VIA Technologies,inc");
1614 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1615 MODULE_LICENSE("GPL");
1617 module_init(via_ircc_init);
1618 module_exit(via_ircc_cleanup);