1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
3 * Copyright 1996-1999 Thomas Bogendoerfer
5 * Derived from the lance driver written 1993,1994,1995 by Donald Becker.
7 * Copyright 1993 United States Government as represented by the
8 * Director, National Security Agency.
10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference.
13 * This driver is for PCnet32 and PCnetPCI based ethercards
15 /**************************************************************************
17 * Fixed a few bugs, related to running the controller in 32bit mode.
19 * Carsten Langgaard, carstenl@mips.com
20 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
22 *************************************************************************/
24 #define DRV_NAME "pcnet32"
25 #define DRV_VERSION "1.30c"
26 #define DRV_RELDATE "05.25.2004"
27 #define PFX DRV_NAME ": "
29 static const char *version =
30 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/string.h>
35 #include <linux/errno.h>
36 #include <linux/ioport.h>
37 #include <linux/slab.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
41 #include <linux/init.h>
42 #include <linux/ethtool.h>
43 #include <linux/mii.h>
44 #include <linux/crc32.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/spinlock.h>
50 #include <asm/bitops.h>
53 #include <asm/uaccess.h>
57 * PCI device identifiers for "new style" Linux PCI Device Drivers
59 static struct pci_device_id pcnet32_pci_tbl[] = {
60 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
61 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
63 * Adapters that were sold with IBM's RS/6000 or pSeries hardware have
64 * the incorrect vendor id.
66 { PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID,
67 PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, 0 },
71 MODULE_DEVICE_TABLE (pci, pcnet32_pci_tbl);
73 static int cards_found;
78 static unsigned int pcnet32_portlist[] __initdata =
79 { 0x300, 0x320, 0x340, 0x360, 0 };
83 static int pcnet32_debug = 0;
84 static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
85 static int pcnet32vlb; /* check for VLB cards ? */
87 static struct net_device *pcnet32_dev;
89 static int max_interrupt_work = 2;
90 static int rx_copybreak = 200;
92 #define PCNET32_PORT_AUI 0x00
93 #define PCNET32_PORT_10BT 0x01
94 #define PCNET32_PORT_GPSI 0x02
95 #define PCNET32_PORT_MII 0x03
97 #define PCNET32_PORT_PORTSEL 0x03
98 #define PCNET32_PORT_ASEL 0x04
99 #define PCNET32_PORT_100 0x40
100 #define PCNET32_PORT_FD 0x80
102 #define PCNET32_DMA_MASK 0xffffffff
104 #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
105 #define PCNET32_BLINK_TIMEOUT (jiffies + (HZ/4))
108 * table to translate option values from tulip
109 * to internal options
111 static unsigned char options_mapping[] = {
112 PCNET32_PORT_ASEL, /* 0 Auto-select */
113 PCNET32_PORT_AUI, /* 1 BNC/AUI */
114 PCNET32_PORT_AUI, /* 2 AUI/BNC */
115 PCNET32_PORT_ASEL, /* 3 not supported */
116 PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */
117 PCNET32_PORT_ASEL, /* 5 not supported */
118 PCNET32_PORT_ASEL, /* 6 not supported */
119 PCNET32_PORT_ASEL, /* 7 not supported */
120 PCNET32_PORT_ASEL, /* 8 not supported */
121 PCNET32_PORT_MII, /* 9 MII 10baseT */
122 PCNET32_PORT_MII | PCNET32_PORT_FD, /* 10 MII 10baseT-FD */
123 PCNET32_PORT_MII, /* 11 MII (autosel) */
124 PCNET32_PORT_10BT, /* 12 10BaseT */
125 PCNET32_PORT_MII | PCNET32_PORT_100, /* 13 MII 100BaseTx */
126 PCNET32_PORT_MII | PCNET32_PORT_100 | PCNET32_PORT_FD, /* 14 MII 100BaseTx-FD */
127 PCNET32_PORT_ASEL /* 15 not supported */
130 static const char pcnet32_gstrings_test[][ETH_GSTRING_LEN] = {
131 "Loopback test (offline)"
133 #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
135 #define PCNET32_NUM_REGS 168
137 #define MAX_UNITS 8 /* More are supported, limit only on options */
138 static int options[MAX_UNITS];
139 static int full_duplex[MAX_UNITS];
142 * Theory of Operation
144 * This driver uses the same software structure as the normal lance
145 * driver. So look for a verbose description in lance.c. The differences
146 * to the normal lance driver is the use of the 32bit mode of PCnet32
147 * and PCnetPCI chips. Because these chips are 32bit chips, there is no
148 * 16MB limitation and we don't need bounce buffers.
153 * v0.01: Initial version
154 * only tested on Alpha Noname Board
155 * v0.02: changed IRQ handling for new interrupt scheme (dev_id)
156 * tested on a ASUS SP3G
157 * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL
158 * looks like the 974 doesn't like stopping and restarting in a
159 * short period of time; now we do a reinit of the lance; the
160 * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
161 * and hangs the machine (thanks to Klaus Liedl for debugging)
162 * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32,
163 * made it standalone (no need for lance.c)
164 * v0.13: added additional PCI detecting for special PCI devices (Compaq)
165 * v0.14: stripped down additional PCI probe (thanks to David C Niemi
166 * and sveneric@xs4all.nl for testing this on their Compaq boxes)
167 * v0.15: added 79C965 (VLB) probe
168 * added interrupt sharing for PCI chips
169 * v0.16: fixed set_multicast_list on Alpha machines
170 * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
171 * v0.19: changed setting of autoselect bit
172 * v0.20: removed additional Compaq PCI probe; there is now a working one
173 * in arch/i386/bios32.c
174 * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu
175 * v0.22: added printing of status to ring dump
176 * v0.23: changed enet_statistics to net_devive_stats
177 * v0.90: added multicast filter
178 * added module support
179 * changed irq probe to new style
180 * added PCnetFast chip id
181 * added fix for receive stalls with Intel saturn chipsets
182 * added in-place rx skbs like in the tulip driver
184 * v0.91: added PCnetFast+ chip id
186 * v1.00: added some stuff from Donald Becker's 2.0.34 version
187 * added support for byte counters in net_dev_stats
188 * v1.01: do ring dumps, only when debugging the driver
189 * increased the transmit timeout
190 * v1.02: fixed memory leak in pcnet32_init_ring()
191 * v1.10: workaround for stopped transmitter
192 * added port selection for modules
193 * detect special T1/E1 WAN card and setup port selection
194 * v1.11: fixed wrong checking of Tx errors
195 * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu)
196 * added save original kmalloc addr for freeing (mcr@solidum.com)
197 * added support for PCnetHome chip (joe@MIT.EDU)
198 * rewritten PCI card detection
199 * added dwio mode to get driver working on some PPC machines
200 * v1.21: added mii selection and mii ioctl
201 * v1.22: changed pci scanning code to make PPC people happy
202 * fixed switching to 32bit mode in pcnet32_open() (thanks
203 * to Michael Richard <mcr@solidum.com> for noticing this one)
204 * added sub vendor/device id matching (thanks again to
205 * Michael Richard <mcr@solidum.com>)
206 * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
207 * v1.23 fixed small bug, when manual selecting MII speed/duplex
208 * v1.24 Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO
209 * underflows. Added tx_start_pt module parameter. Increased
210 * TX_RING_SIZE from 16 to 32. Added #ifdef'd code to use DXSUFLO
211 * for FAST[+] chipsets. <kaf@fc.hp.com>
212 * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
213 * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
214 * v1.26 Converted to pci_alloc_consistent, Jamey Hicks / George France
215 * <jamey@crl.dec.com>
216 * - Fixed a few bugs, related to running the controller in 32bit mode.
217 * 23 Oct, 2000. Carsten Langgaard, carstenl@mips.com
218 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
219 * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
220 * v1.27 improved CSR/PROM address detection, lots of cleanups,
221 * new pcnet32vlb module option, HP-PARISC support,
222 * added module parameter descriptions,
223 * initial ethtool support - Helge Deller <deller@gmx.de>
224 * v1.27a Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp>
225 * use alloc_etherdev and register_netdev
226 * fix pci probe not increment cards_found
227 * FD auto negotiate error workaround for xSeries250
228 * clean up and using new mii module
229 * v1.27b Sep 30 2002 Kent Yoder <yoder1@us.ibm.com>
230 * Added timer for cable connection state changes.
231 * v1.28 20 Feb 2004 Don Fry <brazilnut@us.ibm.com>
232 * Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com>
233 * Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl.
234 * Fixes bogus 'Bus master arbitration failure', pci_[un]map_single
235 * length errors, and transmit hangs. Cleans up after errors in open.
236 * Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test.
237 * Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections.
238 * v1.29 6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical
239 * identification code (blink led's) and register dump.
240 * Don Fry added timer for 971/972 so skbufs don't remain on tx ring
242 * v1.30 18 May 2004 Don Fry removed timer and Last Transmit Interrupt
243 * (ltint) as they added complexity and didn't give good throughput.
244 * v1.30a 22 May 2004 Don Fry limit frames received during interrupt.
245 * v1.30b 24 May 2004 Don Fry fix bogus tx carrier errors with 79c973,
246 * assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>.
247 * v1.30c 25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart.
252 * Set the number of Tx and Rx buffers, using Log_2(# buffers).
253 * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
254 * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
256 #ifndef PCNET32_LOG_TX_BUFFERS
257 #define PCNET32_LOG_TX_BUFFERS 4
258 #define PCNET32_LOG_RX_BUFFERS 5
261 #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS))
262 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
263 #define TX_RING_LEN_BITS ((PCNET32_LOG_TX_BUFFERS) << 12)
265 #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS))
266 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
267 #define RX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4)
269 #define PKT_BUF_SZ 1544
271 /* Offsets from base I/O address. */
272 #define PCNET32_WIO_RDP 0x10
273 #define PCNET32_WIO_RAP 0x12
274 #define PCNET32_WIO_RESET 0x14
275 #define PCNET32_WIO_BDP 0x16
277 #define PCNET32_DWIO_RDP 0x10
278 #define PCNET32_DWIO_RAP 0x14
279 #define PCNET32_DWIO_RESET 0x18
280 #define PCNET32_DWIO_BDP 0x1C
282 #define PCNET32_TOTAL_SIZE 0x20
284 /* The PCNET32 Rx and Tx ring descriptors. */
285 struct pcnet32_rx_head {
293 struct pcnet32_tx_head {
301 /* The PCNET32 32-Bit initialization block, described in databook. */
302 struct pcnet32_init_block {
308 /* Receive and transmit ring base, along with extra bits. */
313 /* PCnet32 access functions */
314 struct pcnet32_access {
315 u16 (*read_csr)(unsigned long, int);
316 void (*write_csr)(unsigned long, int, u16);
317 u16 (*read_bcr)(unsigned long, int);
318 void (*write_bcr)(unsigned long, int, u16);
319 u16 (*read_rap)(unsigned long);
320 void (*write_rap)(unsigned long, u16);
321 void (*reset)(unsigned long);
325 * The first three fields of pcnet32_private are read by the ethernet device
326 * so we allocate the structure should be allocated by pci_alloc_consistent().
328 struct pcnet32_private {
329 /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
330 struct pcnet32_rx_head rx_ring[RX_RING_SIZE];
331 struct pcnet32_tx_head tx_ring[TX_RING_SIZE];
332 struct pcnet32_init_block init_block;
333 dma_addr_t dma_addr; /* DMA address of beginning of this
335 pci_alloc_consistent */
336 struct pci_dev *pci_dev; /* Pointer to the associated pci device
339 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
340 struct sk_buff *tx_skbuff[TX_RING_SIZE];
341 struct sk_buff *rx_skbuff[RX_RING_SIZE];
342 dma_addr_t tx_dma_addr[TX_RING_SIZE];
343 dma_addr_t rx_dma_addr[RX_RING_SIZE];
344 struct pcnet32_access a;
345 spinlock_t lock; /* Guard lock */
346 unsigned int cur_rx, cur_tx; /* The next free ring entry */
347 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
348 struct net_device_stats stats;
351 int shared_irq:1, /* shared irq possible */
352 dxsuflo:1, /* disable transmit stop on uflo */
353 mii:1; /* mii port available */
354 struct net_device *next;
355 struct mii_if_info mii_if;
356 struct timer_list watchdog_timer;
357 struct timer_list blink_timer;
358 u32 msg_enable; /* debug message level */
361 static void pcnet32_probe_vlbus(void);
362 static int pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *);
363 static int pcnet32_probe1(unsigned long, unsigned int, int, struct pci_dev *);
364 static int pcnet32_open(struct net_device *);
365 static int pcnet32_init_ring(struct net_device *);
366 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
367 static int pcnet32_rx(struct net_device *);
368 static void pcnet32_tx_timeout (struct net_device *dev);
369 static irqreturn_t pcnet32_interrupt(int, void *, struct pt_regs *);
370 static int pcnet32_close(struct net_device *);
371 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
372 static void pcnet32_load_multicast(struct net_device *dev);
373 static void pcnet32_set_multicast_list(struct net_device *);
374 static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);
375 static void pcnet32_watchdog(struct net_device *);
376 static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
377 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val);
378 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits);
379 static void pcnet32_ethtool_test(struct net_device *dev,
380 struct ethtool_test *eth_test, u64 *data);
381 static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1);
382 static int pcnet32_phys_id(struct net_device *dev, u32 data);
383 static void pcnet32_led_blink_callback(struct net_device *dev);
384 static int pcnet32_get_regs_len(struct net_device *dev);
385 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
389 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
390 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
394 static u16 pcnet32_wio_read_csr (unsigned long addr, int index)
396 outw (index, addr+PCNET32_WIO_RAP);
397 return inw (addr+PCNET32_WIO_RDP);
400 static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val)
402 outw (index, addr+PCNET32_WIO_RAP);
403 outw (val, addr+PCNET32_WIO_RDP);
406 static u16 pcnet32_wio_read_bcr (unsigned long addr, int index)
408 outw (index, addr+PCNET32_WIO_RAP);
409 return inw (addr+PCNET32_WIO_BDP);
412 static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val)
414 outw (index, addr+PCNET32_WIO_RAP);
415 outw (val, addr+PCNET32_WIO_BDP);
418 static u16 pcnet32_wio_read_rap (unsigned long addr)
420 return inw (addr+PCNET32_WIO_RAP);
423 static void pcnet32_wio_write_rap (unsigned long addr, u16 val)
425 outw (val, addr+PCNET32_WIO_RAP);
428 static void pcnet32_wio_reset (unsigned long addr)
430 inw (addr+PCNET32_WIO_RESET);
433 static int pcnet32_wio_check (unsigned long addr)
435 outw (88, addr+PCNET32_WIO_RAP);
436 return (inw (addr+PCNET32_WIO_RAP) == 88);
439 static struct pcnet32_access pcnet32_wio = {
440 .read_csr = pcnet32_wio_read_csr,
441 .write_csr = pcnet32_wio_write_csr,
442 .read_bcr = pcnet32_wio_read_bcr,
443 .write_bcr = pcnet32_wio_write_bcr,
444 .read_rap = pcnet32_wio_read_rap,
445 .write_rap = pcnet32_wio_write_rap,
446 .reset = pcnet32_wio_reset
449 static u16 pcnet32_dwio_read_csr (unsigned long addr, int index)
451 outl (index, addr+PCNET32_DWIO_RAP);
452 return (inl (addr+PCNET32_DWIO_RDP) & 0xffff);
455 static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val)
457 outl (index, addr+PCNET32_DWIO_RAP);
458 outl (val, addr+PCNET32_DWIO_RDP);
461 static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index)
463 outl (index, addr+PCNET32_DWIO_RAP);
464 return (inl (addr+PCNET32_DWIO_BDP) & 0xffff);
467 static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val)
469 outl (index, addr+PCNET32_DWIO_RAP);
470 outl (val, addr+PCNET32_DWIO_BDP);
473 static u16 pcnet32_dwio_read_rap (unsigned long addr)
475 return (inl (addr+PCNET32_DWIO_RAP) & 0xffff);
478 static void pcnet32_dwio_write_rap (unsigned long addr, u16 val)
480 outl (val, addr+PCNET32_DWIO_RAP);
483 static void pcnet32_dwio_reset (unsigned long addr)
485 inl (addr+PCNET32_DWIO_RESET);
488 static int pcnet32_dwio_check (unsigned long addr)
490 outl (88, addr+PCNET32_DWIO_RAP);
491 return ((inl (addr+PCNET32_DWIO_RAP) & 0xffff) == 88);
494 static struct pcnet32_access pcnet32_dwio = {
495 .read_csr = pcnet32_dwio_read_csr,
496 .write_csr = pcnet32_dwio_write_csr,
497 .read_bcr = pcnet32_dwio_read_bcr,
498 .write_bcr = pcnet32_dwio_write_bcr,
499 .read_rap = pcnet32_dwio_read_rap,
500 .write_rap = pcnet32_dwio_write_rap,
501 .reset = pcnet32_dwio_reset
504 #ifdef CONFIG_NET_POLL_CONTROLLER
505 static void pcnet32_poll_controller(struct net_device *dev)
507 disable_irq(dev->irq);
508 pcnet32_interrupt(0, dev, NULL);
509 enable_irq(dev->irq);
514 static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
516 struct pcnet32_private *lp = dev->priv;
521 spin_lock_irqsave(&lp->lock, flags);
522 mii_ethtool_gset(&lp->mii_if, cmd);
523 spin_unlock_irqrestore(&lp->lock, flags);
529 static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
531 struct pcnet32_private *lp = dev->priv;
536 spin_lock_irqsave(&lp->lock, flags);
537 r = mii_ethtool_sset(&lp->mii_if, cmd);
538 spin_unlock_irqrestore(&lp->lock, flags);
543 static void pcnet32_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
545 struct pcnet32_private *lp = dev->priv;
547 strcpy (info->driver, DRV_NAME);
548 strcpy (info->version, DRV_VERSION);
550 strcpy (info->bus_info, pci_name(lp->pci_dev));
552 sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
555 static u32 pcnet32_get_link(struct net_device *dev)
557 struct pcnet32_private *lp = dev->priv;
561 spin_lock_irqsave(&lp->lock, flags);
563 r = mii_link_ok(&lp->mii_if);
565 ulong ioaddr = dev->base_addr; /* card base I/O address */
566 r = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
568 spin_unlock_irqrestore(&lp->lock, flags);
573 static u32 pcnet32_get_msglevel(struct net_device *dev)
575 struct pcnet32_private *lp = dev->priv;
576 return lp->msg_enable;
579 static void pcnet32_set_msglevel(struct net_device *dev, u32 value)
581 struct pcnet32_private *lp = dev->priv;
582 lp->msg_enable = value;
585 static int pcnet32_nway_reset(struct net_device *dev)
587 struct pcnet32_private *lp = dev->priv;
592 spin_lock_irqsave(&lp->lock, flags);
593 r = mii_nway_restart(&lp->mii_if);
594 spin_unlock_irqrestore(&lp->lock, flags);
599 static void pcnet32_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
601 struct pcnet32_private *lp = dev->priv;
603 ering->tx_max_pending = TX_RING_SIZE - 1;
604 ering->tx_pending = lp->cur_tx - lp->dirty_tx;
605 ering->rx_max_pending = RX_RING_SIZE - 1;
606 ering->rx_pending = lp->cur_rx & RX_RING_MOD_MASK;
609 static void pcnet32_get_strings(struct net_device *dev, u32 stringset, u8 *data)
611 memcpy(data, pcnet32_gstrings_test, sizeof(pcnet32_gstrings_test));
614 static int pcnet32_self_test_count(struct net_device *dev)
616 return PCNET32_TEST_LEN;
619 static void pcnet32_ethtool_test(struct net_device *dev,
620 struct ethtool_test *test, u64 *data)
622 struct pcnet32_private *lp = dev->priv;
625 if (test->flags == ETH_TEST_FL_OFFLINE) {
626 rc = pcnet32_loopback_test(dev, data);
628 if (netif_msg_hw(lp))
629 printk(KERN_DEBUG "%s: Loopback test failed.\n", dev->name);
630 test->flags |= ETH_TEST_FL_FAILED;
631 } else if (netif_msg_hw(lp))
632 printk(KERN_DEBUG "%s: Loopback test passed.\n", dev->name);
633 } else if (netif_msg_hw(lp))
634 printk(KERN_DEBUG "%s: No tests to run (specify 'Offline' on ethtool).", dev->name);
635 } /* end pcnet32_ethtool_test */
637 static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1)
639 struct pcnet32_private *lp = dev->priv;
640 struct pcnet32_access *a = &lp->a; /* access to registers */
641 ulong ioaddr = dev->base_addr; /* card base I/O address */
642 struct sk_buff *skb; /* sk buff */
643 int x, i; /* counters */
644 int numbuffs = 4; /* number of TX/RX buffers and descs */
645 u16 status = 0x8300; /* TX ring status */
646 u16 teststatus; /* test of ring status */
647 int rc; /* return code */
648 int size; /* size of packets */
649 unsigned char *packet; /* source packet data */
650 static int data_len = 60; /* length of source packets */
654 *data1 = 1; /* status of test, default to fail */
655 rc = 1; /* default to fail */
657 if (netif_running(dev))
660 spin_lock_irqsave(&lp->lock, flags);
662 /* Reset the PCNET32 */
663 lp->a.reset (ioaddr);
665 /* switch pcnet32 to 32bit mode */
666 lp->a.write_bcr (ioaddr, 20, 2);
668 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
669 lp->init_block.filter[0] = 0;
670 lp->init_block.filter[1] = 0;
672 /* purge & init rings but don't actually restart */
673 pcnet32_restart(dev, 0x0000);
675 lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
677 /* Initialize Transmit buffers. */
678 size = data_len + 15;
679 for (x=0; x<numbuffs; x++) {
680 if (!(skb = dev_alloc_skb(size))) {
681 if (netif_msg_hw(lp))
682 printk(KERN_DEBUG "%s: Cannot allocate skb at line: %d!\n",
683 dev->name, __LINE__);
687 skb_put(skb, size); /* create space for data */
688 lp->tx_skbuff[x] = skb;
689 lp->tx_ring[x].length = le16_to_cpu(-skb->len);
690 lp->tx_ring[x].misc = 0;
692 /* put DA and SA into the skb */
694 *packet++ = dev->dev_addr[i];
696 *packet++ = dev->dev_addr[i];
702 /* fill packet with data */
703 for (i=0; i<data_len; i++)
706 lp->tx_dma_addr[x] = pci_map_single(lp->pci_dev, skb->data,
707 skb->len, PCI_DMA_TODEVICE);
708 lp->tx_ring[x].base = (u32)le32_to_cpu(lp->tx_dma_addr[x]);
709 wmb(); /* Make sure owner changes after all others are visible */
710 lp->tx_ring[x].status = le16_to_cpu(status);
714 x = a->read_bcr(ioaddr, 32); /* set internal loopback in BSR32 */
716 a->write_bcr(ioaddr, 32, x);
718 lp->a.write_csr (ioaddr, 15, 0x0044); /* set int loopback in CSR15 */
720 teststatus = le16_to_cpu(0x8000);
721 lp->a.write_csr(ioaddr, 0, 0x0002); /* Set STRT bit */
723 /* Check status of descriptors */
724 for (x=0; x<numbuffs; x++) {
727 while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) {
728 spin_unlock_irqrestore(&lp->lock, flags);
730 spin_lock_irqsave(&lp->lock, flags);
735 if (netif_msg_hw(lp))
736 printk("%s: Desc %d failed to reset!\n",dev->name,x);
741 lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */
743 if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) {
744 printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name);
746 for (x=0; x<numbuffs; x++) {
747 printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x);
748 skb = lp->rx_skbuff[x];
749 for (i=0; i<size; i++) {
750 printk("%02x ", *(skb->data+i));
758 while (x<numbuffs && !rc) {
759 skb = lp->rx_skbuff[x];
760 packet = lp->tx_skbuff[x]->data;
761 for (i=0; i<size; i++) {
762 if (*(skb->data+i) != packet[i]) {
763 if (netif_msg_hw(lp))
764 printk(KERN_DEBUG "%s: Error in compare! %2x - %02x %02x\n",
765 dev->name, i, *(skb->data+i), packet[i]);
777 x = a->read_csr(ioaddr, 15) & 0xFFFF;
778 a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */
780 x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
782 a->write_bcr(ioaddr, 32, x);
784 spin_unlock_irqrestore(&lp->lock, flags);
786 if (netif_running(dev)) {
789 lp->a.write_bcr (ioaddr, 20, 4); /* return to 16bit mode */
793 } /* end pcnet32_loopback_test */
795 static void pcnet32_led_blink_callback(struct net_device *dev)
797 struct pcnet32_private *lp = dev->priv;
798 struct pcnet32_access *a = &lp->a;
799 ulong ioaddr = dev->base_addr;
803 spin_lock_irqsave(&lp->lock, flags);
804 for (i=4; i<8; i++) {
805 a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000);
807 spin_unlock_irqrestore(&lp->lock, flags);
809 mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT);
812 static int pcnet32_phys_id(struct net_device *dev, u32 data)
814 struct pcnet32_private *lp = dev->priv;
815 struct pcnet32_access *a = &lp->a;
816 ulong ioaddr = dev->base_addr;
820 if (!lp->blink_timer.function) {
821 init_timer(&lp->blink_timer);
822 lp->blink_timer.function = (void *) pcnet32_led_blink_callback;
823 lp->blink_timer.data = (unsigned long) dev;
826 /* Save the current value of the bcrs */
827 spin_lock_irqsave(&lp->lock, flags);
828 for (i=4; i<8; i++) {
829 regs[i-4] = a->read_bcr(ioaddr, i);
831 spin_unlock_irqrestore(&lp->lock, flags);
833 mod_timer(&lp->blink_timer, jiffies);
834 set_current_state(TASK_INTERRUPTIBLE);
836 if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)))
837 data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
839 schedule_timeout(data * HZ);
840 del_timer_sync(&lp->blink_timer);
842 /* Restore the original value of the bcrs */
843 spin_lock_irqsave(&lp->lock, flags);
844 for (i=4; i<8; i++) {
845 a->write_bcr(ioaddr, i, regs[i-4]);
847 spin_unlock_irqrestore(&lp->lock, flags);
852 static int pcnet32_get_regs_len(struct net_device *dev)
854 return(PCNET32_NUM_REGS * sizeof(u16));
857 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
862 struct pcnet32_private *lp = dev->priv;
863 struct pcnet32_access *a = &lp->a;
864 ulong ioaddr = dev->base_addr;
868 spin_lock_irqsave(&lp->lock, flags);
870 csr0 = a->read_csr(ioaddr, 0);
871 if (!(csr0 & 0x0004)) { /* If not stopped */
872 /* set SUSPEND (SPND) - CSR5 bit 0 */
873 a->write_csr(ioaddr, 5, 0x0001);
875 /* poll waiting for bit to be set */
877 while (!(a->read_csr(ioaddr, 5) & 0x0001)) {
878 spin_unlock_irqrestore(&lp->lock, flags);
880 spin_lock_irqsave(&lp->lock, flags);
883 if (netif_msg_hw(lp))
884 printk(KERN_DEBUG "%s: Error getting into suspend!\n",
891 /* read address PROM */
892 for (i=0; i<16; i += 2)
893 *buff++ = inw(ioaddr + i);
895 /* read control and status registers */
896 for (i=0; i<90; i++) {
897 *buff++ = a->read_csr(ioaddr, i);
900 *buff++ = a->read_csr(ioaddr, 112);
901 *buff++ = a->read_csr(ioaddr, 114);
903 /* read bus configuration registers */
904 for (i=0; i<36; i++) {
905 *buff++ = a->read_bcr(ioaddr, i);
908 /* read mii phy registers */
910 for (i=0; i<32; i++) {
911 lp->a.write_bcr(ioaddr, 33, ((lp->mii_if.phy_id) << 5) | i);
912 *buff++ = lp->a.read_bcr(ioaddr, 34);
916 if (!(csr0 & 0x0004)) { /* If not stopped */
917 /* clear SUSPEND (SPND) - CSR5 bit 0 */
918 a->write_csr(ioaddr, 5, 0x0000);
921 i = buff - (u16 *)ptr;
922 for (; i < PCNET32_NUM_REGS; i++)
925 spin_unlock_irqrestore(&lp->lock, flags);
928 static struct ethtool_ops pcnet32_ethtool_ops = {
929 .get_settings = pcnet32_get_settings,
930 .set_settings = pcnet32_set_settings,
931 .get_drvinfo = pcnet32_get_drvinfo,
932 .get_msglevel = pcnet32_get_msglevel,
933 .set_msglevel = pcnet32_set_msglevel,
934 .nway_reset = pcnet32_nway_reset,
935 .get_link = pcnet32_get_link,
936 .get_ringparam = pcnet32_get_ringparam,
937 .get_tx_csum = ethtool_op_get_tx_csum,
938 .get_sg = ethtool_op_get_sg,
939 .get_tso = ethtool_op_get_tso,
940 .get_strings = pcnet32_get_strings,
941 .self_test_count = pcnet32_self_test_count,
942 .self_test = pcnet32_ethtool_test,
943 .phys_id = pcnet32_phys_id,
944 .get_regs_len = pcnet32_get_regs_len,
945 .get_regs = pcnet32_get_regs,
948 /* only probes for non-PCI devices, the rest are handled by
949 * pci_register_driver via pcnet32_probe_pci */
951 static void __devinit
952 pcnet32_probe_vlbus(void)
954 unsigned int *port, ioaddr;
956 /* search for PCnet32 VLB cards at known addresses */
957 for (port = pcnet32_portlist; (ioaddr = *port); port++) {
958 if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
959 /* check if there is really a pcnet chip on that ioaddr */
960 if ((inb(ioaddr + 14) == 0x57) && (inb(ioaddr + 15) == 0x57)) {
961 pcnet32_probe1(ioaddr, 0, 0, NULL);
963 release_region(ioaddr, PCNET32_TOTAL_SIZE);
971 pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
973 unsigned long ioaddr;
976 err = pci_enable_device(pdev);
978 if (pcnet32_debug & NETIF_MSG_PROBE)
979 printk(KERN_ERR PFX "failed to enable device -- err=%d\n", err);
982 pci_set_master(pdev);
984 ioaddr = pci_resource_start (pdev, 0);
986 if (pcnet32_debug & NETIF_MSG_PROBE)
987 printk (KERN_ERR PFX "card has no PCI IO resources, aborting\n");
991 if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
992 if (pcnet32_debug & NETIF_MSG_PROBE)
993 printk(KERN_ERR PFX "architecture does not support 32bit PCI busmaster DMA\n");
996 if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") == NULL) {
997 if (pcnet32_debug & NETIF_MSG_PROBE)
998 printk(KERN_ERR PFX "io address range already allocated\n");
1002 return pcnet32_probe1(ioaddr, pdev->irq, 1, pdev);
1007 * Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
1008 * pdev will be NULL when called from pcnet32_probe_vlbus.
1010 static int __devinit
1011 pcnet32_probe1(unsigned long ioaddr, unsigned int irq_line, int shared,
1012 struct pci_dev *pdev)
1014 struct pcnet32_private *lp;
1015 dma_addr_t lp_dma_addr;
1017 int fdx, mii, fset, dxsuflo;
1020 struct net_device *dev;
1021 struct pcnet32_access *a = NULL;
1025 /* reset the chip */
1026 pcnet32_wio_reset(ioaddr);
1028 /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
1029 if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {
1032 pcnet32_dwio_reset(ioaddr);
1033 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
1036 goto err_release_region;
1039 chip_version = a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr,89) << 16);
1040 if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
1041 printk(KERN_INFO " PCnet chip version is %#x.\n", chip_version);
1042 if ((chip_version & 0xfff) != 0x003) {
1043 if (pcnet32_debug & NETIF_MSG_PROBE)
1044 printk(KERN_INFO PFX "Unsupported chip version.\n");
1045 goto err_release_region;
1048 /* initialize variables */
1049 fdx = mii = fset = dxsuflo = 0;
1050 chip_version = (chip_version >> 12) & 0xffff;
1052 switch (chip_version) {
1054 chipname = "PCnet/PCI 79C970"; /* PCI */
1058 chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
1060 chipname = "PCnet/32 79C965"; /* 486/VL bus */
1063 chipname = "PCnet/PCI II 79C970A"; /* PCI */
1067 chipname = "PCnet/FAST 79C971"; /* PCI */
1068 fdx = 1; mii = 1; fset = 1;
1071 chipname = "PCnet/FAST+ 79C972"; /* PCI */
1072 fdx = 1; mii = 1; fset = 1;
1075 chipname = "PCnet/FAST III 79C973"; /* PCI */
1079 chipname = "PCnet/Home 79C978"; /* PCI */
1082 * This is based on specs published at www.amd.com. This section
1083 * assumes that a card with a 79C978 wants to go into 1Mb HomePNA
1084 * mode. The 79C978 can also go into standard ethernet, and there
1085 * probably should be some sort of module option to select the
1086 * mode by which the card should operate
1088 /* switch to home wiring mode */
1089 media = a->read_bcr(ioaddr, 49);
1090 if (pcnet32_debug & NETIF_MSG_PROBE)
1091 printk(KERN_DEBUG PFX "media reset to %#x.\n", media);
1092 a->write_bcr(ioaddr, 49, media);
1095 chipname = "PCnet/FAST III 79C975"; /* PCI */
1099 chipname = "PCnet/PRO 79C976";
1103 if (pcnet32_debug & NETIF_MSG_PROBE)
1104 printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n",
1106 goto err_release_region;
1110 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
1111 * starting until the packet is loaded. Strike one for reliability, lose
1112 * one for latency - although on PCI this isnt a big loss. Older chips
1113 * have FIFO's smaller than a packet, so you can't do this.
1114 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
1118 a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
1119 a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
1123 dev = alloc_etherdev(0);
1125 if (pcnet32_debug & NETIF_MSG_PROBE)
1126 printk(KERN_ERR PFX "Memory allocation failed.\n");
1128 goto err_release_region;
1130 SET_NETDEV_DEV(dev, &pdev->dev);
1132 if (pcnet32_debug & NETIF_MSG_PROBE)
1133 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
1135 /* In most chips, after a chip reset, the ethernet address is read from the
1136 * station address PROM at the base address and programmed into the
1137 * "Physical Address Registers" CSR12-14.
1138 * As a precautionary measure, we read the PROM values and complain if
1139 * they disagree with the CSRs. Either way, we use the CSR values, and
1140 * double check that they are valid.
1142 for (i = 0; i < 3; i++) {
1144 val = a->read_csr(ioaddr, i+12) & 0x0ffff;
1145 /* There may be endianness issues here. */
1146 dev->dev_addr[2*i] = val & 0x0ff;
1147 dev->dev_addr[2*i+1] = (val >> 8) & 0x0ff;
1150 /* read PROM address and compare with CSR address */
1151 for (i = 0; i < 6; i++)
1152 promaddr[i] = inb(ioaddr + i);
1154 if (memcmp(promaddr, dev->dev_addr, 6)
1155 || !is_valid_ether_addr(dev->dev_addr)) {
1157 if (is_valid_ether_addr(promaddr)) {
1159 if (!is_valid_ether_addr(dev->dev_addr)
1160 && is_valid_ether_addr(promaddr)) {
1162 if (pcnet32_debug & NETIF_MSG_PROBE) {
1163 printk(" warning: CSR address invalid,\n");
1164 printk(KERN_INFO " using instead PROM address of");
1166 memcpy(dev->dev_addr, promaddr, 6);
1170 /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1171 if (!is_valid_ether_addr(dev->dev_addr))
1172 memset(dev->dev_addr, 0, sizeof(dev->dev_addr));
1174 if (pcnet32_debug & NETIF_MSG_PROBE) {
1175 for (i = 0; i < 6; i++)
1176 printk(" %2.2x", dev->dev_addr[i]);
1178 /* Version 0x2623 and 0x2624 */
1179 if (((chip_version + 1) & 0xfffe) == 0x2624) {
1180 i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */
1181 printk("\n" KERN_INFO " tx_start_pt(0x%04x):",i);
1183 case 0: printk(" 20 bytes,"); break;
1184 case 1: printk(" 64 bytes,"); break;
1185 case 2: printk(" 128 bytes,"); break;
1186 case 3: printk("~220 bytes,"); break;
1188 i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */
1189 printk(" BCR18(%x):",i&0xffff);
1190 if (i & (1<<5)) printk("BurstWrEn ");
1191 if (i & (1<<6)) printk("BurstRdEn ");
1192 if (i & (1<<7)) printk("DWordIO ");
1193 if (i & (1<<11)) printk("NoUFlow ");
1194 i = a->read_bcr(ioaddr, 25);
1195 printk("\n" KERN_INFO " SRAMSIZE=0x%04x,",i<<8);
1196 i = a->read_bcr(ioaddr, 26);
1197 printk(" SRAM_BND=0x%04x,",i<<8);
1198 i = a->read_bcr(ioaddr, 27);
1199 if (i & (1<<14)) printk("LowLatRx");
1203 dev->base_addr = ioaddr;
1204 /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
1205 if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
1206 if (pcnet32_debug & NETIF_MSG_PROBE)
1207 printk(KERN_ERR PFX "Consistent memory allocation failed.\n");
1209 goto err_free_netdev;
1212 memset(lp, 0, sizeof(*lp));
1213 lp->dma_addr = lp_dma_addr;
1216 spin_lock_init(&lp->lock);
1218 SET_MODULE_OWNER(dev);
1219 SET_NETDEV_DEV(dev, &pdev->dev);
1221 lp->name = chipname;
1222 lp->shared_irq = shared;
1223 lp->mii_if.full_duplex = fdx;
1224 lp->mii_if.phy_id_mask = 0x1f;
1225 lp->mii_if.reg_num_mask = 0x1f;
1226 lp->dxsuflo = dxsuflo;
1228 lp->msg_enable = pcnet32_debug;
1229 if ((cards_found >= MAX_UNITS) || (options[cards_found] > sizeof(options_mapping)))
1230 lp->options = PCNET32_PORT_ASEL;
1232 lp->options = options_mapping[options[cards_found]];
1233 lp->mii_if.dev = dev;
1234 lp->mii_if.mdio_read = mdio_read;
1235 lp->mii_if.mdio_write = mdio_write;
1237 if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
1238 ((cards_found>=MAX_UNITS) || full_duplex[cards_found]))
1239 lp->options |= PCNET32_PORT_FD;
1242 if (pcnet32_debug & NETIF_MSG_PROBE)
1243 printk(KERN_ERR PFX "No access methods\n");
1245 goto err_free_consistent;
1249 /* detect special T1/E1 WAN card by checking for MAC address */
1250 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0
1251 && dev->dev_addr[2] == 0x75)
1252 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1254 lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */
1255 lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
1256 for (i = 0; i < 6; i++)
1257 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1258 lp->init_block.filter[0] = 0x00000000;
1259 lp->init_block.filter[1] = 0x00000000;
1260 lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr +
1261 offsetof(struct pcnet32_private, rx_ring));
1262 lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr +
1263 offsetof(struct pcnet32_private, tx_ring));
1265 /* switch pcnet32 to 32bit mode */
1266 a->write_bcr(ioaddr, 20, 2);
1268 a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,
1269 init_block)) & 0xffff);
1270 a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,
1271 init_block)) >> 16);
1274 dev->irq = irq_line;
1277 if (dev->irq >= 2) {
1278 if (pcnet32_debug & NETIF_MSG_PROBE)
1279 printk(" assigned IRQ %d.\n", dev->irq);
1281 unsigned long irq_mask = probe_irq_on();
1284 * To auto-IRQ we enable the initialization-done and DMA error
1285 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
1288 /* Trigger an initialization just for the interrupt. */
1289 a->write_csr (ioaddr, 0, 0x41);
1292 dev->irq = probe_irq_off (irq_mask);
1294 if (pcnet32_debug & NETIF_MSG_PROBE)
1295 printk(", failed to detect IRQ line.\n");
1297 goto err_free_consistent;
1299 if (pcnet32_debug & NETIF_MSG_PROBE)
1300 printk(", probed IRQ %d.\n", dev->irq);
1303 /* Set the mii phy_id so that we can query the link state */
1305 lp->mii_if.phy_id = ((lp->a.read_bcr (ioaddr, 33)) >> 5) & 0x1f;
1307 init_timer (&lp->watchdog_timer);
1308 lp->watchdog_timer.data = (unsigned long) dev;
1309 lp->watchdog_timer.function = (void *) &pcnet32_watchdog;
1311 /* The PCNET32-specific entries in the device structure. */
1312 dev->open = &pcnet32_open;
1313 dev->hard_start_xmit = &pcnet32_start_xmit;
1314 dev->stop = &pcnet32_close;
1315 dev->get_stats = &pcnet32_get_stats;
1316 dev->set_multicast_list = &pcnet32_set_multicast_list;
1317 dev->do_ioctl = &pcnet32_ioctl;
1318 dev->ethtool_ops = &pcnet32_ethtool_ops;
1319 dev->tx_timeout = pcnet32_tx_timeout;
1320 dev->watchdog_timeo = (5*HZ);
1322 #ifdef CONFIG_NET_POLL_CONTROLLER
1323 dev->poll_controller = pcnet32_poll_controller;
1326 /* Fill in the generic fields of the device structure. */
1327 if (register_netdev(dev))
1328 goto err_free_consistent;
1331 pci_set_drvdata(pdev, dev);
1333 lp->next = pcnet32_dev;
1337 if (pcnet32_debug & NETIF_MSG_PROBE)
1338 printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);
1341 a->write_bcr(ioaddr, 2, 0x1002); /* enable LED writes */
1345 err_free_consistent:
1346 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
1350 release_region(ioaddr, PCNET32_TOTAL_SIZE);
1356 pcnet32_open(struct net_device *dev)
1358 struct pcnet32_private *lp = dev->priv;
1359 unsigned long ioaddr = dev->base_addr;
1363 unsigned long flags;
1365 if (dev->irq == 0 ||
1366 request_irq(dev->irq, &pcnet32_interrupt,
1367 lp->shared_irq ? SA_SHIRQ : 0, dev->name, (void *)dev)) {
1371 spin_lock_irqsave(&lp->lock, flags);
1372 /* Check for a valid station address */
1373 if (!is_valid_ether_addr(dev->dev_addr)) {
1378 /* Reset the PCNET32 */
1379 lp->a.reset (ioaddr);
1381 /* switch pcnet32 to 32bit mode */
1382 lp->a.write_bcr (ioaddr, 20, 2);
1384 if (netif_msg_ifup(lp))
1385 printk(KERN_DEBUG "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
1386 dev->name, dev->irq,
1387 (u32) (lp->dma_addr + offsetof(struct pcnet32_private, tx_ring)),
1388 (u32) (lp->dma_addr + offsetof(struct pcnet32_private, rx_ring)),
1389 (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block)));
1391 /* set/reset autoselect bit */
1392 val = lp->a.read_bcr (ioaddr, 2) & ~2;
1393 if (lp->options & PCNET32_PORT_ASEL)
1395 lp->a.write_bcr (ioaddr, 2, val);
1397 /* handle full duplex setting */
1398 if (lp->mii_if.full_duplex) {
1399 val = lp->a.read_bcr (ioaddr, 9) & ~3;
1400 if (lp->options & PCNET32_PORT_FD) {
1402 if (lp->options == (PCNET32_PORT_FD | PCNET32_PORT_AUI))
1404 } else if (lp->options & PCNET32_PORT_ASEL) {
1405 /* workaround of xSeries250, turn on for 79C975 only */
1406 i = ((lp->a.read_csr(ioaddr, 88) |
1407 (lp->a.read_csr(ioaddr,89) << 16)) >> 12) & 0xffff;
1411 lp->a.write_bcr (ioaddr, 9, val);
1414 /* set/reset GPSI bit in test register */
1415 val = lp->a.read_csr (ioaddr, 124) & ~0x10;
1416 if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI)
1418 lp->a.write_csr (ioaddr, 124, val);
1420 if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) {
1421 /* disable Auto Negotiation, set 10Mpbs, HD */
1422 val = lp->a.read_bcr (ioaddr, 32) & ~0x38;
1423 if (lp->options & PCNET32_PORT_FD)
1425 if (lp->options & PCNET32_PORT_100)
1427 lp->a.write_bcr (ioaddr, 32, val);
1429 if (lp->options & PCNET32_PORT_ASEL) {
1430 /* enable auto negotiate, setup, disable fd */
1431 val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
1433 lp->a.write_bcr(ioaddr, 32, val);
1438 if (lp->dxsuflo) { /* Disable transmit stop on underflow */
1439 val = lp->a.read_csr (ioaddr, 3);
1441 lp->a.write_csr (ioaddr, 3, val);
1445 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
1446 pcnet32_load_multicast(dev);
1448 if (pcnet32_init_ring(dev)) {
1453 /* Re-initialize the PCNET32, and start it when done. */
1454 lp->a.write_csr (ioaddr, 1, (lp->dma_addr +
1455 offsetof(struct pcnet32_private, init_block)) & 0xffff);
1456 lp->a.write_csr (ioaddr, 2, (lp->dma_addr +
1457 offsetof(struct pcnet32_private, init_block)) >> 16);
1459 lp->a.write_csr (ioaddr, 4, 0x0915);
1460 lp->a.write_csr (ioaddr, 0, 0x0001);
1462 netif_start_queue(dev);
1464 /* If we have mii, print the link status and start the watchdog */
1466 mii_check_media (&lp->mii_if, netif_msg_link(lp), 1);
1467 mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
1472 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
1475 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
1476 * reports that doing so triggers a bug in the '974.
1478 lp->a.write_csr (ioaddr, 0, 0x0042);
1480 if (netif_msg_ifup(lp))
1481 printk(KERN_DEBUG "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
1482 dev->name, i, (u32) (lp->dma_addr +
1483 offsetof(struct pcnet32_private, init_block)),
1484 lp->a.read_csr(ioaddr, 0));
1486 spin_unlock_irqrestore(&lp->lock, flags);
1488 return 0; /* Always succeed */
1491 /* free any allocated skbuffs */
1492 for (i = 0; i < RX_RING_SIZE; i++) {
1493 lp->rx_ring[i].status = 0;
1494 if (lp->rx_skbuff[i]) {
1495 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
1496 PCI_DMA_FROMDEVICE);
1497 dev_kfree_skb(lp->rx_skbuff[i]);
1499 lp->rx_skbuff[i] = NULL;
1500 lp->rx_dma_addr[i] = 0;
1503 * Switch back to 16bit mode to avoid problems with dumb
1504 * DOS packet driver after a warm reboot
1506 lp->a.write_bcr (ioaddr, 20, 4);
1509 spin_unlock_irqrestore(&lp->lock, flags);
1510 free_irq(dev->irq, dev);
1515 * The LANCE has been halted for one reason or another (busmaster memory
1516 * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
1517 * etc.). Modern LANCE variants always reload their ring-buffer
1518 * configuration when restarted, so we must reinitialize our ring
1519 * context before restarting. As part of this reinitialization,
1520 * find all packets still on the Tx ring and pretend that they had been
1521 * sent (in effect, drop the packets on the floor) - the higher-level
1522 * protocols will time out and retransmit. It'd be better to shuffle
1523 * these skbs to a temp list and then actually re-Tx them after
1524 * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
1528 pcnet32_purge_tx_ring(struct net_device *dev)
1530 struct pcnet32_private *lp = dev->priv;
1533 for (i = 0; i < TX_RING_SIZE; i++) {
1534 if (lp->tx_skbuff[i]) {
1535 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
1536 lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
1537 dev_kfree_skb_any(lp->tx_skbuff[i]);
1538 lp->tx_skbuff[i] = NULL;
1539 lp->tx_dma_addr[i] = 0;
1545 /* Initialize the PCNET32 Rx and Tx rings. */
1547 pcnet32_init_ring(struct net_device *dev)
1549 struct pcnet32_private *lp = dev->priv;
1553 lp->cur_rx = lp->cur_tx = 0;
1554 lp->dirty_rx = lp->dirty_tx = 0;
1556 for (i = 0; i < RX_RING_SIZE; i++) {
1557 struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
1558 if (rx_skbuff == NULL) {
1559 if (!(rx_skbuff = lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
1560 /* there is not much, we can do at this point */
1561 if (pcnet32_debug & NETIF_MSG_DRV)
1562 printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n",
1566 skb_reserve (rx_skbuff, 2);
1569 if (lp->rx_dma_addr[i] == 0)
1570 lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->tail,
1571 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
1572 lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]);
1573 lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ);
1574 lp->rx_ring[i].status = le16_to_cpu(0x8000);
1576 /* The Tx buffer address is filled in as needed, but we do need to clear
1577 * the upper ownership bit. */
1578 for (i = 0; i < TX_RING_SIZE; i++) {
1579 lp->tx_ring[i].base = 0;
1580 lp->tx_ring[i].status = 0;
1581 lp->tx_dma_addr[i] = 0;
1583 wmb(); /* Make sure all changes are visible */
1585 lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
1586 for (i = 0; i < 6; i++)
1587 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1588 lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr +
1589 offsetof(struct pcnet32_private, rx_ring));
1590 lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr +
1591 offsetof(struct pcnet32_private, tx_ring));
1596 pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
1598 struct pcnet32_private *lp = dev->priv;
1599 unsigned long ioaddr = dev->base_addr;
1602 pcnet32_purge_tx_ring(dev);
1603 if (pcnet32_init_ring(dev))
1607 lp->a.write_csr (ioaddr, 0, 1);
1610 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
1613 lp->a.write_csr (ioaddr, 0, csr0_bits);
1618 pcnet32_tx_timeout (struct net_device *dev)
1620 struct pcnet32_private *lp = dev->priv;
1621 unsigned long ioaddr = dev->base_addr, flags;
1623 spin_lock_irqsave(&lp->lock, flags);
1624 /* Transmitter timeout, serious problems. */
1625 if (pcnet32_debug & NETIF_MSG_DRV)
1626 printk(KERN_ERR "%s: transmit timed out, status %4.4x, resetting.\n",
1627 dev->name, lp->a.read_csr(ioaddr, 0));
1628 lp->a.write_csr (ioaddr, 0, 0x0004);
1629 lp->stats.tx_errors++;
1630 if (netif_msg_tx_err(lp)) {
1632 printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
1633 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
1635 for (i = 0 ; i < RX_RING_SIZE; i++)
1636 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1637 le32_to_cpu(lp->rx_ring[i].base),
1638 (-le16_to_cpu(lp->rx_ring[i].buf_length)) & 0xffff,
1639 le32_to_cpu(lp->rx_ring[i].msg_length),
1640 le16_to_cpu(lp->rx_ring[i].status));
1641 for (i = 0 ; i < TX_RING_SIZE; i++)
1642 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
1643 le32_to_cpu(lp->tx_ring[i].base),
1644 (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff,
1645 le32_to_cpu(lp->tx_ring[i].misc),
1646 le16_to_cpu(lp->tx_ring[i].status));
1649 pcnet32_restart(dev, 0x0042);
1651 dev->trans_start = jiffies;
1652 netif_wake_queue(dev);
1654 spin_unlock_irqrestore(&lp->lock, flags);
1659 pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
1661 struct pcnet32_private *lp = dev->priv;
1662 unsigned long ioaddr = dev->base_addr;
1665 unsigned long flags;
1667 spin_lock_irqsave(&lp->lock, flags);
1669 if (netif_msg_tx_queued(lp)) {
1670 printk(KERN_DEBUG "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
1671 dev->name, lp->a.read_csr(ioaddr, 0));
1674 /* Default status -- will not enable Successful-TxDone
1675 * interrupt when that option is available to us.
1679 /* Fill in a Tx ring entry */
1681 /* Mask to ring buffer boundary. */
1682 entry = lp->cur_tx & TX_RING_MOD_MASK;
1684 /* Caution: the write order is important here, set the status
1685 * with the "ownership" bits last. */
1687 lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
1689 lp->tx_ring[entry].misc = 0x00000000;
1691 lp->tx_skbuff[entry] = skb;
1692 lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len,
1694 lp->tx_ring[entry].base = (u32)le32_to_cpu(lp->tx_dma_addr[entry]);
1695 wmb(); /* Make sure owner changes after all others are visible */
1696 lp->tx_ring[entry].status = le16_to_cpu(status);
1699 lp->stats.tx_bytes += skb->len;
1701 /* Trigger an immediate send poll. */
1702 lp->a.write_csr (ioaddr, 0, 0x0048);
1704 dev->trans_start = jiffies;
1706 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base != 0) {
1708 netif_stop_queue(dev);
1710 spin_unlock_irqrestore(&lp->lock, flags);
1714 /* The PCNET32 interrupt handler. */
1716 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1718 struct net_device *dev = dev_id;
1719 struct pcnet32_private *lp;
1720 unsigned long ioaddr;
1722 int boguscnt = max_interrupt_work;
1726 if (pcnet32_debug & NETIF_MSG_INTR)
1727 printk (KERN_DEBUG "%s(): irq %d for unknown device\n",
1732 ioaddr = dev->base_addr;
1735 spin_lock(&lp->lock);
1737 rap = lp->a.read_rap(ioaddr);
1738 while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8600 && --boguscnt >= 0) {
1739 if (csr0 == 0xffff) {
1740 break; /* PCMCIA remove happened */
1742 /* Acknowledge all of the current interrupt sources ASAP. */
1743 lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f);
1747 if (netif_msg_intr(lp))
1748 printk(KERN_DEBUG "%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1749 dev->name, csr0, lp->a.read_csr (ioaddr, 0));
1751 if (csr0 & 0x0400) /* Rx interrupt */
1754 if (csr0 & 0x0200) { /* Tx-done interrupt */
1755 unsigned int dirty_tx = lp->dirty_tx;
1758 while (dirty_tx != lp->cur_tx) {
1759 int entry = dirty_tx & TX_RING_MOD_MASK;
1760 int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
1763 break; /* It still hasn't been Txed */
1765 lp->tx_ring[entry].base = 0;
1767 if (status & 0x4000) {
1768 /* There was an major error, log it. */
1769 int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
1770 lp->stats.tx_errors++;
1771 if (netif_msg_tx_err(lp))
1772 printk(KERN_ERR "%s: Tx error status=%04x err_status=%08x\n",
1773 dev->name, status, err_status);
1774 if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
1775 if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
1776 if (err_status & 0x10000000) lp->stats.tx_window_errors++;
1778 if (err_status & 0x40000000) {
1779 lp->stats.tx_fifo_errors++;
1780 /* Ackk! On FIFO errors the Tx unit is turned off! */
1781 /* Remove this verbosity later! */
1782 if (netif_msg_tx_err(lp))
1783 printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
1788 if (err_status & 0x40000000) {
1789 lp->stats.tx_fifo_errors++;
1790 if (! lp->dxsuflo) { /* If controller doesn't recover ... */
1791 /* Ackk! On FIFO errors the Tx unit is turned off! */
1792 /* Remove this verbosity later! */
1793 if (netif_msg_tx_err(lp))
1794 printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n",
1801 if (status & 0x1800)
1802 lp->stats.collisions++;
1803 lp->stats.tx_packets++;
1806 /* We must free the original skb */
1807 if (lp->tx_skbuff[entry]) {
1808 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry],
1809 lp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE);
1810 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1811 lp->tx_skbuff[entry] = 0;
1812 lp->tx_dma_addr[entry] = 0;
1817 delta = (lp->cur_tx - dirty_tx) & (TX_RING_MOD_MASK + TX_RING_SIZE);
1818 if (delta > TX_RING_SIZE) {
1819 if (netif_msg_drv(lp))
1820 printk(KERN_ERR "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1821 dev->name, dirty_tx, lp->cur_tx, lp->tx_full);
1822 dirty_tx += TX_RING_SIZE;
1823 delta -= TX_RING_SIZE;
1827 netif_queue_stopped(dev) &&
1828 delta < TX_RING_SIZE - 2) {
1829 /* The ring is no longer full, clear tbusy. */
1831 netif_wake_queue (dev);
1833 lp->dirty_tx = dirty_tx;
1836 /* Log misc errors. */
1837 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1838 if (csr0 & 0x1000) {
1840 * this happens when our receive ring is full. This shouldn't
1841 * be a problem as we will see normal rx interrupts for the frames
1842 * in the receive ring. But there are some PCI chipsets (I can
1843 * reproduce this on SP3G with Intel saturn chipset) which have
1844 * sometimes problems and will fill up the receive ring with
1845 * error descriptors. In this situation we don't get a rx
1846 * interrupt, but a missed frame interrupt sooner or later.
1847 * So we try to clean up our receive ring here.
1850 lp->stats.rx_errors++; /* Missed a Rx frame. */
1852 if (csr0 & 0x0800) {
1853 if (netif_msg_drv(lp))
1854 printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n",
1856 /* unlike for the lance, there is no restart needed */
1860 /* stop the chip to clear the error condition, then restart */
1861 lp->a.write_csr (ioaddr, 0, 0x0004);
1862 pcnet32_restart(dev, 0x0002);
1863 netif_wake_queue(dev);
1867 /* Clear any other interrupt, and set interrupt enable. */
1868 lp->a.write_csr (ioaddr, 0, 0x7940);
1869 lp->a.write_rap (ioaddr,rap);
1871 if (netif_msg_intr(lp))
1872 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
1873 dev->name, lp->a.read_csr (ioaddr, 0));
1875 spin_unlock(&lp->lock);
1881 pcnet32_rx(struct net_device *dev)
1883 struct pcnet32_private *lp = dev->priv;
1884 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1885 int boguscnt = RX_RING_SIZE / 2;
1887 /* If we own the next entry, it's a new packet. Send it up. */
1888 while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
1889 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
1891 if (status != 0x03) { /* There was an error. */
1893 * There is a tricky error noted by John Murphy,
1894 * <murf@perftech.com> to Russ Nelson: Even with full-sized
1895 * buffers it's possible for a jabber packet to use two
1896 * buffers, with only the last correctly noting the error.
1898 if (status & 0x01) /* Only count a general error at the */
1899 lp->stats.rx_errors++; /* end of a packet.*/
1900 if (status & 0x20) lp->stats.rx_frame_errors++;
1901 if (status & 0x10) lp->stats.rx_over_errors++;
1902 if (status & 0x08) lp->stats.rx_crc_errors++;
1903 if (status & 0x04) lp->stats.rx_fifo_errors++;
1904 lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
1906 /* Malloc up new buffer, compatible with net-2e. */
1907 short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
1908 struct sk_buff *skb;
1911 if (netif_msg_rx_err(lp))
1912 printk(KERN_ERR "%s: Runt packet!\n", dev->name);
1913 lp->stats.rx_errors++;
1915 int rx_in_place = 0;
1917 if (pkt_len > rx_copybreak) {
1918 struct sk_buff *newskb;
1920 if ((newskb = dev_alloc_skb(PKT_BUF_SZ))) {
1921 skb_reserve (newskb, 2);
1922 skb = lp->rx_skbuff[entry];
1923 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[entry],
1924 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
1925 skb_put (skb, pkt_len);
1926 lp->rx_skbuff[entry] = newskb;
1928 lp->rx_dma_addr[entry] =
1929 pci_map_single(lp->pci_dev, newskb->tail,
1930 PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE);
1931 lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]);
1936 skb = dev_alloc_skb(pkt_len+2);
1941 if (netif_msg_drv(lp))
1942 printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n",
1944 for (i = 0; i < RX_RING_SIZE; i++)
1945 if ((short)le16_to_cpu(lp->rx_ring[(entry+i)
1946 & RX_RING_MOD_MASK].status) < 0)
1949 if (i > RX_RING_SIZE -2) {
1950 lp->stats.rx_dropped++;
1951 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1952 wmb(); /* Make sure adapter sees owner change */
1959 skb_reserve(skb,2); /* 16 byte align */
1960 skb_put(skb,pkt_len); /* Make room */
1961 pci_dma_sync_single_for_cpu(lp->pci_dev,
1962 lp->rx_dma_addr[entry],
1964 PCI_DMA_FROMDEVICE);
1965 eth_copy_and_sum(skb,
1966 (unsigned char *)(lp->rx_skbuff[entry]->tail),
1968 pci_dma_sync_single_for_device(lp->pci_dev,
1969 lp->rx_dma_addr[entry],
1971 PCI_DMA_FROMDEVICE);
1973 lp->stats.rx_bytes += skb->len;
1974 skb->protocol=eth_type_trans(skb,dev);
1976 dev->last_rx = jiffies;
1977 lp->stats.rx_packets++;
1981 * The docs say that the buffer length isn't touched, but Andrew Boyd
1982 * of QNX reports that some revs of the 79C965 clear it.
1984 lp->rx_ring[entry].buf_length = le16_to_cpu(2-PKT_BUF_SZ);
1985 wmb(); /* Make sure owner changes after all others are visible */
1986 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1987 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1988 if (--boguscnt <= 0) break; /* don't stay in loop forever */
1995 pcnet32_close(struct net_device *dev)
1997 unsigned long ioaddr = dev->base_addr;
1998 struct pcnet32_private *lp = dev->priv;
2000 unsigned long flags;
2002 del_timer_sync(&lp->watchdog_timer);
2004 netif_stop_queue(dev);
2006 spin_lock_irqsave(&lp->lock, flags);
2008 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
2010 if (netif_msg_ifdown(lp))
2011 printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
2012 dev->name, lp->a.read_csr (ioaddr, 0));
2014 /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
2015 lp->a.write_csr (ioaddr, 0, 0x0004);
2018 * Switch back to 16bit mode to avoid problems with dumb
2019 * DOS packet driver after a warm reboot
2021 lp->a.write_bcr (ioaddr, 20, 4);
2023 spin_unlock_irqrestore(&lp->lock, flags);
2025 free_irq(dev->irq, dev);
2027 spin_lock_irqsave(&lp->lock, flags);
2029 /* free all allocated skbuffs */
2030 for (i = 0; i < RX_RING_SIZE; i++) {
2031 lp->rx_ring[i].status = 0;
2032 wmb(); /* Make sure adapter sees owner change */
2033 if (lp->rx_skbuff[i]) {
2034 pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2,
2035 PCI_DMA_FROMDEVICE);
2036 dev_kfree_skb(lp->rx_skbuff[i]);
2038 lp->rx_skbuff[i] = NULL;
2039 lp->rx_dma_addr[i] = 0;
2042 for (i = 0; i < TX_RING_SIZE; i++) {
2043 lp->tx_ring[i].status = 0; /* CPU owns buffer */
2044 wmb(); /* Make sure adapter sees owner change */
2045 if (lp->tx_skbuff[i]) {
2046 pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
2047 lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE);
2048 dev_kfree_skb(lp->tx_skbuff[i]);
2050 lp->tx_skbuff[i] = NULL;
2051 lp->tx_dma_addr[i] = 0;
2054 spin_unlock_irqrestore(&lp->lock, flags);
2059 static struct net_device_stats *
2060 pcnet32_get_stats(struct net_device *dev)
2062 struct pcnet32_private *lp = dev->priv;
2063 unsigned long ioaddr = dev->base_addr;
2065 unsigned long flags;
2067 spin_lock_irqsave(&lp->lock, flags);
2068 saved_addr = lp->a.read_rap(ioaddr);
2069 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
2070 lp->a.write_rap(ioaddr, saved_addr);
2071 spin_unlock_irqrestore(&lp->lock, flags);
2076 /* taken from the sunlance driver, which it took from the depca driver */
2077 static void pcnet32_load_multicast (struct net_device *dev)
2079 struct pcnet32_private *lp = dev->priv;
2080 volatile struct pcnet32_init_block *ib = &lp->init_block;
2081 volatile u16 *mcast_table = (u16 *)&ib->filter;
2082 struct dev_mc_list *dmi=dev->mc_list;
2087 /* set all multicast bits */
2088 if (dev->flags & IFF_ALLMULTI) {
2089 ib->filter[0] = 0xffffffff;
2090 ib->filter[1] = 0xffffffff;
2093 /* clear the multicast filter */
2098 for (i = 0; i < dev->mc_count; i++) {
2099 addrs = dmi->dmi_addr;
2102 /* multicast address? */
2106 crc = ether_crc_le(6, addrs);
2108 mcast_table [crc >> 4] = le16_to_cpu(
2109 le16_to_cpu(mcast_table [crc >> 4]) | (1 << (crc & 0xf)));
2116 * Set or clear the multicast filter for this adaptor.
2118 static void pcnet32_set_multicast_list(struct net_device *dev)
2120 unsigned long ioaddr = dev->base_addr, flags;
2121 struct pcnet32_private *lp = dev->priv;
2123 spin_lock_irqsave(&lp->lock, flags);
2124 if (dev->flags&IFF_PROMISC) {
2125 /* Log any net taps. */
2126 if (netif_msg_hw(lp))
2127 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
2128 lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) << 7);
2130 lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
2131 pcnet32_load_multicast (dev);
2134 lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
2135 pcnet32_restart(dev, 0x0042); /* Resume normal operation */
2136 netif_wake_queue(dev);
2138 spin_unlock_irqrestore(&lp->lock, flags);
2141 /* This routine assumes that the lp->lock is held */
2142 static int mdio_read(struct net_device *dev, int phy_id, int reg_num)
2144 struct pcnet32_private *lp = dev->priv;
2145 unsigned long ioaddr = dev->base_addr;
2151 lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2152 val_out = lp->a.read_bcr(ioaddr, 34);
2157 /* This routine assumes that the lp->lock is held */
2158 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val)
2160 struct pcnet32_private *lp = dev->priv;
2161 unsigned long ioaddr = dev->base_addr;
2166 lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2167 lp->a.write_bcr(ioaddr, 34, val);
2170 static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2172 struct pcnet32_private *lp = dev->priv;
2174 unsigned long flags;
2176 /* SIOC[GS]MIIxxx ioctls */
2178 spin_lock_irqsave(&lp->lock, flags);
2179 rc = generic_mii_ioctl(&lp->mii_if, if_mii(rq), cmd, NULL);
2180 spin_unlock_irqrestore(&lp->lock, flags);
2188 static void pcnet32_watchdog(struct net_device *dev)
2190 struct pcnet32_private *lp = dev->priv;
2191 unsigned long flags;
2193 /* Print the link status if it has changed */
2195 spin_lock_irqsave(&lp->lock, flags);
2196 mii_check_media (&lp->mii_if, netif_msg_link(lp), 0);
2197 spin_unlock_irqrestore(&lp->lock, flags);
2200 mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
2203 static void __devexit pcnet32_remove_one(struct pci_dev *pdev)
2205 struct net_device *dev = pci_get_drvdata(pdev);
2208 struct pcnet32_private *lp = dev->priv;
2210 unregister_netdev(dev);
2211 release_region(dev->base_addr, PCNET32_TOTAL_SIZE);
2212 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2214 pci_set_drvdata(pdev, NULL);
2218 static struct pci_driver pcnet32_driver = {
2220 .probe = pcnet32_probe_pci,
2221 .remove = __devexit_p(pcnet32_remove_one),
2222 .id_table = pcnet32_pci_tbl,
2225 MODULE_PARM(debug, "i");
2226 MODULE_PARM_DESC(debug, DRV_NAME " debug level");
2227 MODULE_PARM(max_interrupt_work, "i");
2228 MODULE_PARM_DESC(max_interrupt_work, DRV_NAME " maximum events handled per interrupt");
2229 MODULE_PARM(rx_copybreak, "i");
2230 MODULE_PARM_DESC(rx_copybreak, DRV_NAME " copy breakpoint for copy-only-tiny-frames");
2231 MODULE_PARM(tx_start_pt, "i");
2232 MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
2233 MODULE_PARM(pcnet32vlb, "i");
2234 MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
2235 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
2236 MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
2237 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
2238 MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)");
2240 MODULE_AUTHOR("Thomas Bogendoerfer");
2241 MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
2242 MODULE_LICENSE("GPL");
2244 #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
2246 /* An additional parameter that may be passed in... */
2247 static int debug = -1;
2248 static int tx_start_pt = -1;
2249 static int pcnet32_have_pci;
2251 static int __init pcnet32_init_module(void)
2253 printk(KERN_INFO "%s", version);
2255 pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);
2257 if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
2258 tx_start = tx_start_pt;
2260 /* find the PCI devices */
2261 if (!pci_module_init(&pcnet32_driver))
2262 pcnet32_have_pci = 1;
2264 /* should we find any remaining VLbus devices ? */
2266 pcnet32_probe_vlbus();
2268 if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE))
2269 printk(KERN_INFO PFX "%d cards_found.\n", cards_found);
2271 return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV;
2274 static void __exit pcnet32_cleanup_module(void)
2276 struct net_device *next_dev;
2278 while (pcnet32_dev) {
2279 struct pcnet32_private *lp = pcnet32_dev->priv;
2280 next_dev = lp->next;
2281 unregister_netdev(pcnet32_dev);
2282 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
2283 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2284 free_netdev(pcnet32_dev);
2285 pcnet32_dev = next_dev;
2288 if (pcnet32_have_pci)
2289 pci_unregister_driver(&pcnet32_driver);
2292 module_init(pcnet32_init_module);
2293 module_exit(pcnet32_cleanup_module);