2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 =========================================================================
10 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
11 Command: 'insmod r8169 media = SET_MEDIA'
12 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
22 =========================================================================
23 VERSION 1.1 <2002/10/4>
25 The bit4:0 of MII register 4 is called "selector field", and have to be
26 00001b to indicate support of IEEE std 802.3 during NWay process of
27 exchanging Link Code Word (FLP).
29 VERSION 1.2 <2002/11/30>
32 - Use ether_crc in stock kernel (linux/crc32.h)
33 - Copy mc_filter setup code from 8139cp
34 (includes an optimization, and avoids set_bit use)
38 #include <linux/module.h>
39 #include <linux/pci.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/mii.h>
45 #include <linux/crc32.h>
46 #include <linux/init.h>
47 #include <linux/dma-mapping.h>
51 #define RTL8169_VERSION "1.2"
52 #define MODULENAME "r8169"
53 #define RTL8169_DRIVER_NAME MODULENAME " Gigabit Ethernet driver " RTL8169_VERSION
54 #define PFX MODULENAME ": "
57 #define assert(expr) \
59 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
60 #expr,__FILE__,__FUNCTION__,__LINE__); \
62 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args) } while (0)
64 #define assert(expr) do {} while (0)
65 #define dprintk(fmt, args...) do {} while (0)
66 #endif /* RTL8169_DEBUG */
68 #ifdef CONFIG_R8169_NAPI
69 #define rtl8169_rx_skb netif_receive_skb
70 #define rtl8169_rx_quota(count, quota) min(count, quota)
72 #define rtl8169_rx_skb netif_rx
73 #define rtl8169_rx_quota(count, quota) count
78 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
80 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
81 static int max_interrupt_work = 20;
83 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
84 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
85 static int multicast_filter_limit = 32;
87 /* MAC address length*/
88 #define MAC_ADDR_LEN 6
90 /* max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4).*/
91 #define MAX_ETH_FRAME_SIZE 1536
93 #define TX_FIFO_THRESH 256 /* In bytes */
95 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
96 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
97 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
98 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
99 #define RxPacketMaxSize 0x0800 /* Maximum size supported is 16K-1 */
100 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
102 #define R8169_NAPI_WEIGHT 64
103 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
104 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
105 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
106 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
107 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
109 #define RTL_MIN_IO_SIZE 0x80
110 #define RTL8169_TX_TIMEOUT (6*HZ)
111 #define RTL8169_PHY_TIMEOUT (10*HZ)
113 /* write/read MMIO register */
114 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
115 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
116 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
117 #define RTL_R8(reg) readb (ioaddr + (reg))
118 #define RTL_R16(reg) readw (ioaddr + (reg))
119 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
122 RTL_GIGA_MAC_VER_B = 0x00,
123 /* RTL_GIGA_MAC_VER_C = 0x03, */
124 RTL_GIGA_MAC_VER_D = 0x01,
125 RTL_GIGA_MAC_VER_E = 0x02
129 RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
130 RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
131 RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
132 RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
133 RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
137 #define _R(NAME,MAC,MASK) \
138 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
140 const static struct {
143 u32 RxConfigMask; /* Clears the bits supported by this chip */
144 } rtl_chip_info[] = {
145 _R("RTL8169", RTL_GIGA_MAC_VER_B, 0xff7e1880),
146 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_D, 0xff7e1880),
147 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_E, 0xff7e1880)
151 static struct pci_device_id rtl8169_pci_tbl[] = {
152 {0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
156 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
158 static int rx_copybreak = 200;
161 enum RTL8169_registers {
162 MAC0 = 0, /* Ethernet hardware address. */
163 MAR0 = 8, /* Multicast filter. */
164 TxDescStartAddrLow = 0x20,
165 TxDescStartAddrHigh = 0x24,
166 TxHDescStartAddrLow = 0x28,
167 TxHDescStartAddrHigh = 0x2c,
192 RxDescAddrLow = 0xE4,
193 RxDescAddrHigh = 0xE8,
196 FuncEventMask = 0xF4,
197 FuncPresetState = 0xF8,
198 FuncForceEvent = 0xFC,
201 enum RTL8169_register_content {
202 /*InterruptStatusBits */
206 TxDescUnavail = 0x80,
229 Cfg9346_Unlock = 0xC0,
234 AcceptBroadcast = 0x08,
235 AcceptMulticast = 0x04,
237 AcceptAllPhys = 0x01,
244 TxInterFrameGapShift = 24,
245 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
248 TBIReset = 0x80000000,
249 TBILoopback = 0x40000000,
250 TBINwEnable = 0x20000000,
251 TBINwRestart = 0x10000000,
252 TBILinkOk = 0x02000000,
253 TBINwComplete = 0x01000000,
261 /*rtl8169_PHYstatus */
271 /*GIGABIT_PHY_registers */
274 PHY_AUTO_NEGO_REG = 4,
275 PHY_1000_CTRL_REG = 9,
277 /*GIGABIT_PHY_REG_BIT */
278 PHY_Restart_Auto_Nego = 0x0200,
279 PHY_Enable_Auto_Nego = 0x1000,
282 PHY_Auto_Neco_Comp = 0x0020,
284 //PHY_AUTO_NEGO_REG = 4;
285 PHY_Cap_10_Half = 0x0020,
286 PHY_Cap_10_Full = 0x0040,
287 PHY_Cap_100_Half = 0x0080,
288 PHY_Cap_100_Full = 0x0100,
290 //PHY_1000_CTRL_REG = 9;
291 PHY_Cap_1000_Full = 0x0200,
303 TBILinkOK = 0x02000000,
306 enum _DescStatusBit {
313 #define RsvdMask 0x3fffc000
327 struct rtl8169_private {
328 void *mmio_addr; /* memory map physical address */
329 struct pci_dev *pci_dev; /* Index of PCI device */
330 struct net_device_stats stats; /* statistics of net device */
331 spinlock_t lock; /* spin lock flag */
335 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
336 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
339 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
340 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
341 dma_addr_t TxPhyAddr;
342 dma_addr_t RxPhyAddr;
343 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
344 struct sk_buff *Tx_skbuff[NUM_TX_DESC]; /* Tx data buffers */
345 struct timer_list timer;
348 int phy_auto_nego_reg;
349 int phy_1000_ctrl_reg;
351 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
352 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
353 void (*phy_reset_enable)(void *);
354 unsigned int (*phy_reset_pending)(void *);
355 unsigned int (*link_ok)(void *);
358 MODULE_AUTHOR("Realtek");
359 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
360 MODULE_PARM(media, "1-" __MODULE_STRING(MAX_UNITS) "i");
361 MODULE_PARM(rx_copybreak, "i");
362 MODULE_PARM(use_dac, "i");
363 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
364 MODULE_LICENSE("GPL");
365 MODULE_VERSION(RTL8169_VERSION);
367 static int rtl8169_open(struct net_device *dev);
368 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
369 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
370 struct pt_regs *regs);
371 static int rtl8169_init_ring(struct net_device *dev);
372 static void rtl8169_hw_start(struct net_device *dev);
373 static int rtl8169_close(struct net_device *dev);
374 static void rtl8169_set_rx_mode(struct net_device *dev);
375 static void rtl8169_tx_timeout(struct net_device *dev);
376 static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev);
377 #ifdef CONFIG_R8169_NAPI
378 static int rtl8169_poll(struct net_device *dev, int *budget);
381 static const u16 rtl8169_intr_mask =
382 SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
383 static const u16 rtl8169_napi_event =
384 RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
385 static const unsigned int rtl8169_rx_config =
386 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
388 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
389 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
390 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
391 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
393 static void mdio_write(void *ioaddr, int RegAddr, int value)
397 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
400 for (i = 2000; i > 0; i--) {
401 // Check if the RTL8169 has completed writing to the specified MII register
402 if (!(RTL_R32(PHYAR) & 0x80000000))
408 static int mdio_read(void *ioaddr, int RegAddr)
412 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
415 for (i = 2000; i > 0; i--) {
416 // Check if the RTL8169 has completed retrieving data from the specified MII register
417 if (RTL_R32(PHYAR) & 0x80000000) {
418 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
426 static unsigned int rtl8169_tbi_reset_pending(void *ioaddr)
428 return RTL_R32(TBICSR) & TBIReset;
431 static unsigned int rtl8169_xmii_reset_pending(void *ioaddr)
433 return mdio_read(ioaddr, 0) & 0x8000;
436 static unsigned int rtl8169_tbi_link_ok(void *ioaddr)
438 return RTL_R32(TBICSR) & TBILinkOk;
441 static unsigned int rtl8169_xmii_link_ok(void *ioaddr)
443 return RTL_R8(PHYstatus) & LinkStatus;
446 static void rtl8169_tbi_reset_enable(void *ioaddr)
448 RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
451 static void rtl8169_xmii_reset_enable(void *ioaddr)
455 val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
456 mdio_write(ioaddr, PHY_CTRL_REG, val);
459 static void rtl8169_check_link_status(struct net_device *dev,
460 struct rtl8169_private *tp, void *ioaddr)
464 spin_lock_irqsave(&tp->lock, flags);
465 if (tp->link_ok(ioaddr)) {
466 netif_carrier_on(dev);
467 printk(KERN_INFO PFX "%s: link up\n", dev->name);
469 netif_carrier_off(dev);
470 spin_unlock_irqrestore(&tp->lock, flags);
473 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
480 } link_settings[] = {
481 { SPEED_10, DUPLEX_HALF, AUTONEG_DISABLE, _10_Half },
482 { SPEED_10, DUPLEX_FULL, AUTONEG_DISABLE, _10_Full },
483 { SPEED_100, DUPLEX_HALF, AUTONEG_DISABLE, _100_Half },
484 { SPEED_100, DUPLEX_FULL, AUTONEG_DISABLE, _100_Full },
485 { SPEED_1000, DUPLEX_FULL, AUTONEG_DISABLE, _1000_Full },
487 { SPEED_1000, DUPLEX_FULL, AUTONEG_ENABLE, 0xff }
489 unsigned char option;
491 option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
493 if ((option != 0xff) && !idx)
494 printk(KERN_WARNING PFX "media option is deprecated.\n");
496 for (p = link_settings; p->media != 0xff; p++) {
497 if (p->media == option)
500 *autoneg = p->autoneg;
505 static void rtl8169_get_drvinfo(struct net_device *dev,
506 struct ethtool_drvinfo *info)
508 struct rtl8169_private *tp = netdev_priv(dev);
510 strcpy(info->driver, RTL8169_DRIVER_NAME);
511 strcpy(info->version, RTL8169_VERSION );
512 strcpy(info->bus_info, pci_name(tp->pci_dev));
515 static int rtl8169_set_speed_tbi(struct net_device *dev,
516 u8 autoneg, u16 speed, u8 duplex)
518 struct rtl8169_private *tp = netdev_priv(dev);
519 void *ioaddr = tp->mmio_addr;
523 reg = RTL_R32(TBICSR);
524 if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
525 (duplex == DUPLEX_FULL)) {
526 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
527 } else if (autoneg == AUTONEG_ENABLE)
528 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
530 printk(KERN_WARNING PFX
531 "%s: incorrect speed setting refused in TBI mode\n",
539 static int rtl8169_set_speed_xmii(struct net_device *dev,
540 u8 autoneg, u16 speed, u8 duplex)
542 struct rtl8169_private *tp = netdev_priv(dev);
543 void *ioaddr = tp->mmio_addr;
544 int auto_nego, giga_ctrl;
546 auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
547 auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
548 PHY_Cap_100_Half | PHY_Cap_100_Full);
549 giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
550 giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
552 if (autoneg == AUTONEG_ENABLE) {
553 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
554 PHY_Cap_100_Half | PHY_Cap_100_Full);
555 giga_ctrl |= PHY_Cap_1000_Full;
557 if (speed == SPEED_10)
558 auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
559 else if (speed == SPEED_100)
560 auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
561 else if (speed == SPEED_1000)
562 giga_ctrl |= PHY_Cap_1000_Full;
564 if (duplex == DUPLEX_HALF)
565 auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
568 tp->phy_auto_nego_reg = auto_nego;
569 tp->phy_1000_ctrl_reg = giga_ctrl;
571 mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
572 mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
573 mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
574 PHY_Restart_Auto_Nego);
578 static int rtl8169_set_speed(struct net_device *dev,
579 u8 autoneg, u16 speed, u8 duplex)
581 struct rtl8169_private *tp = netdev_priv(dev);
584 ret = tp->set_speed(dev, autoneg, speed, duplex);
586 if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
587 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
592 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
594 struct rtl8169_private *tp = netdev_priv(dev);
598 spin_lock_irqsave(&tp->lock, flags);
599 ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
600 spin_unlock_irqrestore(&tp->lock, flags);
605 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
607 struct rtl8169_private *tp = netdev_priv(dev);
608 void *ioaddr = tp->mmio_addr;
612 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
613 cmd->port = PORT_FIBRE;
614 cmd->transceiver = XCVR_INTERNAL;
616 status = RTL_R32(TBICSR);
617 cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0;
618 cmd->autoneg = !!(status & TBINwEnable);
620 cmd->speed = SPEED_1000;
621 cmd->duplex = DUPLEX_FULL; /* Always set */
624 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
626 struct rtl8169_private *tp = netdev_priv(dev);
627 void *ioaddr = tp->mmio_addr;
630 cmd->supported = SUPPORTED_10baseT_Half |
631 SUPPORTED_10baseT_Full |
632 SUPPORTED_100baseT_Half |
633 SUPPORTED_100baseT_Full |
634 SUPPORTED_1000baseT_Full |
639 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
641 if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
642 cmd->advertising |= ADVERTISED_10baseT_Half;
643 if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
644 cmd->advertising |= ADVERTISED_10baseT_Full;
645 if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
646 cmd->advertising |= ADVERTISED_100baseT_Half;
647 if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
648 cmd->advertising |= ADVERTISED_100baseT_Full;
649 if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
650 cmd->advertising |= ADVERTISED_1000baseT_Full;
652 status = RTL_R8(PHYstatus);
654 if (status & _1000bpsF)
655 cmd->speed = SPEED_1000;
656 else if (status & _100bps)
657 cmd->speed = SPEED_100;
658 else if (status & _10bps)
659 cmd->speed = SPEED_10;
661 cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
662 DUPLEX_FULL : DUPLEX_HALF;
665 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
667 struct rtl8169_private *tp = netdev_priv(dev);
670 spin_lock_irqsave(&tp->lock, flags);
672 tp->get_settings(dev, cmd);
674 spin_unlock_irqrestore(&tp->lock, flags);
679 static struct ethtool_ops rtl8169_ethtool_ops = {
680 .get_drvinfo = rtl8169_get_drvinfo,
681 .get_link = ethtool_op_get_link,
682 .get_settings = rtl8169_get_settings,
683 .set_settings = rtl8169_set_settings,
686 static void rtl8169_write_gmii_reg_bit(void *ioaddr, int reg, int bitnum,
691 val = mdio_read(ioaddr, reg);
692 val = (bitval == 1) ?
693 val | (bitval << bitnum) : val & ~(0x0001 << bitnum);
694 mdio_write(ioaddr, reg, val & 0xffff);
697 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void *ioaddr)
703 { 0x1 << 26, RTL_GIGA_MAC_VER_E },
704 { 0x1 << 23, RTL_GIGA_MAC_VER_D },
705 { 0x00000000, RTL_GIGA_MAC_VER_B } /* Catch-all */
709 reg = RTL_R32(TxConfig) & 0x7c800000;
710 while ((reg & p->mask) != p->mask)
712 tp->mac_version = p->mac_version;
715 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
721 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
722 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
723 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
727 for (p = mac_print; p->msg; p++) {
728 if (tp->mac_version == p->version) {
729 dprintk("mac_version == %s (%04d)\n", p->msg,
734 dprintk("mac_version == Unknown\n");
737 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void *ioaddr)
744 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
745 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
746 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
747 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
751 reg = mdio_read(ioaddr, 3) & 0xffff;
752 while ((reg & p->mask) != p->set)
754 tp->phy_version = p->phy_version;
757 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
764 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
765 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
766 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
767 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
771 for (p = phy_print; p->msg; p++) {
772 if (tp->phy_version == p->version) {
773 dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
777 dprintk("phy_version == Unknown\n");
780 static void rtl8169_hw_phy_config(struct net_device *dev)
782 struct rtl8169_private *tp = netdev_priv(dev);
783 void *ioaddr = tp->mmio_addr;
785 u16 regs[5]; /* Beware of bit-sign propagation */
787 { 0x0000, //w 4 15 12 0
788 0x00a1, //w 3 15 0 00a1
789 0x0008, //w 2 15 0 0008
790 0x1020, //w 1 15 0 1020
791 0x1000 } },{ //w 0 15 0 1000
792 { 0x7000, //w 4 15 12 7
793 0xff41, //w 3 15 0 ff41
794 0xde60, //w 2 15 0 de60
795 0x0140, //w 1 15 0 0140
796 0x0077 } },{ //w 0 15 0 0077
797 { 0xa000, //w 4 15 12 a
798 0xdf01, //w 3 15 0 df01
799 0xdf20, //w 2 15 0 df20
800 0xff95, //w 1 15 0 ff95
801 0xfa00 } },{ //w 0 15 0 fa00
802 { 0xb000, //w 4 15 12 b
803 0xff41, //w 3 15 0 ff41
804 0xde20, //w 2 15 0 de20
805 0x0140, //w 1 15 0 0140
806 0x00bb } },{ //w 0 15 0 00bb
807 { 0xf000, //w 4 15 12 f
808 0xdf01, //w 3 15 0 df01
809 0xdf20, //w 2 15 0 df20
810 0xff95, //w 1 15 0 ff95
811 0xbf00 } //w 0 15 0 bf00
816 rtl8169_print_mac_version(tp);
817 rtl8169_print_phy_version(tp);
819 if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
821 if (tp->phy_version >= RTL_GIGA_PHY_VER_F)
824 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
825 dprintk("Do final_reg2.cfg\n");
829 // phy config for RTL8169s mac_version C chip
830 mdio_write(ioaddr, 31, 0x0001); //w 31 2 0 1
831 mdio_write(ioaddr, 21, 0x1000); //w 21 15 0 1000
832 mdio_write(ioaddr, 24, 0x65c7); //w 24 15 0 65c7
833 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
835 for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
838 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
839 mdio_write(ioaddr, pos, val);
841 mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
842 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
843 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
845 mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
848 static void rtl8169_phy_timer(unsigned long __opaque)
850 struct net_device *dev = (struct net_device *)__opaque;
851 struct rtl8169_private *tp = netdev_priv(dev);
852 struct timer_list *timer = &tp->timer;
853 void *ioaddr = tp->mmio_addr;
854 unsigned long timeout = RTL8169_PHY_TIMEOUT;
856 assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
857 assert(tp->phy_version < RTL_GIGA_PHY_VER_G);
859 if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
862 spin_lock_irq(&tp->lock);
864 if (tp->phy_reset_pending(ioaddr)) {
866 * A busy loop could burn quite a few cycles on nowadays CPU.
867 * Let's delay the execution of the timer for a few ticks.
873 if (tp->link_ok(ioaddr))
876 printk(KERN_WARNING PFX "%s: PHY reset until link up\n", dev->name);
878 tp->phy_reset_enable(ioaddr);
881 mod_timer(timer, jiffies + timeout);
883 spin_unlock_irq(&tp->lock);
886 static inline void rtl8169_delete_timer(struct net_device *dev)
888 struct rtl8169_private *tp = netdev_priv(dev);
889 struct timer_list *timer = &tp->timer;
891 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
892 (tp->phy_version >= RTL_GIGA_PHY_VER_G))
895 del_timer_sync(timer);
898 static inline void rtl8169_request_timer(struct net_device *dev)
900 struct rtl8169_private *tp = netdev_priv(dev);
901 struct timer_list *timer = &tp->timer;
903 if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
904 (tp->phy_version >= RTL_GIGA_PHY_VER_G))
908 timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
909 timer->data = (unsigned long)(dev);
910 timer->function = rtl8169_phy_timer;
915 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
919 struct net_device *dev;
920 struct rtl8169_private *tp;
921 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
922 int rc, i, acpi_idle_state = 0, pm_cap;
925 assert(pdev != NULL);
926 assert(ioaddr_out != NULL);
931 // dev zeroed in alloc_etherdev
932 dev = alloc_etherdev(sizeof (*tp));
934 printk(KERN_ERR PFX "unable to alloc new ethernet\n");
938 SET_MODULE_OWNER(dev);
939 SET_NETDEV_DEV(dev, &pdev->dev);
942 // enable device (incl. PCI PM wakeup and hotplug setup)
943 rc = pci_enable_device(pdev);
945 printk(KERN_ERR PFX "%s: enable failure\n", pdev->slot_name);
949 /* save power state before pci_enable_device overwrites it */
950 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
954 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
955 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
958 "Cannot find PowerManagement capability, aborting.\n");
959 goto err_out_free_res;
962 mmio_start = pci_resource_start(pdev, 1);
963 mmio_end = pci_resource_end(pdev, 1);
964 mmio_flags = pci_resource_flags(pdev, 1);
965 mmio_len = pci_resource_len(pdev, 1);
967 // make sure PCI base addr 1 is MMIO
968 if (!(mmio_flags & IORESOURCE_MEM)) {
970 "region #1 not an MMIO resource, aborting\n");
972 goto err_out_disable;
974 // check for weird/broken PCI region reporting
975 if (mmio_len < RTL_MIN_IO_SIZE) {
976 printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n");
978 goto err_out_disable;
981 rc = pci_request_regions(pdev, MODULENAME);
983 printk(KERN_ERR PFX "%s: could not request regions.\n",
985 goto err_out_disable;
988 tp->cp_cmd = PCIMulRW | RxChkSum;
990 if ((sizeof(dma_addr_t) > 4) &&
991 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac)
992 tp->cp_cmd |= PCIDAC;
994 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
996 printk(KERN_ERR PFX "DMA configuration failed.\n");
997 goto err_out_free_res;
1002 // enable PCI bus-mastering
1003 pci_set_master(pdev);
1005 // ioremap MMIO region
1006 ioaddr = ioremap(mmio_start, mmio_len);
1007 if (ioaddr == NULL) {
1008 printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1010 goto err_out_free_res;
1013 // Soft reset the chip.
1014 RTL_W8(ChipCmd, CmdReset);
1016 // Check that the chip has finished the reset.
1017 for (i = 1000; i > 0; i--) {
1018 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1023 // Identify chip attached to board
1024 rtl8169_get_mac_version(tp, ioaddr);
1025 rtl8169_get_phy_version(tp, ioaddr);
1027 rtl8169_print_mac_version(tp);
1028 rtl8169_print_phy_version(tp);
1030 for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1031 if (tp->mac_version == rtl_chip_info[i].mac_version)
1035 /* Unknown chip: assume array element #0, original RTL-8169 */
1036 printk(KERN_DEBUG PFX
1037 "PCI device %s: unknown chip version, assuming %s\n",
1038 pci_name(pdev), rtl_chip_info[0].name);
1043 *ioaddr_out = ioaddr;
1048 pci_release_regions(pdev);
1051 pci_disable_device(pdev);
1058 static int __devinit
1059 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1061 struct net_device *dev = NULL;
1062 struct rtl8169_private *tp = NULL;
1063 void *ioaddr = NULL;
1064 static int board_idx = -1;
1065 static int printed_version = 0;
1070 assert(pdev != NULL);
1071 assert(ent != NULL);
1075 if (!printed_version) {
1076 printk(KERN_INFO RTL8169_DRIVER_NAME " loaded\n");
1077 printed_version = 1;
1080 rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1085 assert(ioaddr != NULL);
1086 assert(dev != NULL);
1089 if (RTL_R8(PHYstatus) & TBI_Enable) {
1090 tp->set_speed = rtl8169_set_speed_tbi;
1091 tp->get_settings = rtl8169_gset_tbi;
1092 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1093 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1094 tp->link_ok = rtl8169_tbi_link_ok;
1096 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1098 tp->set_speed = rtl8169_set_speed_xmii;
1099 tp->get_settings = rtl8169_gset_xmii;
1100 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1101 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1102 tp->link_ok = rtl8169_xmii_link_ok;
1105 // Get MAC address. FIXME: read EEPROM
1106 for (i = 0; i < MAC_ADDR_LEN; i++)
1107 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1109 dev->open = rtl8169_open;
1110 dev->hard_start_xmit = rtl8169_start_xmit;
1111 dev->get_stats = rtl8169_get_stats;
1112 dev->ethtool_ops = &rtl8169_ethtool_ops;
1113 dev->stop = rtl8169_close;
1114 dev->tx_timeout = rtl8169_tx_timeout;
1115 dev->set_multicast_list = rtl8169_set_rx_mode;
1116 dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1117 dev->irq = pdev->irq;
1118 dev->base_addr = (unsigned long) ioaddr;
1119 #ifdef CONFIG_R8169_NAPI
1120 dev->poll = rtl8169_poll;
1121 dev->weight = R8169_NAPI_WEIGHT;
1122 printk(KERN_INFO PFX "NAPI enabled\n");
1124 tp->intr_mask = 0xffff;
1126 tp->mmio_addr = ioaddr;
1128 spin_lock_init(&tp->lock);
1130 rc = register_netdev(dev);
1133 pci_release_regions(pdev);
1134 pci_disable_device(pdev);
1139 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name,
1140 rtl_chip_info[tp->chipset].name);
1142 pci_set_drvdata(pdev, dev);
1144 printk(KERN_INFO "%s: %s at 0x%lx, "
1145 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1148 rtl_chip_info[ent->driver_data].name,
1150 dev->dev_addr[0], dev->dev_addr[1],
1151 dev->dev_addr[2], dev->dev_addr[3],
1152 dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1154 rtl8169_hw_phy_config(dev);
1156 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1159 if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1160 dprintk("Set PCI Latency=0x40\n");
1161 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1164 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1165 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1167 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1168 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1171 rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1173 rtl8169_set_speed(dev, autoneg, speed, duplex);
1175 if (RTL_R8(PHYstatus) & TBI_Enable)
1176 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1181 static void __devexit
1182 rtl8169_remove_one(struct pci_dev *pdev)
1184 struct net_device *dev = pci_get_drvdata(pdev);
1185 struct rtl8169_private *tp = netdev_priv(dev);
1187 assert(dev != NULL);
1190 unregister_netdev(dev);
1191 iounmap(tp->mmio_addr);
1192 pci_release_regions(pdev);
1194 pci_disable_device(pdev);
1196 pci_set_drvdata(pdev, NULL);
1201 static int rtl8169_suspend(struct pci_dev *pdev, u32 state)
1203 struct net_device *dev = pci_get_drvdata(pdev);
1204 struct rtl8169_private *tp = netdev_priv(dev);
1205 void *ioaddr = tp->mmio_addr;
1206 unsigned long flags;
1208 if (!netif_running(dev))
1211 netif_device_detach(dev);
1212 netif_stop_queue(dev);
1213 spin_lock_irqsave(&tp->lock, flags);
1215 /* Disable interrupts, stop Rx and Tx */
1216 RTL_W16(IntrMask, 0);
1219 /* Update the error counts. */
1220 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1221 RTL_W32(RxMissed, 0);
1222 spin_unlock_irqrestore(&tp->lock, flags);
1227 static int rtl8169_resume(struct pci_dev *pdev)
1229 struct net_device *dev = pci_get_drvdata(pdev);
1231 if (!netif_running(dev))
1234 netif_device_attach(dev);
1235 rtl8169_hw_start(dev);
1240 #endif /* CONFIG_PM */
1243 rtl8169_open(struct net_device *dev)
1245 struct rtl8169_private *tp = netdev_priv(dev);
1246 struct pci_dev *pdev = tp->pci_dev;
1250 request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1257 * Rx and Tx desscriptors needs 256 bytes alignment.
1258 * pci_alloc_consistent provides more.
1260 tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1262 if (!tp->TxDescArray)
1265 tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1267 if (!tp->RxDescArray)
1270 retval = rtl8169_init_ring(dev);
1274 rtl8169_hw_start(dev);
1276 rtl8169_request_timer(dev);
1278 rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1283 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1286 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1289 free_irq(dev->irq, dev);
1294 rtl8169_hw_start(struct net_device *dev)
1296 struct rtl8169_private *tp = netdev_priv(dev);
1297 void *ioaddr = tp->mmio_addr;
1300 /* Soft reset the chip. */
1301 RTL_W8(ChipCmd, CmdReset);
1303 /* Check that the chip has finished the reset. */
1304 for (i = 1000; i > 0; i--) {
1305 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1310 RTL_W8(Cfg9346, Cfg9346_Unlock);
1311 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1312 RTL_W8(EarlyTxThres, EarlyTxThld);
1314 // For gigabit rtl8169
1315 RTL_W16(RxMaxSize, RxPacketMaxSize);
1317 // Set Rx Config register
1318 i = rtl8169_rx_config |
1319 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1320 RTL_W32(RxConfig, i);
1322 /* Set DMA burst size and Interframe Gap Time */
1324 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1325 TxInterFrameGapShift));
1326 tp->cp_cmd |= RTL_R16(CPlusCmd);
1327 RTL_W16(CPlusCmd, tp->cp_cmd);
1329 if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1330 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1331 "Bit-3 and bit-14 MUST be 1\n");
1332 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1333 RTL_W16(CPlusCmd, tp->cp_cmd);
1338 RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1339 RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1340 RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1341 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1342 RTL_W8(Cfg9346, Cfg9346_Lock);
1345 RTL_W32(RxMissed, 0);
1347 rtl8169_set_rx_mode(dev);
1349 /* no early-rx interrupts */
1350 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1352 /* Enable all known interrupts by setting the interrupt mask. */
1353 RTL_W16(IntrMask, rtl8169_intr_mask);
1355 netif_start_queue(dev);
1358 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1360 desc->addr = 0x0badbadbadbadbadull;
1361 desc->status &= ~cpu_to_le32(OWNbit | RsvdMask);
1364 static void rtl8169_free_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1365 struct RxDesc *desc)
1367 pci_unmap_single(pdev, le64_to_cpu(desc->addr), RX_BUF_SIZE,
1368 PCI_DMA_FROMDEVICE);
1369 dev_kfree_skb(*sk_buff);
1371 rtl8169_make_unusable_by_asic(desc);
1374 static inline void rtl8169_return_to_asic(struct RxDesc *desc)
1376 desc->status |= cpu_to_le32(OWNbit + RX_BUF_SIZE);
1379 static inline void rtl8169_give_to_asic(struct RxDesc *desc, dma_addr_t mapping)
1381 desc->addr = cpu_to_le64(mapping);
1382 desc->status |= cpu_to_le32(OWNbit + RX_BUF_SIZE);
1385 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct net_device *dev,
1386 struct sk_buff **sk_buff, struct RxDesc *desc)
1388 struct sk_buff *skb;
1392 skb = dev_alloc_skb(RX_BUF_SIZE);
1397 skb_reserve(skb, 2);
1400 mapping = pci_map_single(pdev, skb->tail, RX_BUF_SIZE,
1401 PCI_DMA_FROMDEVICE);
1403 rtl8169_give_to_asic(desc, mapping);
1410 rtl8169_make_unusable_by_asic(desc);
1414 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1418 for (i = 0; i < NUM_RX_DESC; i++) {
1419 if (tp->Rx_skbuff[i]) {
1420 rtl8169_free_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1421 tp->RxDescArray + i);
1426 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1431 for (cur = start; end - cur > 0; cur++) {
1432 int ret, i = cur % NUM_RX_DESC;
1434 if (tp->Rx_skbuff[i])
1437 ret = rtl8169_alloc_rx_skb(tp->pci_dev, dev, tp->Rx_skbuff + i,
1438 tp->RxDescArray + i);
1445 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1447 desc->status |= cpu_to_le32(EORbit);
1450 static int rtl8169_init_ring(struct net_device *dev)
1452 struct rtl8169_private *tp = netdev_priv(dev);
1454 tp->cur_rx = tp->dirty_rx = 0;
1455 tp->cur_tx = tp->dirty_tx = 0;
1456 memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof (struct TxDesc));
1457 memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof (struct RxDesc));
1459 memset(tp->Tx_skbuff, 0x0, NUM_TX_DESC * sizeof(struct sk_buff *));
1460 memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1462 if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1465 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1470 rtl8169_rx_clear(tp);
1474 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1475 struct TxDesc *desc)
1477 u32 len = sk_buff[0]->len;
1479 pci_unmap_single(pdev, le64_to_cpu(desc->addr),
1480 len < ETH_ZLEN ? ETH_ZLEN : len, PCI_DMA_TODEVICE);
1486 rtl8169_tx_clear(struct rtl8169_private *tp)
1491 for (i = 0; i < NUM_TX_DESC; i++) {
1492 struct sk_buff *skb = tp->Tx_skbuff[i];
1495 rtl8169_unmap_tx_skb(tp->pci_dev, tp->Tx_skbuff + i,
1496 tp->TxDescArray + i);
1498 tp->stats.tx_dropped++;
1504 rtl8169_tx_timeout(struct net_device *dev)
1506 struct rtl8169_private *tp = netdev_priv(dev);
1507 void *ioaddr = tp->mmio_addr;
1510 printk(KERN_INFO "%s: TX Timeout\n", dev->name);
1511 /* disable Tx, if not already */
1512 tmp8 = RTL_R8(ChipCmd);
1513 if (tmp8 & CmdTxEnb)
1514 RTL_W8(ChipCmd, tmp8 & ~CmdTxEnb);
1516 /* Disable interrupts by clearing the interrupt mask. */
1517 RTL_W16(IntrMask, 0x0000);
1519 /* Stop a shared interrupt from scavenging while we are. */
1520 spin_lock_irq(&tp->lock);
1521 rtl8169_tx_clear(tp);
1522 spin_unlock_irq(&tp->lock);
1524 /* ...and finally, reset everything */
1525 rtl8169_hw_start(dev);
1527 netif_wake_queue(dev);
1531 rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
1533 struct rtl8169_private *tp = netdev_priv(dev);
1534 void *ioaddr = tp->mmio_addr;
1535 unsigned int entry = tp->cur_tx % NUM_TX_DESC;
1538 if (unlikely(skb->len < ETH_ZLEN)) {
1539 skb = skb_padto(skb, ETH_ZLEN);
1541 goto err_update_stats;
1545 if (!(le32_to_cpu(tp->TxDescArray[entry].status) & OWNbit)) {
1549 mapping = pci_map_single(tp->pci_dev, skb->data, len,
1552 tp->Tx_skbuff[entry] = skb;
1553 tp->TxDescArray[entry].addr = cpu_to_le64(mapping);
1555 /* anti gcc 2.95.3 bugware */
1556 status = OWNbit | FSbit | LSbit | len |
1557 (EORbit * !((entry + 1) % NUM_TX_DESC));
1558 tp->TxDescArray[entry].status = cpu_to_le32(status);
1560 RTL_W8(TxPoll, 0x40); //set polling bit
1562 dev->trans_start = jiffies;
1569 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) {
1570 u32 dirty = tp->dirty_tx;
1572 netif_stop_queue(dev);
1574 if (dirty != tp->dirty_tx)
1575 netif_wake_queue(dev);
1584 tp->stats.tx_dropped++;
1589 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
1592 unsigned int dirty_tx, tx_left;
1594 assert(dev != NULL);
1596 assert(ioaddr != NULL);
1598 dirty_tx = tp->dirty_tx;
1600 tx_left = tp->cur_tx - dirty_tx;
1602 while (tx_left > 0) {
1603 unsigned int entry = dirty_tx % NUM_TX_DESC;
1604 struct sk_buff *skb = tp->Tx_skbuff[entry];
1608 status = le32_to_cpu(tp->TxDescArray[entry].status);
1609 if (status & OWNbit)
1612 /* FIXME: is it really accurate for TxErr ? */
1613 tp->stats.tx_bytes += skb->len >= ETH_ZLEN ?
1614 skb->len : ETH_ZLEN;
1615 tp->stats.tx_packets++;
1616 rtl8169_unmap_tx_skb(tp->pci_dev, tp->Tx_skbuff + entry,
1617 tp->TxDescArray + entry);
1618 dev_kfree_skb_irq(skb);
1619 tp->Tx_skbuff[entry] = NULL;
1624 if (tp->dirty_tx != dirty_tx) {
1625 tp->dirty_tx = dirty_tx;
1627 if (netif_queue_stopped(dev))
1628 netif_wake_queue(dev);
1632 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
1633 struct RxDesc *desc,
1634 struct net_device *dev)
1638 if (pkt_size < rx_copybreak) {
1639 struct sk_buff *skb;
1641 skb = dev_alloc_skb(pkt_size + 2);
1644 skb_reserve(skb, 2);
1645 eth_copy_and_sum(skb, sk_buff[0]->tail, pkt_size, 0);
1647 rtl8169_return_to_asic(desc);
1655 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
1658 unsigned int cur_rx, rx_left, count;
1661 assert(dev != NULL);
1663 assert(ioaddr != NULL);
1665 cur_rx = tp->cur_rx;
1666 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
1667 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
1669 while (rx_left > 0) {
1670 unsigned int entry = cur_rx % NUM_RX_DESC;
1674 status = le32_to_cpu(tp->RxDescArray[entry].status);
1676 if (status & OWNbit)
1678 if (status & RxRES) {
1679 printk(KERN_INFO "%s: Rx ERROR!!!\n", dev->name);
1680 tp->stats.rx_errors++;
1681 if (status & (RxRWT | RxRUNT))
1682 tp->stats.rx_length_errors++;
1684 tp->stats.rx_crc_errors++;
1686 struct RxDesc *desc = tp->RxDescArray + entry;
1687 struct sk_buff *skb = tp->Rx_skbuff[entry];
1688 int pkt_size = (status & 0x00001FFF) - 4;
1689 void (*pci_action)(struct pci_dev *, dma_addr_t,
1690 size_t, int) = pci_dma_sync_single_for_device;
1693 pci_dma_sync_single_for_cpu(tp->pci_dev,
1694 le64_to_cpu(desc->addr), RX_BUF_SIZE,
1695 PCI_DMA_FROMDEVICE);
1697 if (rtl8169_try_rx_copy(&skb, pkt_size, desc, dev)) {
1698 pci_action = pci_unmap_single;
1699 tp->Rx_skbuff[entry] = NULL;
1702 pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
1703 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1705 skb_put(skb, pkt_size);
1706 skb->protocol = eth_type_trans(skb, dev);
1707 rtl8169_rx_skb(skb);
1709 dev->last_rx = jiffies;
1710 tp->stats.rx_bytes += pkt_size;
1711 tp->stats.rx_packets++;
1718 count = cur_rx - tp->cur_rx;
1719 tp->cur_rx = cur_rx;
1721 delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
1723 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
1726 tp->dirty_rx += delta;
1729 * FIXME: until there is periodic timer to try and refill the ring,
1730 * a temporary shortage may definitely kill the Rx process.
1731 * - disable the asic to try and avoid an overflow and kick it again
1733 * - how do others driver handle this condition (Uh oh...).
1735 if (tp->dirty_rx + NUM_RX_DESC == tp->cur_rx)
1736 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
1741 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
1743 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1745 struct net_device *dev = (struct net_device *) dev_instance;
1746 struct rtl8169_private *tp = netdev_priv(dev);
1747 int boguscnt = max_interrupt_work;
1748 void *ioaddr = tp->mmio_addr;
1753 status = RTL_R16(IntrStatus);
1755 /* hotplug/major error/no more work/shared irq */
1756 if ((status == 0xFFFF) || !status)
1761 status &= tp->intr_mask;
1763 (status & RxFIFOOver) ? (status | RxOverflow) : status);
1765 if (!(status & rtl8169_intr_mask))
1768 if (unlikely(status & SYSErr)) {
1769 printk(KERN_ERR PFX "%s: PCI error (status: 0x%04x)."
1770 " Device disabled.\n", dev->name, status);
1771 RTL_W8(ChipCmd, 0x00);
1772 RTL_W16(IntrMask, 0x0000);
1777 if (status & LinkChg)
1778 rtl8169_check_link_status(dev, tp, ioaddr);
1780 #ifdef CONFIG_R8169_NAPI
1781 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
1782 tp->intr_mask = ~rtl8169_napi_event;
1784 if (likely(netif_rx_schedule_prep(dev)))
1785 __netif_rx_schedule(dev);
1787 printk(KERN_INFO "%s: interrupt %x taken in poll\n",
1793 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
1794 rtl8169_rx_interrupt(dev, tp, ioaddr);
1797 if (status & (TxOK | TxErr))
1798 rtl8169_tx_interrupt(dev, tp, ioaddr);
1802 } while (boguscnt > 0);
1804 if (boguscnt <= 0) {
1805 printk(KERN_WARNING "%s: Too much work at interrupt!\n",
1807 /* Clear all interrupt sources. */
1808 RTL_W16(IntrStatus, 0xffff);
1810 return IRQ_RETVAL(handled);
1813 #ifdef CONFIG_R8169_NAPI
1814 static int rtl8169_poll(struct net_device *dev, int *budget)
1816 unsigned int work_done, work_to_do = min(*budget, dev->quota);
1817 struct rtl8169_private *tp = netdev_priv(dev);
1818 void *ioaddr = tp->mmio_addr;
1820 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
1821 rtl8169_tx_interrupt(dev, tp, ioaddr);
1823 *budget -= work_done;
1824 dev->quota -= work_done;
1826 if ((work_done < work_to_do) || !netif_running(dev)) {
1827 netif_rx_complete(dev);
1828 tp->intr_mask = 0xffff;
1830 * 20040426: the barrier is not strictly required but the
1831 * behavior of the irq handler could be less predictable
1832 * without it. Btw, the lack of flush for the posted pci
1833 * write is safe - FR
1836 RTL_W16(IntrMask, rtl8169_intr_mask);
1839 return (work_done >= work_to_do);
1844 rtl8169_close(struct net_device *dev)
1846 struct rtl8169_private *tp = netdev_priv(dev);
1847 struct pci_dev *pdev = tp->pci_dev;
1848 void *ioaddr = tp->mmio_addr;
1850 netif_stop_queue(dev);
1852 rtl8169_delete_timer(dev);
1854 spin_lock_irq(&tp->lock);
1856 /* Stop the chip's Tx and Rx DMA processes. */
1857 RTL_W8(ChipCmd, 0x00);
1859 /* Disable interrupts by clearing the interrupt mask. */
1860 RTL_W16(IntrMask, 0x0000);
1862 /* Update the error counts. */
1863 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1864 RTL_W32(RxMissed, 0);
1866 spin_unlock_irq(&tp->lock);
1868 synchronize_irq(dev->irq);
1869 free_irq(dev->irq, dev);
1871 rtl8169_tx_clear(tp);
1873 rtl8169_rx_clear(tp);
1875 pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1877 pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1879 tp->TxDescArray = NULL;
1880 tp->RxDescArray = NULL;
1886 rtl8169_set_rx_mode(struct net_device *dev)
1888 struct rtl8169_private *tp = netdev_priv(dev);
1889 void *ioaddr = tp->mmio_addr;
1890 unsigned long flags;
1891 u32 mc_filter[2]; /* Multicast hash filter */
1895 if (dev->flags & IFF_PROMISC) {
1896 /* Unconditionally log net taps. */
1897 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
1900 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
1902 mc_filter[1] = mc_filter[0] = 0xffffffff;
1903 } else if ((dev->mc_count > multicast_filter_limit)
1904 || (dev->flags & IFF_ALLMULTI)) {
1905 /* Too many to filter perfectly -- accept all multicasts. */
1906 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1907 mc_filter[1] = mc_filter[0] = 0xffffffff;
1909 struct dev_mc_list *mclist;
1910 rx_mode = AcceptBroadcast | AcceptMyPhys;
1911 mc_filter[1] = mc_filter[0] = 0;
1912 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1913 i++, mclist = mclist->next) {
1914 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1915 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1916 rx_mode |= AcceptMulticast;
1920 spin_lock_irqsave(&tp->lock, flags);
1922 tmp = rtl8169_rx_config | rx_mode |
1923 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1925 RTL_W32(RxConfig, tmp);
1926 RTL_W32(MAR0 + 0, mc_filter[0]);
1927 RTL_W32(MAR0 + 4, mc_filter[1]);
1929 spin_unlock_irqrestore(&tp->lock, flags);
1933 * rtl8169_get_stats - Get rtl8169 read/write statistics
1934 * @dev: The Ethernet Device to get statistics for
1936 * Get TX/RX statistics for rtl8169
1938 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
1940 struct rtl8169_private *tp = netdev_priv(dev);
1941 void *ioaddr = tp->mmio_addr;
1942 unsigned long flags;
1944 if (netif_running(dev)) {
1945 spin_lock_irqsave(&tp->lock, flags);
1946 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1947 RTL_W32(RxMissed, 0);
1948 spin_unlock_irqrestore(&tp->lock, flags);
1954 static struct pci_driver rtl8169_pci_driver = {
1956 .id_table = rtl8169_pci_tbl,
1957 .probe = rtl8169_init_one,
1958 .remove = __devexit_p(rtl8169_remove_one),
1960 .suspend = rtl8169_suspend,
1961 .resume = rtl8169_resume,
1966 rtl8169_init_module(void)
1968 return pci_module_init(&rtl8169_pci_driver);
1972 rtl8169_cleanup_module(void)
1974 pci_unregister_driver(&rtl8169_pci_driver);
1977 module_init(rtl8169_init_module);
1978 module_exit(rtl8169_cleanup_module);