1 /******************************************************************************
3 * (C)Copyright 1998,1999 SysKonnect,
4 * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
6 * See the file "skfddi.c" for further information.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * The information in this file is provided "AS IS" without warranty.
15 ******************************************************************************/
18 * FBI board dependent Driver for SMT and LLC
24 #include "h/supern_2.h"
25 #include "h/skfbiinc.h"
28 static const char ID_sccs[] = "@(#)drvfbi.c 1.63 99/02/11 (C) SK " ;
36 #define LED_Y_ON 0x11 /* Used for ring up/down indication */
37 #define LED_Y_OFF 0x10
40 #define MS2BCLK(x) ((x)*12500L)
43 * valid configuration values are:
46 const int opt_ints[] = {8, 3, 4, 5, 9, 10, 11, 12, 15} ;
47 const int opt_iops[] = {8,
48 0x100, 0x120, 0x180, 0x1a0, 0x220, 0x240, 0x320, 0x340};
49 const int opt_dmas[] = {4, 3, 5, 6, 7} ;
50 const int opt_eproms[] = {15, 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
51 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
54 const int opt_ints[] = {5, 9, 10, 11} ;
55 const int opt_dmas[] = {0, 5, 6, 7} ;
56 const int opt_eproms[] = {0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
57 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
61 int opt_ints[] = {3, 11, 10, 9} ; /* FM1 */
62 int opt_eproms[] = {0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc} ;
69 * | --------------------- the patched POS_ID of the Adapter
70 * | xxxx = (Vendor ID low byte,
71 * | Vendor ID high byte,
72 * | Device ID low byte,
73 * | Device ID high byte)
74 * +------------------------------ the patched oem_id must be
75 * 'S' for SK or 'I' for IBM
76 * this is a short id for the driver.
81 const u_char oem_id[] = "xPOS_ID:xxxx" ;
83 const u_char oem_id[] = "xPOSID1:xxxx" ; /* FM1 card id. */
85 #else /* OEM_CONCEPT */
87 const u_char oem_id[] = OEM_ID ;
89 const u_char oem_id[] = OEM_ID1 ; /* FM1 card id. */
91 #endif /* OEM_CONCEPT */
93 #define OEMID(smc,i) oem_id[ID_BYTE0 + i]
95 const struct s_oem_ids oem_ids[] = {
99 #define OEMID(smc,i) smc->hw.oem_id->oi_id[i]
100 #endif /* MULT_OEM */
102 /* Prototypes of external functions */
103 extern void hwt_restart() ;
105 extern int AIX_vpdReadByte() ;
109 /* Prototypes of local functions. */
110 void smt_stop_watchdog() ;
113 static int read_card_id() ;
114 static void DisableSlotAccess() ;
115 static void EnableSlotAccess() ;
117 extern int attach_POS_addr() ;
118 extern int detach_POS_addr() ;
119 extern u_char read_POS() ;
120 extern void write_POS() ;
121 extern int AIX_vpdReadByte() ;
123 #define read_POS(smc,a1,a2) ((u_char) inp(a1))
124 #define write_POS(smc,a1,a2,a3) outp((a1),(a3))
132 static void card_start(smc)
141 smt_stop_watchdog(smc) ;
144 outpw(CSR_A,0) ; /* reset for all chips */
145 for (i = 10 ; i ; i--) /* delay for PLC's */
147 OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(2)) ;
148 /* counter 2, mode 2 */
149 OUT_82c54_TIMER(2,97) ; /* LSB */
150 OUT_82c54_TIMER(2,0) ; /* MSB ( 15.6 us ) */
151 outpw(CSR_A,CS_CRESET) ;
154 outpw(CSR_A,0) ; /* reset for all chips */
155 for (i = 10 ; i ; i--) /* delay for PLC's */
157 outpw(CSR_A,CS_CRESET) ;
158 smc->hw.led = (2<<6) ;
159 outpw(CSR_A,CS_CRESET | smc->hw.led) ;
162 outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
163 for (i = 10 ; i ; i--) /* delay for PLC's */
165 outp(ADDR(CARD_EN),0) ;
166 /* first I/O after reset must not be a access to FORMAC or PLC */
171 OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(3)) ;
172 /* counter 2, mode 3 */
173 OUT_82c54_TIMER(2,(2*24)) ; /* 3.9 us * 2 square wave */
174 OUT_82c54_TIMER(2,0) ; /* MSB */
176 /* POS 102 indicated an activ Check Line or Buss Error monitoring */
177 if (inpw(CSA_A) & (POS_EN_CHKINT | POS_EN_BUS_ERR)) {
178 outp(ADDR(IRQ_CHCK_EN),0) ;
181 if (!((i = inpw(CSR_A)) & CS_SAS)) {
182 if (!(i & CS_BYSTAT)) {
183 outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
186 outpw(LEDR_A,LED_1) ; /* yellow */
190 * make sure no transfer activity is pending
192 outpw(FM_A(FM_MDREG1),FM_MINIT) ;
193 outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
194 hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
196 * now reset everything
198 outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
199 i = (int) inp(ADDR(B0_CTRL)) ; /* do dummy read */
200 SK_UNUSED(i) ; /* Make LINT happy. */
201 outp(ADDR(B0_CTRL), CTRL_RST_CLR) ;
204 * Reset all bits in the PCI STATUS register
206 outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_ON) ; /* enable for writes */
207 word = inpw(PCI_C(PCI_STATUS)) ;
208 outpw(PCI_C(PCI_STATUS), word | PCI_ERRBITS) ;
209 outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_OFF) ; /* disable writes */
212 * Release the reset of all the State machines
213 * Release Master_Reset
214 * Release HPI_SM_Reset
216 outp(ADDR(B0_CTRL), CTRL_MRST_CLR|CTRL_HPI_CLR) ;
219 * determine the adapter type
220 * Note: Do it here, because some drivers may call card_start() once
221 * at very first before any other initialization functions is
224 rev_id = inp(PCI_C(PCI_REV_ID)) ;
225 if ((rev_id & 0xf0) == SK_ML_ID_1 || (rev_id & 0xf0) == SK_ML_ID_2) {
226 smc->hw.hw_is_64bit = TRUE ;
228 smc->hw.hw_is_64bit = FALSE ;
232 * Watermark initialization
234 if (!smc->hw.hw_is_64bit) {
235 outpd(ADDR(B4_R1_F), RX_WATERMARK) ;
236 outpd(ADDR(B5_XA_F), TX_WATERMARK) ;
237 outpd(ADDR(B5_XS_F), TX_WATERMARK) ;
240 outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* clear the reset chips */
241 outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_ON|LED_GB_OFF) ; /* ye LED on */
243 /* init the timer value for the watch dog 2,5 minutes */
244 outpd(ADDR(B2_WDOG_INI),0x6FC23AC0) ;
246 /* initialize the ISR mask */
247 smc->hw.is_imask = ISR_MASK ;
248 smc->hw.hw_state = STOPPED ;
250 GET_PAGE(0) ; /* necessary for BOOT */
256 smt_stop_watchdog(smc) ;
257 smc->hw.mac_ring_is_up = 0 ; /* ring down */
259 outpw(CSR_A,0) ; /* reset for all chips */
262 outpw(CSR_A,0) ; /* reset for all chips */
265 outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
269 * make sure no transfer activity is pending
271 outpw(FM_A(FM_MDREG1),FM_MINIT) ;
272 outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
273 hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
275 * now reset everything
277 outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
278 outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* reset for all chips */
279 outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_OFF|LED_GB_OFF) ; /* all LEDs off */
280 smc->hw.hw_state = STOPPED ;
283 /*--------------------------- ISR handling ----------------------------------*/
286 void mac1_irq(smc,stu, stl)
295 * FORMAC+ bug modified the queue pointer if many read/write accesses happens!?
297 if (stl & (FM_SPCEPDS | /* parit/coding err. syn.q.*/
298 FM_SPCEPDA0 | /* parit/coding err. a.q.0 */
299 FM_SPCEPDA1 | /* parit/coding err. a.q.1 */
300 FM_SPCEPDA2)) { /* parit/coding err. a.q.2 */
301 SMT_PANIC(smc,SMT_E0132, SMT_E0132_MSG) ;
303 if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
304 FM_STBURA0 | /* tx buffer underrun a.q.0 */
305 FM_STBURA1 | /* tx buffer underrun a.q.1 */
306 FM_STBURA2)) { /* tx buffer underrun a.q.2 */
307 SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
310 if ( (stu & (FM_SXMTABT | /* transmit abort */
312 FM_STXABRS | /* syn. tx abort */
314 FM_STXABRA0)) || /* asyn. tx abort */
315 (stl & (FM_SQLCKS | /* lock for syn. q. */
316 FM_SQLCKA0)) ) { /* lock for asyn. q. */
317 formac_tx_restart(smc) ; /* init tx */
319 stu = inpw(FM_A(FM_ST1U)) ;
320 stl = inpw(FM_A(FM_ST1L)) ;
321 stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
327 if (stu & (FM_STECFRMA0 | /* end of chain asyn tx */
328 FM_STEFRMA0)) { /* end of frame asyn tx */
330 smc->hw.n_a_send = 0 ;
331 if (++smc->hw.fp.tx_free < smc->hw.fp.tx_max) {
332 start_next_send(smc);
337 if (stu & (FM_STEFRMA0 | /* end of asyn tx */
338 FM_STEFRMS)) { /* end of sync tx */
343 llc_restart_tx(smc) ;
347 void mac1_irq(smc,stu, stl)
356 * parity error: note encoding error is not possible in tag mode
358 if (stl & (FM_SPCEPDS | /* parity err. syn.q.*/
359 FM_SPCEPDA0 | /* parity err. a.q.0 */
360 FM_SPCEPDA1)) { /* parity err. a.q.1 */
361 SMT_PANIC(smc,SMT_E0134, SMT_E0134_MSG) ;
364 * buffer underrun: can only occur if a tx threshold is specified
366 if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
367 FM_STBURA0 | /* tx buffer underrun a.q.0 */
368 FM_STBURA1)) { /* tx buffer underrun a.q.2 */
369 SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
372 if ( (stu & (FM_SXMTABT | /* transmit abort */
373 FM_STXABRS | /* syn. tx abort */
374 FM_STXABRA0)) || /* asyn. tx abort */
375 (stl & (FM_SQLCKS | /* lock for syn. q. */
376 FM_SQLCKA0)) ) { /* lock for asyn. q. */
377 formac_tx_restart(smc) ; /* init tx */
379 stu = inpw(FM_A(FM_ST1U)) ;
380 stl = inpw(FM_A(FM_ST1L)) ;
381 stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
386 if (stu & (FM_STEFRMA0 | /* end of asyn tx */
387 FM_STEFRMS)) { /* end of sync tx */
392 llc_restart_tx(smc) ;
396 * interrupt source= plc1
397 * this function is called in nwfbisr.asm
402 u_short st = inpw(PLC(PB,PL_INTR_EVENT)) ;
404 #if (defined(ISA) || defined(EISA))
405 /* reset PLC Int. bits */
406 outpw(PLC1_I,inpw(PLC1_I)) ;
412 * interrupt source= plc2
413 * this function is called in nwfbisr.asm
418 u_short st = inpw(PLC(PA,PL_INTR_EVENT)) ;
420 #if (defined(ISA) || defined(EISA))
421 /* reset PLC Int. bits */
422 outpw(PLC2_I,inpw(PLC2_I)) ;
429 * interrupt source= timer
435 smc->hw.t_stop = smc->hw.t_start;
436 smt_timer_done(smc) ;
440 * return S-port (PA or PB)
442 int pcm_get_s_port(smc)
450 * Station Label = "FDDI-XYZ" where
456 #define STATION_LABEL_CONNECTOR_OFFSET 5
457 #define STATION_LABEL_PMD_OFFSET 6
458 #define STATION_LABEL_PORT_OFFSET 7
460 void read_address(smc,mac_addr)
468 extern const u_char canonical[256] ;
470 #if (defined(ISA) || defined(MCA))
471 for (i = 0; i < 4 ;i++) { /* read mac address from board */
472 smc->hw.fddi_phys_addr.a[i] =
473 canonical[(inpw(PR_A(i+SA_MAC))&0xff)] ;
475 for (i = 4; i < 6; i++) {
476 smc->hw.fddi_phys_addr.a[i] =
477 canonical[(inpw(PR_A(i+SA_MAC+PRA_OFF))&0xff)] ;
482 * Note: We get trouble on an Alpha machine if we make a inpw()
485 for (i = 0; i < 4 ;i++) { /* read mac address from board */
486 smc->hw.fddi_phys_addr.a[i] =
487 canonical[inp(PR_A(i+SA_MAC))] ;
489 for (i = 4; i < 6; i++) {
490 smc->hw.fddi_phys_addr.a[i] =
491 canonical[inp(PR_A(i+SA_MAC+PRA_OFF))] ;
495 for (i = 0; i < 6; i++) { /* read mac address from board */
496 smc->hw.fddi_phys_addr.a[i] =
497 canonical[inp(ADDR(B2_MAC_0+i))] ;
501 ConnectorType = inpw(PR_A(SA_PMD_TYPE)) & 0xff ;
502 PmdType = inpw(PR_A(SA_PMD_TYPE+1)) & 0xff ;
504 ConnectorType = inp(ADDR(B2_CONN_TYP)) ;
505 PmdType = inp(ADDR(B2_PMD_TYP)) ;
508 smc->y[PA].pmd_type[PMD_SK_CONN] =
509 smc->y[PB].pmd_type[PMD_SK_CONN] = ConnectorType ;
510 smc->y[PA].pmd_type[PMD_SK_PMD ] =
511 smc->y[PB].pmd_type[PMD_SK_PMD ] = PmdType ;
514 for (i = 0; i < 6 ;i++) {
515 smc->hw.fddi_canon_addr.a[i] = mac_addr[i] ;
516 smc->hw.fddi_home_addr.a[i] = canonical[mac_addr[i]] ;
520 smc->hw.fddi_home_addr = smc->hw.fddi_phys_addr ;
522 for (i = 0; i < 6 ;i++) {
523 smc->hw.fddi_canon_addr.a[i] =
524 canonical[smc->hw.fddi_phys_addr.a[i]] ;
529 * FDDI card soft reset
531 void init_board(smc,mac_addr)
536 read_address(smc,mac_addr) ;
539 if (inpw(CSR_A) & CS_SAS)
541 if (!(inp(ADDR(B0_DAS)) & DAS_AVAIL))
543 smc->s.sas = SMT_SAS ; /* Single att. station */
545 smc->s.sas = SMT_DAS ; /* Dual att. station */
548 if (inpw(CSR_A) & CS_BYSTAT)
550 if (!(inp(ADDR(B0_DAS)) & DAS_BYP_ST))
552 smc->mib.fddiSMTBypassPresent = 0 ;
553 /* without opt. bypass */
555 smc->mib.fddiSMTBypassPresent = 1 ;
556 /* with opt. bypass */
560 * insert or deinsert optical bypass (called by ECM)
562 void sm_pm_bypass_req(smc,mode)
566 #if (defined(ISA) || defined(EISA))
570 DB_ECMN(1,"ECM : sm_pm_bypass_req(%s)\n",(mode == BP_INSERT) ?
571 "BP_INSERT" : "BP_DEINSERT",0) ;
573 if (smc->s.sas != SMT_DAS)
576 #if (defined(ISA) || defined(EISA))
578 csra_v = inpw(CSR_A) & ~CS_BYPASS ;
580 csra_v |= smc->hw.led ;
585 outpw(CSR_A,csra_v | CS_BYPASS) ;
588 outpw(CSR_A,csra_v) ;
591 #endif /* ISA / EISA */
595 outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
598 outp(ADDR(BYPASS(STAT_BYP)),0) ; /* bypass station */
605 outp(ADDR(B0_DAS),DAS_BYP_INS) ; /* insert station */
608 outp(ADDR(B0_DAS),DAS_BYP_RMV) ; /* bypass station */
615 * check if bypass connected
617 int sm_pm_bypass_present(smc)
621 return( (inpw(CSR_A) & CS_BYSTAT) ? FALSE : TRUE ) ;
623 return( (inp(ADDR(B0_DAS)) & DAS_BYP_ST) ? TRUE: FALSE) ;
627 void plc_clear_irq(smc,p)
633 #if (defined(ISA) || defined(EISA))
636 /* reset PLC Int. bits */
637 outpw(PLC2_I,inpw(PLC2_I)) ;
640 /* reset PLC Int. bits */
641 outpw(PLC1_I,inpw(PLC1_I)) ;
651 * led_indication called by rmt_indication() and
657 * 0 Only switch green LEDs according to their respective PCM state
658 * LED_Y_OFF just switch yellow LED off
659 * LED_Y_ON just switch yello LED on
661 void led_indication(smc,led_event)
665 /* use smc->hw.mac_ring_is_up == TRUE
666 * as indication for Ring Operational
670 struct fddi_mib_p *mib_a ;
671 struct fddi_mib_p *mib_b ;
679 /* Ring up = yellow led OFF*/
680 if (led_event == LED_Y_ON) {
681 smc->hw.led |= CS_LED_1 ;
683 else if (led_event == LED_Y_OFF) {
684 smc->hw.led &= ~CS_LED_1 ;
687 /* Link at Port A or B = green led ON */
688 if (mib_a->fddiPORTPCMState == PC8_ACTIVE ||
689 mib_b->fddiPORTPCMState == PC8_ACTIVE) {
690 smc->hw.led |= CS_LED_0 ;
693 smc->hw.led &= ~CS_LED_0 ;
698 led_state = inpw(LEDR_A) ;
700 /* Ring up = yellow led OFF*/
701 if (led_event == LED_Y_ON) {
704 else if (led_event == LED_Y_OFF) {
705 led_state &= ~LED_1 ;
708 led_state &= ~(LED_2|LED_0) ;
710 /* Link at Port A = green led A ON */
711 if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
715 /* Link at Port B/S = green led B ON */
716 if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
721 outpw(LEDR_A, led_state) ;
726 /* Ring up = yellow led OFF*/
727 if (led_event == LED_Y_ON) {
728 led_state |= LED_MY_ON ;
730 else if (led_event == LED_Y_OFF) {
731 led_state |= LED_MY_OFF ;
733 else { /* PCM state changed */
734 /* Link at Port A/S = green led A ON */
735 if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
736 led_state |= LED_GA_ON ;
739 led_state |= LED_GA_OFF ;
742 /* Link at Port B = green led B ON */
743 if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
744 led_state |= LED_GB_ON ;
747 led_state |= LED_GB_OFF ;
751 outp(ADDR(B0_LED), led_state) ;
757 void pcm_state_change(smc,plc,p_state)
763 * the current implementation of pcm_state_change() in the driver
764 * parts must be renamed to drv_pcm_state_change() which will be called
765 * now after led_indication.
767 DRV_PCM_STATE_CHANGE(smc,plc,p_state) ;
769 led_indication(smc,0) ;
773 void rmt_indication(smc,i)
777 /* Call a driver special function if defined */
778 DRV_RMT_INDICATION(smc,i) ;
780 led_indication(smc, i ? LED_Y_OFF : LED_Y_ON) ;
785 * llc_recover_tx called by init_tx (fplus.c)
787 void llc_recover_tx(smc)
791 extern int load_gen_flag ;
796 smc->hw.n_a_send= 0 ;
802 /*--------------------------- DMA init ----------------------------*/
808 void init_dma(smc,dma)
816 * clear mask bit (enable DMA cannal)
819 outp(0xd6,(dma & 0x03) | 0xc0) ;
820 outp(0xd4, dma & 0x03) ;
823 outp(0x0b,(dma & 0x03) | 0xc0) ;
824 outp(0x0a,dma & 0x03) ;
831 void dis_dma(smc,dma)
838 * set mask bit (disable DMA cannal)
841 outp(0xd4,(dma & 0x03) | 0x04) ;
844 outp(0x0a,(dma & 0x03) | 0x04) ;
852 /*arrays with io addresses of dma controller length and address registers*/
853 static const int cntr[8] = { 0x001,0x003,0x005,0x007,0,0x0c6,0x0ca,0x0ce } ;
854 static const int base[8] = { 0x000,0x002,0x004,0x006,0,0x0c4,0x0c8,0x0cc } ;
855 static const int page[8] = { 0x087,0x083,0x081,0x082,0,0x08b,0x089,0x08a } ;
857 void init_dma(smc,dma)
862 * extended mode register
869 /* mode read (write) demand */
870 smc->hw.dma_rmode = (dma & 3) | 0x08 | 0x0 ;
871 smc->hw.dma_wmode = (dma & 3) | 0x04 | 0x0 ;
873 /* 32 bit IO's, burst DMA mode (type "C") */
874 smc->hw.dma_emode = (dma & 3) | 0x08 | 0x30 ;
876 outp((dma < 4) ? 0x40b : 0x4d6,smc->hw.dma_emode) ;
878 /* disable chaining */
879 outp((dma < 4) ? 0x40a : 0x4d4,(dma&3)) ;
881 /*load dma controller addresses for fast access during set dma*/
882 smc->hw.dma_base_word_count = cntr[smc->hw.dma];
883 smc->hw.dma_base_address = base[smc->hw.dma];
884 smc->hw.dma_base_address_page = page[smc->hw.dma];
888 void dis_dma(smc,dma)
894 outp((dma < 4) ? 0x0a : 0xd4,(dma&3)|4) ;/* mask bit */
899 void init_dma(smc,dma)
906 void dis_dma(smc,dma)
916 void init_dma(smc,dma)
923 void dis_dma(smc,dma)
933 static int is_equal_num(comp1,comp2,num)
940 for (i = 0 ; i < num ; i++) {
941 if (comp1[i] != comp2[i])
949 * set the OEM ID defaults, and test the contents of the OEM data base
950 * The default OEM is the first ACTIVE entry in the OEM data base
953 * 1 error in data base
957 int set_oi_id_def(smc)
966 act_entries = FALSE ;
968 smc->hw.oem_min_status = OI_STAT_ACTIVE ;
970 /* check OEM data base */
971 while (oem_ids[i].oi_status) {
972 switch (oem_ids[i].oi_status) {
974 act_entries = TRUE ; /* we have active IDs */
976 sel_id = i ; /* save the first active ID */
978 case OI_STAT_PRESENT:
980 break ; /* entry ok */
982 return (1) ; /* invalid oi_status */
991 /* ok, we have a valid OEM data base with an active entry */
992 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[sel_id] ;
995 #endif /* MULT_OEM */
999 /************************
1001 * BEGIN_MANUAL_ENTRY()
1005 * Check if an MCA board is present in the specified slot.
1008 * struct s_smc *smc,
1011 * smc - A pointer to the SMT Context struct.
1013 * slot - The number of the slot to inspect.
1015 * 0 = No adapter present.
1016 * 1 = Found FM1 adapter.
1020 * for all valid OEM_IDs
1021 * compare with ID read
1022 * if equal, return 1
1026 * The smc pointer must be valid now.
1028 * END_MANUAL_ENTRY()
1030 ************************/
1031 #define LONG_CARD_ID(lo, hi) ((((hi) & 0xff) << 8) | ((lo) & 0xff))
1032 int exist_board(smc,slot)
1037 SK_LOC_DECL(u_char,id[2]) ;
1039 #endif /* MULT_OEM */
1041 /* No longer valid. */
1046 if (read_card_id(smc, slot)
1047 == LONG_CARD_ID(OEMID(smc,0), OEMID(smc,1)))
1048 return (1) ; /* Found FM adapter. */
1050 #else /* MULT_OEM */
1051 idi = read_card_id(smc, slot) ;
1052 id[0] = idi & 0xff ;
1055 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1056 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1057 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1060 if (is_equal_num(&id[0],&OEMID(smc,0),2))
1063 #endif /* MULT_OEM */
1064 return (0) ; /* No adapter found. */
1067 /************************
1071 * Read the MCA card id from the specified slot.
1073 * smc - A pointer to the SMT Context struct.
1074 * CAVEAT: This pointer may be NULL and *must not* be used within this
1075 * function. It's only purpose is for drivers that need some information
1076 * for the inp() and outp() macros.
1078 * slot - The number of the slot for which the card id is returned.
1080 * Returns the card id read from the specified slot. If an illegal slot
1081 * number is specified, the function returns zero.
1083 ************************/
1084 static int read_card_id(smc,slot)
1085 struct s_smc *smc ; /* Do not use. */
1090 SK_UNUSED(smc) ; /* Make LINT happy. */
1091 if ((slot < 1) || (slot > 15)) /* max 16 slots, 0 = motherboard */
1092 return (0) ; /* Illegal slot number specified. */
1094 EnableSlotAccess(smc, slot) ;
1096 card_id = ((read_POS(smc,POS_ID_HIGH,slot - 1) & 0xff) << 8) |
1097 (read_POS(smc,POS_ID_LOW,slot - 1) & 0xff) ;
1099 DisableSlotAccess(smc) ;
1104 /************************
1106 * BEGIN_MANUAL_ENTRY()
1110 * Get adapter configuration information. Fill all board specific
1111 * parameters within the 'smc' structure.
1113 * int get_board_para(
1114 * struct s_smc *smc,
1117 * smc - A pointer to the SMT Context struct, to which this function will
1118 * write some adapter configuration data.
1120 * slot - The number of the slot, in which the adapter is installed.
1122 * 0 = No adapter present.
1124 * 2 = Adapter present, but card enable bit not set.
1126 * END_MANUAL_ENTRY()
1128 ************************/
1129 int get_board_para(smc,slot)
1136 /* Check if adapter present & get type of adapter. */
1137 switch (exist_board(smc, slot)) {
1138 case 0: /* Adapter not present. */
1140 case 1: /* FM Rev. 1 */
1141 smc->hw.rev = FM1_REV ;
1142 smc->hw.VFullRead = 0x0a ;
1143 smc->hw.VFullWrite = 0x05 ;
1144 smc->hw.DmaWriteExtraBytes = 8 ; /* 2 extra words. */
1147 smc->hw.slot = slot ;
1149 EnableSlotAccess(smc, slot) ;
1151 if (!(read_POS(smc,POS_102, slot - 1) & POS_CARD_EN)) {
1152 DisableSlotAccess(smc) ;
1153 return (2) ; /* Card enable bit not set. */
1156 val = read_POS(smc,POS_104, slot - 1) ; /* I/O, IRQ */
1158 #ifndef MEM_MAPPED_IO /* is defined by the operating system */
1159 i = val & POS_IOSEL ; /* I/O base addr. (0x0200 .. 0xfe00) */
1160 smc->hw.iop = (i + 1) * 0x0400 - 0x200 ;
1162 i = ((val & POS_IRQSEL) >> 6) & 0x03 ; /* IRQ <0, 1> */
1163 smc->hw.irq = opt_ints[i] ;
1165 /* FPROM base addr. */
1166 i = ((read_POS(smc,POS_103, slot - 1) & POS_MSEL) >> 4) & 0x07 ;
1167 smc->hw.eprom = opt_eproms[i] ;
1169 DisableSlotAccess(smc) ;
1171 /* before this, the smc->hw.iop must be set !!! */
1172 smc->hw.slot_32 = inpw(CSF_A) & SLOT_32 ;
1177 /* Enable access to specified MCA slot. */
1178 static void EnableSlotAccess(smc,slot)
1188 outp(POS_SYS_SETUP, POS_SYSTEM) ;
1191 outp(POS_CHANNEL_POS, POS_CHANNEL_BIT | (slot-1)) ;
1193 attach_POS_addr (smc) ;
1197 /* Disable access to MCA slot formerly enabled via EnableSlotAccess(). */
1198 static void DisableSlotAccess(smc)
1204 outp(POS_CHANNEL_POS, 0) ;
1206 detach_POS_addr (smc) ;
1212 #ifndef MEM_MAPPED_IO
1213 #define SADDR(slot) (((slot)<<12)&0xf000)
1214 #else /* MEM_MAPPED_IO */
1215 #define SADDR(slot) (smc->hw.iop)
1216 #endif /* MEM_MAPPED_IO */
1218 /************************
1220 * BEGIN_MANUAL_ENTRY()
1224 * Check if an EISA board is present in the specified slot.
1227 * struct s_smc *smc,
1230 * smc - A pointer to the SMT Context struct.
1232 * slot - The number of the slot to inspect.
1234 * 0 = No adapter present.
1235 * 1 = Found adapter.
1239 * for all valid OEM_IDs
1240 * compare with ID read
1241 * if equal, return 1
1245 * The smc pointer must be valid now.
1247 ************************/
1248 int exist_board(smc,slot)
1254 SK_LOC_DECL(u_char,id[4]) ;
1255 #endif /* MULT_OEM */
1257 /* No longer valid. */
1264 for (i = 0 ; i < 4 ; i++) {
1265 if (inp(SADDR(slot)+PRA(i)) != OEMID(smc,i))
1269 #else /* MULT_OEM */
1270 for (i = 0 ; i < 4 ; i++)
1271 id[i] = inp(SADDR(slot)+PRA(i)) ;
1273 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1275 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1276 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1279 if (is_equal_num(&id[0],&OEMID(smc,0),4))
1282 return (0) ; /* No adapter found. */
1283 #endif /* MULT_OEM */
1287 int get_board_para(smc,slot)
1293 if (!exist_board(smc,slot))
1296 smc->hw.slot = slot ;
1297 #ifndef MEM_MAPPED_IO /* if defined by the operating system */
1298 smc->hw.iop = SADDR(slot) ;
1301 if (!(inp(C0_A(0))&CFG_CARD_EN)) {
1302 return(2) ; /* CFG_CARD_EN bit not set! */
1305 smc->hw.irq = opt_ints[(inp(C1_A(0)) & CFG_IRQ_SEL)] ;
1306 smc->hw.dma = opt_dmas[((inp(C1_A(0)) & CFG_DRQ_SEL)>>3)] ;
1308 if ((i = inp(C2_A(0)) & CFG_EPROM_SEL) != 0x0f)
1309 smc->hw.eprom = opt_eproms[i] ;
1313 smc->hw.DmaWriteExtraBytes = 8 ;
1321 const u_char sklogo[6] = SKLOGO_STR ;
1322 #define SIZE_SKLOGO(smc) sizeof(sklogo)
1323 #define SKLOGO(smc,i) sklogo[i]
1324 #else /* MULT_OEM */
1325 #define SIZE_SKLOGO(smc) smc->hw.oem_id->oi_logo_len
1326 #define SKLOGO(smc,i) smc->hw.oem_id->oi_logo[i]
1327 #endif /* MULT_OEM */
1330 int exist_board(smc,port)
1337 u_char board_logo[15] ;
1338 SK_LOC_DECL(u_char,id[4]) ;
1339 #endif /* MULT_OEM */
1341 /* No longer valid. */
1347 for (i = SADDRL ; i < (signed) (SADDRL+SIZE_SKLOGO(smc)) ; i++) {
1348 if ((u_char)inpw((PRA(i)+port)) != SKLOGO(smc,i-SADDRL)) {
1353 /* check MAC address (S&K or other) */
1354 for (i = 0 ; i < 3 ; i++) {
1355 if ((u_char)inpw((PRA(i)+port)) != OEMID(smc,i))
1359 #else /* MULT_OEM */
1360 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1361 board_logo[0] = (u_char)inpw((PRA(SADDRL)+port)) ;
1364 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1365 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1368 /* Test all read bytes with current OEM_entry */
1369 /* for (i=0; (i<bytes_read) && (i < SIZE_SKLOGO(smc)); i++) { */
1370 for (i = 0; i < bytes_read; i++) {
1371 if (board_logo[i] != SKLOGO(smc,i))
1375 /* If mismatch, switch to next OEM entry */
1376 if ((board_logo[i] != SKLOGO(smc,i)) && (i < bytes_read))
1380 while (bytes_read < SIZE_SKLOGO(smc)) {
1381 // inpw next byte SK_Logo
1383 board_logo[i] = (u_char)inpw((PRA(SADDRL+i)+port)) ;
1385 if (board_logo[i] != SKLOGO(smc,i))
1389 for (i = 0 ; i < 3 ; i++)
1390 id[i] = (u_char)inpw((PRA(i)+port)) ;
1392 if ((board_logo[i] == SKLOGO(smc,i))
1393 && (bytes_read == SIZE_SKLOGO(smc))) {
1395 if (is_equal_num(&id[0],&OEMID(smc,0),3))
1400 #endif /* MULT_OEM */
1403 int get_board_para(smc,slot)
1409 return(0) ; /* for ISA not supported */
1415 int exist_board(smc,slot)
1424 found = FALSE ; /* make sure we returned with adatper not found*/
1425 /* if an empty oemids.h was included */
1428 smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
1429 for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
1430 if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
1433 ven_id = OEMID(smc,0) + (OEMID(smc,1) << 8) ;
1434 dev_id = OEMID(smc,2) + (OEMID(smc,3) << 8) ;
1435 for (i = 0; i < slot; i++) {
1436 if (pci_find_device(i,&smc->hw.pci_handle,
1437 dev_id,ven_id) != 0) {
1445 return(1) ; /* adapter was found */
1450 return(0) ; /* adapter was not found */
1453 #endif /* USE_BIOS_FUNC */
1455 void driver_get_bia(smc, bia_addr)
1457 struct fddi_addr *bia_addr ;
1461 extern const u_char canonical[256] ;
1463 for (i = 0 ; i < 6 ; i++) {
1464 bia_addr->a[i] = canonical[smc->hw.fddi_phys_addr.a[i]] ;
1468 void smt_start_watchdog(smc)
1471 SK_UNUSED(smc) ; /* Make LINT happy. */
1476 if (smc->hw.wdog_used) {
1477 outpw(ADDR(B2_WDOG_CRTL),TIM_START) ; /* Start timer. */
1484 void smt_stop_watchdog(smc)
1487 SK_UNUSED(smc) ; /* Make LINT happy. */
1491 if (smc->hw.wdog_used) {
1492 outpw(ADDR(B2_WDOG_CRTL),TIM_STOP) ; /* Stop timer. */
1500 static char get_rom_byte(smc,addr)
1505 return (READ_PROM(ADDR(B2_FDP))) ;
1513 #define PCI_DATA_1 0x18
1514 #define PCI_DATA_2 0x19
1517 * PCI data structure defines
1519 #define VPD_DATA_1 0x08
1520 #define VPD_DATA_2 0x09
1521 #define IMAGE_LEN_1 0x10
1522 #define IMAGE_LEN_2 0x11
1523 #define CODE_TYPE 0x14
1524 #define INDICATOR 0x15
1527 * BEGIN_MANUAL_ENTRY(mac_drv_vpd_read)
1528 * mac_drv_vpd_read(smc,buf,size,image)
1530 * function DOWNCALL (FDDIWARE)
1531 * reads the VPD data of the FPROM and writes it into the
1534 * para buf points to the buffer for the VPD data
1535 * size size of the VPD data buffer
1536 * image boot image; code type of the boot image
1537 * image = 0 Intel x86, PC-AT compatible
1538 * 1 OPENBOOT standard for PCI
1541 * returns len number of VPD data bytes read form the FPROM
1542 * <0 number of read bytes
1543 * >0 error: data invalid
1547 int mac_drv_vpd_read(smc,buf,size,image)
1561 * as long images defined
1563 while (get_rom_byte(smc,ibase+ROM_SIG_1) == 0x55 &&
1564 (u_char) get_rom_byte(smc,ibase+ROM_SIG_2) == 0xaa) {
1566 * get the pointer to the PCI data structure
1568 pci_base = ibase + get_rom_byte(smc,ibase+PCI_DATA_1) +
1569 (get_rom_byte(smc,ibase+PCI_DATA_2) << 8) ;
1571 if (image == get_rom_byte(smc,pci_base+CODE_TYPE)) {
1573 * we have the right image, read the VPD data
1575 vpd = ibase + get_rom_byte(smc,pci_base+VPD_DATA_1) +
1576 (get_rom_byte(smc,pci_base+VPD_DATA_2) << 8) ;
1578 break ; /* no VPD data */
1580 for (len = 0; len < size; len++,buf++,vpd++) {
1581 *buf = get_rom_byte(smc,vpd) ;
1587 * try the next image
1589 if (get_rom_byte(smc,pci_base+INDICATOR) & 0x80) {
1590 break ; /* this was the last image */
1592 ibase = ibase + get_rom_byte(smc,ibase+IMAGE_LEN_1) +
1593 (get_rom_byte(smc,ibase+IMAGE_LEN_2) << 8) ;
1600 void mac_drv_pci_fix(smc,fix_value)
1604 smc->hw.pci_fix_value = fix_value ;
1607 void mac_do_pci_fix(smc)