3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
59 static const char version[] =
60 "smc91x.c: v1.0, mar 07 2003 by Nicolas Pitre <nico@cam.org>\n";
68 #include <linux/config.h>
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/timer.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
84 #include <linux/netdevice.h>
85 #include <linux/etherdevice.h>
86 #include <linux/skbuff.h>
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
105 # define SMC_IOADDR -1
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
121 # define SMC_NOWAIT 0
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 5000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
153 #define MEMORY_WAIT_TIME 16
156 * This selects whether TX packets are sent one by one to the SMC91x internal
157 * memory and throttled until transmission completes. This may prevent
158 * RX overruns a litle by keeping much of the memory free for RX packets
159 * but to the expense of reduced TX throughput and increased IRQ overhead.
160 * Note this is not a cure for a too slow data bus or too high IRQ latency.
162 #define THROTTLE_TX_PKTS 0
165 * The MII clock high/low times. 2x this number gives the MII clock period
166 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
170 /* store this information for the driver.. */
173 * If I have to wait until memory is available to send a
174 * packet, I will store the skbuff here, until I get the
175 * desired memory. Then, I'll send it out and free it.
177 struct sk_buff *saved_skb;
180 * these are things that the kernel wants me to keep, so users
181 * can find out semi-useless statistics of how well the card is
184 struct net_device_stats stats;
186 /* version/revision of the SMC91x chip */
189 /* Contains the current active transmission mode */
192 /* Contains the current active receive mode */
195 /* Contains the current active receive/phy mode */
202 struct mii_if_info mii;
205 #ifdef SMC_USE_PXA_DMA
206 /* DMA needs the physical address of the chip */
212 #define DBG(n, args...) \
214 if (SMC_DEBUG >= (n)) \
215 printk(KERN_DEBUG args); \
218 #define PRINTK(args...) printk(args)
220 #define DBG(n, args...) do { } while(0)
221 #define PRINTK(args...) printk(KERN_DEBUG args)
225 static void PRINT_PKT(u_char *buf, int length)
232 remainder = length % 16;
234 for (i = 0; i < lines ; i ++) {
236 for (cur = 0; cur < 8; cur++) {
240 printk("%02x%02x ", a, b);
244 for (i = 0; i < remainder/2 ; i++) {
248 printk("%02x%02x ", a, b);
253 #define PRINT_PKT(x...) do { } while(0)
257 /* this enables an interrupt in the interrupt mask register */
258 #define SMC_ENABLE_INT(x) do { \
259 unsigned long flags; \
260 unsigned char mask; \
261 spin_lock_irqsave(&lp->lock, flags); \
262 mask = SMC_GET_INT_MASK(); \
264 SMC_SET_INT_MASK(mask); \
265 spin_unlock_irqrestore(&lp->lock, flags); \
268 /* this disables an interrupt from the interrupt mask register */
269 #define SMC_DISABLE_INT(x) do { \
270 unsigned long flags; \
271 unsigned char mask; \
272 spin_lock_irqsave(&lp->lock, flags); \
273 mask = SMC_GET_INT_MASK(); \
275 SMC_SET_INT_MASK(mask); \
276 spin_unlock_irqrestore(&lp->lock, flags); \
280 * Wait while MMU is busy. This is usually in the order of a few nanosecs
281 * if at all, but let's avoid deadlocking the system if the hardware
282 * decides to go south.
284 #define SMC_WAIT_MMU_BUSY() do { \
285 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
286 unsigned long timeout = jiffies + 2; \
287 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
288 if (time_after(jiffies, timeout)) { \
289 printk("%s: timeout %s line %d\n", \
290 dev->name, __FILE__, __LINE__); \
300 * this does a soft reset on the device
302 static void smc_reset(struct net_device *dev)
304 unsigned long ioaddr = dev->base_addr;
305 unsigned int ctl, cfg;
307 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
310 * This resets the registers mostly to defaults, but doesn't
311 * affect EEPROM. That seems unnecessary
314 SMC_SET_RCR(RCR_SOFTRST);
317 * Setup the Configuration Register
318 * This is necessary because the CONFIG_REG is not affected
323 cfg = CONFIG_DEFAULT;
326 * Setup for fast accesses if requested. If the card/system
327 * can't handle it then there will be no recovery except for
328 * a hard reset or power cycle
331 cfg |= CONFIG_NO_WAIT;
334 * Release from possible power-down state
335 * Configuration register is not affected by Soft Reset
337 cfg |= CONFIG_EPH_POWER_EN;
341 /* this should pause enough for the chip to be happy */
343 * elaborate? What does the chip _need_? --jgarzik
345 * This seems to be undocumented, but something the original
346 * driver(s) have always done. Suspect undocumented timing
347 * info/determined empirically. --rmk
351 /* Disable transmit and receive functionality */
353 SMC_SET_RCR(RCR_CLEAR);
354 SMC_SET_TCR(TCR_CLEAR);
357 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
360 * Set the control register to automatically release successfully
361 * transmitted packets, to make the best use out of our limited
364 #if ! THROTTLE_TX_PKTS
365 ctl |= CTL_AUTO_RELEASE;
367 ctl &= ~CTL_AUTO_RELEASE;
371 /* Disable all interrupts */
376 SMC_SET_MMU_CMD(MC_RESET);
381 * Enable Interrupts, Receive, and Transmit
383 static void smc_enable(struct net_device *dev)
385 unsigned long ioaddr = dev->base_addr;
386 struct smc_local *lp = netdev_priv(dev);
389 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
391 /* see the header file for options in TCR/RCR DEFAULT */
393 SMC_SET_TCR(lp->tcr_cur_mode);
394 SMC_SET_RCR(lp->rcr_cur_mode);
396 /* now, enable interrupts */
397 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
398 if (lp->version >= (CHIP_91100 << 4))
401 SMC_SET_INT_MASK(mask);
405 * this puts the device in an inactive state
407 static void smc_shutdown(unsigned long ioaddr)
409 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
411 /* no more interrupts for me */
415 /* and tell the card to stay away from that nasty outside world */
417 SMC_SET_RCR(RCR_CLEAR);
418 SMC_SET_TCR(TCR_CLEAR);
421 /* finally, shut the chip down */
423 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
428 * This is the procedure to handle the receipt of a packet.
430 static inline void smc_rcv(struct net_device *dev)
432 struct smc_local *lp = netdev_priv(dev);
433 unsigned long ioaddr = dev->base_addr;
434 unsigned int packet_number, status, packet_len;
436 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
438 packet_number = SMC_GET_RXFIFO();
439 if (unlikely(packet_number & RXFIFO_REMPTY)) {
440 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
444 /* read from start of packet */
445 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
447 /* First two words are status and packet length */
448 SMC_GET_PKT_HDR(status, packet_len);
449 packet_len &= 0x07ff; /* mask off top bits */
450 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
451 dev->name, packet_number, status,
452 packet_len, packet_len);
454 if (unlikely(status & RS_ERRORS)) {
455 lp->stats.rx_errors++;
456 if (status & RS_ALGNERR)
457 lp->stats.rx_frame_errors++;
458 if (status & (RS_TOOSHORT | RS_TOOLONG))
459 lp->stats.rx_length_errors++;
460 if (status & RS_BADCRC)
461 lp->stats.rx_crc_errors++;
465 unsigned int data_len;
467 /* set multicast stats */
468 if (status & RS_MULTICAST)
469 lp->stats.multicast++;
472 * Actual payload is packet_len - 4 (or 3 if odd byte).
473 * We want skb_reserve(2) and the final ctrl word
474 * (2 bytes, possibly containing the payload odd byte).
475 * Ence packet_len - 4 + 2 + 2.
477 skb = dev_alloc_skb(packet_len);
478 if (unlikely(skb == NULL)) {
479 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
481 lp->stats.rx_dropped++;
485 /* Align IP header to 32 bits */
488 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
489 if (lp->version == 0x90)
490 status |= RS_ODDFRAME;
493 * If odd length: packet_len - 3,
494 * otherwise packet_len - 4.
496 data_len = packet_len - ((status & RS_ODDFRAME) ? 3 : 4);
497 data = skb_put(skb, data_len);
498 SMC_PULL_DATA(data, packet_len - 2);
500 PRINT_PKT(data, packet_len - 2);
502 dev->last_rx = jiffies;
504 skb->protocol = eth_type_trans(skb, dev);
506 lp->stats.rx_packets++;
507 lp->stats.rx_bytes += data_len;
512 SMC_SET_MMU_CMD(MC_RELEASE);
516 * This is called to actually send a packet to the chip.
517 * Returns non-zero when successful.
519 static void smc_hardware_send_packet(struct net_device *dev)
521 struct smc_local *lp = netdev_priv(dev);
522 unsigned long ioaddr = dev->base_addr;
523 struct sk_buff *skb = lp->saved_skb;
524 unsigned int packet_no, len;
527 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
529 packet_no = SMC_GET_AR();
530 if (unlikely(packet_no & AR_FAILED)) {
531 printk("%s: Memory allocation failed.\n", dev->name);
532 lp->saved_skb = NULL;
533 lp->stats.tx_errors++;
534 lp->stats.tx_fifo_errors++;
535 dev_kfree_skb_any(skb);
539 /* point to the beginning of the packet */
540 SMC_SET_PN(packet_no);
541 SMC_SET_PTR(PTR_AUTOINC);
545 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
546 dev->name, packet_no, len, len, buf);
550 * Send the packet length (+6 for status words, length, and ctl.
551 * The card will pad to 64 bytes with zeroes if packet is too small.
553 SMC_PUT_PKT_HDR(0, len + 6);
555 /* send the actual data */
556 SMC_PUSH_DATA(buf, len & ~1);
558 /* Send final ctl word with the last byte if there is one */
559 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
561 /* and let the chipset deal with it */
562 SMC_SET_MMU_CMD(MC_ENQUEUE);
563 SMC_ACK_INT(IM_TX_EMPTY_INT);
565 dev->trans_start = jiffies;
566 dev_kfree_skb_any(skb);
567 lp->saved_skb = NULL;
568 lp->stats.tx_packets++;
569 lp->stats.tx_bytes += len;
573 * Since I am not sure if I will have enough room in the chip's ram
574 * to store the packet, I call this routine which either sends it
575 * now, or set the card to generates an interrupt when ready
578 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
580 struct smc_local *lp = netdev_priv(dev);
581 unsigned long ioaddr = dev->base_addr;
582 unsigned int numPages, poll_count, status, saved_bank;
584 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
586 BUG_ON(lp->saved_skb != NULL);
590 * The MMU wants the number of pages to be the number of 256 bytes
591 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
593 * The 91C111 ignores the size bits, but earlier models don't.
595 * Pkt size for allocating is data length +6 (for additional status
596 * words, length and ctl)
598 * If odd size then last byte is included in ctl word.
600 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
601 if (unlikely(numPages > 7)) {
602 printk("%s: Far too big packet error.\n", dev->name);
603 lp->saved_skb = NULL;
604 lp->stats.tx_errors++;
605 lp->stats.tx_dropped++;
610 /* now, try to allocate the memory */
611 saved_bank = SMC_CURRENT_BANK();
613 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
616 * Poll the chip for a short amount of time in case the
617 * allocation succeeds quickly.
619 poll_count = MEMORY_WAIT_TIME;
621 status = SMC_GET_INT();
622 if (status & IM_ALLOC_INT) {
623 SMC_ACK_INT(IM_ALLOC_INT);
626 } while (--poll_count);
629 /* oh well, wait until the chip finds memory later */
630 netif_stop_queue(dev);
631 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
632 SMC_ENABLE_INT(IM_ALLOC_INT);
635 * Allocation succeeded: push packet to the chip's own memory
638 * If THROTTLE_TX_PKTS is selected that means we don't want
639 * more than a single TX packet taking up space in the chip's
640 * internal memory at all time, in which case we stop the
641 * queue right here until we're notified of TX completion.
643 * Otherwise we're quite happy to feed more TX packets right
644 * away for better TX throughput, in which case the queue is
648 netif_stop_queue(dev);
650 smc_hardware_send_packet(dev);
651 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
654 SMC_SELECT_BANK(saved_bank);
659 * This handles a TX interrupt, which is only called when:
660 * - a TX error occurred, or
661 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
663 static void smc_tx(struct net_device *dev)
665 unsigned long ioaddr = dev->base_addr;
666 struct smc_local *lp = netdev_priv(dev);
667 unsigned int saved_packet, packet_no, tx_status, pkt_len;
669 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
671 /* If the TX FIFO is empty then nothing to do */
672 packet_no = SMC_GET_TXFIFO();
673 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
674 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
678 /* select packet to read from */
679 saved_packet = SMC_GET_PN();
680 SMC_SET_PN(packet_no);
682 /* read the first word (status word) from this packet */
683 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
684 SMC_GET_PKT_HDR(tx_status, pkt_len);
685 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
686 dev->name, tx_status, packet_no);
688 if (!(tx_status & TS_SUCCESS))
689 lp->stats.tx_errors++;
690 if (tx_status & TS_LOSTCAR)
691 lp->stats.tx_carrier_errors++;
693 if (tx_status & TS_LATCOL) {
694 PRINTK("%s: late collision occurred on last xmit\n", dev->name);
695 lp->stats.tx_window_errors++;
696 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
697 printk(KERN_INFO "%s: unexpectedly large numbers of "
698 "late collisions. Please check duplex "
699 "setting.\n", dev->name);
703 /* kill the packet */
705 SMC_SET_MMU_CMD(MC_FREEPKT);
707 /* Don't restore Packet Number Reg until busy bit is cleared */
709 SMC_SET_PN(saved_packet);
711 /* re-enable transmit */
713 SMC_SET_TCR(lp->tcr_cur_mode);
718 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
720 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
722 unsigned long ioaddr = dev->base_addr;
723 unsigned int mii_reg, mask;
725 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
728 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
734 SMC_SET_MII(mii_reg);
736 SMC_SET_MII(mii_reg | MII_MCLK);
741 static unsigned int smc_mii_in(struct net_device *dev, int bits)
743 unsigned long ioaddr = dev->base_addr;
744 unsigned int mii_reg, mask, val;
746 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
747 SMC_SET_MII(mii_reg);
749 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
750 if (SMC_GET_MII() & MII_MDI)
753 SMC_SET_MII(mii_reg);
755 SMC_SET_MII(mii_reg | MII_MCLK);
763 * Reads a register from the MII Management serial interface
765 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
767 unsigned long ioaddr = dev->base_addr;
768 unsigned int phydata, old_bank;
770 /* Save the current bank, and select bank 3 */
771 old_bank = SMC_CURRENT_BANK();
775 smc_mii_out(dev, 0xffffffff, 32);
777 /* Start code (01) + read (10) + phyaddr + phyreg */
778 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
780 /* Turnaround (2bits) + phydata */
781 phydata = smc_mii_in(dev, 18);
783 /* Return to idle state */
784 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
786 /* And select original bank */
787 SMC_SELECT_BANK(old_bank);
789 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
790 __FUNCTION__, phyaddr, phyreg, phydata);
796 * Writes a register to the MII Management serial interface
798 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
801 unsigned long ioaddr = dev->base_addr;
802 unsigned int old_bank;
804 /* Save the current bank, and select bank 3 */
805 old_bank = SMC_CURRENT_BANK();
809 smc_mii_out(dev, 0xffffffff, 32);
811 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
812 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
814 /* Return to idle state */
815 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
817 /* And select original bank */
818 SMC_SELECT_BANK(old_bank);
820 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
821 __FUNCTION__, phyaddr, phyreg, phydata);
825 * Finds and reports the PHY address
827 static void smc_detect_phy(struct net_device *dev)
829 struct smc_local *lp = netdev_priv(dev);
832 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
837 * Scan all 32 PHY addresses if necessary, starting at
838 * PHY#1 to PHY#31, and then PHY#0 last.
840 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
841 unsigned int id1, id2;
843 /* Read the PHY identifiers */
844 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
845 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
847 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
848 dev->name, id1, id2);
850 /* Make sure it is a valid identifier */
851 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
852 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
853 /* Save the PHY's address */
854 lp->mii.phy_id = phyaddr & 31;
855 lp->phy_type = id1 << 16 | id2;
862 * Sets the PHY to a configuration as determined by the user
864 static int smc_phy_fixed(struct net_device *dev)
866 struct smc_local *lp = netdev_priv(dev);
867 unsigned long ioaddr = dev->base_addr;
868 int phyaddr = lp->mii.phy_id;
871 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
873 /* Enter Link Disable state */
874 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
875 cfg1 |= PHY_CFG1_LNKDIS;
876 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
879 * Set our fixed capabilities
880 * Disable auto-negotiation
885 bmcr |= BMCR_FULLDPLX;
887 if (lp->ctl_rspeed == 100)
888 bmcr |= BMCR_SPEED100;
890 /* Write our capabilities to the phy control register */
891 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
893 /* Re-Configure the Receive/Phy Control register */
894 SMC_SET_RPC(lp->rpc_cur_mode);
900 * smc_phy_reset - reset the phy
904 * Issue a software reset for the specified PHY and
905 * wait up to 100ms for the reset to complete. We should
906 * not access the PHY for 50ms after issuing the reset.
908 * The time to wait appears to be dependent on the PHY.
910 * Must be called with lp->lock locked.
912 static int smc_phy_reset(struct net_device *dev, int phy)
914 struct smc_local *lp = netdev_priv(dev);
918 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
920 for (timeout = 2; timeout; timeout--) {
921 spin_unlock_irq(&lp->lock);
923 spin_lock_irq(&lp->lock);
925 bmcr = smc_phy_read(dev, phy, MII_BMCR);
926 if (!(bmcr & BMCR_RESET))
930 return bmcr & BMCR_RESET;
934 * smc_phy_powerdown - powerdown phy
938 * Power down the specified PHY
940 static void smc_phy_powerdown(struct net_device *dev, int phy)
942 struct smc_local *lp = netdev_priv(dev);
945 spin_lock_irq(&lp->lock);
946 bmcr = smc_phy_read(dev, phy, MII_BMCR);
947 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
948 spin_unlock_irq(&lp->lock);
952 * smc_phy_check_media - check the media status and adjust TCR
954 * @init: set true for initialisation
956 * Select duplex mode depending on negotiation state. This
957 * also updates our carrier state.
959 static void smc_phy_check_media(struct net_device *dev, int init)
961 struct smc_local *lp = netdev_priv(dev);
962 unsigned long ioaddr = dev->base_addr;
964 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
965 unsigned int old_bank;
967 /* duplex state has changed */
968 if (lp->mii.full_duplex) {
969 lp->tcr_cur_mode |= TCR_SWFDUP;
971 lp->tcr_cur_mode &= ~TCR_SWFDUP;
974 old_bank = SMC_CURRENT_BANK();
976 SMC_SET_TCR(lp->tcr_cur_mode);
977 SMC_SELECT_BANK(old_bank);
982 * Configures the specified PHY through the MII management interface
983 * using Autonegotiation.
984 * Calls smc_phy_fixed() if the user has requested a certain config.
985 * If RPC ANEG bit is set, the media selection is dependent purely on
986 * the selection by the MII (either in the MII BMCR reg or the result
987 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
988 * is controlled by the RPC SPEED and RPC DPLX bits.
990 static void smc_phy_configure(struct net_device *dev)
992 struct smc_local *lp = netdev_priv(dev);
993 unsigned long ioaddr = dev->base_addr;
994 int phyaddr = lp->mii.phy_id;
995 int my_phy_caps; /* My PHY capabilities */
996 int my_ad_caps; /* My Advertised capabilities */
999 DBG(3, "%s:smc_program_phy()\n", dev->name);
1001 spin_lock_irq(&lp->lock);
1004 * We should not be called if phy_type is zero.
1006 if (lp->phy_type == 0)
1007 goto smc_phy_configure_exit;
1009 if (smc_phy_reset(dev, phyaddr)) {
1010 printk("%s: PHY reset timed out\n", dev->name);
1011 goto smc_phy_configure_exit;
1015 * Enable PHY Interrupts (for register 18)
1016 * Interrupts listed here are disabled
1018 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1019 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1020 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1021 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1023 /* Configure the Receive/Phy Control register */
1025 SMC_SET_RPC(lp->rpc_cur_mode);
1027 /* If the user requested no auto neg, then go set his request */
1028 if (lp->mii.force_media) {
1030 goto smc_phy_configure_exit;
1033 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1034 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1036 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1037 printk(KERN_INFO "Auto negotiation NOT supported\n");
1039 goto smc_phy_configure_exit;
1042 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1044 if (my_phy_caps & BMSR_100BASE4)
1045 my_ad_caps |= ADVERTISE_100BASE4;
1046 if (my_phy_caps & BMSR_100FULL)
1047 my_ad_caps |= ADVERTISE_100FULL;
1048 if (my_phy_caps & BMSR_100HALF)
1049 my_ad_caps |= ADVERTISE_100HALF;
1050 if (my_phy_caps & BMSR_10FULL)
1051 my_ad_caps |= ADVERTISE_10FULL;
1052 if (my_phy_caps & BMSR_10HALF)
1053 my_ad_caps |= ADVERTISE_10HALF;
1055 /* Disable capabilities not selected by our user */
1056 if (lp->ctl_rspeed != 100)
1057 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1059 if (!lp->ctl_rfduplx)
1060 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1062 /* Update our Auto-Neg Advertisement Register */
1063 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1064 lp->mii.advertising = my_ad_caps;
1067 * Read the register back. Without this, it appears that when
1068 * auto-negotiation is restarted, sometimes it isn't ready and
1069 * the link does not come up.
1071 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1073 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1074 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1076 /* Restart auto-negotiation process in order to advertise my caps */
1077 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1079 smc_phy_check_media(dev, 1);
1081 smc_phy_configure_exit:
1082 spin_unlock_irq(&lp->lock);
1088 * Purpose: Handle interrupts relating to PHY register 18. This is
1089 * called from the "hard" interrupt handler under our private spinlock.
1091 static void smc_phy_interrupt(struct net_device *dev)
1093 struct smc_local *lp = netdev_priv(dev);
1094 int phyaddr = lp->mii.phy_id;
1097 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1099 if (lp->phy_type == 0)
1103 smc_phy_check_media(dev, 0);
1105 /* Read PHY Register 18, Status Output */
1106 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1107 if ((phy18 & PHY_INT_INT) == 0)
1112 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1114 static void smc_10bt_check_media(struct net_device *dev, int init)
1116 struct smc_local *lp = netdev_priv(dev);
1117 unsigned long ioaddr = dev->base_addr;
1118 unsigned int old_carrier, new_carrier, old_bank;
1120 old_bank = SMC_CURRENT_BANK();
1122 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1123 new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0;
1125 if (init || (old_carrier != new_carrier)) {
1127 netif_carrier_off(dev);
1129 netif_carrier_on(dev);
1131 if (netif_msg_link(lp))
1132 printk(KERN_INFO "%s: link %s\n", dev->name,
1133 new_carrier ? "up" : "down");
1135 SMC_SELECT_BANK(old_bank);
1138 static void smc_eph_interrupt(struct net_device *dev)
1140 unsigned long ioaddr = dev->base_addr;
1141 unsigned int old_bank, ctl;
1143 smc_10bt_check_media(dev, 0);
1145 old_bank = SMC_CURRENT_BANK();
1148 ctl = SMC_GET_CTL();
1149 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1152 SMC_SELECT_BANK(old_bank);
1156 * This is the main routine of the driver, to handle the device when
1157 * it needs some attention.
1159 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1161 struct net_device *dev = dev_id;
1162 unsigned long ioaddr = dev->base_addr;
1163 struct smc_local *lp = netdev_priv(dev);
1164 int status, mask, timeout, card_stats;
1165 int saved_bank, saved_pointer;
1167 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1169 saved_bank = SMC_CURRENT_BANK();
1171 saved_pointer = SMC_GET_PTR();
1172 mask = SMC_GET_INT_MASK();
1173 SMC_SET_INT_MASK(0);
1175 /* set a timeout value, so I don't stay here forever */
1179 status = SMC_GET_INT();
1181 DBG(2, "%s: IRQ 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1182 dev->name, status, mask,
1183 ({ int meminfo; SMC_SELECT_BANK(0);
1184 meminfo = SMC_GET_MIR();
1185 SMC_SELECT_BANK(2); meminfo; }),
1192 spin_lock(&lp->lock);
1194 if (status & IM_RCV_INT) {
1195 DBG(3, "%s: RX irq\n", dev->name);
1197 } else if (status & IM_TX_INT) {
1198 DBG(3, "%s: TX int\n", dev->name);
1200 SMC_ACK_INT(IM_TX_INT);
1201 #if THROTTLE_TX_PKTS
1202 netif_wake_queue(dev);
1204 } else if (status & IM_ALLOC_INT) {
1205 DBG(3, "%s: Allocation irq\n", dev->name);
1206 smc_hardware_send_packet(dev);
1207 mask |= (IM_TX_INT | IM_TX_EMPTY_INT);
1208 mask &= ~IM_ALLOC_INT;
1209 #if ! THROTTLE_TX_PKTS
1210 netif_wake_queue(dev);
1212 } else if (status & IM_TX_EMPTY_INT) {
1213 DBG(3, "%s: TX empty\n", dev->name);
1214 mask &= ~IM_TX_EMPTY_INT;
1218 card_stats = SMC_GET_COUNTER();
1221 /* single collisions */
1222 lp->stats.collisions += card_stats & 0xF;
1225 /* multiple collisions */
1226 lp->stats.collisions += card_stats & 0xF;
1227 } else if (status & IM_RX_OVRN_INT) {
1228 DBG(1, "%s: RX overrun\n", dev->name);
1229 SMC_ACK_INT(IM_RX_OVRN_INT);
1230 lp->stats.rx_errors++;
1231 lp->stats.rx_fifo_errors++;
1232 } else if (status & IM_EPH_INT) {
1233 smc_eph_interrupt(dev);
1234 } else if (status & IM_MDINT) {
1235 SMC_ACK_INT(IM_MDINT);
1236 smc_phy_interrupt(dev);
1237 } else if (status & IM_ERCV_INT) {
1238 SMC_ACK_INT(IM_ERCV_INT);
1239 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1242 spin_unlock(&lp->lock);
1243 } while (--timeout);
1245 /* restore register states */
1246 SMC_SET_INT_MASK(mask);
1247 SMC_SET_PTR(saved_pointer);
1248 SMC_SELECT_BANK(saved_bank);
1250 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1253 * We return IRQ_HANDLED unconditionally here even if there was
1254 * nothing to do. There is a possibility that a packet might
1255 * get enqueued into the chip right after TX_EMPTY_INT is raised
1256 * but just before the CPU acknowledges the IRQ.
1257 * Better take an unneeded IRQ in some occasions than complexifying
1258 * the code for all cases.
1263 /* Our watchdog timed out. Called by the networking layer */
1264 static void smc_timeout(struct net_device *dev)
1266 struct smc_local *lp = netdev_priv(dev);
1268 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1275 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1276 * it introduced a problem. Now that this is a timeout routine,
1277 * we are getting called from within an interrupt context.
1278 * smc_phy_configure() calls msleep() which calls
1279 * schedule_timeout() which calls schedule(). When schedule()
1280 * is called from an interrupt context, it prints out
1281 * "Scheduling in interrupt" and then calls BUG(). This is
1282 * obviously not desirable. This was worked around by removing
1283 * the call to smc_phy_configure() here because it didn't seem
1284 * absolutely necessary. Ultimately, if msleep() is
1285 * supposed to be usable from an interrupt context (which it
1286 * looks like it thinks it should handle), it should be fixed.
1288 if (lp->phy_type != 0)
1289 smc_phy_configure(dev);
1292 /* clear anything saved */
1293 if (lp->saved_skb != NULL) {
1294 dev_kfree_skb (lp->saved_skb);
1295 lp->saved_skb = NULL;
1296 lp->stats.tx_errors++;
1297 lp->stats.tx_aborted_errors++;
1299 /* We can accept TX packets again */
1300 dev->trans_start = jiffies;
1301 netif_wake_queue(dev);
1305 * This sets the internal hardware table to filter out unwanted multicast
1306 * packets before they take up memory.
1308 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1309 * address are the offset into the table. If that bit is 1, then the
1310 * multicast packet is accepted. Otherwise, it's dropped silently.
1312 * To use the 6 bits as an offset into the table, the high 3 bits are the
1313 * number of the 8 bit register, while the low 3 bits are the bit within
1316 * This routine is based very heavily on the one provided by Peter Cammaert.
1319 smc_setmulticast(unsigned long ioaddr, int count, struct dev_mc_list *addrs)
1322 unsigned char multicast_table[8];
1323 struct dev_mc_list *cur_addr;
1325 /* table for flipping the order of 3 bits */
1326 static unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
1328 /* start with a table of all zeros: reject all */
1329 memset(multicast_table, 0, sizeof(multicast_table));
1332 for (i = 0; i < count; i++, cur_addr = cur_addr->next) {
1335 /* do we have a pointer here? */
1338 /* make sure this is a multicast address - shouldn't this
1339 be a given if we have it here ? */
1340 if (!(*cur_addr->dmi_addr & 1))
1343 /* only use the low order bits */
1344 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1346 /* do some messy swapping to put the bit in the right spot */
1347 multicast_table[invert3[position&7]] |=
1348 (1<<invert3[(position>>3)&7]);
1351 /* now, the table can be loaded into the chipset */
1353 SMC_SET_MCAST(multicast_table);
1357 * This routine will, depending on the values passed to it,
1358 * either make it accept multicast packets, go into
1359 * promiscuous mode (for TCPDUMP and cousins) or accept
1360 * a select set of multicast packets
1362 static void smc_set_multicast_list(struct net_device *dev)
1364 struct smc_local *lp = netdev_priv(dev);
1365 unsigned long ioaddr = dev->base_addr;
1367 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1370 if (dev->flags & IFF_PROMISC) {
1371 DBG(2, "%s: RCR_PRMS\n", dev->name);
1372 lp->rcr_cur_mode |= RCR_PRMS;
1373 SMC_SET_RCR(lp->rcr_cur_mode);
1376 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1377 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1378 when promiscuous mode is turned on.
1382 * Here, I am setting this to accept all multicast packets.
1383 * I don't need to zero the multicast table, because the flag is
1384 * checked before the table is
1386 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1387 lp->rcr_cur_mode |= RCR_ALMUL;
1388 SMC_SET_RCR(lp->rcr_cur_mode);
1389 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1393 * We just get all multicast packets even if we only want them
1394 * from one source. This will be changed at some future point.
1396 else if (dev->mc_count) {
1397 /* support hardware multicasting */
1399 /* be sure I get rid of flags I might have set */
1400 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1401 SMC_SET_RCR(lp->rcr_cur_mode);
1403 * NOTE: this has to set the bank, so make sure it is the
1404 * last thing called. The bank is set to zero at the top
1406 smc_setmulticast(ioaddr, dev->mc_count, dev->mc_list);
1408 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1409 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1410 SMC_SET_RCR(lp->rcr_cur_mode);
1413 * since I'm disabling all multicast entirely, I need to
1414 * clear the multicast list
1423 * Open and Initialize the board
1425 * Set up everything, reset the card, etc..
1428 smc_open(struct net_device *dev)
1430 struct smc_local *lp = netdev_priv(dev);
1431 unsigned long ioaddr = dev->base_addr;
1433 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1436 * Check that the address is valid. If its not, refuse
1437 * to bring the device up. The user must specify an
1438 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1440 if (!is_valid_ether_addr(dev->dev_addr)) {
1441 DBG(2, (KERN_DEBUG "smc_open: no valid ethernet hw addr\n"));
1445 /* clear out all the junk that was put here before... */
1446 lp->saved_skb = NULL;
1448 /* Setup the default Register Modes */
1449 lp->tcr_cur_mode = TCR_DEFAULT;
1450 lp->rcr_cur_mode = RCR_DEFAULT;
1451 lp->rpc_cur_mode = RPC_DEFAULT;
1454 * If we are not using a MII interface, we need to
1455 * monitor our own carrier signal to detect faults.
1457 if (lp->phy_type == 0)
1458 lp->tcr_cur_mode |= TCR_MON_CSN;
1460 /* reset the hardware */
1465 SMC_SET_MAC_ADDR(dev->dev_addr);
1467 /* Configure the PHY */
1468 if (lp->phy_type != 0)
1469 smc_phy_configure(dev);
1471 spin_lock_irq(&lp->lock);
1472 smc_10bt_check_media(dev, 1);
1473 spin_unlock_irq(&lp->lock);
1477 * make sure to initialize the link state with netif_carrier_off()
1478 * somewhere, too --jgarzik
1480 * smc_phy_configure() and smc_10bt_check_media() does that. --rmk
1482 netif_start_queue(dev);
1489 * this makes the board clean up everything that it can
1490 * and not talk to the outside world. Caused by
1491 * an 'ifconfig ethX down'
1493 static int smc_close(struct net_device *dev)
1495 struct smc_local *lp = netdev_priv(dev);
1497 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1499 netif_stop_queue(dev);
1500 netif_carrier_off(dev);
1502 /* clear everything */
1503 smc_shutdown(dev->base_addr);
1505 if (lp->phy_type != 0)
1506 smc_phy_powerdown(dev, lp->mii.phy_id);
1512 * Get the current statistics.
1513 * This may be called with the card open or closed.
1515 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1517 struct smc_local *lp = netdev_priv(dev);
1519 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1528 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1530 struct smc_local *lp = netdev_priv(dev);
1536 if (lp->phy_type != 0) {
1537 spin_lock_irq(&lp->lock);
1538 ret = mii_ethtool_gset(&lp->mii, cmd);
1539 spin_unlock_irq(&lp->lock);
1541 cmd->supported = SUPPORTED_10baseT_Half |
1542 SUPPORTED_10baseT_Full |
1543 SUPPORTED_TP | SUPPORTED_AUI;
1545 if (lp->ctl_rspeed == 10)
1546 cmd->speed = SPEED_10;
1547 else if (lp->ctl_rspeed == 100)
1548 cmd->speed = SPEED_100;
1550 cmd->autoneg = AUTONEG_DISABLE;
1551 cmd->transceiver = XCVR_INTERNAL;
1553 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1562 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1564 struct smc_local *lp = netdev_priv(dev);
1567 if (lp->phy_type != 0) {
1568 spin_lock_irq(&lp->lock);
1569 ret = mii_ethtool_sset(&lp->mii, cmd);
1570 spin_unlock_irq(&lp->lock);
1572 if (cmd->autoneg != AUTONEG_DISABLE ||
1573 cmd->speed != SPEED_10 ||
1574 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1575 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1578 // lp->port = cmd->port;
1579 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1581 // if (netif_running(dev))
1582 // smc_set_port(dev);
1591 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1593 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1594 strncpy(info->version, version, sizeof(info->version));
1595 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1598 static int smc_ethtool_nwayreset(struct net_device *dev)
1600 struct smc_local *lp = netdev_priv(dev);
1603 if (lp->phy_type != 0) {
1604 spin_lock_irq(&lp->lock);
1605 ret = mii_nway_restart(&lp->mii);
1606 spin_unlock_irq(&lp->lock);
1612 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1614 struct smc_local *lp = netdev_priv(dev);
1615 return lp->msg_enable;
1618 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1620 struct smc_local *lp = netdev_priv(dev);
1621 lp->msg_enable = level;
1624 static struct ethtool_ops smc_ethtool_ops = {
1625 .get_settings = smc_ethtool_getsettings,
1626 .set_settings = smc_ethtool_setsettings,
1627 .get_drvinfo = smc_ethtool_getdrvinfo,
1629 .get_msglevel = smc_ethtool_getmsglevel,
1630 .set_msglevel = smc_ethtool_setmsglevel,
1631 .nway_reset = smc_ethtool_nwayreset,
1632 .get_link = ethtool_op_get_link,
1633 // .get_eeprom = smc_ethtool_geteeprom,
1634 // .set_eeprom = smc_ethtool_seteeprom,
1640 * This routine has a simple purpose -- make the SMC chip generate an
1641 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1644 * does this still work?
1646 * I just deleted auto_irq.c, since it was never built...
1649 static int __init smc_findirq(unsigned long ioaddr)
1652 unsigned long cookie;
1654 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1656 cookie = probe_irq_on();
1659 * What I try to do here is trigger an ALLOC_INT. This is done
1660 * by allocating a small chunk of memory, which will give an interrupt
1663 /* enable ALLOCation interrupts ONLY */
1665 SMC_SET_INT_MASK(IM_ALLOC_INT);
1668 * Allocate 512 bytes of memory. Note that the chip was just
1669 * reset so all the memory is available
1671 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1674 * Wait until positive that the interrupt has been generated
1679 int_status = SMC_GET_INT();
1680 if (int_status & IM_ALLOC_INT)
1681 break; /* got the interrupt */
1682 } while (--timeout);
1685 * there is really nothing that I can do here if timeout fails,
1686 * as autoirq_report will return a 0 anyway, which is what I
1687 * want in this case. Plus, the clean up is needed in both
1691 /* and disable all interrupts again */
1692 SMC_SET_INT_MASK(0);
1694 /* and return what I found */
1695 return probe_irq_off(cookie);
1699 * Function: smc_probe(unsigned long ioaddr)
1702 * Tests to see if a given ioaddr points to an SMC91x chip.
1703 * Returns a 0 on success
1706 * (1) see if the high byte of BANK_SELECT is 0x33
1707 * (2) compare the ioaddr with the base register's address
1708 * (3) see if I recognize the chip ID in the appropriate register
1710 * Here I do typical initialization tasks.
1712 * o Initialize the structure if needed
1713 * o print out my vanity message if not done so already
1714 * o print out what type of hardware is detected
1715 * o print out the ethernet address
1717 * o set up my private data
1718 * o configure the dev structure with my subroutines
1719 * o actually GRAB the irq.
1722 static int __init smc_probe(struct net_device *dev, unsigned long ioaddr)
1724 struct smc_local *lp = netdev_priv(dev);
1725 static int version_printed = 0;
1727 unsigned int val, revision_register;
1728 const char *version_string;
1730 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1732 /* First, see if the high byte is 0x33 */
1733 val = SMC_CURRENT_BANK();
1734 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1735 if ((val & 0xFF00) != 0x3300) {
1736 if ((val & 0xFF) == 0x33) {
1738 "%s: Detected possible byte-swapped interface"
1739 " at IOADDR 0x%lx\n", CARDNAME, ioaddr);
1746 * The above MIGHT indicate a device, but I need to write to
1747 * further test this.
1750 val = SMC_CURRENT_BANK();
1751 if ((val & 0xFF00) != 0x3300) {
1757 * well, we've already written once, so hopefully another
1758 * time won't hurt. This time, I need to switch the bank
1759 * register to bank 1, so I can access the base address
1763 val = SMC_GET_BASE();
1764 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1765 if ((ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) {
1766 printk("%s: IOADDR %lx doesn't match configuration (%x).\n",
1767 CARDNAME, ioaddr, val);
1771 * check if the revision register is something that I
1772 * recognize. These might need to be added to later,
1773 * as future revisions could be added.
1776 revision_register = SMC_GET_REV();
1777 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1778 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1779 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1780 /* I don't recognize this chip, so... */
1781 printk("%s: IO 0x%lx: Unrecognized revision register 0x%04x"
1782 ", Contact author.\n", CARDNAME,
1783 ioaddr, revision_register);
1789 /* At this point I'll assume that the chip is an SMC91x. */
1790 if (version_printed++ == 0)
1791 printk("%s", version);
1793 /* fill in some of the fields */
1794 dev->base_addr = ioaddr;
1795 lp->version = revision_register & 0xff;
1797 /* Get the MAC address */
1799 SMC_GET_MAC_ADDR(dev->dev_addr);
1801 /* now, reset the chip, and put it into a known state */
1805 * If dev->irq is 0, then the device has to be banged on to see
1808 * This banging doesn't always detect the IRQ, for unknown reasons.
1809 * a workaround is to reset the chip and try again.
1811 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1812 * be what is requested on the command line. I don't do that, mostly
1813 * because the card that I have uses a non-standard method of accessing
1814 * the IRQs, and because this _should_ work in most configurations.
1816 * Specifying an IRQ is done with the assumption that the user knows
1817 * what (s)he is doing. No checking is done!!!!
1824 dev->irq = smc_findirq(ioaddr);
1827 /* kick the card and try again */
1831 if (dev->irq == 0) {
1832 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1837 dev->irq = irq_canonicalize(dev->irq);
1839 /* Fill in the fields of the device structure with ethernet values. */
1842 dev->open = smc_open;
1843 dev->stop = smc_close;
1844 dev->hard_start_xmit = smc_hard_start_xmit;
1845 dev->tx_timeout = smc_timeout;
1846 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1847 dev->get_stats = smc_query_statistics;
1848 dev->set_multicast_list = smc_set_multicast_list;
1849 dev->ethtool_ops = &smc_ethtool_ops;
1851 spin_lock_init(&lp->lock);
1852 lp->mii.phy_id_mask = 0x1f;
1853 lp->mii.reg_num_mask = 0x1f;
1854 lp->mii.force_media = 0;
1855 lp->mii.full_duplex = 0;
1857 lp->mii.mdio_read = smc_phy_read;
1858 lp->mii.mdio_write = smc_phy_write;
1861 * Locate the phy, if any.
1863 if (lp->version >= (CHIP_91100 << 4))
1864 smc_detect_phy(dev);
1866 /* Set default parameters */
1867 lp->msg_enable = NETIF_MSG_LINK;
1868 lp->ctl_rfduplx = 0;
1869 lp->ctl_rspeed = 10;
1871 if (lp->version >= (CHIP_91100 << 4)) {
1872 lp->ctl_rfduplx = 1;
1873 lp->ctl_rspeed = 100;
1877 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1881 set_irq_type(dev->irq, IRQT_RISING);
1882 #ifdef SMC_USE_PXA_DMA
1884 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1885 smc_pxa_dma_irq, NULL);
1891 retval = register_netdev(dev);
1893 /* now, print out the card info, in a short format.. */
1894 printk("%s: %s (rev %d) at %#lx IRQ %d",
1895 dev->name, version_string, revision_register & 0x0f,
1896 dev->base_addr, dev->irq);
1898 if (dev->dma != (unsigned char)-1)
1899 printk(" DMA %d", dev->dma);
1901 printk("%s%s\n", nowait ? " [nowait]" : "",
1902 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1904 if (!is_valid_ether_addr(dev->dev_addr)) {
1905 printk("%s: Invalid ethernet MAC address. Please "
1906 "set using ifconfig\n", dev->name);
1908 /* Print the Ethernet address */
1909 printk("%s: Ethernet addr: ", dev->name);
1910 for (i = 0; i < 5; i++)
1911 printk("%2.2x:", dev->dev_addr[i]);
1912 printk("%2.2x\n", dev->dev_addr[5]);
1915 if (lp->phy_type == 0) {
1916 PRINTK("%s: No PHY found\n", dev->name);
1917 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1918 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1919 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1920 PRINTK("%s: PHY LAN83C180\n", dev->name);
1925 #ifdef SMC_USE_PXA_DMA
1926 if (retval && dev->dma != (unsigned char)-1)
1927 pxa_free_dma(dev->dma);
1932 static int smc_enable_device(unsigned long attrib_phys)
1934 unsigned long flags;
1935 unsigned char ecor, ecsr;
1939 * Map the attribute space. This is overkill, but clean.
1941 addr = ioremap(attrib_phys, ATTRIB_SIZE);
1946 * Reset the device. We must disable IRQs around this
1947 * since a reset causes the IRQ line become active.
1949 local_irq_save(flags);
1950 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
1951 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
1952 readb(addr + (ECOR << SMC_IO_SHIFT));
1955 * Wait 100us for the chip to reset.
1960 * The device will ignore all writes to the enable bit while
1961 * reset is asserted, even if the reset bit is cleared in the
1962 * same write. Must clear reset first, then enable the device.
1964 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
1965 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
1968 * Set the appropriate byte/word mode.
1970 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
1971 #ifndef SMC_CAN_USE_16BIT
1974 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
1975 local_irq_restore(flags);
1980 * Wait for the chip to wake up. We could poll the control
1981 * register in the main register space, but that isn't mapped
1982 * yet. We know this is going to take 750us.
1992 * dev->base_addr == 0, try to find all possible locations
1993 * dev->base_addr > 0x1ff, this is the address to check
1994 * dev->base_addr == <anything else>, return failure code
1997 * 0 --> there is a device
1998 * anything else, error
2000 static int smc_drv_probe(struct device *dev)
2002 struct platform_device *pdev = to_platform_device(dev);
2003 struct net_device *ndev;
2004 struct resource *res, *ext = NULL;
2008 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2015 * Request the regions.
2017 if (!request_mem_region(res->start, SMC_IO_EXTENT, "smc91x")) {
2022 ndev = alloc_etherdev(sizeof(struct smc_local));
2024 printk("%s: could not allocate device.\n", CARDNAME);
2028 SET_MODULE_OWNER(ndev);
2029 SET_NETDEV_DEV(ndev, dev);
2031 ndev->dma = (unsigned char)-1;
2032 ndev->irq = platform_get_irq(pdev, 0);
2034 ext = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2036 if (!request_mem_region(ext->start, ATTRIB_SIZE, ndev->name)) {
2041 #if defined(CONFIG_SA1100_ASSABET)
2042 NCR_0 |= NCR_ENET_OSC_EN;
2045 ret = smc_enable_device(ext->start);
2050 addr = ioremap(res->start, SMC_IO_EXTENT);
2056 dev_set_drvdata(dev, ndev);
2057 ret = smc_probe(ndev, (unsigned long)addr);
2059 dev_set_drvdata(dev, NULL);
2063 release_mem_region(ext->start, ATTRIB_SIZE);
2066 release_mem_region(res->start, SMC_IO_EXTENT);
2068 printk("%s: not found (%d).\n", CARDNAME, ret);
2070 #ifdef SMC_USE_PXA_DMA
2072 struct smc_local *lp = netdev_priv(ndev);
2073 lp->physaddr = res->start;
2080 static int smc_drv_remove(struct device *dev)
2082 struct platform_device *pdev = to_platform_device(dev);
2083 struct net_device *ndev = dev_get_drvdata(dev);
2084 struct resource *res;
2086 dev_set_drvdata(dev, NULL);
2088 unregister_netdev(ndev);
2090 free_irq(ndev->irq, ndev);
2092 #ifdef SMC_USE_PXA_DMA
2093 if (ndev->dma != (unsigned char)-1)
2094 pxa_free_dma(ndev->dma);
2096 iounmap((void *)ndev->base_addr);
2097 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2099 release_mem_region(res->start, ATTRIB_SIZE);
2100 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2101 release_mem_region(res->start, SMC_IO_EXTENT);
2108 static int smc_drv_suspend(struct device *dev, u32 state, u32 level)
2110 struct net_device *ndev = dev_get_drvdata(dev);
2112 if (ndev && level == SUSPEND_DISABLE) {
2113 if (netif_running(ndev)) {
2114 netif_device_detach(ndev);
2115 smc_shutdown(ndev->base_addr);
2121 static int smc_drv_resume(struct device *dev, u32 level)
2123 struct platform_device *pdev = to_platform_device(dev);
2124 struct net_device *ndev = dev_get_drvdata(dev);
2126 if (ndev && level == RESUME_ENABLE) {
2127 struct smc_local *lp = netdev_priv(ndev);
2128 unsigned long ioaddr = ndev->base_addr;
2130 if (pdev->num_resources == 3)
2131 smc_enable_device(pdev->resource[2].start);
2132 if (netif_running(ndev)) {
2136 SMC_SET_MAC_ADDR(ndev->dev_addr);
2137 if (lp->phy_type != 0)
2138 smc_phy_configure(ndev);
2139 netif_device_attach(ndev);
2145 static struct device_driver smc_driver = {
2147 .bus = &platform_bus_type,
2148 .probe = smc_drv_probe,
2149 .remove = smc_drv_remove,
2150 .suspend = smc_drv_suspend,
2151 .resume = smc_drv_resume,
2154 static int __init smc_init(void)
2159 "%s: You shouldn't use auto-probing with insmod!\n",
2163 return driver_register(&smc_driver);
2166 static void __exit smc_cleanup(void)
2168 driver_unregister(&smc_driver);
2171 module_init(smc_init);
2172 module_exit(smc_cleanup);