1 /* sundance.c: A Linux device driver for the Sundance ST201 "Alta". */
3 Written 1999-2000 by Donald Becker.
5 This software may be used and distributed according to the terms of
6 the GNU General Public License (GPL), incorporated herein by reference.
7 Drivers based on or derived from this code fall under the GPL and must
8 retain the authorship, copyright and license notice. This file is not
9 a complete program and may only be used when the entire operating
10 system is licensed under the GPL.
12 The author may be reached as becker@scyld.com, or C/O
13 Scyld Computing Corporation
14 410 Severn Ave., Suite 210
17 Support and updates available at
18 http://www.scyld.com/network/sundance.html
21 Version LK1.01a (jgarzik):
22 - Replace some MII-related magic numbers with constants
24 Version LK1.02 (D-Link):
25 - Add new board to PCI ID list
28 Version LK1.03 (D-Link):
29 - New Rx scheme, reduce Rx congestion
30 - Option to disable flow control
32 Version LK1.04 (D-Link):
34 - More support for ethtool.
37 - Remove unused/constant members from struct pci_id_info
38 (which then allows removal of 'drv_flags' from private struct)
40 - If no phy is found, fail to load that board (jgarzik)
41 - Always start phy id scan at id 1 to avoid problems (Donald Becker)
42 - Autodetect where mii_preable_required is needed,
43 default to not needed. (Donald Becker)
46 - Remove mii_preamble_required module parameter (Donald Becker)
47 - Add per-interface mii_preamble_required (setting is autodetected)
49 - Remove unnecessary cast from void pointer (jgarzik)
50 - Re-align comments in private struct (jgarzik)
52 Version LK1.04c (jgarzik):
53 - Support bitmapped message levels (NETIF_MSG_xxx), and the
54 two ethtool ioctls that get/set them
55 - Don't hand-code MII ethtool support, use standard API/lib
58 - Merge from Donald Becker's sundance.c: (Jason Lunz)
59 * proper support for variably-sized MTUs
60 * default to PIO, to fix chip bugs
61 - Add missing unregister_netdev (Jason Lunz)
62 - Add CONFIG_SUNDANCE_MMIO config option (jgarzik)
63 - Better rx buf size calculation (Donald Becker)
65 Version LK1.05 (D-Link):
66 - Fix DFE-580TX packet drop issue (for DL10050C)
69 Version LK1.06 (D-Link):
70 - Fix crash while unloading driver
72 Versin LK1.06b (D-Link):
73 - New tx scheme, adaptive tx_coalesce
75 Version LK1.07 (D-Link):
76 - Fix tx bugs in big-endian machines
77 - Remove unused max_interrupt_work module parameter, the new
78 NAPI-like rx scheme doesn't need it.
79 - Remove redundancy get_stats() in intr_handler(), those
80 I/O access could affect performance in ARM-based system
81 - Add Linux software VLAN support
83 Version LK1.08 (D-Link):
84 - Fix bug of custom mac address
85 (StationAddr register only accept word write)
87 Version LK1.09 (D-Link):
88 - Fix the flowctrl bug.
89 - Set Pause bit in MII ANAR if flow control enabled.
91 Version LK1.09a (ICPlus):
92 - Add the delay time in reading the contents of EEPROM
96 #define DRV_NAME "sundance"
97 #define DRV_VERSION "1.01+LK1.09a"
98 #define DRV_RELDATE "10-Jul-2003"
101 /* The user-configurable values.
102 These may be modified when a driver module is loaded.*/
103 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
104 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
105 Typical is a 64 element hash table based on the Ethernet CRC. */
106 static int multicast_filter_limit = 32;
108 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
109 Setting to > 1518 effectively disables this feature.
110 This chip can receive into offset buffers, so the Alpha does not
111 need a copy-align. */
112 static int rx_copybreak;
113 static int flowctrl=1;
115 /* media[] specifies the media type the NIC operates at.
116 autosense Autosensing active media.
117 10mbps_hd 10Mbps half duplex.
118 10mbps_fd 10Mbps full duplex.
119 100mbps_hd 100Mbps half duplex.
120 100mbps_fd 100Mbps full duplex.
121 0 Autosensing active media.
122 1 10Mbps half duplex.
123 2 10Mbps full duplex.
124 3 100Mbps half duplex.
125 4 100Mbps full duplex.
128 static char *media[MAX_UNITS];
131 /* Operational parameters that are set at compile time. */
133 /* Keep the ring sizes a power of two for compile efficiency.
134 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
135 Making the Tx ring too large decreases the effectiveness of channel
136 bonding and packet priority, and more than 128 requires modifying the
138 Large receive rings merely waste memory. */
139 #define TX_RING_SIZE 32
140 #define TX_QUEUE_LEN (TX_RING_SIZE - 1) /* Limit ring entries actually used. */
141 #define RX_RING_SIZE 64
143 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct netdev_desc)
144 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct netdev_desc)
146 /* Operational parameters that usually are not changed. */
147 /* Time in jiffies before concluding the transmitter is hung. */
148 #define TX_TIMEOUT (4*HZ)
149 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
151 /* Include files, designed to support most kernel versions 2.0.0 and later. */
152 #include <linux/module.h>
153 #include <linux/kernel.h>
154 #include <linux/string.h>
155 #include <linux/timer.h>
156 #include <linux/errno.h>
157 #include <linux/ioport.h>
158 #include <linux/slab.h>
159 #include <linux/interrupt.h>
160 #include <linux/pci.h>
161 #include <linux/netdevice.h>
162 #include <linux/etherdevice.h>
163 #include <linux/skbuff.h>
164 #include <linux/init.h>
165 #include <linux/bitops.h>
166 #include <asm/uaccess.h>
167 #include <asm/processor.h> /* Processor type for cache alignment. */
169 #include <linux/delay.h>
170 #include <linux/spinlock.h>
171 #ifndef _COMPAT_WITH_OLD_KERNEL
172 #include <linux/crc32.h>
173 #include <linux/ethtool.h>
174 #include <linux/mii.h>
182 /* These identify the driver base version and may not be removed. */
183 static char version[] __devinitdata =
184 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
185 KERN_INFO " http://www.scyld.com/network/sundance.html\n";
187 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
188 MODULE_DESCRIPTION("Sundance Alta Ethernet driver");
189 MODULE_LICENSE("GPL");
191 module_param(debug, int, 0);
192 module_param(rx_copybreak, int, 0);
193 module_param_array(media, charp, NULL, 0);
194 module_param(flowctrl, int, 0);
195 MODULE_PARM_DESC(debug, "Sundance Alta debug level (0-5)");
196 MODULE_PARM_DESC(rx_copybreak, "Sundance Alta copy breakpoint for copy-only-tiny-frames");
197 MODULE_PARM_DESC(flowctrl, "Sundance Alta flow control [0|1]");
202 I. Board Compatibility
204 This driver is designed for the Sundance Technologies "Alta" ST201 chip.
206 II. Board-specific settings
208 III. Driver operation
212 This driver uses two statically allocated fixed-size descriptor lists
213 formed into rings by a branch from the final descriptor to the beginning of
214 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
215 Some chips explicitly use only 2^N sized rings, while others use a
216 'next descriptor' pointer that the driver forms into rings.
218 IIIb/c. Transmit/Receive Structure
220 This driver uses a zero-copy receive and transmit scheme.
221 The driver allocates full frame size skbuffs for the Rx ring buffers at
222 open() time and passes the skb->data field to the chip as receive data
223 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
224 a fresh skbuff is allocated and the frame is copied to the new skbuff.
225 When the incoming frame is larger, the skbuff is passed directly up the
226 protocol stack. Buffers consumed this way are replaced by newly allocated
227 skbuffs in a later phase of receives.
229 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
230 using a full-sized skbuff for small frames vs. the copying costs of larger
231 frames. New boards are typically used in generously configured machines
232 and the underfilled buffers have negligible impact compared to the benefit of
233 a single allocation size, so the default value of zero results in never
234 copying packets. When copying is done, the cost is usually mitigated by using
235 a combined copy/checksum routine. Copying also preloads the cache, which is
236 most useful with small frames.
238 A subtle aspect of the operation is that the IP header at offset 14 in an
239 ethernet frame isn't longword aligned for further processing.
240 Unaligned buffers are permitted by the Sundance hardware, so
241 frames are received into the skbuff at an offset of "+2", 16-byte aligning
244 IIId. Synchronization
246 The driver runs as two independent, single-threaded flows of control. One
247 is the send-packet routine, which enforces single-threaded use by the
248 dev->tbusy flag. The other thread is the interrupt handler, which is single
249 threaded by the hardware and interrupt handling software.
251 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
252 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
253 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
254 the 'lp->tx_full' flag.
256 The interrupt handler has exclusive control over the Rx ring and records stats
257 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
258 empty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, it
259 clears both the tx_full and tbusy flags.
265 The Sundance ST201 datasheet, preliminary version.
266 http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
267 http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
273 /* Work-around for Kendin chip bugs. */
274 #ifndef CONFIG_SUNDANCE_MMIO
278 static struct pci_device_id sundance_pci_tbl[] = {
279 {0x1186, 0x1002, 0x1186, 0x1002, 0, 0, 0},
280 {0x1186, 0x1002, 0x1186, 0x1003, 0, 0, 1},
281 {0x1186, 0x1002, 0x1186, 0x1012, 0, 0, 2},
282 {0x1186, 0x1002, 0x1186, 0x1040, 0, 0, 3},
283 {0x1186, 0x1002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
284 {0x13F0, 0x0201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
285 {0x13F0, 0x0200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
288 MODULE_DEVICE_TABLE(pci, sundance_pci_tbl);
297 static struct pci_id_info pci_id_tbl[] = {
298 {"D-Link DFE-550TX FAST Ethernet Adapter"},
299 {"D-Link DFE-550FX 100Mbps Fiber-optics Adapter"},
300 {"D-Link DFE-580TX 4 port Server Adapter"},
301 {"D-Link DFE-530TXS FAST Ethernet Adapter"},
302 {"D-Link DL10050-based FAST Ethernet Adapter"},
303 {"IC Plus IP100 Fast Ethernet Adapter"},
304 {"IC Plus IP100A Fast Ethernet Adapter" },
305 {NULL,}, /* 0 terminated list. */
308 /* This driver was written to use PCI memory space, however x86-oriented
309 hardware often uses I/O space accesses. */
311 /* Offsets to the device registers.
312 Unlike software-only systems, device drivers interact with complex hardware.
313 It's not useful to define symbolic names for every register bit in the
314 device. The name can only partially document the semantics and make
315 the driver longer and more difficult to read.
316 In general, only the important configuration values or bits changed
317 multiple times should be defined symbolically.
322 TxDMABurstThresh = 0x08,
323 TxDMAUrgentThresh = 0x09,
324 TxDMAPollPeriod = 0x0a,
329 RxDMABurstThresh = 0x14,
330 RxDMAUrgentThresh = 0x15,
331 RxDMAPollPeriod = 0x16,
336 TxStartThresh = 0x3c,
337 RxEarlyThresh = 0x3e,
352 MulticastFilter0 = 0x60,
353 MulticastFilter1 = 0x64,
360 StatsCarrierError = 0x74,
361 StatsLateColl = 0x75,
362 StatsMultiColl = 0x76,
366 StatsTxXSDefer = 0x7a,
372 /* Aliased and bogus values! */
375 enum ASICCtrl_HiWord_bit {
376 GlobalReset = 0x0001,
381 NetworkReset = 0x0020,
386 /* Bits in the interrupt status/mask registers. */
387 enum intr_status_bits {
388 IntrSummary=0x0001, IntrPCIErr=0x0002, IntrMACCtrl=0x0008,
389 IntrTxDone=0x0004, IntrRxDone=0x0010, IntrRxStart=0x0020,
391 StatsMax=0x0080, LinkChange=0x0100,
392 IntrTxDMADone=0x0200, IntrRxDMADone=0x0400,
395 /* Bits in the RxMode register. */
397 AcceptAllIPMulti=0x20, AcceptMultiHash=0x10, AcceptAll=0x08,
398 AcceptBroadcast=0x04, AcceptMulticast=0x02, AcceptMyPhys=0x01,
400 /* Bits in MACCtrl. */
401 enum mac_ctrl0_bits {
402 EnbFullDuplex=0x20, EnbRcvLargeFrame=0x40,
403 EnbFlowCtrl=0x100, EnbPassRxCRC=0x200,
405 enum mac_ctrl1_bits {
406 StatsEnable=0x0020, StatsDisable=0x0040, StatsEnabled=0x0080,
407 TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400,
408 RxEnable=0x0800, RxDisable=0x1000, RxEnabled=0x2000,
411 /* The Rx and Tx buffer descriptors. */
412 /* Note that using only 32 bit fields simplifies conversion to big-endian
417 struct desc_frag { u32 addr, length; } frag[1];
420 /* Bits in netdev_desc.status */
421 enum desc_status_bits {
423 DescEndPacket=0x4000,
427 DescIntrOnDMADone=0x80000000,
428 DisableAlign = 0x00000001,
431 #define PRIV_ALIGN 15 /* Required alignment mask */
432 /* Use __attribute__((aligned (L1_CACHE_BYTES))) to maintain alignment
433 within the structure. */
435 struct netdev_private {
436 /* Descriptor rings first for alignment. */
437 struct netdev_desc *rx_ring;
438 struct netdev_desc *tx_ring;
439 struct sk_buff* rx_skbuff[RX_RING_SIZE];
440 struct sk_buff* tx_skbuff[TX_RING_SIZE];
441 dma_addr_t tx_ring_dma;
442 dma_addr_t rx_ring_dma;
443 struct net_device_stats stats;
444 struct timer_list timer; /* Media monitoring timer. */
445 /* Frequently used values: keep some adjacent for cache effect. */
447 spinlock_t rx_lock; /* Group with Tx control cache line. */
450 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
451 unsigned int rx_buf_sz; /* Based on MTU+slack. */
452 struct netdev_desc *last_tx; /* Last Tx descriptor used. */
453 unsigned int cur_tx, dirty_tx;
454 /* These values are keep track of the transceiver/media in use. */
455 unsigned int flowctrl:1;
456 unsigned int default_port:4; /* Last dev->if_port value. */
457 unsigned int an_enable:1;
459 struct tasklet_struct rx_tasklet;
460 struct tasklet_struct tx_tasklet;
463 /* Multicast and receive mode. */
464 spinlock_t mcastlock; /* SMP lock multicast updates. */
466 /* MII transceiver section. */
467 struct mii_if_info mii_if;
468 int mii_preamble_required;
469 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
470 struct pci_dev *pci_dev;
472 unsigned char pci_rev_id;
475 /* The station address location in the EEPROM. */
476 #define EEPROM_SA_OFFSET 0x10
477 #define DEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \
478 IntrDrvRqst | IntrTxDone | StatsMax | \
481 static int change_mtu(struct net_device *dev, int new_mtu);
482 static int eeprom_read(void __iomem *ioaddr, int location);
483 static int mdio_read(struct net_device *dev, int phy_id, int location);
484 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
485 static int netdev_open(struct net_device *dev);
486 static void check_duplex(struct net_device *dev);
487 static void netdev_timer(unsigned long data);
488 static void tx_timeout(struct net_device *dev);
489 static void init_ring(struct net_device *dev);
490 static int start_tx(struct sk_buff *skb, struct net_device *dev);
491 static int reset_tx (struct net_device *dev);
492 static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
493 static void rx_poll(unsigned long data);
494 static void tx_poll(unsigned long data);
495 static void refill_rx (struct net_device *dev);
496 static void netdev_error(struct net_device *dev, int intr_status);
497 static void netdev_error(struct net_device *dev, int intr_status);
498 static void set_rx_mode(struct net_device *dev);
499 static int __set_mac_addr(struct net_device *dev);
500 static struct net_device_stats *get_stats(struct net_device *dev);
501 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
502 static int netdev_close(struct net_device *dev);
503 static struct ethtool_ops ethtool_ops;
505 static int __devinit sundance_probe1 (struct pci_dev *pdev,
506 const struct pci_device_id *ent)
508 struct net_device *dev;
509 struct netdev_private *np;
511 int chip_idx = ent->driver_data;
514 void __iomem *ioaddr;
525 /* when built into the kernel, we only print version if device is found */
527 static int printed_version;
528 if (!printed_version++)
532 if (pci_enable_device(pdev))
534 pci_set_master(pdev);
538 dev = alloc_etherdev(sizeof(*np));
541 SET_MODULE_OWNER(dev);
542 SET_NETDEV_DEV(dev, &pdev->dev);
544 if (pci_request_regions(pdev, DRV_NAME))
547 ioaddr = pci_iomap(pdev, bar, netdev_io_size);
551 for (i = 0; i < 3; i++)
552 ((u16 *)dev->dev_addr)[i] =
553 le16_to_cpu(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));
555 dev->base_addr = (unsigned long)ioaddr;
558 np = netdev_priv(dev);
561 np->chip_id = chip_idx;
562 np->msg_enable = (1 << debug) - 1;
563 spin_lock_init(&np->lock);
564 tasklet_init(&np->rx_tasklet, rx_poll, (unsigned long)dev);
565 tasklet_init(&np->tx_tasklet, tx_poll, (unsigned long)dev);
567 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
569 goto err_out_cleardev;
570 np->tx_ring = (struct netdev_desc *)ring_space;
571 np->tx_ring_dma = ring_dma;
573 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
575 goto err_out_unmap_tx;
576 np->rx_ring = (struct netdev_desc *)ring_space;
577 np->rx_ring_dma = ring_dma;
579 np->mii_if.dev = dev;
580 np->mii_if.mdio_read = mdio_read;
581 np->mii_if.mdio_write = mdio_write;
582 np->mii_if.phy_id_mask = 0x1f;
583 np->mii_if.reg_num_mask = 0x1f;
585 /* The chip-specific entries in the device structure. */
586 dev->open = &netdev_open;
587 dev->hard_start_xmit = &start_tx;
588 dev->stop = &netdev_close;
589 dev->get_stats = &get_stats;
590 dev->set_multicast_list = &set_rx_mode;
591 dev->do_ioctl = &netdev_ioctl;
592 SET_ETHTOOL_OPS(dev, ðtool_ops);
593 dev->tx_timeout = &tx_timeout;
594 dev->watchdog_timeo = TX_TIMEOUT;
595 dev->change_mtu = &change_mtu;
596 pci_set_drvdata(pdev, dev);
598 pci_read_config_byte(pdev, PCI_REVISION_ID, &np->pci_rev_id);
600 i = register_netdev(dev);
602 goto err_out_unmap_rx;
604 printk(KERN_INFO "%s: %s at %p, ",
605 dev->name, pci_id_tbl[chip_idx].name, ioaddr);
606 for (i = 0; i < 5; i++)
607 printk("%2.2x:", dev->dev_addr[i]);
608 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
611 int phy, phy_idx = 0;
612 np->phys[0] = 1; /* Default setting */
613 np->mii_preamble_required++;
614 for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) {
615 int mii_status = mdio_read(dev, phy, MII_BMSR);
616 if (mii_status != 0xffff && mii_status != 0x0000) {
617 np->phys[phy_idx++] = phy;
618 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
619 if ((mii_status & 0x0040) == 0)
620 np->mii_preamble_required++;
621 printk(KERN_INFO "%s: MII PHY found at address %d, status "
622 "0x%4.4x advertising %4.4x.\n",
623 dev->name, phy, mii_status, np->mii_if.advertising);
626 np->mii_preamble_required--;
629 printk(KERN_INFO "%s: No MII transceiver found, aborting. ASIC status %x\n",
630 dev->name, ioread32(ioaddr + ASICCtrl));
631 goto err_out_unregister;
634 np->mii_if.phy_id = np->phys[0];
637 /* Parse override configuration */
639 if (card_idx < MAX_UNITS) {
640 if (media[card_idx] != NULL) {
642 if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
643 strcmp (media[card_idx], "4") == 0) {
645 np->mii_if.full_duplex = 1;
646 } else if (strcmp (media[card_idx], "100mbps_hd") == 0
647 || strcmp (media[card_idx], "3") == 0) {
649 np->mii_if.full_duplex = 0;
650 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
651 strcmp (media[card_idx], "2") == 0) {
653 np->mii_if.full_duplex = 1;
654 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
655 strcmp (media[card_idx], "1") == 0) {
657 np->mii_if.full_duplex = 0;
667 if (ioread32 (ioaddr + ASICCtrl) & 0x80) {
668 /* Default 100Mbps Full */
671 np->mii_if.full_duplex = 1;
676 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_RESET);
678 /* If flow control enabled, we need to advertise it.*/
680 mdio_write (dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising | 0x0400);
681 mdio_write (dev, np->phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART);
682 /* Force media type */
683 if (!np->an_enable) {
685 mii_ctl |= (np->speed == 100) ? BMCR_SPEED100 : 0;
686 mii_ctl |= (np->mii_if.full_duplex) ? BMCR_FULLDPLX : 0;
687 mdio_write (dev, np->phys[0], MII_BMCR, mii_ctl);
688 printk (KERN_INFO "Override speed=%d, %s duplex\n",
689 np->speed, np->mii_if.full_duplex ? "Full" : "Half");
693 /* Perhaps move the reset here? */
694 /* Reset the chip to erase previous misconfiguration. */
695 if (netif_msg_hw(np))
696 printk("ASIC Control is %x.\n", ioread32(ioaddr + ASICCtrl));
697 iowrite16(0x007f, ioaddr + ASICCtrl + 2);
698 if (netif_msg_hw(np))
699 printk("ASIC Control is now %x.\n", ioread32(ioaddr + ASICCtrl));
705 unregister_netdev(dev);
707 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
709 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
711 pci_set_drvdata(pdev, NULL);
712 pci_iounmap(pdev, ioaddr);
714 pci_release_regions(pdev);
720 static int change_mtu(struct net_device *dev, int new_mtu)
722 if ((new_mtu < 68) || (new_mtu > 8191)) /* Set by RxDMAFrameLen */
724 if (netif_running(dev))
730 #define eeprom_delay(ee_addr) ioread32(ee_addr)
731 /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. */
732 static int __devinit eeprom_read(void __iomem *ioaddr, int location)
734 int boguscnt = 10000; /* Typical 1900 ticks. */
735 iowrite16(0x0200 | (location & 0xff), ioaddr + EECtrl);
737 eeprom_delay(ioaddr + EECtrl);
738 if (! (ioread16(ioaddr + EECtrl) & 0x8000)) {
739 return ioread16(ioaddr + EEData);
741 } while (--boguscnt > 0);
745 /* MII transceiver control section.
746 Read and write the MII registers using software-generated serial
747 MDIO protocol. See the MII specifications or DP83840A data sheet
750 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
751 met by back-to-back 33Mhz PCI cycles. */
752 #define mdio_delay() ioread8(mdio_addr)
755 MDIO_ShiftClk=0x0001, MDIO_Data=0x0002, MDIO_EnbOutput=0x0004,
757 #define MDIO_EnbIn (0)
758 #define MDIO_WRITE0 (MDIO_EnbOutput)
759 #define MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput)
761 /* Generate the preamble required for initial synchronization and
762 a few older transceivers. */
763 static void mdio_sync(void __iomem *mdio_addr)
767 /* Establish sync by sending at least 32 logic ones. */
768 while (--bits >= 0) {
769 iowrite8(MDIO_WRITE1, mdio_addr);
771 iowrite8(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);
776 static int mdio_read(struct net_device *dev, int phy_id, int location)
778 struct netdev_private *np = netdev_priv(dev);
779 void __iomem *mdio_addr = np->base + MIICtrl;
780 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
783 if (np->mii_preamble_required)
784 mdio_sync(mdio_addr);
786 /* Shift the read command bits out. */
787 for (i = 15; i >= 0; i--) {
788 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
790 iowrite8(dataval, mdio_addr);
792 iowrite8(dataval | MDIO_ShiftClk, mdio_addr);
795 /* Read the two transition, 16 data, and wire-idle bits. */
796 for (i = 19; i > 0; i--) {
797 iowrite8(MDIO_EnbIn, mdio_addr);
799 retval = (retval << 1) | ((ioread8(mdio_addr) & MDIO_Data) ? 1 : 0);
800 iowrite8(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
803 return (retval>>1) & 0xffff;
806 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
808 struct netdev_private *np = netdev_priv(dev);
809 void __iomem *mdio_addr = np->base + MIICtrl;
810 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value;
813 if (np->mii_preamble_required)
814 mdio_sync(mdio_addr);
816 /* Shift the command bits out. */
817 for (i = 31; i >= 0; i--) {
818 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
820 iowrite8(dataval, mdio_addr);
822 iowrite8(dataval | MDIO_ShiftClk, mdio_addr);
825 /* Clear out extra bits. */
826 for (i = 2; i > 0; i--) {
827 iowrite8(MDIO_EnbIn, mdio_addr);
829 iowrite8(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
835 static int netdev_open(struct net_device *dev)
837 struct netdev_private *np = netdev_priv(dev);
838 void __iomem *ioaddr = np->base;
841 /* Do we need to reset the chip??? */
843 i = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev);
847 if (netif_msg_ifup(np))
848 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
849 dev->name, dev->irq);
852 iowrite32(np->rx_ring_dma, ioaddr + RxListPtr);
853 /* The Tx list pointer is written as packets are queued. */
855 /* Initialize other registers. */
857 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
858 iowrite16(dev->mtu + 18, ioaddr + MaxFrameSize);
860 iowrite16(dev->mtu + 14, ioaddr + MaxFrameSize);
863 iowrite32(ioread32(ioaddr + ASICCtrl) | 0x0C, ioaddr + ASICCtrl);
865 /* Configure the PCI bus bursts and FIFO thresholds. */
867 if (dev->if_port == 0)
868 dev->if_port = np->default_port;
870 spin_lock_init(&np->mcastlock);
873 iowrite16(0, ioaddr + IntrEnable);
874 iowrite16(0, ioaddr + DownCounter);
875 /* Set the chip to poll every N*320nsec. */
876 iowrite8(100, ioaddr + RxDMAPollPeriod);
877 iowrite8(127, ioaddr + TxDMAPollPeriod);
878 /* Fix DFE-580TX packet drop issue */
879 if (np->pci_rev_id >= 0x14)
880 iowrite8(0x01, ioaddr + DebugCtrl1);
881 netif_start_queue(dev);
883 iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
885 if (netif_msg_ifup(np))
886 printk(KERN_DEBUG "%s: Done netdev_open(), status: Rx %x Tx %x "
887 "MAC Control %x, %4.4x %4.4x.\n",
888 dev->name, ioread32(ioaddr + RxStatus), ioread8(ioaddr + TxStatus),
889 ioread32(ioaddr + MACCtrl0),
890 ioread16(ioaddr + MACCtrl1), ioread16(ioaddr + MACCtrl0));
892 /* Set the timer to check for link beat. */
893 init_timer(&np->timer);
894 np->timer.expires = jiffies + 3*HZ;
895 np->timer.data = (unsigned long)dev;
896 np->timer.function = &netdev_timer; /* timer handler */
897 add_timer(&np->timer);
899 /* Enable interrupts by setting the interrupt mask. */
900 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);
905 static void check_duplex(struct net_device *dev)
907 struct netdev_private *np = netdev_priv(dev);
908 void __iomem *ioaddr = np->base;
909 int mii_lpa = mdio_read(dev, np->phys[0], MII_LPA);
910 int negotiated = mii_lpa & np->mii_if.advertising;
914 if (!np->an_enable || mii_lpa == 0xffff) {
915 if (np->mii_if.full_duplex)
916 iowrite16 (ioread16 (ioaddr + MACCtrl0) | EnbFullDuplex,
921 /* Autonegotiation */
922 duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
923 if (np->mii_if.full_duplex != duplex) {
924 np->mii_if.full_duplex = duplex;
925 if (netif_msg_link(np))
926 printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d "
927 "negotiated capability %4.4x.\n", dev->name,
928 duplex ? "full" : "half", np->phys[0], negotiated);
929 iowrite16(ioread16(ioaddr + MACCtrl0) | duplex ? 0x20 : 0, ioaddr + MACCtrl0);
933 static void netdev_timer(unsigned long data)
935 struct net_device *dev = (struct net_device *)data;
936 struct netdev_private *np = netdev_priv(dev);
937 void __iomem *ioaddr = np->base;
938 int next_tick = 10*HZ;
940 if (netif_msg_timer(np)) {
941 printk(KERN_DEBUG "%s: Media selection timer tick, intr status %4.4x, "
943 dev->name, ioread16(ioaddr + IntrEnable),
944 ioread8(ioaddr + TxStatus), ioread32(ioaddr + RxStatus));
947 np->timer.expires = jiffies + next_tick;
948 add_timer(&np->timer);
951 static void tx_timeout(struct net_device *dev)
953 struct netdev_private *np = netdev_priv(dev);
954 void __iomem *ioaddr = np->base;
957 netif_stop_queue(dev);
958 tasklet_disable(&np->tx_tasklet);
959 iowrite16(0, ioaddr + IntrEnable);
960 printk(KERN_WARNING "%s: Transmit timed out, TxStatus %2.2x "
962 " resetting...\n", dev->name, ioread8(ioaddr + TxStatus),
963 ioread8(ioaddr + TxFrameId));
967 for (i=0; i<TX_RING_SIZE; i++) {
968 printk(KERN_DEBUG "%02x %08llx %08x %08x(%02x) %08x %08x\n", i,
969 (unsigned long long)(np->tx_ring_dma + i*sizeof(*np->tx_ring)),
970 le32_to_cpu(np->tx_ring[i].next_desc),
971 le32_to_cpu(np->tx_ring[i].status),
972 (le32_to_cpu(np->tx_ring[i].status) >> 2) & 0xff,
973 le32_to_cpu(np->tx_ring[i].frag[0].addr),
974 le32_to_cpu(np->tx_ring[i].frag[0].length));
976 printk(KERN_DEBUG "TxListPtr=%08x netif_queue_stopped=%d\n",
977 ioread32(np->base + TxListPtr),
978 netif_queue_stopped(dev));
979 printk(KERN_DEBUG "cur_tx=%d(%02x) dirty_tx=%d(%02x)\n",
980 np->cur_tx, np->cur_tx % TX_RING_SIZE,
981 np->dirty_tx, np->dirty_tx % TX_RING_SIZE);
982 printk(KERN_DEBUG "cur_rx=%d dirty_rx=%d\n", np->cur_rx, np->dirty_rx);
983 printk(KERN_DEBUG "cur_task=%d\n", np->cur_task);
985 spin_lock_irqsave(&np->lock, flag);
987 /* Stop and restart the chip's Tx processes . */
989 spin_unlock_irqrestore(&np->lock, flag);
993 dev->trans_start = jiffies;
994 np->stats.tx_errors++;
995 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
996 netif_wake_queue(dev);
998 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);
999 tasklet_enable(&np->tx_tasklet);
1003 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1004 static void init_ring(struct net_device *dev)
1006 struct netdev_private *np = netdev_priv(dev);
1009 np->cur_rx = np->cur_tx = 0;
1010 np->dirty_rx = np->dirty_tx = 0;
1013 np->rx_buf_sz = (dev->mtu <= 1520 ? PKT_BUF_SZ : dev->mtu + 16);
1015 /* Initialize all Rx descriptors. */
1016 for (i = 0; i < RX_RING_SIZE; i++) {
1017 np->rx_ring[i].next_desc = cpu_to_le32(np->rx_ring_dma +
1018 ((i+1)%RX_RING_SIZE)*sizeof(*np->rx_ring));
1019 np->rx_ring[i].status = 0;
1020 np->rx_ring[i].frag[0].length = 0;
1021 np->rx_skbuff[i] = NULL;
1024 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1025 for (i = 0; i < RX_RING_SIZE; i++) {
1026 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
1027 np->rx_skbuff[i] = skb;
1030 skb->dev = dev; /* Mark as being used by this device. */
1031 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1032 np->rx_ring[i].frag[0].addr = cpu_to_le32(
1033 pci_map_single(np->pci_dev, skb->tail, np->rx_buf_sz,
1034 PCI_DMA_FROMDEVICE));
1035 np->rx_ring[i].frag[0].length = cpu_to_le32(np->rx_buf_sz | LastFrag);
1037 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1039 for (i = 0; i < TX_RING_SIZE; i++) {
1040 np->tx_skbuff[i] = NULL;
1041 np->tx_ring[i].status = 0;
1046 static void tx_poll (unsigned long data)
1048 struct net_device *dev = (struct net_device *)data;
1049 struct netdev_private *np = netdev_priv(dev);
1050 unsigned head = np->cur_task % TX_RING_SIZE;
1051 struct netdev_desc *txdesc =
1052 &np->tx_ring[(np->cur_tx - 1) % TX_RING_SIZE];
1054 /* Chain the next pointer */
1055 for (; np->cur_tx - np->cur_task > 0; np->cur_task++) {
1056 int entry = np->cur_task % TX_RING_SIZE;
1057 txdesc = &np->tx_ring[entry];
1059 np->last_tx->next_desc = cpu_to_le32(np->tx_ring_dma +
1060 entry*sizeof(struct netdev_desc));
1062 np->last_tx = txdesc;
1064 /* Indicate the latest descriptor of tx ring */
1065 txdesc->status |= cpu_to_le32(DescIntrOnTx);
1067 if (ioread32 (np->base + TxListPtr) == 0)
1068 iowrite32 (np->tx_ring_dma + head * sizeof(struct netdev_desc),
1069 np->base + TxListPtr);
1074 start_tx (struct sk_buff *skb, struct net_device *dev)
1076 struct netdev_private *np = netdev_priv(dev);
1077 struct netdev_desc *txdesc;
1080 /* Calculate the next Tx descriptor entry. */
1081 entry = np->cur_tx % TX_RING_SIZE;
1082 np->tx_skbuff[entry] = skb;
1083 txdesc = &np->tx_ring[entry];
1085 txdesc->next_desc = 0;
1086 txdesc->status = cpu_to_le32 ((entry << 2) | DisableAlign);
1087 txdesc->frag[0].addr = cpu_to_le32 (pci_map_single (np->pci_dev, skb->data,
1090 txdesc->frag[0].length = cpu_to_le32 (skb->len | LastFrag);
1092 /* Increment cur_tx before tasklet_schedule() */
1095 /* Schedule a tx_poll() task */
1096 tasklet_schedule(&np->tx_tasklet);
1098 /* On some architectures: explicitly flush cache lines here. */
1099 if (np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 1
1100 && !netif_queue_stopped(dev)) {
1103 netif_stop_queue (dev);
1105 dev->trans_start = jiffies;
1106 if (netif_msg_tx_queued(np)) {
1108 "%s: Transmit frame #%d queued in slot %d.\n",
1109 dev->name, np->cur_tx, entry);
1114 /* Reset hardware tx and free all of tx buffers */
1116 reset_tx (struct net_device *dev)
1118 struct netdev_private *np = netdev_priv(dev);
1119 void __iomem *ioaddr = np->base;
1120 struct sk_buff *skb;
1122 int irq = in_interrupt();
1124 /* Reset tx logic, TxListPtr will be cleaned */
1125 iowrite16 (TxDisable, ioaddr + MACCtrl1);
1126 iowrite16 (TxReset | DMAReset | FIFOReset | NetworkReset,
1127 ioaddr + ASICCtrl + 2);
1128 for (i=50; i > 0; i--) {
1129 if ((ioread16(ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
1133 /* free all tx skbuff */
1134 for (i = 0; i < TX_RING_SIZE; i++) {
1135 skb = np->tx_skbuff[i];
1137 pci_unmap_single(np->pci_dev,
1138 np->tx_ring[i].frag[0].addr, skb->len,
1141 dev_kfree_skb_irq (skb);
1143 dev_kfree_skb (skb);
1144 np->tx_skbuff[i] = NULL;
1145 np->stats.tx_dropped++;
1148 np->cur_tx = np->dirty_tx = 0;
1150 iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
1154 /* The interrupt handler cleans up after the Tx thread,
1155 and schedule a Rx thread work */
1156 static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
1158 struct net_device *dev = (struct net_device *)dev_instance;
1159 struct netdev_private *np = netdev_priv(dev);
1160 void __iomem *ioaddr = np->base;
1168 int intr_status = ioread16(ioaddr + IntrStatus);
1169 iowrite16(intr_status, ioaddr + IntrStatus);
1171 if (netif_msg_intr(np))
1172 printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",
1173 dev->name, intr_status);
1175 if (!(intr_status & DEFAULT_INTR))
1180 if (intr_status & (IntrRxDMADone)) {
1181 iowrite16(DEFAULT_INTR & ~(IntrRxDone|IntrRxDMADone),
1182 ioaddr + IntrEnable);
1184 np->budget = RX_BUDGET;
1185 tasklet_schedule(&np->rx_tasklet);
1187 if (intr_status & (IntrTxDone | IntrDrvRqst)) {
1188 tx_status = ioread16 (ioaddr + TxStatus);
1189 for (tx_cnt=32; tx_status & 0x80; --tx_cnt) {
1190 if (netif_msg_tx_done(np))
1192 ("%s: Transmit status is %2.2x.\n",
1193 dev->name, tx_status);
1194 if (tx_status & 0x1e) {
1195 np->stats.tx_errors++;
1196 if (tx_status & 0x10)
1197 np->stats.tx_fifo_errors++;
1198 if (tx_status & 0x08)
1199 np->stats.collisions++;
1200 if (tx_status & 0x02)
1201 np->stats.tx_window_errors++;
1202 /* This reset has not been verified!. */
1203 if (tx_status & 0x10) { /* Reset the Tx. */
1204 np->stats.tx_fifo_errors++;
1205 spin_lock(&np->lock);
1207 spin_unlock(&np->lock);
1209 if (tx_status & 0x1e) /* Restart the Tx. */
1210 iowrite16 (TxEnable,
1213 /* Yup, this is a documentation bug. It cost me *hours*. */
1214 iowrite16 (0, ioaddr + TxStatus);
1216 iowrite32(5000, ioaddr + DownCounter);
1219 tx_status = ioread16 (ioaddr + TxStatus);
1221 hw_frame_id = (tx_status >> 8) & 0xff;
1223 hw_frame_id = ioread8(ioaddr + TxFrameId);
1226 if (np->pci_rev_id >= 0x14) {
1227 spin_lock(&np->lock);
1228 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
1229 int entry = np->dirty_tx % TX_RING_SIZE;
1230 struct sk_buff *skb;
1232 sw_frame_id = (le32_to_cpu(
1233 np->tx_ring[entry].status) >> 2) & 0xff;
1234 if (sw_frame_id == hw_frame_id &&
1235 !(le32_to_cpu(np->tx_ring[entry].status)
1238 if (sw_frame_id == (hw_frame_id + 1) %
1241 skb = np->tx_skbuff[entry];
1242 /* Free the original skb. */
1243 pci_unmap_single(np->pci_dev,
1244 np->tx_ring[entry].frag[0].addr,
1245 skb->len, PCI_DMA_TODEVICE);
1246 dev_kfree_skb_irq (np->tx_skbuff[entry]);
1247 np->tx_skbuff[entry] = NULL;
1248 np->tx_ring[entry].frag[0].addr = 0;
1249 np->tx_ring[entry].frag[0].length = 0;
1251 spin_unlock(&np->lock);
1253 spin_lock(&np->lock);
1254 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
1255 int entry = np->dirty_tx % TX_RING_SIZE;
1256 struct sk_buff *skb;
1257 if (!(le32_to_cpu(np->tx_ring[entry].status)
1260 skb = np->tx_skbuff[entry];
1261 /* Free the original skb. */
1262 pci_unmap_single(np->pci_dev,
1263 np->tx_ring[entry].frag[0].addr,
1264 skb->len, PCI_DMA_TODEVICE);
1265 dev_kfree_skb_irq (np->tx_skbuff[entry]);
1266 np->tx_skbuff[entry] = NULL;
1267 np->tx_ring[entry].frag[0].addr = 0;
1268 np->tx_ring[entry].frag[0].length = 0;
1270 spin_unlock(&np->lock);
1273 if (netif_queue_stopped(dev) &&
1274 np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
1275 /* The ring is no longer full, clear busy flag. */
1276 netif_wake_queue (dev);
1278 /* Abnormal error summary/uncommon events handlers. */
1279 if (intr_status & (IntrPCIErr | LinkChange | StatsMax))
1280 netdev_error(dev, intr_status);
1282 if (netif_msg_intr(np))
1283 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1284 dev->name, ioread16(ioaddr + IntrStatus));
1285 return IRQ_RETVAL(handled);
1288 static void rx_poll(unsigned long data)
1290 struct net_device *dev = (struct net_device *)data;
1291 struct netdev_private *np = netdev_priv(dev);
1292 int entry = np->cur_rx % RX_RING_SIZE;
1293 int boguscnt = np->budget;
1294 void __iomem *ioaddr = np->base;
1297 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1299 struct netdev_desc *desc = &(np->rx_ring[entry]);
1300 u32 frame_status = le32_to_cpu(desc->status);
1303 if (--boguscnt < 0) {
1306 if (!(frame_status & DescOwn))
1308 pkt_len = frame_status & 0x1fff; /* Chip omits the CRC. */
1309 if (netif_msg_rx_status(np))
1310 printk(KERN_DEBUG " netdev_rx() status was %8.8x.\n",
1312 if (frame_status & 0x001f4000) {
1313 /* There was a error. */
1314 if (netif_msg_rx_err(np))
1315 printk(KERN_DEBUG " netdev_rx() Rx error was %8.8x.\n",
1317 np->stats.rx_errors++;
1318 if (frame_status & 0x00100000) np->stats.rx_length_errors++;
1319 if (frame_status & 0x00010000) np->stats.rx_fifo_errors++;
1320 if (frame_status & 0x00060000) np->stats.rx_frame_errors++;
1321 if (frame_status & 0x00080000) np->stats.rx_crc_errors++;
1322 if (frame_status & 0x00100000) {
1323 printk(KERN_WARNING "%s: Oversized Ethernet frame,"
1325 dev->name, frame_status);
1328 struct sk_buff *skb;
1329 #ifndef final_version
1330 if (netif_msg_rx_status(np))
1331 printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d"
1332 ", bogus_cnt %d.\n",
1335 /* Check if the packet is long enough to accept without copying
1336 to a minimally-sized skbuff. */
1337 if (pkt_len < rx_copybreak
1338 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1340 skb_reserve(skb, 2); /* 16 byte align the IP header */
1341 pci_dma_sync_single_for_cpu(np->pci_dev,
1344 PCI_DMA_FROMDEVICE);
1346 eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0);
1347 pci_dma_sync_single_for_device(np->pci_dev,
1350 PCI_DMA_FROMDEVICE);
1351 skb_put(skb, pkt_len);
1353 pci_unmap_single(np->pci_dev,
1356 PCI_DMA_FROMDEVICE);
1357 skb_put(skb = np->rx_skbuff[entry], pkt_len);
1358 np->rx_skbuff[entry] = NULL;
1360 skb->protocol = eth_type_trans(skb, dev);
1361 /* Note: checksum -> skb->ip_summed = CHECKSUM_UNNECESSARY; */
1363 dev->last_rx = jiffies;
1365 entry = (entry + 1) % RX_RING_SIZE;
1370 np->budget -= received;
1371 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);
1379 np->budget -= received;
1380 if (np->budget <= 0)
1381 np->budget = RX_BUDGET;
1382 tasklet_schedule(&np->rx_tasklet);
1386 static void refill_rx (struct net_device *dev)
1388 struct netdev_private *np = netdev_priv(dev);
1392 /* Refill the Rx ring buffers. */
1393 for (;(np->cur_rx - np->dirty_rx + RX_RING_SIZE) % RX_RING_SIZE > 0;
1394 np->dirty_rx = (np->dirty_rx + 1) % RX_RING_SIZE) {
1395 struct sk_buff *skb;
1396 entry = np->dirty_rx % RX_RING_SIZE;
1397 if (np->rx_skbuff[entry] == NULL) {
1398 skb = dev_alloc_skb(np->rx_buf_sz);
1399 np->rx_skbuff[entry] = skb;
1401 break; /* Better luck next round. */
1402 skb->dev = dev; /* Mark as being used by this device. */
1403 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1404 np->rx_ring[entry].frag[0].addr = cpu_to_le32(
1405 pci_map_single(np->pci_dev, skb->tail,
1406 np->rx_buf_sz, PCI_DMA_FROMDEVICE));
1408 /* Perhaps we need not reset this field. */
1409 np->rx_ring[entry].frag[0].length =
1410 cpu_to_le32(np->rx_buf_sz | LastFrag);
1411 np->rx_ring[entry].status = 0;
1416 static void netdev_error(struct net_device *dev, int intr_status)
1418 struct netdev_private *np = netdev_priv(dev);
1419 void __iomem *ioaddr = np->base;
1420 u16 mii_ctl, mii_advertise, mii_lpa;
1423 if (intr_status & LinkChange) {
1424 if (np->an_enable) {
1425 mii_advertise = mdio_read (dev, np->phys[0], MII_ADVERTISE);
1426 mii_lpa= mdio_read (dev, np->phys[0], MII_LPA);
1427 mii_advertise &= mii_lpa;
1428 printk (KERN_INFO "%s: Link changed: ", dev->name);
1429 if (mii_advertise & ADVERTISE_100FULL) {
1431 printk ("100Mbps, full duplex\n");
1432 } else if (mii_advertise & ADVERTISE_100HALF) {
1434 printk ("100Mbps, half duplex\n");
1435 } else if (mii_advertise & ADVERTISE_10FULL) {
1437 printk ("10Mbps, full duplex\n");
1438 } else if (mii_advertise & ADVERTISE_10HALF) {
1440 printk ("10Mbps, half duplex\n");
1445 mii_ctl = mdio_read (dev, np->phys[0], MII_BMCR);
1446 speed = (mii_ctl & BMCR_SPEED100) ? 100 : 10;
1448 printk (KERN_INFO "%s: Link changed: %dMbps ,",
1450 printk ("%s duplex.\n", (mii_ctl & BMCR_FULLDPLX) ?
1454 if (np->flowctrl && np->mii_if.full_duplex) {
1455 iowrite16(ioread16(ioaddr + MulticastFilter1+2) | 0x0200,
1456 ioaddr + MulticastFilter1+2);
1457 iowrite16(ioread16(ioaddr + MACCtrl0) | EnbFlowCtrl,
1461 if (intr_status & StatsMax) {
1464 if (intr_status & IntrPCIErr) {
1465 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1466 dev->name, intr_status);
1467 /* We must do a global reset of DMA to continue. */
1471 static struct net_device_stats *get_stats(struct net_device *dev)
1473 struct netdev_private *np = netdev_priv(dev);
1474 void __iomem *ioaddr = np->base;
1477 /* We should lock this segment of code for SMP eventually, although
1478 the vulnerability window is very small and statistics are
1480 /* The chip only need report frame silently dropped. */
1481 np->stats.rx_missed_errors += ioread8(ioaddr + RxMissed);
1482 np->stats.tx_packets += ioread16(ioaddr + TxFramesOK);
1483 np->stats.rx_packets += ioread16(ioaddr + RxFramesOK);
1484 np->stats.collisions += ioread8(ioaddr + StatsLateColl);
1485 np->stats.collisions += ioread8(ioaddr + StatsMultiColl);
1486 np->stats.collisions += ioread8(ioaddr + StatsOneColl);
1487 np->stats.tx_carrier_errors += ioread8(ioaddr + StatsCarrierError);
1488 ioread8(ioaddr + StatsTxDefer);
1489 for (i = StatsTxDefer; i <= StatsMcastRx; i++)
1490 ioread8(ioaddr + i);
1491 np->stats.tx_bytes += ioread16(ioaddr + TxOctetsLow);
1492 np->stats.tx_bytes += ioread16(ioaddr + TxOctetsHigh) << 16;
1493 np->stats.rx_bytes += ioread16(ioaddr + RxOctetsLow);
1494 np->stats.rx_bytes += ioread16(ioaddr + RxOctetsHigh) << 16;
1499 static void set_rx_mode(struct net_device *dev)
1501 struct netdev_private *np = netdev_priv(dev);
1502 void __iomem *ioaddr = np->base;
1503 u16 mc_filter[4]; /* Multicast hash filter */
1507 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1508 /* Unconditionally log net taps. */
1509 printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
1510 memset(mc_filter, 0xff, sizeof(mc_filter));
1511 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptAll | AcceptMyPhys;
1512 } else if ((dev->mc_count > multicast_filter_limit)
1513 || (dev->flags & IFF_ALLMULTI)) {
1514 /* Too many to match, or accept all multicasts. */
1515 memset(mc_filter, 0xff, sizeof(mc_filter));
1516 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
1517 } else if (dev->mc_count) {
1518 struct dev_mc_list *mclist;
1522 memset (mc_filter, 0, sizeof (mc_filter));
1523 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1524 i++, mclist = mclist->next) {
1525 crc = ether_crc_le (ETH_ALEN, mclist->dmi_addr);
1526 for (index=0, bit=0; bit < 6; bit++, crc <<= 1)
1527 if (crc & 0x80000000) index |= 1 << bit;
1528 mc_filter[index/16] |= (1 << (index % 16));
1530 rx_mode = AcceptBroadcast | AcceptMultiHash | AcceptMyPhys;
1532 iowrite8(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode);
1535 if (np->mii_if.full_duplex && np->flowctrl)
1536 mc_filter[3] |= 0x0200;
1538 for (i = 0; i < 4; i++)
1539 iowrite16(mc_filter[i], ioaddr + MulticastFilter0 + i*2);
1540 iowrite8(rx_mode, ioaddr + RxMode);
1543 static int __set_mac_addr(struct net_device *dev)
1545 struct netdev_private *np = netdev_priv(dev);
1548 addr16 = (dev->dev_addr[0] | (dev->dev_addr[1] << 8));
1549 iowrite16(addr16, np->base + StationAddr);
1550 addr16 = (dev->dev_addr[2] | (dev->dev_addr[3] << 8));
1551 iowrite16(addr16, np->base + StationAddr+2);
1552 addr16 = (dev->dev_addr[4] | (dev->dev_addr[5] << 8));
1553 iowrite16(addr16, np->base + StationAddr+4);
1557 static int check_if_running(struct net_device *dev)
1559 if (!netif_running(dev))
1564 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1566 struct netdev_private *np = netdev_priv(dev);
1567 strcpy(info->driver, DRV_NAME);
1568 strcpy(info->version, DRV_VERSION);
1569 strcpy(info->bus_info, pci_name(np->pci_dev));
1572 static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1574 struct netdev_private *np = netdev_priv(dev);
1575 spin_lock_irq(&np->lock);
1576 mii_ethtool_gset(&np->mii_if, ecmd);
1577 spin_unlock_irq(&np->lock);
1581 static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1583 struct netdev_private *np = netdev_priv(dev);
1585 spin_lock_irq(&np->lock);
1586 res = mii_ethtool_sset(&np->mii_if, ecmd);
1587 spin_unlock_irq(&np->lock);
1591 static int nway_reset(struct net_device *dev)
1593 struct netdev_private *np = netdev_priv(dev);
1594 return mii_nway_restart(&np->mii_if);
1597 static u32 get_link(struct net_device *dev)
1599 struct netdev_private *np = netdev_priv(dev);
1600 return mii_link_ok(&np->mii_if);
1603 static u32 get_msglevel(struct net_device *dev)
1605 struct netdev_private *np = netdev_priv(dev);
1606 return np->msg_enable;
1609 static void set_msglevel(struct net_device *dev, u32 val)
1611 struct netdev_private *np = netdev_priv(dev);
1612 np->msg_enable = val;
1615 static struct ethtool_ops ethtool_ops = {
1616 .begin = check_if_running,
1617 .get_drvinfo = get_drvinfo,
1618 .get_settings = get_settings,
1619 .set_settings = set_settings,
1620 .nway_reset = nway_reset,
1621 .get_link = get_link,
1622 .get_msglevel = get_msglevel,
1623 .set_msglevel = set_msglevel,
1626 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1628 struct netdev_private *np = netdev_priv(dev);
1629 void __iomem *ioaddr = np->base;
1633 if (!netif_running(dev))
1636 spin_lock_irq(&np->lock);
1637 rc = generic_mii_ioctl(&np->mii_if, if_mii(rq), cmd, NULL);
1638 spin_unlock_irq(&np->lock);
1640 case SIOCDEVPRIVATE:
1641 for (i=0; i<TX_RING_SIZE; i++) {
1642 printk(KERN_DEBUG "%02x %08llx %08x %08x(%02x) %08x %08x\n", i,
1643 (unsigned long long)(np->tx_ring_dma + i*sizeof(*np->tx_ring)),
1644 le32_to_cpu(np->tx_ring[i].next_desc),
1645 le32_to_cpu(np->tx_ring[i].status),
1646 (le32_to_cpu(np->tx_ring[i].status) >> 2)
1648 le32_to_cpu(np->tx_ring[i].frag[0].addr),
1649 le32_to_cpu(np->tx_ring[i].frag[0].length));
1651 printk(KERN_DEBUG "TxListPtr=%08x netif_queue_stopped=%d\n",
1652 ioread32(np->base + TxListPtr),
1653 netif_queue_stopped(dev));
1654 printk(KERN_DEBUG "cur_tx=%d(%02x) dirty_tx=%d(%02x)\n",
1655 np->cur_tx, np->cur_tx % TX_RING_SIZE,
1656 np->dirty_tx, np->dirty_tx % TX_RING_SIZE);
1657 printk(KERN_DEBUG "cur_rx=%d dirty_rx=%d\n", np->cur_rx, np->dirty_rx);
1658 printk(KERN_DEBUG "cur_task=%d\n", np->cur_task);
1659 printk(KERN_DEBUG "TxStatus=%04x\n", ioread16(ioaddr + TxStatus));
1667 static int netdev_close(struct net_device *dev)
1669 struct netdev_private *np = netdev_priv(dev);
1670 void __iomem *ioaddr = np->base;
1671 struct sk_buff *skb;
1674 netif_stop_queue(dev);
1676 if (netif_msg_ifdown(np)) {
1677 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %2.2x "
1678 "Rx %4.4x Int %2.2x.\n",
1679 dev->name, ioread8(ioaddr + TxStatus),
1680 ioread32(ioaddr + RxStatus), ioread16(ioaddr + IntrStatus));
1681 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1682 dev->name, np->cur_tx, np->dirty_tx, np->cur_rx, np->dirty_rx);
1685 /* Disable interrupts by clearing the interrupt mask. */
1686 iowrite16(0x0000, ioaddr + IntrEnable);
1688 /* Stop the chip's Tx and Rx processes. */
1689 iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);
1691 /* Wait and kill tasklet */
1692 tasklet_kill(&np->rx_tasklet);
1693 tasklet_kill(&np->tx_tasklet);
1696 if (netif_msg_hw(np)) {
1697 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1698 (int)(np->tx_ring_dma));
1699 for (i = 0; i < TX_RING_SIZE; i++)
1700 printk(" #%d desc. %4.4x %8.8x %8.8x.\n",
1701 i, np->tx_ring[i].status, np->tx_ring[i].frag[0].addr,
1702 np->tx_ring[i].frag[0].length);
1703 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1704 (int)(np->rx_ring_dma));
1705 for (i = 0; i < /*RX_RING_SIZE*/4 ; i++) {
1706 printk(KERN_DEBUG " #%d desc. %4.4x %4.4x %8.8x\n",
1707 i, np->rx_ring[i].status, np->rx_ring[i].frag[0].addr,
1708 np->rx_ring[i].frag[0].length);
1711 #endif /* __i386__ debugging only */
1713 free_irq(dev->irq, dev);
1715 del_timer_sync(&np->timer);
1717 /* Free all the skbuffs in the Rx queue. */
1718 for (i = 0; i < RX_RING_SIZE; i++) {
1719 np->rx_ring[i].status = 0;
1720 np->rx_ring[i].frag[0].addr = 0xBADF00D0; /* An invalid address. */
1721 skb = np->rx_skbuff[i];
1723 pci_unmap_single(np->pci_dev,
1724 np->rx_ring[i].frag[0].addr, np->rx_buf_sz,
1725 PCI_DMA_FROMDEVICE);
1727 np->rx_skbuff[i] = NULL;
1730 for (i = 0; i < TX_RING_SIZE; i++) {
1731 skb = np->tx_skbuff[i];
1733 pci_unmap_single(np->pci_dev,
1734 np->tx_ring[i].frag[0].addr, skb->len,
1737 np->tx_skbuff[i] = NULL;
1744 static void __devexit sundance_remove1 (struct pci_dev *pdev)
1746 struct net_device *dev = pci_get_drvdata(pdev);
1749 struct netdev_private *np = netdev_priv(dev);
1751 unregister_netdev(dev);
1752 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring,
1754 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring,
1756 pci_iounmap(pdev, np->base);
1757 pci_release_regions(pdev);
1759 pci_set_drvdata(pdev, NULL);
1763 static struct pci_driver sundance_driver = {
1765 .id_table = sundance_pci_tbl,
1766 .probe = sundance_probe1,
1767 .remove = __devexit_p(sundance_remove1),
1770 static int __init sundance_init(void)
1772 /* when a module, this is printed whether or not devices are found in probe */
1776 return pci_module_init(&sundance_driver);
1779 static void __exit sundance_exit(void)
1781 pci_unregister_driver(&sundance_driver);
1784 module_init(sundance_init);
1785 module_exit(sundance_exit);