1 /* $Id: sunhme.c,v 1.124 2002/01/15 06:25:51 davem Exp $
2 * sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
3 * auto carrier detecting ethernet driver. Also known as the
4 * "Happy Meal Ethernet" found on SunSwift SBUS cards.
6 * Copyright (C) 1996, 1998, 1999, 2002, 2003 David S. Miller (davem@redhat.com)
9 * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10 * - port to non-sparc architectures. Tested only on x86 and
11 * only currently works with QFE PCI cards.
12 * - ability to specify the MAC address at module load time by passing this
13 * argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
16 static char version[] =
17 "sunhme.c:v2.02 24/Aug/2003 David S. Miller (davem@redhat.com)\n";
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
27 #include <linux/slab.h>
28 #include <linux/string.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/ethtool.h>
32 #include <linux/mii.h>
33 #include <linux/crc32.h>
34 #include <linux/random.h>
35 #include <linux/errno.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
40 #include <asm/system.h>
41 #include <asm/bitops.h>
44 #include <asm/byteorder.h>
47 #include <asm/idprom.h>
49 #include <asm/openprom.h>
50 #include <asm/oplib.h>
51 #include <asm/auxio.h>
53 #include <asm/io-unit.h>
56 #include <asm/uaccess.h>
58 #include <asm/pgtable.h>
62 #include <linux/pci.h>
71 static int macaddr[6];
73 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
74 MODULE_PARM(macaddr, "6i");
75 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
76 MODULE_LICENSE("GPL");
78 static struct happy_meal *root_happy_dev;
81 static struct quattro *qfe_sbus_list;
85 static struct quattro *qfe_pci_list;
95 struct hme_tx_logent {
99 #define TXLOG_ACTION_IRQ 0x01
100 #define TXLOG_ACTION_TXMIT 0x02
101 #define TXLOG_ACTION_TBUSY 0x04
102 #define TXLOG_ACTION_NBUFS 0x08
105 #define TX_LOG_LEN 128
106 static struct hme_tx_logent tx_log[TX_LOG_LEN];
107 static int txlog_cur_entry;
108 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
110 struct hme_tx_logent *tlp;
114 tlp = &tx_log[txlog_cur_entry];
115 tlp->tstamp = (unsigned int)jiffies;
116 tlp->tx_new = hp->tx_new;
117 tlp->tx_old = hp->tx_old;
120 txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
121 restore_flags(flags);
123 static __inline__ void tx_dump_log(void)
127 this = txlog_cur_entry;
128 for (i = 0; i < TX_LOG_LEN; i++) {
129 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
131 tx_log[this].tx_new, tx_log[this].tx_old,
132 tx_log[this].action, tx_log[this].status);
133 this = (this + 1) & (TX_LOG_LEN - 1);
136 static __inline__ void tx_dump_ring(struct happy_meal *hp)
138 struct hmeal_init_block *hb = hp->happy_block;
139 struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
142 for (i = 0; i < TX_RING_SIZE; i+=4) {
143 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
145 le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
146 le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
147 le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
148 le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
152 #define tx_add_log(hp, a, s) do { } while(0)
153 #define tx_dump_log() do { } while(0)
154 #define tx_dump_ring(hp) do { } while(0)
158 #define HMD(x) printk x
163 /* #define AUTO_SWITCH_DEBUG */
165 #ifdef AUTO_SWITCH_DEBUG
166 #define ASD(x) printk x
171 #define DEFAULT_IPG0 16 /* For lance-mode only */
172 #define DEFAULT_IPG1 8 /* For all modes */
173 #define DEFAULT_IPG2 4 /* For all modes */
174 #define DEFAULT_JAMSIZE 4 /* Toe jam */
177 /* This happy_pci_ids is declared __initdata because it is only used
178 as an advisory to depmod. If this is ported to the new PCI interface
179 where it could be referenced at any time due to hot plugging,
180 the __initdata reference should be removed. */
182 struct pci_device_id happymeal_pci_ids[] = {
184 .vendor = PCI_VENDOR_ID_SUN,
185 .device = PCI_DEVICE_ID_SUN_HAPPYMEAL,
186 .subvendor = PCI_ANY_ID,
187 .subdevice = PCI_ANY_ID,
189 { } /* Terminating entry */
192 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
196 /* NOTE: In the descriptor writes one _must_ write the address
197 * member _first_. The card must not be allowed to see
198 * the updated descriptor flags until the address is
199 * correct. I've added a write memory barrier between
200 * the two stores so that I can sleep well at night... -DaveM
203 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
204 static void sbus_hme_write32(unsigned long reg, u32 val)
206 sbus_writel(val, reg);
209 static u32 sbus_hme_read32(unsigned long reg)
211 return sbus_readl(reg);
214 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
218 rxd->rx_flags = flags;
221 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
225 txd->tx_flags = flags;
228 static u32 sbus_hme_read_desc32(u32 *p)
233 static void pci_hme_write32(unsigned long reg, u32 val)
238 static u32 pci_hme_read32(unsigned long reg)
243 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
245 rxd->rx_addr = cpu_to_le32(addr);
247 rxd->rx_flags = cpu_to_le32(flags);
250 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
252 txd->tx_addr = cpu_to_le32(addr);
254 txd->tx_flags = cpu_to_le32(flags);
257 static u32 pci_hme_read_desc32(u32 *p)
259 return cpu_to_le32p(p);
262 #define hme_write32(__hp, __reg, __val) \
263 ((__hp)->write32((__reg), (__val)))
264 #define hme_read32(__hp, __reg) \
265 ((__hp)->read32(__reg))
266 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
267 ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
268 #define hme_write_txd(__hp, __txd, __flags, __addr) \
269 ((__hp)->write_txd((__txd), (__flags), (__addr)))
270 #define hme_read_desc32(__hp, __p) \
271 ((__hp)->read_desc32(__p))
272 #define hme_dma_map(__hp, __ptr, __size, __dir) \
273 ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
274 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
275 ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
276 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
277 ((__hp)->dma_sync_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir)))
278 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
279 ((__hp)->dma_sync_for_device((__hp)->happy_dev, (__addr), (__size), (__dir)))
282 /* SBUS only compilation */
283 #define hme_write32(__hp, __reg, __val) \
284 sbus_writel((__val), (__reg))
285 #define hme_read32(__hp, __reg) \
287 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
288 do { (__rxd)->rx_addr = (__addr); \
290 (__rxd)->rx_flags = (__flags); \
292 #define hme_write_txd(__hp, __txd, __flags, __addr) \
293 do { (__txd)->tx_addr = (__addr); \
295 (__txd)->tx_flags = (__flags); \
297 #define hme_read_desc32(__hp, __p) (*(__p))
298 #define hme_dma_map(__hp, __ptr, __size, __dir) \
299 sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
300 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
301 sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
302 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
303 sbus_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
304 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
305 sbus_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
307 /* PCI only compilation */
308 #define hme_write32(__hp, __reg, __val) \
309 writel((__val), (__reg))
310 #define hme_read32(__hp, __reg) \
312 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
313 do { (__rxd)->rx_addr = cpu_to_le32(__addr); \
315 (__rxd)->rx_flags = cpu_to_le32(__flags); \
317 #define hme_write_txd(__hp, __txd, __flags, __addr) \
318 do { (__txd)->tx_addr = cpu_to_le32(__addr); \
320 (__txd)->tx_flags = cpu_to_le32(__flags); \
322 #define hme_read_desc32(__hp, __p) cpu_to_le32p(__p)
323 #define hme_dma_map(__hp, __ptr, __size, __dir) \
324 pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
325 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
326 pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
327 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
328 pci_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
329 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
330 pci_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
335 #ifdef SBUS_DMA_BIDIRECTIONAL
336 # define DMA_BIDIRECTIONAL SBUS_DMA_BIDIRECTIONAL
338 # define DMA_BIDIRECTIONAL 0
341 #ifdef SBUS_DMA_FROMDEVICE
342 # define DMA_FROMDEVICE SBUS_DMA_FROMDEVICE
344 # define DMA_TODEVICE 1
347 #ifdef SBUS_DMA_TODEVICE
348 # define DMA_TODEVICE SBUS_DMA_TODEVICE
350 # define DMA_FROMDEVICE 2
354 /* Oh yes, the MIF BitBang is mighty fun to program. BitBucket is more like it. */
355 static void BB_PUT_BIT(struct happy_meal *hp, unsigned long tregs, int bit)
357 hme_write32(hp, tregs + TCVR_BBDATA, bit);
358 hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
359 hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
363 static u32 BB_GET_BIT(struct happy_meal *hp, unsigned long tregs, int internal)
367 hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
368 hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
369 ret = hme_read32(hp, tregs + TCVR_CFG);
371 ret &= TCV_CFG_MDIO0;
373 ret &= TCV_CFG_MDIO1;
379 static u32 BB_GET_BIT2(struct happy_meal *hp, unsigned long tregs, int internal)
383 hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
385 retval = hme_read32(hp, tregs + TCVR_CFG);
387 retval &= TCV_CFG_MDIO0;
389 retval &= TCV_CFG_MDIO1;
390 hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
395 #define TCVR_FAILURE 0x80000000 /* Impossible MIF read value */
397 static int happy_meal_bb_read(struct happy_meal *hp,
398 unsigned long tregs, int reg)
404 ASD(("happy_meal_bb_read: reg=%d ", reg));
406 /* Enable the MIF BitBang outputs. */
407 hme_write32(hp, tregs + TCVR_BBOENAB, 1);
409 /* Force BitBang into the idle state. */
410 for (i = 0; i < 32; i++)
411 BB_PUT_BIT(hp, tregs, 1);
413 /* Give it the read sequence. */
414 BB_PUT_BIT(hp, tregs, 0);
415 BB_PUT_BIT(hp, tregs, 1);
416 BB_PUT_BIT(hp, tregs, 1);
417 BB_PUT_BIT(hp, tregs, 0);
419 /* Give it the PHY address. */
420 tmp = hp->paddr & 0xff;
421 for (i = 4; i >= 0; i--)
422 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
424 /* Tell it what register we want to read. */
426 for (i = 4; i >= 0; i--)
427 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
429 /* Close down the MIF BitBang outputs. */
430 hme_write32(hp, tregs + TCVR_BBOENAB, 0);
432 /* Now read in the value. */
433 (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
434 for (i = 15; i >= 0; i--)
435 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
436 (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
437 (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
438 (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
439 ASD(("value=%x\n", retval));
443 static void happy_meal_bb_write(struct happy_meal *hp,
444 unsigned long tregs, int reg,
445 unsigned short value)
450 ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
452 /* Enable the MIF BitBang outputs. */
453 hme_write32(hp, tregs + TCVR_BBOENAB, 1);
455 /* Force BitBang into the idle state. */
456 for (i = 0; i < 32; i++)
457 BB_PUT_BIT(hp, tregs, 1);
459 /* Give it write sequence. */
460 BB_PUT_BIT(hp, tregs, 0);
461 BB_PUT_BIT(hp, tregs, 1);
462 BB_PUT_BIT(hp, tregs, 0);
463 BB_PUT_BIT(hp, tregs, 1);
465 /* Give it the PHY address. */
466 tmp = (hp->paddr & 0xff);
467 for (i = 4; i >= 0; i--)
468 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
470 /* Tell it what register we will be writing. */
472 for (i = 4; i >= 0; i--)
473 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
475 /* Tell it to become ready for the bits. */
476 BB_PUT_BIT(hp, tregs, 1);
477 BB_PUT_BIT(hp, tregs, 0);
479 for (i = 15; i >= 0; i--)
480 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
482 /* Close down the MIF BitBang outputs. */
483 hme_write32(hp, tregs + TCVR_BBOENAB, 0);
486 #define TCVR_READ_TRIES 16
488 static int happy_meal_tcvr_read(struct happy_meal *hp,
489 unsigned long tregs, int reg)
491 int tries = TCVR_READ_TRIES;
494 ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
495 if (hp->tcvr_type == none) {
496 ASD(("no transceiver, value=TCVR_FAILURE\n"));
500 if (!(hp->happy_flags & HFLAG_FENABLE)) {
501 ASD(("doing bit bang\n"));
502 return happy_meal_bb_read(hp, tregs, reg);
505 hme_write32(hp, tregs + TCVR_FRAME,
506 (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
507 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
510 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
513 retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
514 ASD(("value=%04x\n", retval));
518 #define TCVR_WRITE_TRIES 16
520 static void happy_meal_tcvr_write(struct happy_meal *hp,
521 unsigned long tregs, int reg,
522 unsigned short value)
524 int tries = TCVR_WRITE_TRIES;
526 ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
528 /* Welcome to Sun Microsystems, can I take your order please? */
529 if (!(hp->happy_flags & HFLAG_FENABLE))
530 return happy_meal_bb_write(hp, tregs, reg, value);
532 /* Would you like fries with that? */
533 hme_write32(hp, tregs + TCVR_FRAME,
534 (FRAME_WRITE | (hp->paddr << 23) |
535 ((reg & 0xff) << 18) | (value & 0xffff)));
536 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
541 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
543 /* Fifty-two cents is your change, have a nice day. */
546 /* Auto negotiation. The scheme is very simple. We have a timer routine
547 * that keeps watching the auto negotiation process as it progresses.
548 * The DP83840 is first told to start doing it's thing, we set up the time
549 * and place the timer state machine in it's initial state.
551 * Here the timer peeks at the DP83840 status registers at each click to see
552 * if the auto negotiation has completed, we assume here that the DP83840 PHY
553 * will time out at some point and just tell us what (didn't) happen. For
554 * complete coverage we only allow so many of the ticks at this level to run,
555 * when this has expired we print a warning message and try another strategy.
556 * This "other" strategy is to force the interface into various speed/duplex
557 * configurations and we stop when we see a link-up condition before the
558 * maximum number of "peek" ticks have occurred.
560 * Once a valid link status has been detected we configure the BigMAC and
561 * the rest of the Happy Meal to speak the most efficient protocol we could
562 * get a clean link for. The priority for link configurations, highest first
564 * 100 Base-T Full Duplex
565 * 100 Base-T Half Duplex
566 * 10 Base-T Full Duplex
567 * 10 Base-T Half Duplex
569 * We start a new timer now, after a successful auto negotiation status has
570 * been detected. This timer just waits for the link-up bit to get set in
571 * the BMCR of the DP83840. When this occurs we print a kernel log message
572 * describing the link type in use and the fact that it is up.
574 * If a fatal error of some sort is signalled and detected in the interrupt
575 * service routine, and the chip is reset, or the link is ifconfig'd down
576 * and then back up, this entire process repeats itself all over again.
578 static int try_next_permutation(struct happy_meal *hp, unsigned long tregs)
580 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
582 /* Downgrade from full to half duplex. Only possible
585 if (hp->sw_bmcr & BMCR_FULLDPLX) {
586 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
587 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
591 /* Downgrade from 100 to 10. */
592 if (hp->sw_bmcr & BMCR_SPEED100) {
593 hp->sw_bmcr &= ~(BMCR_SPEED100);
594 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
598 /* We've tried everything. */
602 static void display_link_mode(struct happy_meal *hp, unsigned long tregs)
604 printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
605 if (hp->tcvr_type == external)
609 printk("transceiver at ");
610 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
611 if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
612 if (hp->sw_lpa & LPA_100FULL)
613 printk("100Mb/s, Full Duplex.\n");
615 printk("100Mb/s, Half Duplex.\n");
617 if (hp->sw_lpa & LPA_10FULL)
618 printk("10Mb/s, Full Duplex.\n");
620 printk("10Mb/s, Half Duplex.\n");
624 static void display_forced_link_mode(struct happy_meal *hp, unsigned long tregs)
626 printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
627 if (hp->tcvr_type == external)
631 printk("transceiver at ");
632 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
633 if (hp->sw_bmcr & BMCR_SPEED100)
637 if (hp->sw_bmcr & BMCR_FULLDPLX)
638 printk("Full Duplex.\n");
640 printk("Half Duplex.\n");
643 static int set_happy_link_modes(struct happy_meal *hp, unsigned long tregs)
647 /* All we care about is making sure the bigmac tx_cfg has a
648 * proper duplex setting.
650 if (hp->timer_state == arbwait) {
651 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
652 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
654 if (hp->sw_lpa & LPA_100FULL)
656 else if (hp->sw_lpa & LPA_100HALF)
658 else if (hp->sw_lpa & LPA_10FULL)
663 /* Forcing a link mode. */
664 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
665 if (hp->sw_bmcr & BMCR_FULLDPLX)
671 /* Before changing other bits in the tx_cfg register, and in
672 * general any of other the TX config registers too, you
675 * 2) Poll with reads until that bit reads back as zero
676 * 3) Make TX configuration changes
677 * 4) Set Enable once more
679 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
680 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
681 ~(BIGMAC_TXCFG_ENABLE));
682 while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
685 hp->happy_flags |= HFLAG_FULL;
686 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
687 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
688 BIGMAC_TXCFG_FULLDPLX);
690 hp->happy_flags &= ~(HFLAG_FULL);
691 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
692 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
693 ~(BIGMAC_TXCFG_FULLDPLX));
695 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
696 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
697 BIGMAC_TXCFG_ENABLE);
703 static int happy_meal_init(struct happy_meal *hp);
705 static int is_lucent_phy(struct happy_meal *hp)
707 unsigned long tregs = hp->tcvregs;
708 unsigned short mr2, mr3;
711 mr2 = happy_meal_tcvr_read(hp, tregs, 2);
712 mr3 = happy_meal_tcvr_read(hp, tregs, 3);
713 if ((mr2 & 0xffff) == 0x0180 &&
714 ((mr3 & 0xffff) >> 10) == 0x1d)
720 static void happy_meal_timer(unsigned long data)
722 struct happy_meal *hp = (struct happy_meal *) data;
723 unsigned long tregs = hp->tcvregs;
724 int restart_timer = 0;
726 spin_lock_irq(&hp->happy_lock);
729 switch(hp->timer_state) {
731 /* Only allow for 5 ticks, thats 10 seconds and much too
732 * long to wait for arbitration to complete.
734 if (hp->timer_ticks >= 10) {
735 /* Enter force mode. */
737 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
738 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
740 hp->sw_bmcr = BMCR_SPEED100;
741 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
743 if (!is_lucent_phy(hp)) {
744 /* OK, seems we need do disable the transceiver for the first
745 * tick to make sure we get an accurate link state at the
748 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
749 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
750 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
752 hp->timer_state = ltrywait;
756 /* Anything interesting happen? */
757 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
758 if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
761 /* Just what we've been waiting for... */
762 ret = set_happy_link_modes(hp, tregs);
764 /* Ooops, something bad happened, go to force
767 * XXX Broken hubs which don't support 802.3u
768 * XXX auto-negotiation make this happen as well.
773 /* Success, at least so far, advance our state engine. */
774 hp->timer_state = lupwait;
783 /* Auto negotiation was successful and we are awaiting a
784 * link up status. I have decided to let this timer run
785 * forever until some sort of error is signalled, reporting
786 * a message to the user at 10 second intervals.
788 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
789 if (hp->sw_bmsr & BMSR_LSTATUS) {
790 /* Wheee, it's up, display the link mode in use and put
791 * the timer to sleep.
793 display_link_mode(hp, tregs);
794 hp->timer_state = asleep;
797 if (hp->timer_ticks >= 10) {
798 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
799 "not completely up.\n", hp->dev->name);
809 /* Making the timeout here too long can make it take
810 * annoyingly long to attempt all of the link mode
811 * permutations, but then again this is essentially
812 * error recovery code for the most part.
814 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
815 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
816 if (hp->timer_ticks == 1) {
817 if (!is_lucent_phy(hp)) {
818 /* Re-enable transceiver, we'll re-enable the transceiver next
819 * tick, then check link state on the following tick.
821 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
822 happy_meal_tcvr_write(hp, tregs,
823 DP83840_CSCONFIG, hp->sw_csconfig);
828 if (hp->timer_ticks == 2) {
829 if (!is_lucent_phy(hp)) {
830 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
831 happy_meal_tcvr_write(hp, tregs,
832 DP83840_CSCONFIG, hp->sw_csconfig);
837 if (hp->sw_bmsr & BMSR_LSTATUS) {
838 /* Force mode selection success. */
839 display_forced_link_mode(hp, tregs);
840 set_happy_link_modes(hp, tregs); /* XXX error? then what? */
841 hp->timer_state = asleep;
844 if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
847 ret = try_next_permutation(hp, tregs);
849 /* Aieee, tried them all, reset the
850 * chip and try all over again.
853 /* Let the user know... */
854 printk(KERN_NOTICE "%s: Link down, cable problem?\n",
857 ret = happy_meal_init(hp);
860 printk(KERN_ERR "%s: Error, cannot re-init the "
861 "Happy Meal.\n", hp->dev->name);
865 if (!is_lucent_phy(hp)) {
866 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
868 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
869 happy_meal_tcvr_write(hp, tregs,
870 DP83840_CSCONFIG, hp->sw_csconfig);
882 /* Can't happens.... */
883 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
887 hp->timer_state = asleep; /* foo on you */
892 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
893 add_timer(&hp->happy_timer);
897 spin_unlock_irq(&hp->happy_lock);
900 #define TX_RESET_TRIES 32
901 #define RX_RESET_TRIES 32
903 /* hp->happy_lock must be held */
904 static void happy_meal_tx_reset(struct happy_meal *hp, unsigned long bregs)
906 int tries = TX_RESET_TRIES;
908 HMD(("happy_meal_tx_reset: reset, "));
910 /* Would you like to try our SMCC Delux? */
911 hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
912 while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
915 /* Lettuce, tomato, buggy hardware (no extra charge)? */
917 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
923 /* hp->happy_lock must be held */
924 static void happy_meal_rx_reset(struct happy_meal *hp, unsigned long bregs)
926 int tries = RX_RESET_TRIES;
928 HMD(("happy_meal_rx_reset: reset, "));
930 /* We have a special on GNU/Viking hardware bugs today. */
931 hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
932 while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
935 /* Will that be all? */
937 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
939 /* Don't forget your vik_1137125_wa. Have a nice day. */
943 #define STOP_TRIES 16
945 /* hp->happy_lock must be held */
946 static void happy_meal_stop(struct happy_meal *hp, unsigned long gregs)
948 int tries = STOP_TRIES;
950 HMD(("happy_meal_stop: reset, "));
952 /* We're consolidating our STB products, it's your lucky day. */
953 hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
954 while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
957 /* Come back next week when we are "Sun Microelectronics". */
959 printk(KERN_ERR "happy meal: Fry guys.");
961 /* Remember: "Different name, same old buggy as shit hardware." */
965 /* hp->happy_lock must be held */
966 static void happy_meal_get_counters(struct happy_meal *hp, unsigned long bregs)
968 struct net_device_stats *stats = &hp->net_stats;
970 stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
971 hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
973 stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
974 hme_write32(hp, bregs + BMAC_UNALECTR, 0);
976 stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
977 hme_write32(hp, bregs + BMAC_GLECTR, 0);
979 stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
982 (hme_read32(hp, bregs + BMAC_EXCTR) +
983 hme_read32(hp, bregs + BMAC_LTCTR));
984 hme_write32(hp, bregs + BMAC_EXCTR, 0);
985 hme_write32(hp, bregs + BMAC_LTCTR, 0);
988 /* hp->happy_lock must be held */
989 static void happy_meal_poll_stop(struct happy_meal *hp, unsigned long tregs)
991 ASD(("happy_meal_poll_stop: "));
993 /* If polling disabled or not polling already, nothing to do. */
994 if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
995 (HFLAG_POLLENABLE | HFLAG_POLL)) {
996 HMD(("not polling, return\n"));
1000 /* Shut up the MIF. */
1001 ASD(("were polling, mif ints off, "));
1002 hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1004 /* Turn off polling. */
1005 ASD(("polling off, "));
1006 hme_write32(hp, tregs + TCVR_CFG,
1007 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
1009 /* We are no longer polling. */
1010 hp->happy_flags &= ~(HFLAG_POLL);
1012 /* Let the bits set. */
1017 /* Only Sun can take such nice parts and fuck up the programming interface
1018 * like this. Good job guys...
1020 #define TCVR_RESET_TRIES 16 /* It should reset quickly */
1021 #define TCVR_UNISOLATE_TRIES 32 /* Dis-isolation can take longer. */
1023 /* hp->happy_lock must be held */
1024 static int happy_meal_tcvr_reset(struct happy_meal *hp, unsigned long tregs)
1027 int result, tries = TCVR_RESET_TRIES;
1029 tconfig = hme_read32(hp, tregs + TCVR_CFG);
1030 ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1031 if (hp->tcvr_type == external) {
1033 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1034 hp->tcvr_type = internal;
1035 hp->paddr = TCV_PADDR_ITX;
1037 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1038 (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1039 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1040 if (result == TCVR_FAILURE) {
1041 ASD(("phyread_fail>\n"));
1044 ASD(("phyread_ok,PSELECT>"));
1045 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1046 hp->tcvr_type = external;
1047 hp->paddr = TCV_PADDR_ETX;
1049 if (tconfig & TCV_CFG_MDIO1) {
1050 ASD(("internal<PSELECT,"));
1051 hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1053 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1054 (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1055 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1056 if (result == TCVR_FAILURE) {
1057 ASD(("phyread_fail>\n"));
1060 ASD(("phyread_ok,~PSELECT>"));
1061 hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1062 hp->tcvr_type = internal;
1063 hp->paddr = TCV_PADDR_ITX;
1067 ASD(("BMCR_RESET "));
1068 happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1071 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1072 if (result == TCVR_FAILURE)
1074 hp->sw_bmcr = result;
1075 if (!(result & BMCR_RESET))
1080 ASD(("BMCR RESET FAILED!\n"));
1083 ASD(("RESET_OK\n"));
1085 /* Get fresh copies of the PHY registers. */
1086 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1087 hp->sw_physid1 = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1088 hp->sw_physid2 = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1089 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1092 hp->sw_bmcr &= ~(BMCR_ISOLATE);
1093 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1095 tries = TCVR_UNISOLATE_TRIES;
1097 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1098 if (result == TCVR_FAILURE)
1100 if (!(result & BMCR_ISOLATE))
1105 ASD((" FAILED!\n"));
1108 ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1109 if (!is_lucent_phy(hp)) {
1110 result = happy_meal_tcvr_read(hp, tregs,
1112 happy_meal_tcvr_write(hp, tregs,
1113 DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1118 /* Figure out whether we have an internal or external transceiver.
1120 * hp->happy_lock must be held
1122 static void happy_meal_transceiver_check(struct happy_meal *hp, unsigned long tregs)
1124 unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1126 ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1127 if (hp->happy_flags & HFLAG_POLL) {
1128 /* If we are polling, we must stop to get the transceiver type. */
1129 ASD(("<polling> "));
1130 if (hp->tcvr_type == internal) {
1131 if (tconfig & TCV_CFG_MDIO1) {
1132 ASD(("<internal> <poll stop> "));
1133 happy_meal_poll_stop(hp, tregs);
1134 hp->paddr = TCV_PADDR_ETX;
1135 hp->tcvr_type = external;
1136 ASD(("<external>\n"));
1137 tconfig &= ~(TCV_CFG_PENABLE);
1138 tconfig |= TCV_CFG_PSELECT;
1139 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1142 if (hp->tcvr_type == external) {
1143 ASD(("<external> "));
1144 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1145 ASD(("<poll stop> "));
1146 happy_meal_poll_stop(hp, tregs);
1147 hp->paddr = TCV_PADDR_ITX;
1148 hp->tcvr_type = internal;
1149 ASD(("<internal>\n"));
1150 hme_write32(hp, tregs + TCVR_CFG,
1151 hme_read32(hp, tregs + TCVR_CFG) &
1152 ~(TCV_CFG_PSELECT));
1160 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1162 /* Else we can just work off of the MDIO bits. */
1163 ASD(("<not polling> "));
1164 if (reread & TCV_CFG_MDIO1) {
1165 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1166 hp->paddr = TCV_PADDR_ETX;
1167 hp->tcvr_type = external;
1168 ASD(("<external>\n"));
1170 if (reread & TCV_CFG_MDIO0) {
1171 hme_write32(hp, tregs + TCVR_CFG,
1172 tconfig & ~(TCV_CFG_PSELECT));
1173 hp->paddr = TCV_PADDR_ITX;
1174 hp->tcvr_type = internal;
1175 ASD(("<internal>\n"));
1177 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1178 hp->tcvr_type = none; /* Grrr... */
1185 /* The receive ring buffers are a bit tricky to get right. Here goes...
1187 * The buffers we dma into must be 64 byte aligned. So we use a special
1188 * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1191 * We use skb_reserve() to align the data block we get in the skb. We
1192 * also program the etxregs->cfg register to use an offset of 2. This
1193 * imperical constant plus the ethernet header size will always leave
1194 * us with a nicely aligned ip header once we pass things up to the
1197 * The numbers work out to:
1199 * Max ethernet frame size 1518
1200 * Ethernet header size 14
1201 * Happy Meal base offset 2
1203 * Say a skb data area is at 0xf001b010, and its size alloced is
1204 * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1206 * First our alloc_skb() routine aligns the data base to a 64 byte
1207 * boundary. We now have 0xf001b040 as our skb data address. We
1208 * plug this into the receive descriptor address.
1210 * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1211 * So now the data we will end up looking at starts at 0xf001b042. When
1212 * the packet arrives, we will check out the size received and subtract
1213 * this from the skb->length. Then we just pass the packet up to the
1214 * protocols as is, and allocate a new skb to replace this slot we have
1215 * just received from.
1217 * The ethernet layer will strip the ether header from the front of the
1218 * skb we just sent to it, this leaves us with the ip header sitting
1219 * nicely aligned at 0xf001b050. Also, for tcp and udp packets the
1220 * Happy Meal has even checksummed the tcp/udp data for us. The 16
1221 * bit checksum is obtained from the low bits of the receive descriptor
1224 * skb->csum = rxd->rx_flags & 0xffff;
1225 * skb->ip_summed = CHECKSUM_HW;
1227 * before sending off the skb to the protocols, and we are good as gold.
1229 static void happy_meal_clean_rings(struct happy_meal *hp)
1233 for (i = 0; i < RX_RING_SIZE; i++) {
1234 if (hp->rx_skbs[i] != NULL) {
1235 struct sk_buff *skb = hp->rx_skbs[i];
1236 struct happy_meal_rxd *rxd;
1239 rxd = &hp->happy_block->happy_meal_rxd[i];
1240 dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1241 hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
1242 dev_kfree_skb_any(skb);
1243 hp->rx_skbs[i] = NULL;
1247 for (i = 0; i < TX_RING_SIZE; i++) {
1248 if (hp->tx_skbs[i] != NULL) {
1249 struct sk_buff *skb = hp->tx_skbs[i];
1250 struct happy_meal_txd *txd;
1254 hp->tx_skbs[i] = NULL;
1256 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1257 txd = &hp->happy_block->happy_meal_txd[i];
1258 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1259 hme_dma_unmap(hp, dma_addr,
1260 (hme_read_desc32(hp, &txd->tx_flags)
1264 if (frag != skb_shinfo(skb)->nr_frags)
1268 dev_kfree_skb_any(skb);
1273 /* hp->happy_lock must be held */
1274 static void happy_meal_init_rings(struct happy_meal *hp)
1276 struct hmeal_init_block *hb = hp->happy_block;
1277 struct net_device *dev = hp->dev;
1280 HMD(("happy_meal_init_rings: counters to zero, "));
1281 hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1283 /* Free any skippy bufs left around in the rings. */
1285 happy_meal_clean_rings(hp);
1287 /* Now get new skippy bufs for the receive ring. */
1288 HMD(("init rxring, "));
1289 for (i = 0; i < RX_RING_SIZE; i++) {
1290 struct sk_buff *skb;
1292 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1294 hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1297 hp->rx_skbs[i] = skb;
1300 /* Because we reserve afterwards. */
1301 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET));
1302 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1303 (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1304 hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
1305 skb_reserve(skb, RX_OFFSET);
1308 HMD(("init txring, "));
1309 for (i = 0; i < TX_RING_SIZE; i++)
1310 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1315 /* hp->happy_lock must be held */
1316 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1317 unsigned long tregs,
1318 struct ethtool_cmd *ep)
1322 /* Read all of the registers we are interested in now. */
1323 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1324 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1325 hp->sw_physid1 = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1326 hp->sw_physid2 = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1328 /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1330 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1331 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1332 /* Advertise everything we can support. */
1333 if (hp->sw_bmsr & BMSR_10HALF)
1334 hp->sw_advertise |= (ADVERTISE_10HALF);
1336 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1338 if (hp->sw_bmsr & BMSR_10FULL)
1339 hp->sw_advertise |= (ADVERTISE_10FULL);
1341 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1342 if (hp->sw_bmsr & BMSR_100HALF)
1343 hp->sw_advertise |= (ADVERTISE_100HALF);
1345 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1346 if (hp->sw_bmsr & BMSR_100FULL)
1347 hp->sw_advertise |= (ADVERTISE_100FULL);
1349 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1350 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1352 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1353 * XXX and this is because the DP83840 does not support it, changes
1354 * XXX would need to be made to the tx/rx logic in the driver as well
1355 * XXX so I completely skip checking for it in the BMSR for now.
1358 #ifdef AUTO_SWITCH_DEBUG
1359 ASD(("%s: Advertising [ ", hp->dev->name));
1360 if (hp->sw_advertise & ADVERTISE_10HALF)
1362 if (hp->sw_advertise & ADVERTISE_10FULL)
1364 if (hp->sw_advertise & ADVERTISE_100HALF)
1366 if (hp->sw_advertise & ADVERTISE_100FULL)
1370 /* Enable Auto-Negotiation, this is usually on already... */
1371 hp->sw_bmcr |= BMCR_ANENABLE;
1372 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1374 /* Restart it to make sure it is going. */
1375 hp->sw_bmcr |= BMCR_ANRESTART;
1376 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1378 /* BMCR_ANRESTART self clears when the process has begun. */
1380 timeout = 64; /* More than enough. */
1382 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1383 if (!(hp->sw_bmcr & BMCR_ANRESTART))
1384 break; /* got it. */
1388 printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1389 "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1390 printk(KERN_NOTICE "%s: Performing force link detection.\n",
1394 hp->timer_state = arbwait;
1398 /* Force the link up, trying first a particular mode.
1399 * Either we are here at the request of ethtool or
1400 * because the Happy Meal would not start to autoneg.
1403 /* Disable auto-negotiation in BMCR, enable the duplex and
1404 * speed setting, init the timer state machine, and fire it off.
1406 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1407 hp->sw_bmcr = BMCR_SPEED100;
1409 if (ep->speed == SPEED_100)
1410 hp->sw_bmcr = BMCR_SPEED100;
1413 if (ep->duplex == DUPLEX_FULL)
1414 hp->sw_bmcr |= BMCR_FULLDPLX;
1416 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1418 if (!is_lucent_phy(hp)) {
1419 /* OK, seems we need do disable the transceiver for the first
1420 * tick to make sure we get an accurate link state at the
1423 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1425 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1426 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1429 hp->timer_state = ltrywait;
1432 hp->timer_ticks = 0;
1433 hp->happy_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */
1434 hp->happy_timer.data = (unsigned long) hp;
1435 hp->happy_timer.function = &happy_meal_timer;
1436 add_timer(&hp->happy_timer);
1439 /* hp->happy_lock must be held */
1440 static int happy_meal_init(struct happy_meal *hp)
1442 unsigned long gregs = hp->gregs;
1443 unsigned long etxregs = hp->etxregs;
1444 unsigned long erxregs = hp->erxregs;
1445 unsigned long bregs = hp->bigmacregs;
1446 unsigned long tregs = hp->tcvregs;
1448 unsigned char *e = &hp->dev->dev_addr[0];
1450 /* If auto-negotiation timer is running, kill it. */
1451 del_timer(&hp->happy_timer);
1453 HMD(("happy_meal_init: happy_flags[%08x] ",
1455 if (!(hp->happy_flags & HFLAG_INIT)) {
1456 HMD(("set HFLAG_INIT, "));
1457 hp->happy_flags |= HFLAG_INIT;
1458 happy_meal_get_counters(hp, bregs);
1462 HMD(("to happy_meal_poll_stop\n"));
1463 happy_meal_poll_stop(hp, tregs);
1465 /* Stop transmitter and receiver. */
1466 HMD(("happy_meal_init: to happy_meal_stop\n"));
1467 happy_meal_stop(hp, gregs);
1469 /* Alloc and reset the tx/rx descriptor chains. */
1470 HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1471 happy_meal_init_rings(hp);
1473 /* Shut up the MIF. */
1474 HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1475 hme_read32(hp, tregs + TCVR_IMASK)));
1476 hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1478 /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1479 if (hp->happy_flags & HFLAG_FENABLE) {
1480 HMD(("use frame old[%08x], ",
1481 hme_read32(hp, tregs + TCVR_CFG)));
1482 hme_write32(hp, tregs + TCVR_CFG,
1483 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1485 HMD(("use bitbang old[%08x], ",
1486 hme_read32(hp, tregs + TCVR_CFG)));
1487 hme_write32(hp, tregs + TCVR_CFG,
1488 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1491 /* Check the state of the transceiver. */
1492 HMD(("to happy_meal_transceiver_check\n"));
1493 happy_meal_transceiver_check(hp, tregs);
1495 /* Put the Big Mac into a sane state. */
1496 HMD(("happy_meal_init: "));
1497 switch(hp->tcvr_type) {
1499 /* Cannot operate if we don't know the transceiver type! */
1500 HMD(("AAIEEE no transceiver type, EAGAIN"));
1504 /* Using the MII buffers. */
1505 HMD(("internal, using MII, "));
1506 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1510 /* Not using the MII, disable it. */
1511 HMD(("external, disable MII, "));
1512 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1516 if (happy_meal_tcvr_reset(hp, tregs))
1519 /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1520 HMD(("tx/rx reset, "));
1521 happy_meal_tx_reset(hp, bregs);
1522 happy_meal_rx_reset(hp, bregs);
1524 /* Set jam size and inter-packet gaps to reasonable defaults. */
1525 HMD(("jsize/ipg1/ipg2, "));
1526 hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1527 hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1528 hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1530 /* Load up the MAC address and random seed. */
1531 HMD(("rseed/macaddr, "));
1533 /* The docs recommend to use the 10LSB of our MAC here. */
1534 hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1536 hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1537 hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1538 hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1541 if ((hp->dev->flags & IFF_ALLMULTI) ||
1542 (hp->dev->mc_count > 64)) {
1543 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1544 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1545 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1546 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1547 } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1549 struct dev_mc_list *dmi = hp->dev->mc_list;
1554 for (i = 0; i < 4; i++)
1557 for (i = 0; i < hp->dev->mc_count; i++) {
1558 addrs = dmi->dmi_addr;
1564 crc = ether_crc_le(6, addrs);
1566 hash_table[crc >> 4] |= 1 << (crc & 0xf);
1568 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1569 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1570 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1571 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1573 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1574 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1575 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1576 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1579 /* Set the RX and TX ring ptrs. */
1580 HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1581 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1582 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1583 hme_write32(hp, erxregs + ERX_RING,
1584 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1585 hme_write32(hp, etxregs + ETX_RING,
1586 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1588 /* Parity issues in the ERX unit of some HME revisions can cause some
1589 * registers to not be written unless their parity is even. Detect such
1590 * lost writes and simply rewrite with a low bit set (which will be ignored
1591 * since the rxring needs to be 2K aligned).
1593 if (hme_read32(hp, erxregs + ERX_RING) !=
1594 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1595 hme_write32(hp, erxregs + ERX_RING,
1596 ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1599 /* Set the supported burst sizes. */
1600 HMD(("happy_meal_init: old[%08x] bursts<",
1601 hme_read32(hp, gregs + GREG_CFG)));
1604 /* It is always PCI and can handle 64byte bursts. */
1605 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1607 if ((hp->happy_bursts & DMA_BURST64) &&
1608 ((hp->happy_flags & HFLAG_PCI) != 0
1610 || sbus_can_burst64(hp->happy_dev)
1613 u32 gcfg = GREG_CFG_BURST64;
1615 /* I have no idea if I should set the extended
1616 * transfer mode bit for Cheerio, so for now I
1620 if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1621 sbus_can_dma_64bit(hp->happy_dev)) {
1622 sbus_set_sbus64(hp->happy_dev,
1624 gcfg |= GREG_CFG_64BIT;
1629 hme_write32(hp, gregs + GREG_CFG, gcfg);
1630 } else if (hp->happy_bursts & DMA_BURST32) {
1632 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1633 } else if (hp->happy_bursts & DMA_BURST16) {
1635 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1638 hme_write32(hp, gregs + GREG_CFG, 0);
1640 #endif /* __sparc__ */
1642 /* Turn off interrupts we do not want to hear. */
1643 HMD((", enable global interrupts, "));
1644 hme_write32(hp, gregs + GREG_IMASK,
1645 (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1646 GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1648 /* Set the transmit ring buffer size. */
1649 HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1650 hme_read32(hp, etxregs + ETX_RSIZE)));
1651 hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1653 /* Enable transmitter DVMA. */
1654 HMD(("tx dma enable old[%08x], ",
1655 hme_read32(hp, etxregs + ETX_CFG)));
1656 hme_write32(hp, etxregs + ETX_CFG,
1657 hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1659 /* This chip really rots, for the receiver sometimes when you
1660 * write to its control registers not all the bits get there
1661 * properly. I cannot think of a sane way to provide complete
1662 * coverage for this hardware bug yet.
1664 HMD(("erx regs bug old[%08x]\n",
1665 hme_read32(hp, erxregs + ERX_CFG)));
1666 hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1667 regtmp = hme_read32(hp, erxregs + ERX_CFG);
1668 hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1669 if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1670 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1671 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1672 ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1673 /* XXX Should return failure here... */
1676 /* Enable Big Mac hash table filter. */
1677 HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1678 hme_read32(hp, bregs + BMAC_RXCFG)));
1679 rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1680 if (hp->dev->flags & IFF_PROMISC)
1681 rxcfg |= BIGMAC_RXCFG_PMISC;
1682 hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1684 /* Let the bits settle in the chip. */
1687 /* Ok, configure the Big Mac transmitter. */
1688 HMD(("BIGMAC init, "));
1690 if (hp->happy_flags & HFLAG_FULL)
1691 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1693 /* Don't turn on the "don't give up" bit for now. It could cause hme
1694 * to deadlock with the PHY if a Jabber occurs.
1696 hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1698 /* Give up after 16 TX attempts. */
1699 hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1701 /* Enable the output drivers no matter what. */
1702 regtmp = BIGMAC_XCFG_ODENABLE;
1704 /* If card can do lance mode, enable it. */
1705 if (hp->happy_flags & HFLAG_LANCE)
1706 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1708 /* Disable the MII buffers if using external transceiver. */
1709 if (hp->tcvr_type == external)
1710 regtmp |= BIGMAC_XCFG_MIIDISAB;
1712 HMD(("XIF config old[%08x], ",
1713 hme_read32(hp, bregs + BMAC_XIFCFG)));
1714 hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1716 /* Start things up. */
1717 HMD(("tx old[%08x] and rx [%08x] ON!\n",
1718 hme_read32(hp, bregs + BMAC_TXCFG),
1719 hme_read32(hp, bregs + BMAC_RXCFG)));
1720 hme_write32(hp, bregs + BMAC_TXCFG,
1721 hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1722 hme_write32(hp, bregs + BMAC_RXCFG,
1723 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1725 /* Get the autonegotiation started, and the watch timer ticking. */
1726 happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1732 /* hp->happy_lock must be held */
1733 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1735 unsigned long tregs = hp->tcvregs;
1736 unsigned long bregs = hp->bigmacregs;
1737 unsigned long gregs = hp->gregs;
1739 happy_meal_stop(hp, gregs);
1740 hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1741 if (hp->happy_flags & HFLAG_FENABLE)
1742 hme_write32(hp, tregs + TCVR_CFG,
1743 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1745 hme_write32(hp, tregs + TCVR_CFG,
1746 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1747 happy_meal_transceiver_check(hp, tregs);
1748 switch(hp->tcvr_type) {
1752 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1755 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1758 if (happy_meal_tcvr_reset(hp, tregs))
1761 /* Latch PHY registers as of now. */
1762 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1763 hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1765 /* Advertise everything we can support. */
1766 if (hp->sw_bmsr & BMSR_10HALF)
1767 hp->sw_advertise |= (ADVERTISE_10HALF);
1769 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1771 if (hp->sw_bmsr & BMSR_10FULL)
1772 hp->sw_advertise |= (ADVERTISE_10FULL);
1774 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1775 if (hp->sw_bmsr & BMSR_100HALF)
1776 hp->sw_advertise |= (ADVERTISE_100HALF);
1778 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1779 if (hp->sw_bmsr & BMSR_100FULL)
1780 hp->sw_advertise |= (ADVERTISE_100FULL);
1782 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1784 /* Update the PHY advertisement register. */
1785 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1788 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1789 * the hardware, so we cannot re-read it and get a correct value.
1791 * hp->happy_lock must be held
1793 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1797 /* Only print messages for non-counter related interrupts. */
1798 if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1799 GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1800 GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1801 GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1802 GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1804 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1805 hp->dev->name, status);
1807 if (status & GREG_STAT_RFIFOVF) {
1808 /* Receive FIFO overflow is harmless and the hardware will take
1809 care of it, just some packets are lost. Who cares. */
1810 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1813 if (status & GREG_STAT_STSTERR) {
1814 /* BigMAC SQE link test failed. */
1815 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1819 if (status & GREG_STAT_TFIFO_UND) {
1820 /* Transmit FIFO underrun, again DMA error likely. */
1821 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1826 if (status & GREG_STAT_MAXPKTERR) {
1827 /* Driver error, tried to transmit something larger
1828 * than ethernet max mtu.
1830 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1834 if (status & GREG_STAT_NORXD) {
1835 /* This is harmless, it just means the system is
1836 * quite loaded and the incoming packet rate was
1837 * faster than the interrupt handler could keep up
1840 printk(KERN_INFO "%s: Happy Meal out of receive "
1841 "descriptors, packet dropped.\n",
1845 if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1846 /* All sorts of DMA receive errors. */
1847 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1848 if (status & GREG_STAT_RXERR)
1849 printk("GenericError ");
1850 if (status & GREG_STAT_RXPERR)
1851 printk("ParityError ");
1852 if (status & GREG_STAT_RXTERR)
1853 printk("RxTagBotch ");
1858 if (status & GREG_STAT_EOPERR) {
1859 /* Driver bug, didn't set EOP bit in tx descriptor given
1860 * to the happy meal.
1862 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1867 if (status & GREG_STAT_MIFIRQ) {
1868 /* MIF signalled an interrupt, were we polling it? */
1869 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1873 (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1874 /* All sorts of transmit DMA errors. */
1875 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1876 if (status & GREG_STAT_TXEACK)
1877 printk("GenericError ");
1878 if (status & GREG_STAT_TXLERR)
1879 printk("LateError ");
1880 if (status & GREG_STAT_TXPERR)
1881 printk("ParityErro ");
1882 if (status & GREG_STAT_TXTERR)
1883 printk("TagBotch ");
1888 if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1889 /* Bus or parity error when cpu accessed happy meal registers
1890 * or it's internal FIFO's. Should never see this.
1892 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1894 (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1899 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1900 happy_meal_init(hp);
1906 /* hp->happy_lock must be held */
1907 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1909 unsigned long tregs = hp->tcvregs;
1911 printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1912 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1913 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1915 /* Use the fastest transmission protocol possible. */
1916 if (hp->sw_lpa & LPA_100FULL) {
1917 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1918 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1919 } else if (hp->sw_lpa & LPA_100HALF) {
1920 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1921 hp->sw_bmcr |= BMCR_SPEED100;
1922 } else if (hp->sw_lpa & LPA_10FULL) {
1923 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1924 hp->sw_bmcr |= BMCR_FULLDPLX;
1926 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1928 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1930 /* Finally stop polling and shut up the MIF. */
1931 happy_meal_poll_stop(hp, tregs);
1935 #define TXD(x) printk x
1940 /* hp->happy_lock must be held */
1941 static void happy_meal_tx(struct happy_meal *hp)
1943 struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1944 struct happy_meal_txd *this;
1945 struct net_device *dev = hp->dev;
1950 while (elem != hp->tx_new) {
1951 struct sk_buff *skb;
1952 u32 flags, dma_addr, dma_len;
1955 TXD(("[%d]", elem));
1956 this = &txbase[elem];
1957 flags = hme_read_desc32(hp, &this->tx_flags);
1958 if (flags & TXFLAG_OWN)
1960 skb = hp->tx_skbs[elem];
1961 if (skb_shinfo(skb)->nr_frags) {
1964 last = elem + skb_shinfo(skb)->nr_frags;
1965 last &= (TX_RING_SIZE - 1);
1966 flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1967 if (flags & TXFLAG_OWN)
1970 hp->tx_skbs[elem] = NULL;
1971 hp->net_stats.tx_bytes += skb->len;
1973 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1974 dma_addr = hme_read_desc32(hp, &this->tx_addr);
1975 dma_len = hme_read_desc32(hp, &this->tx_flags);
1977 dma_len &= TXFLAG_SIZE;
1978 hme_dma_unmap(hp, dma_addr, dma_len, DMA_TODEVICE);
1980 elem = NEXT_TX(elem);
1981 this = &txbase[elem];
1984 dev_kfree_skb_irq(skb);
1985 hp->net_stats.tx_packets++;
1990 if (netif_queue_stopped(dev) &&
1991 TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1992 netif_wake_queue(dev);
1996 #define RXD(x) printk x
2001 /* Originally I used to handle the allocation failure by just giving back just
2002 * that one ring buffer to the happy meal. Problem is that usually when that
2003 * condition is triggered, the happy meal expects you to do something reasonable
2004 * with all of the packets it has DMA'd in. So now I just drop the entire
2005 * ring when we cannot get a new skb and give them all back to the happy meal,
2006 * maybe things will be "happier" now.
2008 * hp->happy_lock must be held
2010 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
2012 struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2013 struct happy_meal_rxd *this;
2014 int elem = hp->rx_new, drops = 0;
2018 this = &rxbase[elem];
2019 while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2020 struct sk_buff *skb;
2021 int len = flags >> 16;
2022 u16 csum = flags & RXFLAG_CSUM;
2023 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2025 RXD(("[%d ", elem));
2027 /* Check for errors. */
2028 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2029 RXD(("ERR(%08x)]", flags));
2030 hp->net_stats.rx_errors++;
2032 hp->net_stats.rx_length_errors++;
2033 if (len & (RXFLAG_OVERFLOW >> 16)) {
2034 hp->net_stats.rx_over_errors++;
2035 hp->net_stats.rx_fifo_errors++;
2038 /* Return it to the Happy meal. */
2040 hp->net_stats.rx_dropped++;
2041 hme_write_rxd(hp, this,
2042 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2046 skb = hp->rx_skbs[elem];
2047 if (len > RX_COPY_THRESHOLD) {
2048 struct sk_buff *new_skb;
2050 /* Now refill the entry, if we can. */
2051 new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2052 if (new_skb == NULL) {
2056 hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
2057 hp->rx_skbs[elem] = new_skb;
2059 skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2060 hme_write_rxd(hp, this,
2061 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2062 hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
2063 skb_reserve(new_skb, RX_OFFSET);
2065 /* Trim the original skb for the netif. */
2068 struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2070 if (copy_skb == NULL) {
2075 copy_skb->dev = dev;
2076 skb_reserve(copy_skb, 2);
2077 skb_put(copy_skb, len);
2078 hme_dma_sync_for_cpu(hp, dma_addr, len, DMA_FROMDEVICE);
2079 memcpy(copy_skb->data, skb->data, len);
2080 hme_dma_sync_for_device(hp, dma_addr, len, DMA_FROMDEVICE);
2082 /* Reuse original ring buffer. */
2083 hme_write_rxd(hp, this,
2084 (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2090 /* This card is _fucking_ hot... */
2091 skb->csum = ntohs(csum ^ 0xffff);
2092 skb->ip_summed = CHECKSUM_HW;
2094 RXD(("len=%d csum=%4x]", len, csum));
2095 skb->protocol = eth_type_trans(skb, dev);
2098 dev->last_rx = jiffies;
2099 hp->net_stats.rx_packets++;
2100 hp->net_stats.rx_bytes += len;
2102 elem = NEXT_RX(elem);
2103 this = &rxbase[elem];
2107 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2111 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2113 struct net_device *dev = (struct net_device *) dev_id;
2114 struct happy_meal *hp = dev->priv;
2115 u32 happy_status = hme_read32(hp, hp->gregs + GREG_STAT);
2117 HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2119 spin_lock(&hp->happy_lock);
2121 if (happy_status & GREG_STAT_ERRORS) {
2123 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2127 if (happy_status & GREG_STAT_MIFIRQ) {
2129 happy_meal_mif_interrupt(hp);
2132 if (happy_status & GREG_STAT_TXALL) {
2137 if (happy_status & GREG_STAT_RXTOHOST) {
2139 happy_meal_rx(hp, dev);
2144 spin_unlock(&hp->happy_lock);
2150 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie, struct pt_regs *ptregs)
2152 struct quattro *qp = (struct quattro *) cookie;
2155 for (i = 0; i < 4; i++) {
2156 struct net_device *dev = qp->happy_meals[i];
2157 struct happy_meal *hp = dev->priv;
2158 u32 happy_status = hme_read32(hp, hp->gregs + GREG_STAT);
2160 HMD(("quattro_interrupt: status=%08x ", happy_status));
2162 if (!(happy_status & (GREG_STAT_ERRORS |
2165 GREG_STAT_RXTOHOST)))
2168 spin_lock(&hp->happy_lock);
2170 if (happy_status & GREG_STAT_ERRORS) {
2172 if (happy_meal_is_not_so_happy(hp, happy_status))
2176 if (happy_status & GREG_STAT_MIFIRQ) {
2178 happy_meal_mif_interrupt(hp);
2181 if (happy_status & GREG_STAT_TXALL) {
2186 if (happy_status & GREG_STAT_RXTOHOST) {
2188 happy_meal_rx(hp, dev);
2192 spin_unlock(&hp->happy_lock);
2200 static int happy_meal_open(struct net_device *dev)
2202 struct happy_meal *hp = dev->priv;
2205 HMD(("happy_meal_open: "));
2207 /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2208 * into a single source which we register handling at probe time.
2210 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2211 if (request_irq(dev->irq, &happy_meal_interrupt,
2212 SA_SHIRQ, dev->name, (void *)dev)) {
2215 printk(KERN_ERR "happy_meal(SBUS): Can't order irq %s to go.\n",
2216 __irq_itoa(dev->irq));
2218 printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2226 HMD(("to happy_meal_init\n"));
2228 spin_lock_irq(&hp->happy_lock);
2229 res = happy_meal_init(hp);
2230 spin_unlock_irq(&hp->happy_lock);
2232 if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2233 free_irq(dev->irq, dev);
2237 static int happy_meal_close(struct net_device *dev)
2239 struct happy_meal *hp = dev->priv;
2241 spin_lock_irq(&hp->happy_lock);
2242 happy_meal_stop(hp, hp->gregs);
2243 happy_meal_clean_rings(hp);
2245 /* If auto-negotiation timer is running, kill it. */
2246 del_timer(&hp->happy_timer);
2248 spin_unlock_irq(&hp->happy_lock);
2250 /* On Quattro QFE cards, all hme interrupts are concentrated
2251 * into a single source which we register handling at probe
2252 * time and never unregister.
2254 if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2255 free_irq(dev->irq, dev);
2261 #define SXD(x) printk x
2266 static void happy_meal_tx_timeout(struct net_device *dev)
2268 struct happy_meal *hp = dev->priv;
2270 printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2272 printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2273 hme_read32(hp, hp->gregs + GREG_STAT),
2274 hme_read32(hp, hp->etxregs + ETX_CFG),
2275 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2277 spin_lock_irq(&hp->happy_lock);
2278 happy_meal_init(hp);
2279 spin_unlock_irq(&hp->happy_lock);
2281 netif_wake_queue(dev);
2284 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2286 struct happy_meal *hp = dev->priv;
2290 tx_flags = TXFLAG_OWN;
2291 if (skb->ip_summed == CHECKSUM_HW) {
2292 u32 csum_start_off, csum_stuff_off;
2294 csum_start_off = (u32) (skb->h.raw - skb->data);
2295 csum_stuff_off = (u32) ((skb->h.raw + skb->csum) - skb->data);
2297 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2298 ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2299 ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2302 spin_lock_irq(&hp->happy_lock);
2304 if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2305 netif_stop_queue(dev);
2306 spin_unlock_irq(&hp->happy_lock);
2307 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2313 SXD(("SX<l[%d]e[%d]>", len, entry));
2314 hp->tx_skbs[entry] = skb;
2316 if (skb_shinfo(skb)->nr_frags == 0) {
2320 mapping = hme_dma_map(hp, skb->data, len, DMA_TODEVICE);
2321 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2322 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2323 (tx_flags | (len & TXFLAG_SIZE)),
2325 entry = NEXT_TX(entry);
2327 u32 first_len, first_mapping;
2328 int frag, first_entry = entry;
2330 /* We must give this initial chunk to the device last.
2331 * Otherwise we could race with the device.
2333 first_len = skb_headlen(skb);
2334 first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TODEVICE);
2335 entry = NEXT_TX(entry);
2337 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2338 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2339 u32 len, mapping, this_txflags;
2341 len = this_frag->size;
2342 mapping = hme_dma_map(hp,
2343 ((void *) page_address(this_frag->page) +
2344 this_frag->page_offset),
2346 this_txflags = tx_flags;
2347 if (frag == skb_shinfo(skb)->nr_frags - 1)
2348 this_txflags |= TXFLAG_EOP;
2349 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2350 (this_txflags | (len & TXFLAG_SIZE)),
2352 entry = NEXT_TX(entry);
2354 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2355 (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2361 if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2362 netif_stop_queue(dev);
2365 hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2367 spin_unlock_irq(&hp->happy_lock);
2369 dev->trans_start = jiffies;
2371 tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2375 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2377 struct happy_meal *hp = dev->priv;
2379 spin_lock_irq(&hp->happy_lock);
2380 happy_meal_get_counters(hp, hp->bigmacregs);
2381 spin_unlock_irq(&hp->happy_lock);
2383 return &hp->net_stats;
2386 static void happy_meal_set_multicast(struct net_device *dev)
2388 struct happy_meal *hp = dev->priv;
2389 unsigned long bregs = hp->bigmacregs;
2390 struct dev_mc_list *dmi = dev->mc_list;
2395 spin_lock_irq(&hp->happy_lock);
2397 netif_stop_queue(dev);
2399 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2400 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2401 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2402 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2403 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2404 } else if (dev->flags & IFF_PROMISC) {
2405 hme_write32(hp, bregs + BMAC_RXCFG,
2406 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2410 for (i = 0; i < 4; i++)
2413 for (i = 0; i < dev->mc_count; i++) {
2414 addrs = dmi->dmi_addr;
2420 crc = ether_crc_le(6, addrs);
2422 hash_table[crc >> 4] |= 1 << (crc & 0xf);
2424 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2425 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2426 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2427 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2430 netif_wake_queue(dev);
2432 spin_unlock_irq(&hp->happy_lock);
2435 /* Ethtool support... */
2436 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2438 struct happy_meal *hp = dev->priv;
2441 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2442 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2443 SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2445 /* XXX hardcoded stuff for now */
2446 cmd->port = PORT_TP; /* XXX no MII support */
2447 cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2448 cmd->phy_address = 0; /* XXX fixed PHYAD */
2450 /* Record PHY settings. */
2451 spin_lock_irq(&hp->happy_lock);
2452 hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2453 hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2454 spin_unlock_irq(&hp->happy_lock);
2456 if (hp->sw_bmcr & BMCR_ANENABLE) {
2457 cmd->autoneg = AUTONEG_ENABLE;
2459 (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2460 SPEED_100 : SPEED_10;
2461 if (cmd->speed == SPEED_100)
2463 (hp->sw_lpa & (LPA_100FULL)) ?
2464 DUPLEX_FULL : DUPLEX_HALF;
2467 (hp->sw_lpa & (LPA_10FULL)) ?
2468 DUPLEX_FULL : DUPLEX_HALF;
2470 cmd->autoneg = AUTONEG_DISABLE;
2472 (hp->sw_bmcr & BMCR_SPEED100) ?
2473 SPEED_100 : SPEED_10;
2475 (hp->sw_bmcr & BMCR_FULLDPLX) ?
2476 DUPLEX_FULL : DUPLEX_HALF;
2481 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2483 struct happy_meal *hp = dev->priv;
2485 /* Verify the settings we care about. */
2486 if (cmd->autoneg != AUTONEG_ENABLE &&
2487 cmd->autoneg != AUTONEG_DISABLE)
2489 if (cmd->autoneg == AUTONEG_DISABLE &&
2490 ((cmd->speed != SPEED_100 &&
2491 cmd->speed != SPEED_10) ||
2492 (cmd->duplex != DUPLEX_HALF &&
2493 cmd->duplex != DUPLEX_FULL)))
2496 /* Ok, do it to it. */
2497 spin_lock_irq(&hp->happy_lock);
2498 del_timer(&hp->happy_timer);
2499 happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2500 spin_unlock_irq(&hp->happy_lock);
2505 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2507 struct happy_meal *hp = dev->priv;
2509 strcpy(info->driver, "sunhme");
2510 strcpy(info->version, "2.02");
2511 if (hp->happy_flags & HFLAG_PCI) {
2512 struct pci_dev *pdev = hp->happy_dev;
2513 strcpy(info->bus_info, pci_name(pdev));
2517 struct sbus_dev *sdev = hp->happy_dev;
2518 sprintf(info->bus_info, "SBUS:%d",
2524 static u32 hme_get_link(struct net_device *dev)
2526 struct happy_meal *hp = dev->priv;
2528 spin_lock_irq(&hp->happy_lock);
2529 hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2530 spin_unlock_irq(&hp->happy_lock);
2532 return (hp->sw_bmsr & BMSR_LSTATUS);
2535 static struct ethtool_ops hme_ethtool_ops = {
2536 .get_settings = hme_get_settings,
2537 .set_settings = hme_set_settings,
2538 .get_drvinfo = hme_get_drvinfo,
2539 .get_link = hme_get_link,
2542 static int hme_version_printed;
2545 void __init quattro_get_ranges(struct quattro *qp)
2547 struct sbus_dev *sdev = qp->quattro_dev;
2550 err = prom_getproperty(sdev->prom_node,
2552 (char *)&qp->ranges[0],
2553 sizeof(qp->ranges));
2554 if (err == 0 || err == -1) {
2558 qp->nranges = (err / sizeof(struct linux_prom_ranges));
2561 static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2563 struct sbus_dev *sdev = hp->happy_dev;
2566 for (rng = 0; rng < qp->nranges; rng++) {
2567 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2570 for (reg = 0; reg < 5; reg++) {
2571 if (sdev->reg_addrs[reg].which_io ==
2572 rngp->ot_child_space)
2578 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2579 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2583 /* Given a happy meal sbus device, find it's quattro parent.
2584 * If none exist, allocate and return a new one.
2586 * Return NULL on failure.
2588 static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev)
2590 struct sbus_bus *sbus;
2591 struct sbus_dev *sdev;
2595 if (qfe_sbus_list == NULL)
2598 for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2599 for (i = 0, sdev = qp->quattro_dev;
2600 (sdev != NULL) && (i < 4);
2601 sdev = sdev->next, i++) {
2602 if (sdev == goal_sdev)
2606 for_each_sbus(sbus) {
2607 for_each_sbusdev(sdev, sbus) {
2608 if (sdev == goal_sdev)
2613 /* Cannot find quattro parent, fail. */
2617 qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2621 for (i = 0; i < 4; i++)
2622 qp->happy_meals[i] = NULL;
2624 qp->quattro_dev = goal_sdev;
2625 qp->next = qfe_sbus_list;
2627 quattro_get_ranges(qp);
2632 /* After all quattro cards have been probed, we call these functions
2633 * to register the IRQ handlers.
2635 static void __init quattro_sbus_register_irqs(void)
2639 for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2640 struct sbus_dev *sdev = qp->quattro_dev;
2643 err = request_irq(sdev->irqs[0],
2644 quattro_sbus_interrupt,
2645 SA_SHIRQ, "Quattro",
2648 printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2649 panic("QFE request irq");
2653 #endif /* CONFIG_SBUS */
2656 static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2658 struct pci_dev *bdev = pdev->bus->self;
2661 if (!bdev) return NULL;
2662 for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2663 struct pci_dev *qpdev = qp->quattro_dev;
2668 qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2672 for (i = 0; i < 4; i++)
2673 qp->happy_meals[i] = NULL;
2675 qp->quattro_dev = bdev;
2676 qp->next = qfe_pci_list;
2679 /* No range tricks necessary on PCI. */
2684 #endif /* CONFIG_PCI */
2687 static int __init happy_meal_sbus_init(struct sbus_dev *sdev, int is_qfe)
2689 struct quattro *qp = NULL;
2690 struct happy_meal *hp;
2691 struct net_device *dev;
2692 int i, qfe_slot = -1;
2696 qp = quattro_sbus_find(sdev);
2699 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2700 if (qp->happy_meals[qfe_slot] == NULL)
2707 dev = alloc_etherdev(sizeof(struct happy_meal));
2710 SET_MODULE_OWNER(dev);
2712 if (hme_version_printed++ == 0)
2713 printk(KERN_INFO "%s", version);
2715 /* If user did not specify a MAC address specifically, use
2716 * the Quattro local-mac-address property...
2718 for (i = 0; i < 6; i++) {
2719 if (macaddr[i] != 0)
2722 if (i < 6) { /* a mac address was given */
2723 for (i = 0; i < 6; i++)
2724 dev->dev_addr[i] = macaddr[i];
2726 } else if (qfe_slot != -1 &&
2727 prom_getproplen(sdev->prom_node,
2728 "local-mac-address") == 6) {
2729 prom_getproperty(sdev->prom_node, "local-mac-address",
2732 memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2737 hp->happy_dev = sdev;
2739 spin_lock_init(&hp->happy_lock);
2742 if (sdev->num_registers != 5) {
2743 printk(KERN_ERR "happymeal: Device does not have 5 regs, it has %d.\n",
2744 sdev->num_registers);
2745 printk(KERN_ERR "happymeal: Would you like that for here or to go?\n");
2746 goto err_out_free_netdev;
2750 hp->qfe_parent = qp;
2751 hp->qfe_ent = qfe_slot;
2752 qp->happy_meals[qfe_slot] = dev;
2753 quattro_apply_ranges(qp, hp);
2756 hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2757 GREG_REG_SIZE, "HME Global Regs");
2759 printk(KERN_ERR "happymeal: Cannot map Happy Meal global registers.\n");
2760 goto err_out_free_netdev;
2763 hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2764 ETX_REG_SIZE, "HME TX Regs");
2766 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Transmit registers.\n");
2767 goto err_out_iounmap;
2770 hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2771 ERX_REG_SIZE, "HME RX Regs");
2773 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Receive registers.\n");
2774 goto err_out_iounmap;
2777 hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2778 BMAC_REG_SIZE, "HME BIGMAC Regs");
2779 if (!hp->bigmacregs) {
2780 printk(KERN_ERR "happymeal: Cannot map Happy Meal BIGMAC registers.\n");
2781 goto err_out_iounmap;
2784 hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2785 TCVR_REG_SIZE, "HME Tranceiver Regs");
2787 printk(KERN_ERR "happymeal: Cannot map Happy Meal Tranceiver registers.\n");
2788 goto err_out_iounmap;
2791 hp->hm_revision = prom_getintdefault(sdev->prom_node, "hm-rev", 0xff);
2792 if (hp->hm_revision == 0xff)
2793 hp->hm_revision = 0xa0;
2795 /* Now enable the feature flags we can. */
2796 if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2797 hp->happy_flags = HFLAG_20_21;
2798 else if (hp->hm_revision != 0xa0)
2799 hp->happy_flags = HFLAG_NOT_A0;
2802 hp->happy_flags |= HFLAG_QUATTRO;
2804 /* Get the supported DVMA burst sizes from our Happy SBUS. */
2805 hp->happy_bursts = prom_getintdefault(sdev->bus->prom_node,
2806 "burst-sizes", 0x00);
2808 hp->happy_block = sbus_alloc_consistent(hp->happy_dev,
2812 if (!hp->happy_block) {
2813 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2814 goto err_out_iounmap;
2817 /* Force check of the link first time we are brought up. */
2820 /* Force timer state to 'asleep' with count of zero. */
2821 hp->timer_state = asleep;
2822 hp->timer_ticks = 0;
2824 init_timer(&hp->happy_timer);
2827 dev->open = &happy_meal_open;
2828 dev->stop = &happy_meal_close;
2829 dev->hard_start_xmit = &happy_meal_start_xmit;
2830 dev->get_stats = &happy_meal_get_stats;
2831 dev->set_multicast_list = &happy_meal_set_multicast;
2832 dev->tx_timeout = &happy_meal_tx_timeout;
2833 dev->watchdog_timeo = 5*HZ;
2834 dev->ethtool_ops = &hme_ethtool_ops;
2836 /* Happy Meal can do it all... except VLAN. */
2837 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_VLAN_CHALLENGED;
2839 dev->irq = sdev->irqs[0];
2841 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2842 /* Hook up PCI register/dma accessors. */
2843 hp->read_desc32 = sbus_hme_read_desc32;
2844 hp->write_txd = sbus_hme_write_txd;
2845 hp->write_rxd = sbus_hme_write_rxd;
2846 hp->dma_map = (u32 (*)(void *, void *, long, int))sbus_map_single;
2847 hp->dma_unmap = (void (*)(void *, u32, long, int))sbus_unmap_single;
2848 hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
2849 sbus_dma_sync_single_for_cpu;
2850 hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
2851 sbus_dma_sync_single_for_device;
2852 hp->read32 = sbus_hme_read32;
2853 hp->write32 = sbus_hme_write32;
2856 /* Grrr, Happy Meal comes up by default not advertising
2857 * full duplex 100baseT capabilities, fix this.
2859 spin_lock_irq(&hp->happy_lock);
2860 happy_meal_set_initial_advertisement(hp);
2861 spin_unlock_irq(&hp->happy_lock);
2863 if (register_netdev(hp->dev)) {
2864 printk(KERN_ERR "happymeal: Cannot register net device, "
2866 goto err_out_free_consistent;
2870 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2871 dev->name, qfe_slot);
2873 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2876 for (i = 0; i < 6; i++)
2878 dev->dev_addr[i], i == 5 ? ' ' : ':');
2881 /* We are home free at this point, link us in to the happy
2884 hp->next_module = root_happy_dev;
2885 root_happy_dev = hp;
2889 err_out_free_consistent:
2890 sbus_free_consistent(hp->happy_dev,
2897 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2899 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2901 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2903 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2905 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2907 err_out_free_netdev:
2917 static int is_quattro_p(struct pci_dev *pdev)
2919 struct pci_dev *busdev = pdev->bus->self;
2920 struct list_head *tmp;
2923 if (busdev->vendor != PCI_VENDOR_ID_DEC ||
2924 busdev->device != PCI_DEVICE_ID_DEC_21153)
2928 tmp = pdev->bus->devices.next;
2929 while (tmp != &pdev->bus->devices) {
2930 struct pci_dev *this_pdev = pci_dev_b(tmp);
2932 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2933 this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2945 /* Fetch MAC address from vital product data of PCI ROM. */
2946 static void find_eth_addr_in_vpd(void *rom_base, int len, int index, unsigned char *dev_addr)
2950 for (this_offset = 0x20; this_offset < len; this_offset++) {
2951 void *p = rom_base + this_offset;
2953 if (readb(p + 0) != 0x90 ||
2954 readb(p + 1) != 0x00 ||
2955 readb(p + 2) != 0x09 ||
2956 readb(p + 3) != 0x4e ||
2957 readb(p + 4) != 0x41 ||
2958 readb(p + 5) != 0x06)
2967 for (i = 0; i < 6; i++)
2968 dev_addr[i] = readb(p + i);
2975 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2982 if (is_quattro_p(pdev))
2983 index = PCI_SLOT(pdev->devfn);
2985 if (pdev->resource[PCI_ROM_RESOURCE].parent == NULL) {
2986 if (pci_assign_resource(pdev, PCI_ROM_RESOURCE) < 0)
2990 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_reg_orig);
2991 pci_write_config_dword(pdev, pdev->rom_base_reg,
2992 rom_reg_orig | PCI_ROM_ADDRESS_ENABLE);
2994 p = ioremap(pci_resource_start(pdev, PCI_ROM_RESOURCE), (64 * 1024));
2995 if (p != NULL && readb(p) == 0x55 && readb(p + 1) == 0xaa)
2996 find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
3001 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_reg_orig);
3005 /* Sun MAC prefix then 3 random bytes. */
3009 get_random_bytes(&dev_addr[3], 3);
3012 #endif /* !(__sparc__) */
3014 static int __init happy_meal_pci_init(struct pci_dev *pdev)
3016 struct quattro *qp = NULL;
3018 struct pcidev_cookie *pcp;
3021 struct happy_meal *hp;
3022 struct net_device *dev;
3023 unsigned long hpreg_base;
3024 int i, qfe_slot = -1;
3028 /* Now make sure pci_dev cookie is there. */
3030 pcp = pdev->sysdata;
3031 if (pcp == NULL || pcp->prom_node == -1) {
3032 printk(KERN_ERR "happymeal(PCI): Some PCI device info missing\n");
3035 node = pcp->prom_node;
3037 prom_getstring(node, "name", prom_name, sizeof(prom_name));
3039 if (is_quattro_p(pdev))
3040 strcpy(prom_name, "SUNW,qfe");
3042 strcpy(prom_name, "SUNW,hme");
3046 if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3047 qp = quattro_pci_find(pdev);
3050 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3051 if (qp->happy_meals[qfe_slot] == NULL)
3057 dev = alloc_etherdev(sizeof(struct happy_meal));
3061 SET_MODULE_OWNER(dev);
3062 SET_NETDEV_DEV(dev, &pdev->dev);
3064 if (hme_version_printed++ == 0)
3065 printk(KERN_INFO "%s", version);
3067 dev->base_addr = (long) pdev;
3069 hp = (struct happy_meal *)dev->priv;
3070 memset(hp, 0, sizeof(*hp));
3072 hp->happy_dev = pdev;
3074 spin_lock_init(&hp->happy_lock);
3077 hp->qfe_parent = qp;
3078 hp->qfe_ent = qfe_slot;
3079 qp->happy_meals[qfe_slot] = dev;
3082 hpreg_base = pci_resource_start(pdev, 0);
3084 if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3085 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3086 goto err_out_clear_quattro;
3088 if (pci_request_regions(pdev, dev->name)) {
3089 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3091 goto err_out_clear_quattro;
3094 if ((hpreg_base = (unsigned long) ioremap(hpreg_base, 0x8000)) == 0) {
3095 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3096 goto err_out_free_res;
3099 for (i = 0; i < 6; i++) {
3100 if (macaddr[i] != 0)
3103 if (i < 6) { /* a mac address was given */
3104 for (i = 0; i < 6; i++)
3105 dev->dev_addr[i] = macaddr[i];
3109 if (qfe_slot != -1 &&
3110 prom_getproplen(node, "local-mac-address") == 6) {
3111 prom_getproperty(node, "local-mac-address",
3114 memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3117 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3121 /* Layout registers. */
3122 hp->gregs = (hpreg_base + 0x0000UL);
3123 hp->etxregs = (hpreg_base + 0x2000UL);
3124 hp->erxregs = (hpreg_base + 0x4000UL);
3125 hp->bigmacregs = (hpreg_base + 0x6000UL);
3126 hp->tcvregs = (hpreg_base + 0x7000UL);
3129 hp->hm_revision = prom_getintdefault(node, "hm-rev", 0xff);
3130 if (hp->hm_revision == 0xff) {
3133 pci_read_config_byte(pdev, PCI_REVISION_ID, &prev);
3134 hp->hm_revision = 0xc0 | (prev & 0x0f);
3137 /* works with this on non-sparc hosts */
3138 hp->hm_revision = 0x20;
3141 /* Now enable the feature flags we can. */
3142 if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3143 hp->happy_flags = HFLAG_20_21;
3144 else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3145 hp->happy_flags = HFLAG_NOT_A0;
3148 hp->happy_flags |= HFLAG_QUATTRO;
3150 /* And of course, indicate this is PCI. */
3151 hp->happy_flags |= HFLAG_PCI;
3154 /* Assume PCI happy meals can handle all burst sizes. */
3155 hp->happy_bursts = DMA_BURSTBITS;
3158 hp->happy_block = (struct hmeal_init_block *)
3159 pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3162 if (!hp->happy_block) {
3163 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3164 goto err_out_iounmap;
3168 hp->timer_state = asleep;
3169 hp->timer_ticks = 0;
3171 init_timer(&hp->happy_timer);
3174 dev->open = &happy_meal_open;
3175 dev->stop = &happy_meal_close;
3176 dev->hard_start_xmit = &happy_meal_start_xmit;
3177 dev->get_stats = &happy_meal_get_stats;
3178 dev->set_multicast_list = &happy_meal_set_multicast;
3179 dev->tx_timeout = &happy_meal_tx_timeout;
3180 dev->watchdog_timeo = 5*HZ;
3181 dev->ethtool_ops = &hme_ethtool_ops;
3182 dev->irq = pdev->irq;
3185 /* Happy Meal can do it all... */
3186 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3188 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3189 /* Hook up PCI register/dma accessors. */
3190 hp->read_desc32 = pci_hme_read_desc32;
3191 hp->write_txd = pci_hme_write_txd;
3192 hp->write_rxd = pci_hme_write_rxd;
3193 hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3194 hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3195 hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
3196 pci_dma_sync_single_for_cpu;
3197 hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
3198 pci_dma_sync_single_for_device;
3199 hp->read32 = pci_hme_read32;
3200 hp->write32 = pci_hme_write32;
3203 /* Grrr, Happy Meal comes up by default not advertising
3204 * full duplex 100baseT capabilities, fix this.
3206 spin_lock_irq(&hp->happy_lock);
3207 happy_meal_set_initial_advertisement(hp);
3208 spin_unlock_irq(&hp->happy_lock);
3210 if (register_netdev(hp->dev)) {
3211 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3213 goto err_out_iounmap;
3217 struct pci_dev *qpdev = qp->quattro_dev;
3220 if (!strncmp(dev->name, "eth", 3)) {
3221 int i = simple_strtoul(dev->name + 3, NULL, 10);
3222 sprintf(prom_name, "-%d", i + 3);
3224 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3225 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3226 qpdev->device == PCI_DEVICE_ID_DEC_21153)
3227 printk("DEC 21153 PCI Bridge\n");
3229 printk("unknown bridge %04x.%04x\n",
3230 qpdev->vendor, qpdev->device);
3234 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3235 dev->name, qfe_slot);
3237 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3240 for (i = 0; i < 6; i++)
3241 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ' ' : ':');
3245 /* We are home free at this point, link us in to the happy
3248 hp->next_module = root_happy_dev;
3249 root_happy_dev = hp;
3254 iounmap((void *)hp->gregs);
3257 pci_release_regions(pdev);
3259 err_out_clear_quattro:
3261 qp->happy_meals[qfe_slot] = NULL;
3271 static int __init happy_meal_sbus_probe(void)
3273 struct sbus_bus *sbus;
3274 struct sbus_dev *sdev;
3278 for_each_sbus(sbus) {
3279 for_each_sbusdev(sdev, sbus) {
3280 char *name = sdev->prom_name;
3282 if (!strcmp(name, "SUNW,hme")) {
3284 prom_getstring(sdev->prom_node, "model",
3285 model, sizeof(model));
3286 if (!strcmp(model, "SUNW,sbus-qfe"))
3287 happy_meal_sbus_init(sdev, 1);
3289 happy_meal_sbus_init(sdev, 0);
3290 } else if (!strcmp(name, "qfe") ||
3291 !strcmp(name, "SUNW,qfe")) {
3293 happy_meal_sbus_init(sdev, 1);
3298 quattro_sbus_register_irqs();
3304 static int __init happy_meal_pci_probe(void)
3306 struct pci_dev *pdev = NULL;
3309 while ((pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3310 PCI_DEVICE_ID_SUN_HAPPYMEAL, pdev)) != NULL) {
3311 if (pci_enable_device(pdev))
3313 pci_set_master(pdev);
3315 happy_meal_pci_init(pdev);
3321 static int __init happy_meal_probe(void)
3323 static int called = 0;
3326 root_happy_dev = NULL;
3334 cards += happy_meal_sbus_probe();
3337 cards += happy_meal_pci_probe();
3345 static void __exit happy_meal_cleanup_module(void)
3348 struct quattro *last_seen_qfe = NULL;
3351 while (root_happy_dev) {
3352 struct happy_meal *hp = root_happy_dev;
3353 struct happy_meal *next = root_happy_dev->next_module;
3354 struct net_device *dev = hp->dev;
3356 /* Unregister netdev before unmapping registers as this
3357 * call can end up trying to access those registers.
3359 unregister_netdev(dev);
3362 if (!(hp->happy_flags & HFLAG_PCI)) {
3363 if (hp->happy_flags & HFLAG_QUATTRO) {
3364 if (hp->qfe_parent != last_seen_qfe) {
3365 free_irq(dev->irq, hp->qfe_parent);
3366 last_seen_qfe = hp->qfe_parent;
3370 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3371 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3372 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3373 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3374 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3375 sbus_free_consistent(hp->happy_dev,
3382 if ((hp->happy_flags & HFLAG_PCI)) {
3383 pci_free_consistent(hp->happy_dev,
3387 iounmap((void *)hp->gregs);
3388 pci_release_regions(hp->happy_dev);
3393 root_happy_dev = next;
3396 /* Now cleanup the quattro lists. */
3398 while (qfe_sbus_list) {
3399 struct quattro *qfe = qfe_sbus_list;
3400 struct quattro *next = qfe->next;
3404 qfe_sbus_list = next;
3408 while (qfe_pci_list) {
3409 struct quattro *qfe = qfe_pci_list;
3410 struct quattro *next = qfe->next;
3414 qfe_pci_list = next;
3419 module_init(happy_meal_probe);
3420 module_exit(happy_meal_cleanup_module);