drivers/net/sunhme.c

   1 /* $Id: sunhme.c,v 1.124 2002/01/15 06:25:51 davem Exp $
   2  * sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
   3  *           auto carrier detecting ethernet driver.  Also known as the
   4  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
   5  *
   6  * Copyright (C) 1996, 1998, 1999, 2002, 2003 David S. Miller (davem@redhat.com)
   7  *
   8  * Changes :
   9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
  10  *   - port to non-sparc architectures. Tested only on x86 and
  11  *     only currently works with QFE PCI cards.
  12  *   - ability to specify the MAC address at module load time by passing this
  13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
  14  */
  15
  16 static char version[] =
  17         "sunhme.c:v2.02 24/Aug/2003 David S. Miller (davem@redhat.com)\n";
  18
  19 #include <linux/config.h>
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/types.h>
  23 #include <linux/fcntl.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/ioport.h>
  26 #include <linux/in.h>
  27 #include <linux/slab.h>
  28 #include <linux/string.h>
  29 #include <linux/delay.h>
  30 #include <linux/init.h>
  31 #include <linux/ethtool.h>
  32 #include <linux/mii.h>
  33 #include <linux/crc32.h>
  34 #include <linux/random.h>
  35 #include <linux/errno.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/etherdevice.h>
  38 #include <linux/skbuff.h>
  39
  40 #include <asm/system.h>
  41 #include <asm/bitops.h>
  42 #include <asm/io.h>
  43 #include <asm/dma.h>
  44 #include <asm/byteorder.h>
  45
  46 #ifdef __sparc__
  47 #include <asm/idprom.h>
  48 #include <asm/sbus.h>
  49 #include <asm/openprom.h>
  50 #include <asm/oplib.h>
  51 #include <asm/auxio.h>
  52 #ifndef __sparc_v9__
  53 #include <asm/io-unit.h>
  54 #endif
  55 #endif
  56 #include <asm/uaccess.h>
  57
  58 #include <asm/pgtable.h>
  59 #include <asm/irq.h>
  60
  61 #ifdef CONFIG_PCI
  62 #include <linux/pci.h>
  63 #ifdef __sparc__
  64 #include <asm/pbm.h>
  65 #endif
  66 #endif
  67
  68 #include "sunhme.h"
  69
  70
  71 #define DRV_NAME "sunhme"
  72
  73 static int macaddr[6];
  74
  75 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  76 MODULE_PARM(macaddr, "6i");
  77 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
  78 MODULE_LICENSE("GPL");
  79
  80 static struct happy_meal *root_happy_dev;
  81
  82 #ifdef CONFIG_SBUS
  83 static struct quattro *qfe_sbus_list;
  84 #endif
  85
  86 #ifdef CONFIG_PCI
  87 static struct quattro *qfe_pci_list;
  88 #endif
  89
  90 #undef HMEDEBUG
  91 #undef SXDEBUG
  92 #undef RXDEBUG
  93 #undef TXDEBUG
  94 #undef TXLOGGING
  95
  96 #ifdef TXLOGGING
  97 struct hme_tx_logent {
  98         unsigned int tstamp;
  99         int tx_new, tx_old;
 100         unsigned int action;
 101 #define TXLOG_ACTION_IRQ        0x01
 102 #define TXLOG_ACTION_TXMIT      0x02
 103 #define TXLOG_ACTION_TBUSY      0x04
 104 #define TXLOG_ACTION_NBUFS      0x08
 105         unsigned int status;
 106 };
 107 #define TX_LOG_LEN      128
 108 static struct hme_tx_logent tx_log[TX_LOG_LEN];
 109 static int txlog_cur_entry;
 110 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
 111 {
 112         struct hme_tx_logent *tlp;
 113         unsigned long flags;
 114
 115         save_and_cli(flags);
 116         tlp = &tx_log[txlog_cur_entry];
 117         tlp->tstamp = (unsigned int)jiffies;
 118         tlp->tx_new = hp->tx_new;
 119         tlp->tx_old = hp->tx_old;
 120         tlp->action = a;
 121         tlp->status = s;
 122         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
 123         restore_flags(flags);
 124 }
 125 static __inline__ void tx_dump_log(void)
 126 {
 127         int i, this;
 128
 129         this = txlog_cur_entry;
 130         for (i = 0; i < TX_LOG_LEN; i++) {
 131                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
 132                        tx_log[this].tstamp,
 133                        tx_log[this].tx_new, tx_log[this].tx_old,
 134                        tx_log[this].action, tx_log[this].status);
 135                 this = (this + 1) & (TX_LOG_LEN - 1);
 136         }
 137 }
 138 static __inline__ void tx_dump_ring(struct happy_meal *hp)
 139 {
 140         struct hmeal_init_block *hb = hp->happy_block;
 141         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
 142         int i;
 143
 144         for (i = 0; i < TX_RING_SIZE; i+=4) {
 145                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
 146                        i, i + 4,
 147                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
 148                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
 149                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
 150                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
 151         }
 152 }
 153 #else
 154 #define tx_add_log(hp, a, s)            do { } while(0)
 155 #define tx_dump_log()                   do { } while(0)
 156 #define tx_dump_ring(hp)                do { } while(0)
 157 #endif
 158
 159 #ifdef HMEDEBUG
 160 #define HMD(x)  printk x
 161 #else
 162 #define HMD(x)
 163 #endif
 164
 165 /* #define AUTO_SWITCH_DEBUG */
 166
 167 #ifdef AUTO_SWITCH_DEBUG
 168 #define ASD(x)  printk x
 169 #else
 170 #define ASD(x)
 171 #endif
 172
 173 #define DEFAULT_IPG0      16 /* For lance-mode only */
 174 #define DEFAULT_IPG1       8 /* For all modes */
 175 #define DEFAULT_IPG2       4 /* For all modes */
 176 #define DEFAULT_JAMSIZE    4 /* Toe jam */
 177
 178 #ifdef CONFIG_PCI
 179 /* This happy_pci_ids is declared __initdata because it is only used
 180    as an advisory to depmod.  If this is ported to the new PCI interface
 181    where it could be referenced at any time due to hot plugging,
 182    the __initdata reference should be removed. */
 183
 184 struct pci_device_id happymeal_pci_ids[] = {
 185         {
 186           .vendor       = PCI_VENDOR_ID_SUN,
 187           .device       = PCI_DEVICE_ID_SUN_HAPPYMEAL,
 188           .subvendor    = PCI_ANY_ID,
 189           .subdevice    = PCI_ANY_ID,
 190         },
 191         { }                     /* Terminating entry */
 192 };
 193
 194 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
 195
 196 #endif
 197
 198 /* NOTE: In the descriptor writes one _must_ write the address
 199  *       member _first_.  The card must not be allowed to see
 200  *       the updated descriptor flags until the address is
 201  *       correct.  I've added a write memory barrier between
 202  *       the two stores so that I can sleep well at night... -DaveM
 203  */
 204
 205 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
 206 static void sbus_hme_write32(unsigned long reg, u32 val)
 207 {
 208         sbus_writel(val, reg);
 209 }
 210
 211 static u32 sbus_hme_read32(unsigned long reg)
 212 {
 213         return sbus_readl(reg);
 214 }
 215
 216 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 217 {
 218         rxd->rx_addr = addr;
 219         wmb();
 220         rxd->rx_flags = flags;
 221 }
 222
 223 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 224 {
 225         txd->tx_addr = addr;
 226         wmb();
 227         txd->tx_flags = flags;
 228 }
 229
 230 static u32 sbus_hme_read_desc32(u32 *p)
 231 {
 232         return *p;
 233 }
 234
 235 static void pci_hme_write32(unsigned long reg, u32 val)
 236 {
 237         writel(val, reg);
 238 }
 239
 240 static u32 pci_hme_read32(unsigned long reg)
 241 {
 242         return readl(reg);
 243 }
 244
 245 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 246 {
 247         rxd->rx_addr = cpu_to_le32(addr);
 248         wmb();
 249         rxd->rx_flags = cpu_to_le32(flags);
 250 }
 251
 252 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 253 {
 254         txd->tx_addr = cpu_to_le32(addr);
 255         wmb();
 256         txd->tx_flags = cpu_to_le32(flags);
 257 }
 258
 259 static u32 pci_hme_read_desc32(u32 *p)
 260 {
 261         return cpu_to_le32p(p);
 262 }
 263
 264 #define hme_write32(__hp, __reg, __val) \
 265         ((__hp)->write32((__reg), (__val)))
 266 #define hme_read32(__hp, __reg) \
 267         ((__hp)->read32(__reg))
 268 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 269         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
 270 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 271         ((__hp)->write_txd((__txd), (__flags), (__addr)))
 272 #define hme_read_desc32(__hp, __p) \
 273         ((__hp)->read_desc32(__p))
 274 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 275         ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
 276 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 277         ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
 278 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 279         ((__hp)->dma_sync_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir)))
 280 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 281         ((__hp)->dma_sync_for_device((__hp)->happy_dev, (__addr), (__size), (__dir)))
 282 #else
 283 #ifdef CONFIG_SBUS
 284 /* SBUS only compilation */
 285 #define hme_write32(__hp, __reg, __val) \
 286         sbus_writel((__val), (__reg))
 287 #define hme_read32(__hp, __reg) \
 288         sbus_readl(__reg)
 289 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 290 do {    (__rxd)->rx_addr = (__addr); \
 291         wmb(); \
 292         (__rxd)->rx_flags = (__flags); \
 293 } while(0)
 294 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 295 do {    (__txd)->tx_addr = (__addr); \
 296         wmb(); \
 297         (__txd)->tx_flags = (__flags); \
 298 } while(0)
 299 #define hme_read_desc32(__hp, __p)      (*(__p))
 300 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 301         sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
 302 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 303         sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
 304 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 305         sbus_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
 306 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 307         sbus_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
 308 #else
 309 /* PCI only compilation */
 310 #define hme_write32(__hp, __reg, __val) \
 311         writel((__val), (__reg))
 312 #define hme_read32(__hp, __reg) \
 313         readl(__reg)
 314 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 315 do {    (__rxd)->rx_addr = cpu_to_le32(__addr); \
 316         wmb(); \
 317         (__rxd)->rx_flags = cpu_to_le32(__flags); \
 318 } while(0)
 319 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 320 do {    (__txd)->tx_addr = cpu_to_le32(__addr); \
 321         wmb(); \
 322         (__txd)->tx_flags = cpu_to_le32(__flags); \
 323 } while(0)
 324 #define hme_read_desc32(__hp, __p)      cpu_to_le32p(__p)
 325 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 326         pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
 327 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 328         pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
 329 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 330         pci_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
 331 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 332         pci_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
 333 #endif
 334 #endif
 335
 336
 337 #ifdef SBUS_DMA_BIDIRECTIONAL
 338 #       define DMA_BIDIRECTIONAL        SBUS_DMA_BIDIRECTIONAL
 339 #else
 340 #       define DMA_BIDIRECTIONAL        0
 341 #endif
 342
 343 #ifdef SBUS_DMA_FROMDEVICE
 344 #       define DMA_FROMDEVICE           SBUS_DMA_FROMDEVICE
 345 #else
 346 #       define DMA_TODEVICE             1
 347 #endif
 348
 349 #ifdef SBUS_DMA_TODEVICE
 350 #       define DMA_TODEVICE             SBUS_DMA_TODEVICE
 351 #else
 352 #       define DMA_FROMDEVICE           2
 353 #endif
 354
 355
 356 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
 357 static void BB_PUT_BIT(struct happy_meal *hp, unsigned long tregs, int bit)
 358 {
 359         hme_write32(hp, tregs + TCVR_BBDATA, bit);
 360         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 361         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 362 }
 363
 364 #if 0
 365 static u32 BB_GET_BIT(struct happy_meal *hp, unsigned long tregs, int internal)
 366 {
 367         u32 ret;
 368
 369         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 370         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 371         ret = hme_read32(hp, tregs + TCVR_CFG);
 372         if (internal)
 373                 ret &= TCV_CFG_MDIO0;
 374         else
 375                 ret &= TCV_CFG_MDIO1;
 376
 377         return ret;
 378 }
 379 #endif
 380
 381 static u32 BB_GET_BIT2(struct happy_meal *hp, unsigned long tregs, int internal)
 382 {
 383         u32 retval;
 384
 385         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 386         udelay(1);
 387         retval = hme_read32(hp, tregs + TCVR_CFG);
 388         if (internal)
 389                 retval &= TCV_CFG_MDIO0;
 390         else
 391                 retval &= TCV_CFG_MDIO1;
 392         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 393
 394         return retval;
 395 }
 396
 397 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
 398
 399 static int happy_meal_bb_read(struct happy_meal *hp,
 400                               unsigned long tregs, int reg)
 401 {
 402         u32 tmp;
 403         int retval = 0;
 404         int i;
 405
 406         ASD(("happy_meal_bb_read: reg=%d ", reg));
 407
 408         /* Enable the MIF BitBang outputs. */
 409         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 410
 411         /* Force BitBang into the idle state. */
 412         for (i = 0; i < 32; i++)
 413                 BB_PUT_BIT(hp, tregs, 1);
 414
 415         /* Give it the read sequence. */
 416         BB_PUT_BIT(hp, tregs, 0);
 417         BB_PUT_BIT(hp, tregs, 1);
 418         BB_PUT_BIT(hp, tregs, 1);
 419         BB_PUT_BIT(hp, tregs, 0);
 420
 421         /* Give it the PHY address. */
 422         tmp = hp->paddr & 0xff;
 423         for (i = 4; i >= 0; i--)
 424                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 425
 426         /* Tell it what register we want to read. */
 427         tmp = (reg & 0xff);
 428         for (i = 4; i >= 0; i--)
 429                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 430
 431         /* Close down the MIF BitBang outputs. */
 432         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 433
 434         /* Now read in the value. */
 435         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 436         for (i = 15; i >= 0; i--)
 437                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 438         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 439         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 440         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 441         ASD(("value=%x\n", retval));
 442         return retval;
 443 }
 444
 445 static void happy_meal_bb_write(struct happy_meal *hp,
 446                                 unsigned long tregs, int reg,
 447                                 unsigned short value)
 448 {
 449         u32 tmp;
 450         int i;
 451
 452         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
 453
 454         /* Enable the MIF BitBang outputs. */
 455         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 456
 457         /* Force BitBang into the idle state. */
 458         for (i = 0; i < 32; i++)
 459                 BB_PUT_BIT(hp, tregs, 1);
 460
 461         /* Give it write sequence. */
 462         BB_PUT_BIT(hp, tregs, 0);
 463         BB_PUT_BIT(hp, tregs, 1);
 464         BB_PUT_BIT(hp, tregs, 0);
 465         BB_PUT_BIT(hp, tregs, 1);
 466
 467         /* Give it the PHY address. */
 468         tmp = (hp->paddr & 0xff);
 469         for (i = 4; i >= 0; i--)
 470                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 471
 472         /* Tell it what register we will be writing. */
 473         tmp = (reg & 0xff);
 474         for (i = 4; i >= 0; i--)
 475                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 476
 477         /* Tell it to become ready for the bits. */
 478         BB_PUT_BIT(hp, tregs, 1);
 479         BB_PUT_BIT(hp, tregs, 0);
 480
 481         for (i = 15; i >= 0; i--)
 482                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
 483
 484         /* Close down the MIF BitBang outputs. */
 485         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 486 }
 487
 488 #define TCVR_READ_TRIES   16
 489
 490 static int happy_meal_tcvr_read(struct happy_meal *hp,
 491                                 unsigned long tregs, int reg)
 492 {
 493         int tries = TCVR_READ_TRIES;
 494         int retval;
 495
 496         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
 497         if (hp->tcvr_type == none) {
 498                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
 499                 return TCVR_FAILURE;
 500         }
 501
 502         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 503                 ASD(("doing bit bang\n"));
 504                 return happy_meal_bb_read(hp, tregs, reg);
 505         }
 506
 507         hme_write32(hp, tregs + TCVR_FRAME,
 508                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
 509         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 510                 udelay(20);
 511         if (!tries) {
 512                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
 513                 return TCVR_FAILURE;
 514         }
 515         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
 516         ASD(("value=%04x\n", retval));
 517         return retval;
 518 }
 519
 520 #define TCVR_WRITE_TRIES  16
 521
 522 static void happy_meal_tcvr_write(struct happy_meal *hp,
 523                                   unsigned long tregs, int reg,
 524                                   unsigned short value)
 525 {
 526         int tries = TCVR_WRITE_TRIES;
 527
 528         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
 529
 530         /* Welcome to Sun Microsystems, can I take your order please? */
 531         if (!(hp->happy_flags & HFLAG_FENABLE))
 532                 return happy_meal_bb_write(hp, tregs, reg, value);
 533
 534         /* Would you like fries with that? */
 535         hme_write32(hp, tregs + TCVR_FRAME,
 536                     (FRAME_WRITE | (hp->paddr << 23) |
 537                      ((reg & 0xff) << 18) | (value & 0xffff)));
 538         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 539                 udelay(20);
 540
 541         /* Anything else? */
 542         if (!tries)
 543                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
 544
 545         /* Fifty-two cents is your change, have a nice day. */
 546 }
 547
 548 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
 549  * that keeps watching the auto negotiation process as it progresses.
 550  * The DP83840 is first told to start doing it's thing, we set up the time
 551  * and place the timer state machine in it's initial state.
 552  *
 553  * Here the timer peeks at the DP83840 status registers at each click to see
 554  * if the auto negotiation has completed, we assume here that the DP83840 PHY
 555  * will time out at some point and just tell us what (didn't) happen.  For
 556  * complete coverage we only allow so many of the ticks at this level to run,
 557  * when this has expired we print a warning message and try another strategy.
 558  * This "other" strategy is to force the interface into various speed/duplex
 559  * configurations and we stop when we see a link-up condition before the
 560  * maximum number of "peek" ticks have occurred.
 561  *
 562  * Once a valid link status has been detected we configure the BigMAC and
 563  * the rest of the Happy Meal to speak the most efficient protocol we could
 564  * get a clean link for.  The priority for link configurations, highest first
 565  * is:
 566  *                 100 Base-T Full Duplex
 567  *                 100 Base-T Half Duplex
 568  *                 10 Base-T Full Duplex
 569  *                 10 Base-T Half Duplex
 570  *
 571  * We start a new timer now, after a successful auto negotiation status has
 572  * been detected.  This timer just waits for the link-up bit to get set in
 573  * the BMCR of the DP83840.  When this occurs we print a kernel log message
 574  * describing the link type in use and the fact that it is up.
 575  *
 576  * If a fatal error of some sort is signalled and detected in the interrupt
 577  * service routine, and the chip is reset, or the link is ifconfig'd down
 578  * and then back up, this entire process repeats itself all over again.
 579  */
 580 static int try_next_permutation(struct happy_meal *hp, unsigned long tregs)
 581 {
 582         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 583
 584         /* Downgrade from full to half duplex.  Only possible
 585          * via ethtool.
 586          */
 587         if (hp->sw_bmcr & BMCR_FULLDPLX) {
 588                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
 589                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 590                 return 0;
 591         }
 592
 593         /* Downgrade from 100 to 10. */
 594         if (hp->sw_bmcr & BMCR_SPEED100) {
 595                 hp->sw_bmcr &= ~(BMCR_SPEED100);
 596                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 597                 return 0;
 598         }
 599
 600         /* We've tried everything. */
 601         return -1;
 602 }
 603
 604 static void display_link_mode(struct happy_meal *hp, unsigned long tregs)
 605 {
 606         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
 607         if (hp->tcvr_type == external)
 608                 printk("external ");
 609         else
 610                 printk("internal ");
 611         printk("transceiver at ");
 612         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 613         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
 614                 if (hp->sw_lpa & LPA_100FULL)
 615                         printk("100Mb/s, Full Duplex.\n");
 616                 else
 617                         printk("100Mb/s, Half Duplex.\n");
 618         } else {
 619                 if (hp->sw_lpa & LPA_10FULL)
 620                         printk("10Mb/s, Full Duplex.\n");
 621                 else
 622                         printk("10Mb/s, Half Duplex.\n");
 623         }
 624 }
 625
 626 static void display_forced_link_mode(struct happy_meal *hp, unsigned long tregs)
 627 {
 628         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
 629         if (hp->tcvr_type == external)
 630                 printk("external ");
 631         else
 632                 printk("internal ");
 633         printk("transceiver at ");
 634         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 635         if (hp->sw_bmcr & BMCR_SPEED100)
 636                 printk("100Mb/s, ");
 637         else
 638                 printk("10Mb/s, ");
 639         if (hp->sw_bmcr & BMCR_FULLDPLX)
 640                 printk("Full Duplex.\n");
 641         else
 642                 printk("Half Duplex.\n");
 643 }
 644
 645 static int set_happy_link_modes(struct happy_meal *hp, unsigned long tregs)
 646 {
 647         int full;
 648
 649         /* All we care about is making sure the bigmac tx_cfg has a
 650          * proper duplex setting.
 651          */
 652         if (hp->timer_state == arbwait) {
 653                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 654                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
 655                         goto no_response;
 656                 if (hp->sw_lpa & LPA_100FULL)
 657                         full = 1;
 658                 else if (hp->sw_lpa & LPA_100HALF)
 659                         full = 0;
 660                 else if (hp->sw_lpa & LPA_10FULL)
 661                         full = 1;
 662                 else
 663                         full = 0;
 664         } else {
 665                 /* Forcing a link mode. */
 666                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 667                 if (hp->sw_bmcr & BMCR_FULLDPLX)
 668                         full = 1;
 669                 else
 670                         full = 0;
 671         }
 672
 673         /* Before changing other bits in the tx_cfg register, and in
 674          * general any of other the TX config registers too, you
 675          * must:
 676          * 1) Clear Enable
 677          * 2) Poll with reads until that bit reads back as zero
 678          * 3) Make TX configuration changes
 679          * 4) Set Enable once more
 680          */
 681         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 682                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 683                     ~(BIGMAC_TXCFG_ENABLE));
 684         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
 685                 barrier();
 686         if (full) {
 687                 hp->happy_flags |= HFLAG_FULL;
 688                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 689                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 690                             BIGMAC_TXCFG_FULLDPLX);
 691         } else {
 692                 hp->happy_flags &= ~(HFLAG_FULL);
 693                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 694                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 695                             ~(BIGMAC_TXCFG_FULLDPLX));
 696         }
 697         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 698                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 699                     BIGMAC_TXCFG_ENABLE);
 700         return 0;
 701 no_response:
 702         return 1;
 703 }
 704
 705 static int happy_meal_init(struct happy_meal *hp);
 706
 707 static int is_lucent_phy(struct happy_meal *hp)
 708 {
 709         unsigned long tregs = hp->tcvregs;
 710         unsigned short mr2, mr3;
 711         int ret = 0;
 712
 713         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
 714         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
 715         if ((mr2 & 0xffff) == 0x0180 &&
 716             ((mr3 & 0xffff) >> 10) == 0x1d)
 717                 ret = 1;
 718
 719         return ret;
 720 }
 721
 722 static void happy_meal_timer(unsigned long data)
 723 {
 724         struct happy_meal *hp = (struct happy_meal *) data;
 725         unsigned long tregs = hp->tcvregs;
 726         int restart_timer = 0;
 727
 728         spin_lock_irq(&hp->happy_lock);
 729
 730         hp->timer_ticks++;
 731         switch(hp->timer_state) {
 732         case arbwait:
 733                 /* Only allow for 5 ticks, thats 10 seconds and much too
 734                  * long to wait for arbitration to complete.
 735                  */
 736                 if (hp->timer_ticks >= 10) {
 737                         /* Enter force mode. */
 738         do_force_mode:
 739                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 740                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
 741                                hp->dev->name);
 742                         hp->sw_bmcr = BMCR_SPEED100;
 743                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 744
 745                         if (!is_lucent_phy(hp)) {
 746                                 /* OK, seems we need do disable the transceiver for the first
 747                                  * tick to make sure we get an accurate link state at the
 748                                  * second tick.
 749                                  */
 750                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 751                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 752                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
 753                         }
 754                         hp->timer_state = ltrywait;
 755                         hp->timer_ticks = 0;
 756                         restart_timer = 1;
 757                 } else {
 758                         /* Anything interesting happen? */
 759                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 760                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
 761                                 int ret;
 762
 763                                 /* Just what we've been waiting for... */
 764                                 ret = set_happy_link_modes(hp, tregs);
 765                                 if (ret) {
 766                                         /* Ooops, something bad happened, go to force
 767                                          * mode.
 768                                          *
 769                                          * XXX Broken hubs which don't support 802.3u
 770                                          * XXX auto-negotiation make this happen as well.
 771                                          */
 772                                         goto do_force_mode;
 773                                 }
 774
 775                                 /* Success, at least so far, advance our state engine. */
 776                                 hp->timer_state = lupwait;
 777                                 restart_timer = 1;
 778                         } else {
 779                                 restart_timer = 1;
 780                         }
 781                 }
 782                 break;
 783
 784         case lupwait:
 785                 /* Auto negotiation was successful and we are awaiting a
 786                  * link up status.  I have decided to let this timer run
 787                  * forever until some sort of error is signalled, reporting
 788                  * a message to the user at 10 second intervals.
 789                  */
 790                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 791                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 792                         /* Wheee, it's up, display the link mode in use and put
 793                          * the timer to sleep.
 794                          */
 795                         display_link_mode(hp, tregs);
 796                         hp->timer_state = asleep;
 797                         restart_timer = 0;
 798                 } else {
 799                         if (hp->timer_ticks >= 10) {
 800                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
 801                                        "not completely up.\n", hp->dev->name);
 802                                 hp->timer_ticks = 0;
 803                                 restart_timer = 1;
 804                         } else {
 805                                 restart_timer = 1;
 806                         }
 807                 }
 808                 break;
 809
 810         case ltrywait:
 811                 /* Making the timeout here too long can make it take
 812                  * annoyingly long to attempt all of the link mode
 813                  * permutations, but then again this is essentially
 814                  * error recovery code for the most part.
 815                  */
 816                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 817                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 818                 if (hp->timer_ticks == 1) {
 819                         if (!is_lucent_phy(hp)) {
 820                                 /* Re-enable transceiver, we'll re-enable the transceiver next
 821                                  * tick, then check link state on the following tick.
 822                                  */
 823                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 824                                 happy_meal_tcvr_write(hp, tregs,
 825                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 826                         }
 827                         restart_timer = 1;
 828                         break;
 829                 }
 830                 if (hp->timer_ticks == 2) {
 831                         if (!is_lucent_phy(hp)) {
 832                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 833                                 happy_meal_tcvr_write(hp, tregs,
 834                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 835                         }
 836                         restart_timer = 1;
 837                         break;
 838                 }
 839                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 840                         /* Force mode selection success. */
 841                         display_forced_link_mode(hp, tregs);
 842                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
 843                         hp->timer_state = asleep;
 844                         restart_timer = 0;
 845                 } else {
 846                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
 847                                 int ret;
 848
 849                                 ret = try_next_permutation(hp, tregs);
 850                                 if (ret == -1) {
 851                                         /* Aieee, tried them all, reset the
 852                                          * chip and try all over again.
 853                                          */
 854
 855                                         /* Let the user know... */
 856                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
 857                                                hp->dev->name);
 858
 859                                         ret = happy_meal_init(hp);
 860                                         if (ret) {
 861                                                 /* ho hum... */
 862                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
 863                                                        "Happy Meal.\n", hp->dev->name);
 864                                         }
 865                                         goto out;
 866                                 }
 867                                 if (!is_lucent_phy(hp)) {
 868                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
 869                                                                                DP83840_CSCONFIG);
 870                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 871                                         happy_meal_tcvr_write(hp, tregs,
 872                                                               DP83840_CSCONFIG, hp->sw_csconfig);
 873                                 }
 874                                 hp->timer_ticks = 0;
 875                                 restart_timer = 1;
 876                         } else {
 877                                 restart_timer = 1;
 878                         }
 879                 }
 880                 break;
 881
 882         case asleep:
 883         default:
 884                 /* Can't happens.... */
 885                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
 886                        hp->dev->name);
 887                 restart_timer = 0;
 888                 hp->timer_ticks = 0;
 889                 hp->timer_state = asleep; /* foo on you */
 890                 break;
 891         };
 892
 893         if (restart_timer) {
 894                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
 895                 add_timer(&hp->happy_timer);
 896         }
 897
 898 out:
 899         spin_unlock_irq(&hp->happy_lock);
 900 }
 901
 902 #define TX_RESET_TRIES     32
 903 #define RX_RESET_TRIES     32
 904
 905 /* hp->happy_lock must be held */
 906 static void happy_meal_tx_reset(struct happy_meal *hp, unsigned long bregs)
 907 {
 908         int tries = TX_RESET_TRIES;
 909
 910         HMD(("happy_meal_tx_reset: reset, "));
 911
 912         /* Would you like to try our SMCC Delux? */
 913         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
 914         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
 915                 udelay(20);
 916
 917         /* Lettuce, tomato, buggy hardware (no extra charge)? */
 918         if (!tries)
 919                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
 920
 921         /* Take care. */
 922         HMD(("done\n"));
 923 }
 924
 925 /* hp->happy_lock must be held */
 926 static void happy_meal_rx_reset(struct happy_meal *hp, unsigned long bregs)
 927 {
 928         int tries = RX_RESET_TRIES;
 929
 930         HMD(("happy_meal_rx_reset: reset, "));
 931
 932         /* We have a special on GNU/Viking hardware bugs today. */
 933         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
 934         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
 935                 udelay(20);
 936
 937         /* Will that be all? */
 938         if (!tries)
 939                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
 940
 941         /* Don't forget your vik_1137125_wa.  Have a nice day. */
 942         HMD(("done\n"));
 943 }
 944
 945 #define STOP_TRIES         16
 946
 947 /* hp->happy_lock must be held */
 948 static void happy_meal_stop(struct happy_meal *hp, unsigned long gregs)
 949 {
 950         int tries = STOP_TRIES;
 951
 952         HMD(("happy_meal_stop: reset, "));
 953
 954         /* We're consolidating our STB products, it's your lucky day. */
 955         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
 956         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
 957                 udelay(20);
 958
 959         /* Come back next week when we are "Sun Microelectronics". */
 960         if (!tries)
 961                 printk(KERN_ERR "happy meal: Fry guys.");
 962
 963         /* Remember: "Different name, same old buggy as shit hardware." */
 964         HMD(("done\n"));
 965 }
 966
 967 /* hp->happy_lock must be held */
 968 static void happy_meal_get_counters(struct happy_meal *hp, unsigned long bregs)
 969 {
 970         struct net_device_stats *stats = &hp->net_stats;
 971
 972         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
 973         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
 974
 975         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
 976         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
 977
 978         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
 979         hme_write32(hp, bregs + BMAC_GLECTR, 0);
 980
 981         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
 982
 983         stats->collisions +=
 984                 (hme_read32(hp, bregs + BMAC_EXCTR) +
 985                  hme_read32(hp, bregs + BMAC_LTCTR));
 986         hme_write32(hp, bregs + BMAC_EXCTR, 0);
 987         hme_write32(hp, bregs + BMAC_LTCTR, 0);
 988 }
 989
 990 /* hp->happy_lock must be held */
 991 static void happy_meal_poll_stop(struct happy_meal *hp, unsigned long tregs)
 992 {
 993         ASD(("happy_meal_poll_stop: "));
 994
 995         /* If polling disabled or not polling already, nothing to do. */
 996         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
 997            (HFLAG_POLLENABLE | HFLAG_POLL)) {
 998                 HMD(("not polling, return\n"));
 999                 return;
1000         }
1001
1002         /* Shut up the MIF. */
1003         ASD(("were polling, mif ints off, "));
1004         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1005
1006         /* Turn off polling. */
1007         ASD(("polling off, "));
1008         hme_write32(hp, tregs + TCVR_CFG,
1009                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
1010
1011         /* We are no longer polling. */
1012         hp->happy_flags &= ~(HFLAG_POLL);
1013
1014         /* Let the bits set. */
1015         udelay(200);
1016         ASD(("done\n"));
1017 }
1018
1019 /* Only Sun can take such nice parts and fuck up the programming interface
1020  * like this.  Good job guys...
1021  */
1022 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
1023 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
1024
1025 /* hp->happy_lock must be held */
1026 static int happy_meal_tcvr_reset(struct happy_meal *hp, unsigned long tregs)
1027 {
1028         u32 tconfig;
1029         int result, tries = TCVR_RESET_TRIES;
1030
1031         tconfig = hme_read32(hp, tregs + TCVR_CFG);
1032         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1033         if (hp->tcvr_type == external) {
1034                 ASD(("external<"));
1035                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1036                 hp->tcvr_type = internal;
1037                 hp->paddr = TCV_PADDR_ITX;
1038                 ASD(("ISOLATE,"));
1039                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1040                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1041                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1042                 if (result == TCVR_FAILURE) {
1043                         ASD(("phyread_fail>\n"));
1044                         return -1;
1045                 }
1046                 ASD(("phyread_ok,PSELECT>"));
1047                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1048                 hp->tcvr_type = external;
1049                 hp->paddr = TCV_PADDR_ETX;
1050         } else {
1051                 if (tconfig & TCV_CFG_MDIO1) {
1052                         ASD(("internal<PSELECT,"));
1053                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1054                         ASD(("ISOLATE,"));
1055                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1056                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1057                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1058                         if (result == TCVR_FAILURE) {
1059                                 ASD(("phyread_fail>\n"));
1060                                 return -1;
1061                         }
1062                         ASD(("phyread_ok,~PSELECT>"));
1063                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1064                         hp->tcvr_type = internal;
1065                         hp->paddr = TCV_PADDR_ITX;
1066                 }
1067         }
1068
1069         ASD(("BMCR_RESET "));
1070         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1071
1072         while (--tries) {
1073                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1074                 if (result == TCVR_FAILURE)
1075                         return -1;
1076                 hp->sw_bmcr = result;
1077                 if (!(result & BMCR_RESET))
1078                         break;
1079                 udelay(20);
1080         }
1081         if (!tries) {
1082                 ASD(("BMCR RESET FAILED!\n"));
1083                 return -1;
1084         }
1085         ASD(("RESET_OK\n"));
1086
1087         /* Get fresh copies of the PHY registers. */
1088         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1089         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1090         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1091         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1092
1093         ASD(("UNISOLATE"));
1094         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1095         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1096
1097         tries = TCVR_UNISOLATE_TRIES;
1098         while (--tries) {
1099                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1100                 if (result == TCVR_FAILURE)
1101                         return -1;
1102                 if (!(result & BMCR_ISOLATE))
1103                         break;
1104                 udelay(20);
1105         }
1106         if (!tries) {
1107                 ASD((" FAILED!\n"));
1108                 return -1;
1109         }
1110         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1111         if (!is_lucent_phy(hp)) {
1112                 result = happy_meal_tcvr_read(hp, tregs,
1113                                               DP83840_CSCONFIG);
1114                 happy_meal_tcvr_write(hp, tregs,
1115                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1116         }
1117         return 0;
1118 }
1119
1120 /* Figure out whether we have an internal or external transceiver.
1121  *
1122  * hp->happy_lock must be held
1123  */
1124 static void happy_meal_transceiver_check(struct happy_meal *hp, unsigned long tregs)
1125 {
1126         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1127
1128         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1129         if (hp->happy_flags & HFLAG_POLL) {
1130                 /* If we are polling, we must stop to get the transceiver type. */
1131                 ASD(("<polling> "));
1132                 if (hp->tcvr_type == internal) {
1133                         if (tconfig & TCV_CFG_MDIO1) {
1134                                 ASD(("<internal> <poll stop> "));
1135                                 happy_meal_poll_stop(hp, tregs);
1136                                 hp->paddr = TCV_PADDR_ETX;
1137                                 hp->tcvr_type = external;
1138                                 ASD(("<external>\n"));
1139                                 tconfig &= ~(TCV_CFG_PENABLE);
1140                                 tconfig |= TCV_CFG_PSELECT;
1141                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1142                         }
1143                 } else {
1144                         if (hp->tcvr_type == external) {
1145                                 ASD(("<external> "));
1146                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1147                                         ASD(("<poll stop> "));
1148                                         happy_meal_poll_stop(hp, tregs);
1149                                         hp->paddr = TCV_PADDR_ITX;
1150                                         hp->tcvr_type = internal;
1151                                         ASD(("<internal>\n"));
1152                                         hme_write32(hp, tregs + TCVR_CFG,
1153                                                     hme_read32(hp, tregs + TCVR_CFG) &
1154                                                     ~(TCV_CFG_PSELECT));
1155                                 }
1156                                 ASD(("\n"));
1157                         } else {
1158                                 ASD(("<none>\n"));
1159                         }
1160                 }
1161         } else {
1162                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1163
1164                 /* Else we can just work off of the MDIO bits. */
1165                 ASD(("<not polling> "));
1166                 if (reread & TCV_CFG_MDIO1) {
1167                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1168                         hp->paddr = TCV_PADDR_ETX;
1169                         hp->tcvr_type = external;
1170                         ASD(("<external>\n"));
1171                 } else {
1172                         if (reread & TCV_CFG_MDIO0) {
1173                                 hme_write32(hp, tregs + TCVR_CFG,
1174                                             tconfig & ~(TCV_CFG_PSELECT));
1175                                 hp->paddr = TCV_PADDR_ITX;
1176                                 hp->tcvr_type = internal;
1177                                 ASD(("<internal>\n"));
1178                         } else {
1179                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1180                                 hp->tcvr_type = none; /* Grrr... */
1181                                 ASD(("<none>\n"));
1182                         }
1183                 }
1184         }
1185 }
1186
1187 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1188  *
1189  * The buffers we dma into must be 64 byte aligned.  So we use a special
1190  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1191  * we really need.
1192  *
1193  * We use skb_reserve() to align the data block we get in the skb.  We
1194  * also program the etxregs->cfg register to use an offset of 2.  This
1195  * imperical constant plus the ethernet header size will always leave
1196  * us with a nicely aligned ip header once we pass things up to the
1197  * protocol layers.
1198  *
1199  * The numbers work out to:
1200  *
1201  *         Max ethernet frame size         1518
1202  *         Ethernet header size              14
1203  *         Happy Meal base offset             2
1204  *
1205  * Say a skb data area is at 0xf001b010, and its size alloced is
1206  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1207  *
1208  * First our alloc_skb() routine aligns the data base to a 64 byte
1209  * boundary.  We now have 0xf001b040 as our skb data address.  We
1210  * plug this into the receive descriptor address.
1211  *
1212  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1213  * So now the data we will end up looking at starts at 0xf001b042.  When
1214  * the packet arrives, we will check out the size received and subtract
1215  * this from the skb->length.  Then we just pass the packet up to the
1216  * protocols as is, and allocate a new skb to replace this slot we have
1217  * just received from.
1218  *
1219  * The ethernet layer will strip the ether header from the front of the
1220  * skb we just sent to it, this leaves us with the ip header sitting
1221  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1222  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1223  * bit checksum is obtained from the low bits of the receive descriptor
1224  * flags, thus:
1225  *
1226  *      skb->csum = rxd->rx_flags & 0xffff;
1227  *      skb->ip_summed = CHECKSUM_HW;
1228  *
1229  * before sending off the skb to the protocols, and we are good as gold.
1230  */
1231 static void happy_meal_clean_rings(struct happy_meal *hp)
1232 {
1233         int i;
1234
1235         for (i = 0; i < RX_RING_SIZE; i++) {
1236                 if (hp->rx_skbs[i] != NULL) {
1237                         struct sk_buff *skb = hp->rx_skbs[i];
1238                         struct happy_meal_rxd *rxd;
1239                         u32 dma_addr;
1240
1241                         rxd = &hp->happy_block->happy_meal_rxd[i];
1242                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1243                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
1244                         dev_kfree_skb_any(skb);
1245                         hp->rx_skbs[i] = NULL;
1246                 }
1247         }
1248
1249         for (i = 0; i < TX_RING_SIZE; i++) {
1250                 if (hp->tx_skbs[i] != NULL) {
1251                         struct sk_buff *skb = hp->tx_skbs[i];
1252                         struct happy_meal_txd *txd;
1253                         u32 dma_addr;
1254                         int frag;
1255
1256                         hp->tx_skbs[i] = NULL;
1257
1258                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1259                                 txd = &hp->happy_block->happy_meal_txd[i];
1260                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1261                                 hme_dma_unmap(hp, dma_addr,
1262                                               (hme_read_desc32(hp, &txd->tx_flags)
1263                                                & TXFLAG_SIZE),
1264                                               DMA_TODEVICE);
1265
1266                                 if (frag != skb_shinfo(skb)->nr_frags)
1267                                         i++;
1268                         }
1269
1270                         dev_kfree_skb_any(skb);
1271                 }
1272         }
1273 }
1274
1275 /* hp->happy_lock must be held */
1276 static void happy_meal_init_rings(struct happy_meal *hp)
1277 {
1278         struct hmeal_init_block *hb = hp->happy_block;
1279         struct net_device *dev = hp->dev;
1280         int i;
1281
1282         HMD(("happy_meal_init_rings: counters to zero, "));
1283         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1284
1285         /* Free any skippy bufs left around in the rings. */
1286         HMD(("clean, "));
1287         happy_meal_clean_rings(hp);
1288
1289         /* Now get new skippy bufs for the receive ring. */
1290         HMD(("init rxring, "));
1291         for (i = 0; i < RX_RING_SIZE; i++) {
1292                 struct sk_buff *skb;
1293
1294                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1295                 if (!skb) {
1296                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1297                         continue;
1298                 }
1299                 hp->rx_skbs[i] = skb;
1300                 skb->dev = dev;
1301
1302                 /* Because we reserve afterwards. */
1303                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET));
1304                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1305                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1306                               hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
1307                 skb_reserve(skb, RX_OFFSET);
1308         }
1309
1310         HMD(("init txring, "));
1311         for (i = 0; i < TX_RING_SIZE; i++)
1312                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1313
1314         HMD(("done\n"));
1315 }
1316
1317 /* hp->happy_lock must be held */
1318 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1319                                               unsigned long tregs,
1320                                               struct ethtool_cmd *ep)
1321 {
1322         int timeout;
1323
1324         /* Read all of the registers we are interested in now. */
1325         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1326         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1327         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1328         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1329
1330         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1331
1332         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1333         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1334                 /* Advertise everything we can support. */
1335                 if (hp->sw_bmsr & BMSR_10HALF)
1336                         hp->sw_advertise |= (ADVERTISE_10HALF);
1337                 else
1338                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1339
1340                 if (hp->sw_bmsr & BMSR_10FULL)
1341                         hp->sw_advertise |= (ADVERTISE_10FULL);
1342                 else
1343                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1344                 if (hp->sw_bmsr & BMSR_100HALF)
1345                         hp->sw_advertise |= (ADVERTISE_100HALF);
1346                 else
1347                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1348                 if (hp->sw_bmsr & BMSR_100FULL)
1349                         hp->sw_advertise |= (ADVERTISE_100FULL);
1350                 else
1351                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1352                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1353
1354                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1355                  * XXX and this is because the DP83840 does not support it, changes
1356                  * XXX would need to be made to the tx/rx logic in the driver as well
1357                  * XXX so I completely skip checking for it in the BMSR for now.
1358                  */
1359
1360 #ifdef AUTO_SWITCH_DEBUG
1361                 ASD(("%s: Advertising [ ", hp->dev->name));
1362                 if (hp->sw_advertise & ADVERTISE_10HALF)
1363                         ASD(("10H "));
1364                 if (hp->sw_advertise & ADVERTISE_10FULL)
1365                         ASD(("10F "));
1366                 if (hp->sw_advertise & ADVERTISE_100HALF)
1367                         ASD(("100H "));
1368                 if (hp->sw_advertise & ADVERTISE_100FULL)
1369                         ASD(("100F "));
1370 #endif
1371
1372                 /* Enable Auto-Negotiation, this is usually on already... */
1373                 hp->sw_bmcr |= BMCR_ANENABLE;
1374                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1375
1376                 /* Restart it to make sure it is going. */
1377                 hp->sw_bmcr |= BMCR_ANRESTART;
1378                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1379
1380                 /* BMCR_ANRESTART self clears when the process has begun. */
1381
1382                 timeout = 64;  /* More than enough. */
1383                 while (--timeout) {
1384                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1385                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1386                                 break; /* got it. */
1387                         udelay(10);
1388                 }
1389                 if (!timeout) {
1390                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1391                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1392                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1393                                hp->dev->name);
1394                         goto force_link;
1395                 } else {
1396                         hp->timer_state = arbwait;
1397                 }
1398         } else {
1399 force_link:
1400                 /* Force the link up, trying first a particular mode.
1401                  * Either we are here at the request of ethtool or
1402                  * because the Happy Meal would not start to autoneg.
1403                  */
1404
1405                 /* Disable auto-negotiation in BMCR, enable the duplex and
1406                  * speed setting, init the timer state machine, and fire it off.
1407                  */
1408                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1409                         hp->sw_bmcr = BMCR_SPEED100;
1410                 } else {
1411                         if (ep->speed == SPEED_100)
1412                                 hp->sw_bmcr = BMCR_SPEED100;
1413                         else
1414                                 hp->sw_bmcr = 0;
1415                         if (ep->duplex == DUPLEX_FULL)
1416                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1417                 }
1418                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1419
1420                 if (!is_lucent_phy(hp)) {
1421                         /* OK, seems we need do disable the transceiver for the first
1422                          * tick to make sure we get an accurate link state at the
1423                          * second tick.
1424                          */
1425                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1426                                                                DP83840_CSCONFIG);
1427                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1428                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1429                                               hp->sw_csconfig);
1430                 }
1431                 hp->timer_state = ltrywait;
1432         }
1433
1434         hp->timer_ticks = 0;
1435         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1436         hp->happy_timer.data = (unsigned long) hp;
1437         hp->happy_timer.function = &happy_meal_timer;
1438         add_timer(&hp->happy_timer);
1439 }
1440
1441 /* hp->happy_lock must be held */
1442 static int happy_meal_init(struct happy_meal *hp)
1443 {
1444         unsigned long gregs        = hp->gregs;
1445         unsigned long etxregs      = hp->etxregs;
1446         unsigned long erxregs      = hp->erxregs;
1447         unsigned long bregs        = hp->bigmacregs;
1448         unsigned long tregs        = hp->tcvregs;
1449         u32 regtmp, rxcfg;
1450         unsigned char *e = &hp->dev->dev_addr[0];
1451
1452         /* If auto-negotiation timer is running, kill it. */
1453         del_timer(&hp->happy_timer);
1454
1455         HMD(("happy_meal_init: happy_flags[%08x] ",
1456              hp->happy_flags));
1457         if (!(hp->happy_flags & HFLAG_INIT)) {
1458                 HMD(("set HFLAG_INIT, "));
1459                 hp->happy_flags |= HFLAG_INIT;
1460                 happy_meal_get_counters(hp, bregs);
1461         }
1462
1463         /* Stop polling. */
1464         HMD(("to happy_meal_poll_stop\n"));
1465         happy_meal_poll_stop(hp, tregs);
1466
1467         /* Stop transmitter and receiver. */
1468         HMD(("happy_meal_init: to happy_meal_stop\n"));
1469         happy_meal_stop(hp, gregs);
1470
1471         /* Alloc and reset the tx/rx descriptor chains. */
1472         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1473         happy_meal_init_rings(hp);
1474
1475         /* Shut up the MIF. */
1476         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1477              hme_read32(hp, tregs + TCVR_IMASK)));
1478         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1479
1480         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1481         if (hp->happy_flags & HFLAG_FENABLE) {
1482                 HMD(("use frame old[%08x], ",
1483                      hme_read32(hp, tregs + TCVR_CFG)));
1484                 hme_write32(hp, tregs + TCVR_CFG,
1485                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1486         } else {
1487                 HMD(("use bitbang old[%08x], ",
1488                      hme_read32(hp, tregs + TCVR_CFG)));
1489                 hme_write32(hp, tregs + TCVR_CFG,
1490                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1491         }
1492
1493         /* Check the state of the transceiver. */
1494         HMD(("to happy_meal_transceiver_check\n"));
1495         happy_meal_transceiver_check(hp, tregs);
1496
1497         /* Put the Big Mac into a sane state. */
1498         HMD(("happy_meal_init: "));
1499         switch(hp->tcvr_type) {
1500         case none:
1501                 /* Cannot operate if we don't know the transceiver type! */
1502                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1503                 return -EAGAIN;
1504
1505         case internal:
1506                 /* Using the MII buffers. */
1507                 HMD(("internal, using MII, "));
1508                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1509                 break;
1510
1511         case external:
1512                 /* Not using the MII, disable it. */
1513                 HMD(("external, disable MII, "));
1514                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1515                 break;
1516         };
1517
1518         if (happy_meal_tcvr_reset(hp, tregs))
1519                 return -EAGAIN;
1520
1521         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1522         HMD(("tx/rx reset, "));
1523         happy_meal_tx_reset(hp, bregs);
1524         happy_meal_rx_reset(hp, bregs);
1525
1526         /* Set jam size and inter-packet gaps to reasonable defaults. */
1527         HMD(("jsize/ipg1/ipg2, "));
1528         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1529         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1530         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1531
1532         /* Load up the MAC address and random seed. */
1533         HMD(("rseed/macaddr, "));
1534
1535         /* The docs recommend to use the 10LSB of our MAC here. */
1536         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1537
1538         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1539         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1540         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1541
1542         HMD(("htable, "));
1543         if ((hp->dev->flags & IFF_ALLMULTI) ||
1544             (hp->dev->mc_count > 64)) {
1545                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1546                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1547                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1548                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1549         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1550                 u16 hash_table[4];
1551                 struct dev_mc_list *dmi = hp->dev->mc_list;
1552                 char *addrs;
1553                 int i;
1554                 u32 crc;
1555
1556                 for (i = 0; i < 4; i++)
1557                         hash_table[i] = 0;
1558
1559                 for (i = 0; i < hp->dev->mc_count; i++) {
1560                         addrs = dmi->dmi_addr;
1561                         dmi = dmi->next;
1562
1563                         if (!(*addrs & 1))
1564                                 continue;
1565
1566                         crc = ether_crc_le(6, addrs);
1567                         crc >>= 26;
1568                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1569                 }
1570                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1571                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1572                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1573                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1574         } else {
1575                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1576                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1577                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1578                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1579         }
1580
1581         /* Set the RX and TX ring ptrs. */
1582         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1583              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1584              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1585         hme_write32(hp, erxregs + ERX_RING,
1586                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1587         hme_write32(hp, etxregs + ETX_RING,
1588                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1589
1590         /* Parity issues in the ERX unit of some HME revisions can cause some
1591          * registers to not be written unless their parity is even.  Detect such
1592          * lost writes and simply rewrite with a low bit set (which will be ignored
1593          * since the rxring needs to be 2K aligned).
1594          */
1595         if (hme_read32(hp, erxregs + ERX_RING) !=
1596             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1597                 hme_write32(hp, erxregs + ERX_RING,
1598                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1599                             | 0x4);
1600
1601         /* Set the supported burst sizes. */
1602         HMD(("happy_meal_init: old[%08x] bursts<",
1603              hme_read32(hp, gregs + GREG_CFG)));
1604
1605 #ifndef __sparc__
1606         /* It is always PCI and can handle 64byte bursts. */
1607         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1608 #else
1609         if ((hp->happy_bursts & DMA_BURST64) &&
1610             ((hp->happy_flags & HFLAG_PCI) != 0
1611 #ifdef CONFIG_SBUS
1612              || sbus_can_burst64(hp->happy_dev)
1613 #endif
1614              || 0)) {
1615                 u32 gcfg = GREG_CFG_BURST64;
1616
1617                 /* I have no idea if I should set the extended
1618                  * transfer mode bit for Cheerio, so for now I
1619                  * do not.  -DaveM
1620                  */
1621 #ifdef CONFIG_SBUS
1622                 if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1623                     sbus_can_dma_64bit(hp->happy_dev)) {
1624                         sbus_set_sbus64(hp->happy_dev,
1625                                         hp->happy_bursts);
1626                         gcfg |= GREG_CFG_64BIT;
1627                 }
1628 #endif
1629
1630                 HMD(("64>"));
1631                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1632         } else if (hp->happy_bursts & DMA_BURST32) {
1633                 HMD(("32>"));
1634                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1635         } else if (hp->happy_bursts & DMA_BURST16) {
1636                 HMD(("16>"));
1637                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1638         } else {
1639                 HMD(("XXX>"));
1640                 hme_write32(hp, gregs + GREG_CFG, 0);
1641         }
1642 #endif /* __sparc__ */
1643
1644         /* Turn off interrupts we do not want to hear. */
1645         HMD((", enable global interrupts, "));
1646         hme_write32(hp, gregs + GREG_IMASK,
1647                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1648                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1649
1650         /* Set the transmit ring buffer size. */
1651         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1652              hme_read32(hp, etxregs + ETX_RSIZE)));
1653         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1654
1655         /* Enable transmitter DVMA. */
1656         HMD(("tx dma enable old[%08x], ",
1657              hme_read32(hp, etxregs + ETX_CFG)));
1658         hme_write32(hp, etxregs + ETX_CFG,
1659                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1660
1661         /* This chip really rots, for the receiver sometimes when you
1662          * write to its control registers not all the bits get there
1663          * properly.  I cannot think of a sane way to provide complete
1664          * coverage for this hardware bug yet.
1665          */
1666         HMD(("erx regs bug old[%08x]\n",
1667              hme_read32(hp, erxregs + ERX_CFG)));
1668         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1669         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1670         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1671         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1672                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1673                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1674                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1675                 /* XXX Should return failure here... */
1676         }
1677
1678         /* Enable Big Mac hash table filter. */
1679         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1680              hme_read32(hp, bregs + BMAC_RXCFG)));
1681         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1682         if (hp->dev->flags & IFF_PROMISC)
1683                 rxcfg |= BIGMAC_RXCFG_PMISC;
1684         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1685
1686         /* Let the bits settle in the chip. */
1687         udelay(10);
1688
1689         /* Ok, configure the Big Mac transmitter. */
1690         HMD(("BIGMAC init, "));
1691         regtmp = 0;
1692         if (hp->happy_flags & HFLAG_FULL)
1693                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1694
1695         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1696          * to deadlock with the PHY if a Jabber occurs.
1697          */
1698         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1699
1700         /* Give up after 16 TX attempts. */
1701         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1702
1703         /* Enable the output drivers no matter what. */
1704         regtmp = BIGMAC_XCFG_ODENABLE;
1705
1706         /* If card can do lance mode, enable it. */
1707         if (hp->happy_flags & HFLAG_LANCE)
1708                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1709
1710         /* Disable the MII buffers if using external transceiver. */
1711         if (hp->tcvr_type == external)
1712                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1713
1714         HMD(("XIF config old[%08x], ",
1715              hme_read32(hp, bregs + BMAC_XIFCFG)));
1716         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1717
1718         /* Start things up. */
1719         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1720              hme_read32(hp, bregs + BMAC_TXCFG),
1721              hme_read32(hp, bregs + BMAC_RXCFG)));
1722         hme_write32(hp, bregs + BMAC_TXCFG,
1723                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1724         hme_write32(hp, bregs + BMAC_RXCFG,
1725                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1726
1727         /* Get the autonegotiation started, and the watch timer ticking. */
1728         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1729
1730         /* Success. */
1731         return 0;
1732 }
1733
1734 /* hp->happy_lock must be held */
1735 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1736 {
1737         unsigned long tregs     = hp->tcvregs;
1738         unsigned long bregs     = hp->bigmacregs;
1739         unsigned long gregs     = hp->gregs;
1740
1741         happy_meal_stop(hp, gregs);
1742         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1743         if (hp->happy_flags & HFLAG_FENABLE)
1744                 hme_write32(hp, tregs + TCVR_CFG,
1745                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1746         else
1747                 hme_write32(hp, tregs + TCVR_CFG,
1748                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1749         happy_meal_transceiver_check(hp, tregs);
1750         switch(hp->tcvr_type) {
1751         case none:
1752                 return;
1753         case internal:
1754                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1755                 break;
1756         case external:
1757                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1758                 break;
1759         };
1760         if (happy_meal_tcvr_reset(hp, tregs))
1761                 return;
1762
1763         /* Latch PHY registers as of now. */
1764         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1765         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1766
1767         /* Advertise everything we can support. */
1768         if (hp->sw_bmsr & BMSR_10HALF)
1769                 hp->sw_advertise |= (ADVERTISE_10HALF);
1770         else
1771                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1772
1773         if (hp->sw_bmsr & BMSR_10FULL)
1774                 hp->sw_advertise |= (ADVERTISE_10FULL);
1775         else
1776                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1777         if (hp->sw_bmsr & BMSR_100HALF)
1778                 hp->sw_advertise |= (ADVERTISE_100HALF);
1779         else
1780                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1781         if (hp->sw_bmsr & BMSR_100FULL)
1782                 hp->sw_advertise |= (ADVERTISE_100FULL);
1783         else
1784                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1785
1786         /* Update the PHY advertisement register. */
1787         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1788 }
1789
1790 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1791  * the hardware, so we cannot re-read it and get a correct value.
1792  *
1793  * hp->happy_lock must be held
1794  */
1795 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1796 {
1797         int reset = 0;
1798
1799         /* Only print messages for non-counter related interrupts. */
1800         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1801                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1802                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1803                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1804                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1805                       GREG_STAT_SLVPERR))
1806                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1807                        hp->dev->name, status);
1808
1809         if (status & GREG_STAT_RFIFOVF) {
1810                 /* Receive FIFO overflow is harmless and the hardware will take
1811                    care of it, just some packets are lost. Who cares. */
1812                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1813         }
1814
1815         if (status & GREG_STAT_STSTERR) {
1816                 /* BigMAC SQE link test failed. */
1817                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1818                 reset = 1;
1819         }
1820
1821         if (status & GREG_STAT_TFIFO_UND) {
1822                 /* Transmit FIFO underrun, again DMA error likely. */
1823                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1824                        hp->dev->name);
1825                 reset = 1;
1826         }
1827
1828         if (status & GREG_STAT_MAXPKTERR) {
1829                 /* Driver error, tried to transmit something larger
1830                  * than ethernet max mtu.
1831                  */
1832                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1833                 reset = 1;
1834         }
1835
1836         if (status & GREG_STAT_NORXD) {
1837                 /* This is harmless, it just means the system is
1838                  * quite loaded and the incoming packet rate was
1839                  * faster than the interrupt handler could keep up
1840                  * with.
1841                  */
1842                 printk(KERN_INFO "%s: Happy Meal out of receive "
1843                        "descriptors, packet dropped.\n",
1844                        hp->dev->name);
1845         }
1846
1847         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1848                 /* All sorts of DMA receive errors. */
1849                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1850                 if (status & GREG_STAT_RXERR)
1851                         printk("GenericError ");
1852                 if (status & GREG_STAT_RXPERR)
1853                         printk("ParityError ");
1854                 if (status & GREG_STAT_RXTERR)
1855                         printk("RxTagBotch ");
1856                 printk("]\n");
1857                 reset = 1;
1858         }
1859
1860         if (status & GREG_STAT_EOPERR) {
1861                 /* Driver bug, didn't set EOP bit in tx descriptor given
1862                  * to the happy meal.
1863                  */
1864                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1865                        hp->dev->name);
1866                 reset = 1;
1867         }
1868
1869         if (status & GREG_STAT_MIFIRQ) {
1870                 /* MIF signalled an interrupt, were we polling it? */
1871                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1872         }
1873
1874         if (status &
1875             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1876                 /* All sorts of transmit DMA errors. */
1877                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1878                 if (status & GREG_STAT_TXEACK)
1879                         printk("GenericError ");
1880                 if (status & GREG_STAT_TXLERR)
1881                         printk("LateError ");
1882                 if (status & GREG_STAT_TXPERR)
1883                         printk("ParityErro ");
1884                 if (status & GREG_STAT_TXTERR)
1885                         printk("TagBotch ");
1886                 printk("]\n");
1887                 reset = 1;
1888         }
1889
1890         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1891                 /* Bus or parity error when cpu accessed happy meal registers
1892                  * or it's internal FIFO's.  Should never see this.
1893                  */
1894                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1895                        hp->dev->name,
1896                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1897                 reset = 1;
1898         }
1899
1900         if (reset) {
1901                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1902                 happy_meal_init(hp);
1903                 return 1;
1904         }
1905         return 0;
1906 }
1907
1908 /* hp->happy_lock must be held */
1909 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1910 {
1911         unsigned long tregs = hp->tcvregs;
1912
1913         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1914         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1915         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1916
1917         /* Use the fastest transmission protocol possible. */
1918         if (hp->sw_lpa & LPA_100FULL) {
1919                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1920                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1921         } else if (hp->sw_lpa & LPA_100HALF) {
1922                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1923                 hp->sw_bmcr |= BMCR_SPEED100;
1924         } else if (hp->sw_lpa & LPA_10FULL) {
1925                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1926                 hp->sw_bmcr |= BMCR_FULLDPLX;
1927         } else {
1928                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1929         }
1930         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1931
1932         /* Finally stop polling and shut up the MIF. */
1933         happy_meal_poll_stop(hp, tregs);
1934 }
1935
1936 #ifdef TXDEBUG
1937 #define TXD(x) printk x
1938 #else
1939 #define TXD(x)
1940 #endif
1941
1942 /* hp->happy_lock must be held */
1943 static void happy_meal_tx(struct happy_meal *hp)
1944 {
1945         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1946         struct happy_meal_txd *this;
1947         struct net_device *dev = hp->dev;
1948         int elem;
1949
1950         elem = hp->tx_old;
1951         TXD(("TX<"));
1952         while (elem != hp->tx_new) {
1953                 struct sk_buff *skb;
1954                 u32 flags, dma_addr, dma_len;
1955                 int frag;
1956
1957                 TXD(("[%d]", elem));
1958                 this = &txbase[elem];
1959                 flags = hme_read_desc32(hp, &this->tx_flags);
1960                 if (flags & TXFLAG_OWN)
1961                         break;
1962                 skb = hp->tx_skbs[elem];
1963                 if (skb_shinfo(skb)->nr_frags) {
1964                         int last;
1965
1966                         last = elem + skb_shinfo(skb)->nr_frags;
1967                         last &= (TX_RING_SIZE - 1);
1968                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1969                         if (flags & TXFLAG_OWN)
1970                                 break;
1971                 }
1972                 hp->tx_skbs[elem] = NULL;
1973                 hp->net_stats.tx_bytes += skb->len;
1974
1975                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1976                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1977                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1978
1979                         dma_len &= TXFLAG_SIZE;
1980                         hme_dma_unmap(hp, dma_addr, dma_len, DMA_TODEVICE);
1981
1982                         elem = NEXT_TX(elem);
1983                         this = &txbase[elem];
1984                 }
1985
1986                 dev_kfree_skb_irq(skb);
1987                 hp->net_stats.tx_packets++;
1988         }
1989         hp->tx_old = elem;
1990         TXD((">"));
1991
1992         if (netif_queue_stopped(dev) &&
1993             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1994                 netif_wake_queue(dev);
1995 }
1996
1997 #ifdef RXDEBUG
1998 #define RXD(x) printk x
1999 #else
2000 #define RXD(x)
2001 #endif
2002
2003 /* Originally I used to handle the allocation failure by just giving back just
2004  * that one ring buffer to the happy meal.  Problem is that usually when that
2005  * condition is triggered, the happy meal expects you to do something reasonable
2006  * with all of the packets it has DMA'd in.  So now I just drop the entire
2007  * ring when we cannot get a new skb and give them all back to the happy meal,
2008  * maybe things will be "happier" now.
2009  *
2010  * hp->happy_lock must be held
2011  */
2012 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
2013 {
2014         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2015         struct happy_meal_rxd *this;
2016         int elem = hp->rx_new, drops = 0;
2017         u32 flags;
2018
2019         RXD(("RX<"));
2020         this = &rxbase[elem];
2021         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2022                 struct sk_buff *skb;
2023                 int len = flags >> 16;
2024                 u16 csum = flags & RXFLAG_CSUM;
2025                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2026
2027                 RXD(("[%d ", elem));
2028
2029                 /* Check for errors. */
2030                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2031                         RXD(("ERR(%08x)]", flags));
2032                         hp->net_stats.rx_errors++;
2033                         if (len < ETH_ZLEN)
2034                                 hp->net_stats.rx_length_errors++;
2035                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2036                                 hp->net_stats.rx_over_errors++;
2037                                 hp->net_stats.rx_fifo_errors++;
2038                         }
2039
2040                         /* Return it to the Happy meal. */
2041         drop_it:
2042                         hp->net_stats.rx_dropped++;
2043                         hme_write_rxd(hp, this,
2044                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2045                                       dma_addr);
2046                         goto next;
2047                 }
2048                 skb = hp->rx_skbs[elem];
2049                 if (len > RX_COPY_THRESHOLD) {
2050                         struct sk_buff *new_skb;
2051
2052                         /* Now refill the entry, if we can. */
2053                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2054                         if (new_skb == NULL) {
2055                                 drops++;
2056                                 goto drop_it;
2057                         }
2058                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
2059                         hp->rx_skbs[elem] = new_skb;
2060                         new_skb->dev = dev;
2061                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2062                         hme_write_rxd(hp, this,
2063                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2064                                       hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
2065                         skb_reserve(new_skb, RX_OFFSET);
2066
2067                         /* Trim the original skb for the netif. */
2068                         skb_trim(skb, len);
2069                 } else {
2070                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2071
2072                         if (copy_skb == NULL) {
2073                                 drops++;
2074                                 goto drop_it;
2075                         }
2076
2077                         copy_skb->dev = dev;
2078                         skb_reserve(copy_skb, 2);
2079                         skb_put(copy_skb, len);
2080                         hme_dma_sync_for_cpu(hp, dma_addr, len, DMA_FROMDEVICE);
2081                         memcpy(copy_skb->data, skb->data, len);
2082                         hme_dma_sync_for_device(hp, dma_addr, len, DMA_FROMDEVICE);
2083
2084                         /* Reuse original ring buffer. */
2085                         hme_write_rxd(hp, this,
2086                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2087                                       dma_addr);
2088
2089                         skb = copy_skb;
2090                 }
2091
2092                 /* This card is _fucking_ hot... */
2093                 skb->csum = ntohs(csum ^ 0xffff);
2094                 skb->ip_summed = CHECKSUM_HW;
2095
2096                 RXD(("len=%d csum=%4x]", len, csum));
2097                 skb->protocol = eth_type_trans(skb, dev);
2098                 netif_rx(skb);
2099
2100                 dev->last_rx = jiffies;
2101                 hp->net_stats.rx_packets++;
2102                 hp->net_stats.rx_bytes += len;
2103         next:
2104                 elem = NEXT_RX(elem);
2105                 this = &rxbase[elem];
2106         }
2107         hp->rx_new = elem;
2108         if (drops)
2109                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2110         RXD((">"));
2111 }
2112
2113 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2114 {
2115         struct net_device *dev = (struct net_device *) dev_id;
2116         struct happy_meal *hp  = dev->priv;
2117         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2118
2119         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2120
2121         spin_lock(&hp->happy_lock);
2122
2123         if (happy_status & GREG_STAT_ERRORS) {
2124                 HMD(("ERRORS "));
2125                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2126                         goto out;
2127         }
2128
2129         if (happy_status & GREG_STAT_MIFIRQ) {
2130                 HMD(("MIFIRQ "));
2131                 happy_meal_mif_interrupt(hp);
2132         }
2133
2134         if (happy_status & GREG_STAT_TXALL) {
2135                 HMD(("TXALL "));
2136                 happy_meal_tx(hp);
2137         }
2138
2139         if (happy_status & GREG_STAT_RXTOHOST) {
2140                 HMD(("RXTOHOST "));
2141                 happy_meal_rx(hp, dev);
2142         }
2143
2144         HMD(("done\n"));
2145 out:
2146         spin_unlock(&hp->happy_lock);
2147
2148         return IRQ_HANDLED;
2149 }
2150
2151 #ifdef CONFIG_SBUS
2152 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie, struct pt_regs *ptregs)
2153 {
2154         struct quattro *qp = (struct quattro *) cookie;
2155         int i;
2156
2157         for (i = 0; i < 4; i++) {
2158                 struct net_device *dev = qp->happy_meals[i];
2159                 struct happy_meal *hp  = dev->priv;
2160                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2161
2162                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2163
2164                 if (!(happy_status & (GREG_STAT_ERRORS |
2165                                       GREG_STAT_MIFIRQ |
2166                                       GREG_STAT_TXALL |
2167                                       GREG_STAT_RXTOHOST)))
2168                         continue;
2169
2170                 spin_lock(&hp->happy_lock);
2171
2172                 if (happy_status & GREG_STAT_ERRORS) {
2173                         HMD(("ERRORS "));
2174                         if (happy_meal_is_not_so_happy(hp, happy_status))
2175                                 goto next;
2176                 }
2177
2178                 if (happy_status & GREG_STAT_MIFIRQ) {
2179                         HMD(("MIFIRQ "));
2180                         happy_meal_mif_interrupt(hp);
2181                 }
2182
2183                 if (happy_status & GREG_STAT_TXALL) {
2184                         HMD(("TXALL "));
2185                         happy_meal_tx(hp);
2186                 }
2187
2188                 if (happy_status & GREG_STAT_RXTOHOST) {
2189                         HMD(("RXTOHOST "));
2190                         happy_meal_rx(hp, dev);
2191                 }
2192
2193         next:
2194                 spin_unlock(&hp->happy_lock);
2195         }
2196         HMD(("done\n"));
2197
2198         return IRQ_HANDLED;
2199 }
2200 #endif
2201
2202 static int happy_meal_open(struct net_device *dev)
2203 {
2204         struct happy_meal *hp = dev->priv;
2205         int res;
2206
2207         HMD(("happy_meal_open: "));
2208
2209         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2210          * into a single source which we register handling at probe time.
2211          */
2212         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2213                 if (request_irq(dev->irq, &happy_meal_interrupt,
2214                                 SA_SHIRQ, dev->name, (void *)dev)) {
2215                         HMD(("EAGAIN\n"));
2216 #ifdef __sparc__
2217                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %s to go.\n",
2218                                __irq_itoa(dev->irq));
2219 #else
2220                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2221                                dev->irq);
2222 #endif
2223
2224                         return -EAGAIN;
2225                 }
2226         }
2227
2228         HMD(("to happy_meal_init\n"));
2229
2230         spin_lock_irq(&hp->happy_lock);
2231         res = happy_meal_init(hp);
2232         spin_unlock_irq(&hp->happy_lock);
2233
2234         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2235                 free_irq(dev->irq, dev);
2236         return res;
2237 }
2238
2239 static int happy_meal_close(struct net_device *dev)
2240 {
2241         struct happy_meal *hp = dev->priv;
2242
2243         spin_lock_irq(&hp->happy_lock);
2244         happy_meal_stop(hp, hp->gregs);
2245         happy_meal_clean_rings(hp);
2246
2247         /* If auto-negotiation timer is running, kill it. */
2248         del_timer(&hp->happy_timer);
2249
2250         spin_unlock_irq(&hp->happy_lock);
2251
2252         /* On Quattro QFE cards, all hme interrupts are concentrated
2253          * into a single source which we register handling at probe
2254          * time and never unregister.
2255          */
2256         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2257                 free_irq(dev->irq, dev);
2258
2259         return 0;
2260 }
2261
2262 #ifdef SXDEBUG
2263 #define SXD(x) printk x
2264 #else
2265 #define SXD(x)
2266 #endif
2267
2268 static void happy_meal_tx_timeout(struct net_device *dev)
2269 {
2270         struct happy_meal *hp = dev->priv;
2271
2272         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2273         tx_dump_log();
2274         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2275                 hme_read32(hp, hp->gregs + GREG_STAT),
2276                 hme_read32(hp, hp->etxregs + ETX_CFG),
2277                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2278
2279         spin_lock_irq(&hp->happy_lock);
2280         happy_meal_init(hp);
2281         spin_unlock_irq(&hp->happy_lock);
2282
2283         netif_wake_queue(dev);
2284 }
2285
2286 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2287 {
2288         struct happy_meal *hp = dev->priv;
2289         int entry;
2290         u32 tx_flags;
2291
2292         tx_flags = TXFLAG_OWN;
2293         if (skb->ip_summed == CHECKSUM_HW) {
2294                 u32 csum_start_off, csum_stuff_off;
2295
2296                 csum_start_off = (u32) (skb->h.raw - skb->data);
2297                 csum_stuff_off = (u32) ((skb->h.raw + skb->csum) - skb->data);
2298
2299                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2300                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2301                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2302         }
2303
2304         spin_lock_irq(&hp->happy_lock);
2305
2306         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2307                 netif_stop_queue(dev);
2308                 spin_unlock_irq(&hp->happy_lock);
2309                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2310                        dev->name);
2311                 return 1;
2312         }
2313
2314         entry = hp->tx_new;
2315         SXD(("SX<l[%d]e[%d]>", len, entry));
2316         hp->tx_skbs[entry] = skb;
2317
2318         if (skb_shinfo(skb)->nr_frags == 0) {
2319                 u32 mapping, len;
2320
2321                 len = skb->len;
2322                 mapping = hme_dma_map(hp, skb->data, len, DMA_TODEVICE);
2323                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2324                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2325                               (tx_flags | (len & TXFLAG_SIZE)),
2326                               mapping);
2327                 entry = NEXT_TX(entry);
2328         } else {
2329                 u32 first_len, first_mapping;
2330                 int frag, first_entry = entry;
2331
2332                 /* We must give this initial chunk to the device last.
2333                  * Otherwise we could race with the device.
2334                  */
2335                 first_len = skb_headlen(skb);
2336                 first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TODEVICE);
2337                 entry = NEXT_TX(entry);
2338
2339                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2340                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2341                         u32 len, mapping, this_txflags;
2342
2343                         len = this_frag->size;
2344                         mapping = hme_dma_map(hp,
2345                                               ((void *) page_address(this_frag->page) +
2346                                                this_frag->page_offset),
2347                                               len, DMA_TODEVICE);
2348                         this_txflags = tx_flags;
2349                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2350                                 this_txflags |= TXFLAG_EOP;
2351                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2352                                       (this_txflags | (len & TXFLAG_SIZE)),
2353                                       mapping);
2354                         entry = NEXT_TX(entry);
2355                 }
2356                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2357                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2358                               first_mapping);
2359         }
2360
2361         hp->tx_new = entry;
2362
2363         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2364                 netif_stop_queue(dev);
2365
2366         /* Get it going. */
2367         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2368
2369         spin_unlock_irq(&hp->happy_lock);
2370
2371         dev->trans_start = jiffies;
2372
2373         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2374         return 0;
2375 }
2376
2377 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2378 {
2379         struct happy_meal *hp = dev->priv;
2380
2381         spin_lock_irq(&hp->happy_lock);
2382         happy_meal_get_counters(hp, hp->bigmacregs);
2383         spin_unlock_irq(&hp->happy_lock);
2384
2385         return &hp->net_stats;
2386 }
2387
2388 static void happy_meal_set_multicast(struct net_device *dev)
2389 {
2390         struct happy_meal *hp = dev->priv;
2391         unsigned long bregs = hp->bigmacregs;
2392         struct dev_mc_list *dmi = dev->mc_list;
2393         char *addrs;
2394         int i;
2395         u32 crc;
2396
2397         spin_lock_irq(&hp->happy_lock);
2398
2399         netif_stop_queue(dev);
2400
2401         if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2402                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2403                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2404                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2405                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2406         } else if (dev->flags & IFF_PROMISC) {
2407                 hme_write32(hp, bregs + BMAC_RXCFG,
2408                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2409         } else {
2410                 u16 hash_table[4];
2411
2412                 for (i = 0; i < 4; i++)
2413                         hash_table[i] = 0;
2414
2415                 for (i = 0; i < dev->mc_count; i++) {
2416                         addrs = dmi->dmi_addr;
2417                         dmi = dmi->next;
2418
2419                         if (!(*addrs & 1))
2420                                 continue;
2421
2422                         crc = ether_crc_le(6, addrs);
2423                         crc >>= 26;
2424                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2425                 }
2426                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2427                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2428                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2429                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2430         }
2431
2432         netif_wake_queue(dev);
2433
2434         spin_unlock_irq(&hp->happy_lock);
2435 }
2436
2437 /* Ethtool support... */
2438 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2439 {
2440         struct happy_meal *hp = dev->priv;
2441
2442         cmd->supported =
2443                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2444                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2445                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2446
2447         /* XXX hardcoded stuff for now */
2448         cmd->port = PORT_TP; /* XXX no MII support */
2449         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2450         cmd->phy_address = 0; /* XXX fixed PHYAD */
2451
2452         /* Record PHY settings. */
2453         spin_lock_irq(&hp->happy_lock);
2454         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2455         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2456         spin_unlock_irq(&hp->happy_lock);
2457
2458         if (hp->sw_bmcr & BMCR_ANENABLE) {
2459                 cmd->autoneg = AUTONEG_ENABLE;
2460                 cmd->speed =
2461                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2462                         SPEED_100 : SPEED_10;
2463                 if (cmd->speed == SPEED_100)
2464                         cmd->duplex =
2465                                 (hp->sw_lpa & (LPA_100FULL)) ?
2466                                 DUPLEX_FULL : DUPLEX_HALF;
2467                 else
2468                         cmd->duplex =
2469                                 (hp->sw_lpa & (LPA_10FULL)) ?
2470                                 DUPLEX_FULL : DUPLEX_HALF;
2471         } else {
2472                 cmd->autoneg = AUTONEG_DISABLE;
2473                 cmd->speed =
2474                         (hp->sw_bmcr & BMCR_SPEED100) ?
2475                         SPEED_100 : SPEED_10;
2476                 cmd->duplex =
2477                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2478                         DUPLEX_FULL : DUPLEX_HALF;
2479         }
2480         return 0;
2481 }
2482
2483 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2484 {
2485         struct happy_meal *hp = dev->priv;
2486
2487         /* Verify the settings we care about. */
2488         if (cmd->autoneg != AUTONEG_ENABLE &&
2489             cmd->autoneg != AUTONEG_DISABLE)
2490                 return -EINVAL;
2491         if (cmd->autoneg == AUTONEG_DISABLE &&
2492             ((cmd->speed != SPEED_100 &&
2493               cmd->speed != SPEED_10) ||
2494              (cmd->duplex != DUPLEX_HALF &&
2495               cmd->duplex != DUPLEX_FULL)))
2496                 return -EINVAL;
2497
2498         /* Ok, do it to it. */
2499         spin_lock_irq(&hp->happy_lock);
2500         del_timer(&hp->happy_timer);
2501         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2502         spin_unlock_irq(&hp->happy_lock);
2503
2504         return 0;
2505 }
2506
2507 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2508 {
2509         struct happy_meal *hp = dev->priv;
2510
2511         strcpy(info->driver, "sunhme");
2512         strcpy(info->version, "2.02");
2513         if (hp->happy_flags & HFLAG_PCI) {
2514                 struct pci_dev *pdev = hp->happy_dev;
2515                 strcpy(info->bus_info, pci_name(pdev));
2516         }
2517 #ifdef CONFIG_SBUS
2518         else {
2519                 struct sbus_dev *sdev = hp->happy_dev;
2520                 sprintf(info->bus_info, "SBUS:%d",
2521                         sdev->slot);
2522         }
2523 #endif
2524 }
2525
2526 static u32 hme_get_link(struct net_device *dev)
2527 {
2528         struct happy_meal *hp = dev->priv;
2529
2530         spin_lock_irq(&hp->happy_lock);
2531         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2532         spin_unlock_irq(&hp->happy_lock);
2533
2534         return (hp->sw_bmsr & BMSR_LSTATUS);
2535 }
2536
2537 static struct ethtool_ops hme_ethtool_ops = {
2538         .get_settings           = hme_get_settings,
2539         .set_settings           = hme_set_settings,
2540         .get_drvinfo            = hme_get_drvinfo,
2541         .get_link               = hme_get_link,
2542 };
2543
2544 static int hme_version_printed;
2545
2546 #ifdef CONFIG_SBUS
2547 void __init quattro_get_ranges(struct quattro *qp)
2548 {
2549         struct sbus_dev *sdev = qp->quattro_dev;
2550         int err;
2551
2552         err = prom_getproperty(sdev->prom_node,
2553                                "ranges",
2554                                (char *)&qp->ranges[0],
2555                                sizeof(qp->ranges));
2556         if (err == 0 || err == -1) {
2557                 qp->nranges = 0;
2558                 return;
2559         }
2560         qp->nranges = (err / sizeof(struct linux_prom_ranges));
2561 }
2562
2563 static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2564 {
2565         struct sbus_dev *sdev = hp->happy_dev;
2566         int rng;
2567
2568         for (rng = 0; rng < qp->nranges; rng++) {
2569                 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2570                 int reg;
2571
2572                 for (reg = 0; reg < 5; reg++) {
2573                         if (sdev->reg_addrs[reg].which_io ==
2574                             rngp->ot_child_space)
2575                                 break;
2576                 }
2577                 if (reg == 5)
2578                         continue;
2579
2580                 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2581                 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2582         }
2583 }
2584
2585 /* Given a happy meal sbus device, find it's quattro parent.
2586  * If none exist, allocate and return a new one.
2587  *
2588  * Return NULL on failure.
2589  */
2590 static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev)
2591 {
2592         struct sbus_bus *sbus;
2593         struct sbus_dev *sdev;
2594         struct quattro *qp;
2595         int i;
2596
2597         if (qfe_sbus_list == NULL)
2598                 goto found;
2599
2600         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2601                 for (i = 0, sdev = qp->quattro_dev;
2602                      (sdev != NULL) && (i < 4);
2603                      sdev = sdev->next, i++) {
2604                         if (sdev == goal_sdev)
2605                                 return qp;
2606                 }
2607         }
2608         for_each_sbus(sbus) {
2609                 for_each_sbusdev(sdev, sbus) {
2610                         if (sdev == goal_sdev)
2611                                 goto found;
2612                 }
2613         }
2614
2615         /* Cannot find quattro parent, fail. */
2616         return NULL;
2617
2618 found:
2619         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2620         if (qp != NULL) {
2621                 int i;
2622
2623                 for (i = 0; i < 4; i++)
2624                         qp->happy_meals[i] = NULL;
2625
2626                 qp->quattro_dev = goal_sdev;
2627                 qp->next = qfe_sbus_list;
2628                 qfe_sbus_list = qp;
2629                 quattro_get_ranges(qp);
2630         }
2631         return qp;
2632 }
2633
2634 /* After all quattro cards have been probed, we call these functions
2635  * to register the IRQ handlers.
2636  */
2637 static void __init quattro_sbus_register_irqs(void)
2638 {
2639         struct quattro *qp;
2640
2641         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2642                 struct sbus_dev *sdev = qp->quattro_dev;
2643                 int err;
2644
2645                 err = request_irq(sdev->irqs[0],
2646                                   quattro_sbus_interrupt,
2647                                   SA_SHIRQ, "Quattro",
2648                                   qp);
2649                 if (err != 0) {
2650                         printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2651                         panic("QFE request irq");
2652                 }
2653         }
2654 }
2655 #endif /* CONFIG_SBUS */
2656
2657 #ifdef CONFIG_PCI
2658 static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2659 {
2660         struct pci_dev *bdev = pdev->bus->self;
2661         struct quattro *qp;
2662
2663         if (!bdev) return NULL;
2664         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2665                 struct pci_dev *qpdev = qp->quattro_dev;
2666
2667                 if (qpdev == bdev)
2668                         return qp;
2669         }
2670         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2671         if (qp != NULL) {
2672                 int i;
2673
2674                 for (i = 0; i < 4; i++)
2675                         qp->happy_meals[i] = NULL;
2676
2677                 qp->quattro_dev = bdev;
2678                 qp->next = qfe_pci_list;
2679                 qfe_pci_list = qp;
2680
2681                 /* No range tricks necessary on PCI. */
2682                 qp->nranges = 0;
2683         }
2684         return qp;
2685 }
2686 #endif /* CONFIG_PCI */
2687
2688 #ifdef CONFIG_SBUS
2689 static int __init happy_meal_sbus_init(struct sbus_dev *sdev, int is_qfe)
2690 {
2691         struct quattro *qp = NULL;
2692         struct happy_meal *hp;
2693         struct net_device *dev;
2694         int i, qfe_slot = -1;
2695         int err = -ENODEV;
2696
2697         if (is_qfe) {
2698                 qp = quattro_sbus_find(sdev);
2699                 if (qp == NULL)
2700                         goto err_out;
2701                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2702                         if (qp->happy_meals[qfe_slot] == NULL)
2703                                 break;
2704                 if (qfe_slot == 4)
2705                         goto err_out;
2706         }
2707
2708         err = -ENOMEM;
2709         dev = alloc_etherdev(sizeof(struct happy_meal));
2710         if (!dev)
2711                 goto err_out;
2712         SET_MODULE_OWNER(dev);
2713
2714         if (hme_version_printed++ == 0)
2715                 printk(KERN_INFO "%s", version);
2716
2717         /* If user did not specify a MAC address specifically, use
2718          * the Quattro local-mac-address property...
2719          */
2720         for (i = 0; i < 6; i++) {
2721                 if (macaddr[i] != 0)
2722                         break;
2723         }
2724         if (i < 6) { /* a mac address was given */
2725                 for (i = 0; i < 6; i++)
2726                         dev->dev_addr[i] = macaddr[i];
2727                 macaddr[5]++;
2728         } else if (qfe_slot != -1 &&
2729                    prom_getproplen(sdev->prom_node,
2730                                    "local-mac-address") == 6) {
2731                 prom_getproperty(sdev->prom_node, "local-mac-address",
2732                                  dev->dev_addr, 6);
2733         } else {
2734                 memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2735         }
2736
2737         hp = dev->priv;
2738
2739         hp->happy_dev = sdev;
2740
2741         spin_lock_init(&hp->happy_lock);
2742
2743         err = -ENODEV;
2744         if (sdev->num_registers != 5) {
2745                 printk(KERN_ERR "happymeal: Device does not have 5 regs, it has %d.\n",
2746                        sdev->num_registers);
2747                 printk(KERN_ERR "happymeal: Would you like that for here or to go?\n");
2748                 goto err_out_free_netdev;
2749         }
2750
2751         if (qp != NULL) {
2752                 hp->qfe_parent = qp;
2753                 hp->qfe_ent = qfe_slot;
2754                 qp->happy_meals[qfe_slot] = dev;
2755                 quattro_apply_ranges(qp, hp);
2756         }
2757
2758         hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2759                                  GREG_REG_SIZE, "HME Global Regs");
2760         if (!hp->gregs) {
2761                 printk(KERN_ERR "happymeal: Cannot map Happy Meal global registers.\n");
2762                 goto err_out_free_netdev;
2763         }
2764
2765         hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2766                                    ETX_REG_SIZE, "HME TX Regs");
2767         if (!hp->etxregs) {
2768                 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Transmit registers.\n");
2769                 goto err_out_iounmap;
2770         }
2771
2772         hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2773                                    ERX_REG_SIZE, "HME RX Regs");
2774         if (!hp->erxregs) {
2775                 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Receive registers.\n");
2776                 goto err_out_iounmap;
2777         }
2778
2779         hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2780                                       BMAC_REG_SIZE, "HME BIGMAC Regs");
2781         if (!hp->bigmacregs) {
2782                 printk(KERN_ERR "happymeal: Cannot map Happy Meal BIGMAC registers.\n");
2783                 goto err_out_iounmap;
2784         }
2785
2786         hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2787                                    TCVR_REG_SIZE, "HME Tranceiver Regs");
2788         if (!hp->tcvregs) {
2789                 printk(KERN_ERR "happymeal: Cannot map Happy Meal Tranceiver registers.\n");
2790                 goto err_out_iounmap;
2791         }
2792
2793         hp->hm_revision = prom_getintdefault(sdev->prom_node, "hm-rev", 0xff);
2794         if (hp->hm_revision == 0xff)
2795                 hp->hm_revision = 0xa0;
2796
2797         /* Now enable the feature flags we can. */
2798         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2799                 hp->happy_flags = HFLAG_20_21;
2800         else if (hp->hm_revision != 0xa0)
2801                 hp->happy_flags = HFLAG_NOT_A0;
2802
2803         if (qp != NULL)
2804                 hp->happy_flags |= HFLAG_QUATTRO;
2805
2806         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2807         hp->happy_bursts = prom_getintdefault(sdev->bus->prom_node,
2808                                               "burst-sizes", 0x00);
2809
2810         hp->happy_block = sbus_alloc_consistent(hp->happy_dev,
2811                                                 PAGE_SIZE,
2812                                                 &hp->hblock_dvma);
2813         err = -ENOMEM;
2814         if (!hp->happy_block) {
2815                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2816                 goto err_out_iounmap;
2817         }
2818
2819         /* Force check of the link first time we are brought up. */
2820         hp->linkcheck = 0;
2821
2822         /* Force timer state to 'asleep' with count of zero. */
2823         hp->timer_state = asleep;
2824         hp->timer_ticks = 0;
2825
2826         init_timer(&hp->happy_timer);
2827
2828         hp->dev = dev;
2829         dev->open = &happy_meal_open;
2830         dev->stop = &happy_meal_close;
2831         dev->hard_start_xmit = &happy_meal_start_xmit;
2832         dev->get_stats = &happy_meal_get_stats;
2833         dev->set_multicast_list = &happy_meal_set_multicast;
2834         dev->tx_timeout = &happy_meal_tx_timeout;
2835         dev->watchdog_timeo = 5*HZ;
2836         dev->ethtool_ops = &hme_ethtool_ops;
2837
2838         /* Happy Meal can do it all... except VLAN. */
2839         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_VLAN_CHALLENGED;
2840
2841         dev->irq = sdev->irqs[0];
2842
2843 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2844         /* Hook up PCI register/dma accessors. */
2845         hp->read_desc32 = sbus_hme_read_desc32;
2846         hp->write_txd = sbus_hme_write_txd;
2847         hp->write_rxd = sbus_hme_write_rxd;
2848         hp->dma_map = (u32 (*)(void *, void *, long, int))sbus_map_single;
2849         hp->dma_unmap = (void (*)(void *, u32, long, int))sbus_unmap_single;
2850         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
2851                 sbus_dma_sync_single_for_cpu;
2852         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
2853                 sbus_dma_sync_single_for_device;
2854         hp->read32 = sbus_hme_read32;
2855         hp->write32 = sbus_hme_write32;
2856 #endif
2857
2858         /* Grrr, Happy Meal comes up by default not advertising
2859          * full duplex 100baseT capabilities, fix this.
2860          */
2861         spin_lock_irq(&hp->happy_lock);
2862         happy_meal_set_initial_advertisement(hp);
2863         spin_unlock_irq(&hp->happy_lock);
2864
2865         if (register_netdev(hp->dev)) {
2866                 printk(KERN_ERR "happymeal: Cannot register net device, "
2867                        "aborting.\n");
2868                 goto err_out_free_consistent;
2869         }
2870
2871         if (qfe_slot != -1)
2872                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2873                        dev->name, qfe_slot);
2874         else
2875                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2876                        dev->name);
2877
2878         for (i = 0; i < 6; i++)
2879                 printk("%2.2x%c",
2880                        dev->dev_addr[i], i == 5 ? ' ' : ':');
2881         printk("\n");
2882
2883         /* We are home free at this point, link us in to the happy
2884          * device list.
2885          */
2886         hp->next_module = root_happy_dev;
2887         root_happy_dev = hp;
2888
2889         return 0;
2890
2891 err_out_free_consistent:
2892         sbus_free_consistent(hp->happy_dev,
2893                              PAGE_SIZE,
2894                              hp->happy_block,
2895                              hp->hblock_dvma);
2896
2897 err_out_iounmap:
2898         if (hp->gregs)
2899                 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2900         if (hp->etxregs)
2901                 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2902         if (hp->erxregs)
2903                 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2904         if (hp->bigmacregs)
2905                 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2906         if (hp->tcvregs)
2907                 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2908
2909 err_out_free_netdev:
2910         free_netdev(dev);
2911
2912 err_out:
2913         return err;
2914 }
2915 #endif
2916
2917 #ifdef CONFIG_PCI
2918 #ifndef __sparc__
2919 static int is_quattro_p(struct pci_dev *pdev)
2920 {
2921         struct pci_dev *busdev = pdev->bus->self;
2922         struct list_head *tmp;
2923         int n_hmes;
2924
2925         if (busdev->vendor != PCI_VENDOR_ID_DEC ||
2926             busdev->device != PCI_DEVICE_ID_DEC_21153)
2927                 return 0;
2928
2929         n_hmes = 0;
2930         tmp = pdev->bus->devices.next;
2931         while (tmp != &pdev->bus->devices) {
2932                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2933
2934                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2935                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2936                         n_hmes++;
2937
2938                 tmp = tmp->next;
2939         }
2940
2941         if (n_hmes != 4)
2942                 return 0;
2943
2944         return 1;
2945 }
2946
2947 /* Fetch MAC address from vital product data of PCI ROM. */
2948 static void find_eth_addr_in_vpd(void *rom_base, int len, int index, unsigned char *dev_addr)
2949 {
2950         int this_offset;
2951
2952         for (this_offset = 0x20; this_offset < len; this_offset++) {
2953                 void *p = rom_base + this_offset;
2954
2955                 if (readb(p + 0) != 0x90 ||
2956                     readb(p + 1) != 0x00 ||
2957                     readb(p + 2) != 0x09 ||
2958                     readb(p + 3) != 0x4e ||
2959                     readb(p + 4) != 0x41 ||
2960                     readb(p + 5) != 0x06)
2961                         continue;
2962
2963                 this_offset += 6;
2964                 p += 6;
2965
2966                 if (index == 0) {
2967                         int i;
2968
2969                         for (i = 0; i < 6; i++)
2970                                 dev_addr[i] = readb(p + i);
2971                         break;
2972                 }
2973                 index--;
2974         }
2975 }
2976
2977 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2978 {
2979         u32 rom_reg_orig;
2980         void *p;
2981         int index;
2982
2983         index = 0;
2984         if (is_quattro_p(pdev))
2985                 index = PCI_SLOT(pdev->devfn);
2986
2987         if (pdev->resource[PCI_ROM_RESOURCE].parent == NULL) {
2988                 if (pci_assign_resource(pdev, PCI_ROM_RESOURCE) < 0)
2989                         goto use_random;
2990         }
2991
2992         pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_reg_orig);
2993         pci_write_config_dword(pdev, pdev->rom_base_reg,
2994                                rom_reg_orig | PCI_ROM_ADDRESS_ENABLE);
2995
2996         p = ioremap(pci_resource_start(pdev, PCI_ROM_RESOURCE), (64 * 1024));
2997         if (p != NULL && readb(p) == 0x55 && readb(p + 1) == 0xaa)
2998                 find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2999
3000         if (p != NULL)
3001                 iounmap(p);
3002
3003         pci_write_config_dword(pdev, pdev->rom_base_reg, rom_reg_orig);
3004         return;
3005
3006 use_random:
3007         /* Sun MAC prefix then 3 random bytes. */
3008         dev_addr[0] = 0x08;
3009         dev_addr[1] = 0x00;
3010         dev_addr[2] = 0x20;
3011         get_random_bytes(&dev_addr[3], 3);
3012         return;
3013 }
3014 #endif /* !(__sparc__) */
3015
3016 static int __init happy_meal_pci_init(struct pci_dev *pdev)
3017 {
3018         struct quattro *qp = NULL;
3019 #ifdef __sparc__
3020         struct pcidev_cookie *pcp;
3021         int node;
3022 #endif
3023         struct happy_meal *hp;
3024         struct net_device *dev;
3025         unsigned long hpreg_base;
3026         int i, qfe_slot = -1;
3027         char prom_name[64];
3028         int err;
3029
3030         /* Now make sure pci_dev cookie is there. */
3031 #ifdef __sparc__
3032         pcp = pdev->sysdata;
3033         if (pcp == NULL || pcp->prom_node == -1) {
3034                 printk(KERN_ERR "happymeal(PCI): Some PCI device info missing\n");
3035                 return -ENODEV;
3036         }
3037         node = pcp->prom_node;
3038
3039         prom_getstring(node, "name", prom_name, sizeof(prom_name));
3040 #else
3041         if (is_quattro_p(pdev))
3042                 strcpy(prom_name, "SUNW,qfe");
3043         else
3044                 strcpy(prom_name, "SUNW,hme");
3045 #endif
3046
3047         err = -ENODEV;
3048         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3049                 qp = quattro_pci_find(pdev);
3050                 if (qp == NULL)
3051                         goto err_out;
3052                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3053                         if (qp->happy_meals[qfe_slot] == NULL)
3054                                 break;
3055                 if (qfe_slot == 4)
3056                         goto err_out;
3057         }
3058
3059         dev = alloc_etherdev(sizeof(struct happy_meal));
3060         err = -ENOMEM;
3061         if (!dev)
3062                 goto err_out;
3063         SET_MODULE_OWNER(dev);
3064         SET_NETDEV_DEV(dev, &pdev->dev);
3065
3066         if (hme_version_printed++ == 0)
3067                 printk(KERN_INFO "%s", version);
3068
3069         dev->base_addr = (long) pdev;
3070
3071         hp = (struct happy_meal *)dev->priv;
3072         memset(hp, 0, sizeof(*hp));
3073
3074         hp->happy_dev = pdev;
3075
3076         spin_lock_init(&hp->happy_lock);
3077
3078         if (qp != NULL) {
3079                 hp->qfe_parent = qp;
3080                 hp->qfe_ent = qfe_slot;
3081                 qp->happy_meals[qfe_slot] = dev;
3082         }
3083
3084         hpreg_base = pci_resource_start(pdev, 0);
3085         err = -ENODEV;
3086         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3087                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3088                 goto err_out_clear_quattro;
3089         }
3090         if (pci_request_regions(pdev, DRV_NAME)) {
3091                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3092                        "aborting.\n");
3093                 goto err_out_clear_quattro;
3094         }
3095
3096         if ((hpreg_base = (unsigned long) ioremap(hpreg_base, 0x8000)) == 0) {
3097                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3098                 goto err_out_free_res;
3099         }
3100
3101         for (i = 0; i < 6; i++) {
3102                 if (macaddr[i] != 0)
3103                         break;
3104         }
3105         if (i < 6) { /* a mac address was given */
3106                 for (i = 0; i < 6; i++)
3107                         dev->dev_addr[i] = macaddr[i];
3108                 macaddr[5]++;
3109         } else {
3110 #ifdef __sparc__
3111                 if (qfe_slot != -1 &&
3112                     prom_getproplen(node, "local-mac-address") == 6) {
3113                         prom_getproperty(node, "local-mac-address",
3114                                          dev->dev_addr, 6);
3115                 } else {
3116                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3117                 }
3118 #else
3119                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3120 #endif
3121         }
3122
3123         /* Layout registers. */
3124         hp->gregs      = (hpreg_base + 0x0000UL);
3125         hp->etxregs    = (hpreg_base + 0x2000UL);
3126         hp->erxregs    = (hpreg_base + 0x4000UL);
3127         hp->bigmacregs = (hpreg_base + 0x6000UL);
3128         hp->tcvregs    = (hpreg_base + 0x7000UL);
3129
3130 #ifdef __sparc__
3131         hp->hm_revision = prom_getintdefault(node, "hm-rev", 0xff);
3132         if (hp->hm_revision == 0xff) {
3133                 unsigned char prev;
3134
3135                 pci_read_config_byte(pdev, PCI_REVISION_ID, &prev);
3136                 hp->hm_revision = 0xc0 | (prev & 0x0f);
3137         }
3138 #else
3139         /* works with this on non-sparc hosts */
3140         hp->hm_revision = 0x20;
3141 #endif
3142
3143         /* Now enable the feature flags we can. */
3144         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3145                 hp->happy_flags = HFLAG_20_21;
3146         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3147                 hp->happy_flags = HFLAG_NOT_A0;
3148
3149         if (qp != NULL)
3150                 hp->happy_flags |= HFLAG_QUATTRO;
3151
3152         /* And of course, indicate this is PCI. */
3153         hp->happy_flags |= HFLAG_PCI;
3154
3155 #ifdef __sparc__
3156         /* Assume PCI happy meals can handle all burst sizes. */
3157         hp->happy_bursts = DMA_BURSTBITS;
3158 #endif
3159
3160         hp->happy_block = (struct hmeal_init_block *)
3161                 pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3162
3163         err = -ENODEV;
3164         if (!hp->happy_block) {
3165                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3166                 goto err_out_iounmap;
3167         }
3168
3169         hp->linkcheck = 0;
3170         hp->timer_state = asleep;
3171         hp->timer_ticks = 0;
3172
3173         init_timer(&hp->happy_timer);
3174
3175         hp->dev = dev;
3176         dev->open = &happy_meal_open;
3177         dev->stop = &happy_meal_close;
3178         dev->hard_start_xmit = &happy_meal_start_xmit;
3179         dev->get_stats = &happy_meal_get_stats;
3180         dev->set_multicast_list = &happy_meal_set_multicast;
3181         dev->tx_timeout = &happy_meal_tx_timeout;
3182         dev->watchdog_timeo = 5*HZ;
3183         dev->ethtool_ops = &hme_ethtool_ops;
3184         dev->irq = pdev->irq;
3185         dev->dma = 0;
3186
3187         /* Happy Meal can do it all... */
3188         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3189
3190 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3191         /* Hook up PCI register/dma accessors. */
3192         hp->read_desc32 = pci_hme_read_desc32;
3193         hp->write_txd = pci_hme_write_txd;
3194         hp->write_rxd = pci_hme_write_rxd;
3195         hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3196         hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3197         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
3198                 pci_dma_sync_single_for_cpu;
3199         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
3200                 pci_dma_sync_single_for_device;
3201         hp->read32 = pci_hme_read32;
3202         hp->write32 = pci_hme_write32;
3203 #endif
3204
3205         /* Grrr, Happy Meal comes up by default not advertising
3206          * full duplex 100baseT capabilities, fix this.
3207          */
3208         spin_lock_irq(&hp->happy_lock);
3209         happy_meal_set_initial_advertisement(hp);
3210         spin_unlock_irq(&hp->happy_lock);
3211
3212         if (register_netdev(hp->dev)) {
3213                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3214                        "aborting.\n");
3215                 goto err_out_iounmap;
3216         }
3217
3218         if (!qfe_slot) {
3219                 struct pci_dev *qpdev = qp->quattro_dev;
3220
3221                 prom_name[0] = 0;
3222                 if (!strncmp(dev->name, "eth", 3)) {
3223                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3224                         sprintf(prom_name, "-%d", i + 3);
3225                 }
3226                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3227                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3228                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3229                         printk("DEC 21153 PCI Bridge\n");
3230                 else
3231                         printk("unknown bridge %04x.%04x\n",
3232                                 qpdev->vendor, qpdev->device);
3233         }
3234
3235         if (qfe_slot != -1)
3236                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3237                        dev->name, qfe_slot);
3238         else
3239                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3240                        dev->name);
3241
3242         for (i = 0; i < 6; i++)
3243                 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ' ' : ':');
3244
3245         printk("\n");
3246
3247         /* We are home free at this point, link us in to the happy
3248          * device list.
3249          */
3250         hp->next_module = root_happy_dev;
3251         root_happy_dev = hp;
3252
3253         return 0;
3254
3255 err_out_iounmap:
3256         iounmap((void *)hp->gregs);
3257
3258 err_out_free_res:
3259         pci_release_regions(pdev);
3260
3261 err_out_clear_quattro:
3262         if (qp != NULL)
3263                 qp->happy_meals[qfe_slot] = NULL;
3264
3265         free_netdev(dev);
3266
3267 err_out:
3268         return err;
3269 }
3270 #endif
3271
3272 #ifdef CONFIG_SBUS
3273 static int __init happy_meal_sbus_probe(void)
3274 {
3275         struct sbus_bus *sbus;
3276         struct sbus_dev *sdev;
3277         int cards = 0;
3278         char model[128];
3279
3280         for_each_sbus(sbus) {
3281                 for_each_sbusdev(sdev, sbus) {
3282                         char *name = sdev->prom_name;
3283
3284                         if (!strcmp(name, "SUNW,hme")) {
3285                                 cards++;
3286                                 prom_getstring(sdev->prom_node, "model",
3287                                                model, sizeof(model));
3288                                 if (!strcmp(model, "SUNW,sbus-qfe"))
3289                                         happy_meal_sbus_init(sdev, 1);
3290                                 else
3291                                         happy_meal_sbus_init(sdev, 0);
3292                         } else if (!strcmp(name, "qfe") ||
3293                                    !strcmp(name, "SUNW,qfe")) {
3294                                 cards++;
3295                                 happy_meal_sbus_init(sdev, 1);
3296                         }
3297                 }
3298         }
3299         if (cards != 0)
3300                 quattro_sbus_register_irqs();
3301         return cards;
3302 }
3303 #endif
3304
3305 #ifdef CONFIG_PCI
3306 static int __init happy_meal_pci_probe(void)
3307 {
3308         struct pci_dev *pdev = NULL;
3309         int cards = 0;
3310
3311         while ((pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3312                                        PCI_DEVICE_ID_SUN_HAPPYMEAL, pdev)) != NULL) {
3313                 if (pci_enable_device(pdev))
3314                         continue;
3315                 pci_set_master(pdev);
3316                 cards++;
3317                 happy_meal_pci_init(pdev);
3318         }
3319         return cards;
3320 }
3321 #endif
3322
3323 static int __init happy_meal_probe(void)
3324 {
3325         static int called = 0;
3326         int cards;
3327
3328         root_happy_dev = NULL;
3329
3330         if (called)
3331                 return -ENODEV;
3332         called++;
3333
3334         cards = 0;
3335 #ifdef CONFIG_SBUS
3336         cards += happy_meal_sbus_probe();
3337 #endif
3338 #ifdef CONFIG_PCI
3339         cards += happy_meal_pci_probe();
3340 #endif
3341         if (!cards)
3342                 return -ENODEV;
3343         return 0;
3344 }
3345
3346
3347 static void __exit happy_meal_cleanup_module(void)
3348 {
3349 #ifdef CONFIG_SBUS
3350         struct quattro *last_seen_qfe = NULL;
3351 #endif
3352
3353         while (root_happy_dev) {
3354                 struct happy_meal *hp = root_happy_dev;
3355                 struct happy_meal *next = root_happy_dev->next_module;
3356                 struct net_device *dev = hp->dev;
3357
3358                 /* Unregister netdev before unmapping registers as this
3359                  * call can end up trying to access those registers.
3360                  */
3361                 unregister_netdev(dev);
3362
3363 #ifdef CONFIG_SBUS
3364                 if (!(hp->happy_flags & HFLAG_PCI)) {
3365                         if (hp->happy_flags & HFLAG_QUATTRO) {
3366                                 if (hp->qfe_parent != last_seen_qfe) {
3367                                         free_irq(dev->irq, hp->qfe_parent);
3368                                         last_seen_qfe = hp->qfe_parent;
3369                                 }
3370                         }
3371
3372                         sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3373                         sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3374                         sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3375                         sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3376                         sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3377                         sbus_free_consistent(hp->happy_dev,
3378                                              PAGE_SIZE,
3379                                              hp->happy_block,
3380                                              hp->hblock_dvma);
3381                 }
3382 #endif
3383 #ifdef CONFIG_PCI
3384                 if ((hp->happy_flags & HFLAG_PCI)) {
3385                         pci_free_consistent(hp->happy_dev,
3386                                             PAGE_SIZE,
3387                                             hp->happy_block,
3388                                             hp->hblock_dvma);
3389                         iounmap((void *)hp->gregs);
3390                         pci_release_regions(hp->happy_dev);
3391                 }
3392 #endif
3393                 free_netdev(dev);
3394
3395                 root_happy_dev = next;
3396         }
3397
3398         /* Now cleanup the quattro lists. */
3399 #ifdef CONFIG_SBUS
3400         while (qfe_sbus_list) {
3401                 struct quattro *qfe = qfe_sbus_list;
3402                 struct quattro *next = qfe->next;
3403
3404                 kfree(qfe);
3405
3406                 qfe_sbus_list = next;
3407         }
3408 #endif
3409 #ifdef CONFIG_PCI
3410         while (qfe_pci_list) {
3411                 struct quattro *qfe = qfe_pci_list;
3412                 struct quattro *next = qfe->next;
3413
3414                 kfree(qfe);
3415
3416                 qfe_pci_list = next;
3417         }
3418 #endif
3419 }
3420
3421 module_init(happy_meal_probe);
3422 module_exit(happy_meal_cleanup_module);