1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
4 Maintained by Jeff Garzik <jgarzik@pobox.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
11 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
17 #include <linux/config.h>
19 #define DRV_NAME "tulip"
20 #ifdef CONFIG_TULIP_NAPI
21 #define DRV_VERSION "1.1.13-NAPI" /* Keep at least for test */
23 #define DRV_VERSION "1.1.13"
25 #define DRV_RELDATE "May 11, 2002"
28 #include <linux/module.h>
29 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/etherdevice.h>
33 #include <linux/delay.h>
34 #include <linux/mii.h>
35 #include <linux/ethtool.h>
36 #include <linux/crc32.h>
37 #include <asm/unaligned.h>
38 #include <asm/uaccess.h>
44 static char version[] __devinitdata =
45 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
48 /* A few user-configurable values. */
50 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
51 static unsigned int max_interrupt_work = 25;
54 /* Used to pass the full-duplex flag, etc. */
55 static int full_duplex[MAX_UNITS];
56 static int options[MAX_UNITS];
57 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
59 /* The possible media types that can be set in options[] are: */
60 const char * const medianame[32] = {
61 "10baseT", "10base2", "AUI", "100baseTx",
62 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
63 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
64 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
65 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
66 "","","","", "","","","", "","","","Transceiver reset",
69 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
70 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
71 || defined(__sparc_) || defined(__ia64__) \
72 || defined(__sh__) || defined(__mips__)
73 static int rx_copybreak = 1518;
75 static int rx_copybreak = 100;
79 Set the bus performance register.
80 Typical: Set 16 longword cache alignment, no burst limit.
81 Cache alignment bits 15:14 Burst length 13:8
82 0000 No alignment 0x00000000 unlimited 0800 8 longwords
83 4000 8 longwords 0100 1 longword 1000 16 longwords
84 8000 16 longwords 0200 2 longwords 2000 32 longwords
85 C000 32 longwords 0400 4 longwords
86 Warning: many older 486 systems are broken and require setting 0x00A04800
87 8 longword cache alignment, 8 longword burst.
88 ToDo: Non-Intel setting could be better.
91 #if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
92 static int csr0 = 0x01A00000 | 0xE000;
93 #elif defined(__i386__) || defined(__powerpc__)
94 static int csr0 = 0x01A00000 | 0x8000;
95 #elif defined(__sparc__) || defined(__hppa__)
96 /* The UltraSparc PCI controllers will disconnect at every 64-byte
97 * crossing anyways so it makes no sense to tell Tulip to burst
100 static int csr0 = 0x01A00000 | 0x9000;
101 #elif defined(__arm__) || defined(__sh__)
102 static int csr0 = 0x01A00000 | 0x4800;
103 #elif defined(__mips__)
104 static int csr0 = 0x00200000 | 0x4000;
106 #warning Processor architecture undefined!
107 static int csr0 = 0x00A00000 | 0x4800;
110 /* Operational parameters that usually are not changed. */
111 /* Time in jiffies before concluding the transmitter is hung. */
112 #define TX_TIMEOUT (4*HZ)
115 MODULE_AUTHOR("The Linux Kernel Team");
116 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
117 MODULE_LICENSE("GPL");
118 MODULE_PARM(tulip_debug, "i");
119 MODULE_PARM(max_interrupt_work, "i");
120 MODULE_PARM(rx_copybreak, "i");
121 MODULE_PARM(csr0, "i");
122 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
123 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
125 #define PFX DRV_NAME ": "
128 int tulip_debug = TULIP_DEBUG;
136 * This table use during operation for capabilities and media timer.
138 * It is indexed via the values in 'enum chips'
141 struct tulip_chip_table tulip_tbl[] = {
142 { }, /* placeholder for array, slot unused currently */
143 { }, /* placeholder for array, slot unused currently */
146 { "Digital DS21140 Tulip", 128, 0x0001ebef,
147 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
149 /* DC21142, DC21143 */
150 { "Digital DS21143 Tulip", 128, 0x0801fbff,
151 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
152 | HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
155 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
156 HAS_MII | HAS_PNICNWAY, pnic_timer },
159 { "Macronix 98713 PMAC", 128, 0x0001ebef,
160 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
163 { "Macronix 98715 PMAC", 256, 0x0001ebef,
164 HAS_MEDIA_TABLE, mxic_timer },
167 { "Macronix 98725 PMAC", 256, 0x0001ebef,
168 HAS_MEDIA_TABLE, mxic_timer },
171 { "ASIX AX88140", 128, 0x0001fbff,
172 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
173 | IS_ASIX, tulip_timer },
176 { "Lite-On PNIC-II", 256, 0x0801fbff,
177 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
180 { "ADMtek Comet", 256, 0x0001abef,
181 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
184 { "Compex 9881 PMAC", 128, 0x0001ebef,
185 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
188 { "Intel DS21145 Tulip", 128, 0x0801fbff,
189 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
190 | HAS_NWAY | HAS_PCI_MWI, t21142_timer },
193 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
194 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
198 { "Conexant LANfinity", 256, 0x0001ebef,
199 HAS_MII | HAS_ACPI, tulip_timer },
202 { "ULi M5261/M5263", 128, 0x0001ebef,
203 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI, tulip_timer },
207 static struct pci_device_id tulip_pci_tbl[] = {
208 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
209 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
210 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
211 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
212 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
213 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
214 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
215 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
216 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
217 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
218 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
219 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
227 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
228 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
229 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
230 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
231 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
232 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
233 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
235 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
236 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
237 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
238 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */
241 { 0x10b9, 0x5263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */
242 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
243 { } /* terminate list */
245 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
248 /* A full-duplex map for media types. */
249 const char tulip_media_cap[32] =
250 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
252 static void tulip_tx_timeout(struct net_device *dev);
253 static void tulip_init_ring(struct net_device *dev);
254 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
255 static int tulip_open(struct net_device *dev);
256 static int tulip_close(struct net_device *dev);
257 static void tulip_up(struct net_device *dev);
258 static void tulip_down(struct net_device *dev);
259 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
260 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
261 static void set_rx_mode(struct net_device *dev);
262 #ifdef CONFIG_NET_POLL_CONTROLLER
263 static void poll_tulip(struct net_device *dev);
266 static void tulip_set_power_state (struct tulip_private *tp,
267 int sleep, int snooze)
269 if (tp->flags & HAS_ACPI) {
271 pci_read_config_dword (tp->pdev, CFDD, &tmp);
272 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
274 newtmp |= CFDD_Sleep;
276 newtmp |= CFDD_Snooze;
278 pci_write_config_dword (tp->pdev, CFDD, newtmp);
284 static void tulip_up(struct net_device *dev)
286 struct tulip_private *tp = netdev_priv(dev);
287 void __iomem *ioaddr = tp->base_addr;
288 int next_tick = 3*HZ;
291 /* Wake the chip from sleep/snooze mode. */
292 tulip_set_power_state (tp, 0, 0);
294 /* On some chip revs we must set the MII/SYM port before the reset!? */
295 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
296 iowrite32(0x00040000, ioaddr + CSR6);
298 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
299 iowrite32(0x00000001, ioaddr + CSR0);
303 Wait the specified 50 PCI cycles after a reset by initializing
304 Tx and Rx queues and the address filter list. */
305 iowrite32(tp->csr0, ioaddr + CSR0);
309 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
311 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
312 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
313 tp->cur_rx = tp->cur_tx = 0;
314 tp->dirty_rx = tp->dirty_tx = 0;
316 if (tp->flags & MC_HASH_ONLY) {
317 u32 addr_low = le32_to_cpu(get_unaligned((u32 *)dev->dev_addr));
318 u32 addr_high = le16_to_cpu(get_unaligned((u16 *)(dev->dev_addr+4)));
319 if (tp->chip_id == AX88140) {
320 iowrite32(0, ioaddr + CSR13);
321 iowrite32(addr_low, ioaddr + CSR14);
322 iowrite32(1, ioaddr + CSR13);
323 iowrite32(addr_high, ioaddr + CSR14);
324 } else if (tp->flags & COMET_MAC_ADDR) {
325 iowrite32(addr_low, ioaddr + 0xA4);
326 iowrite32(addr_high, ioaddr + 0xA8);
327 iowrite32(0, ioaddr + 0xAC);
328 iowrite32(0, ioaddr + 0xB0);
331 /* This is set_rx_mode(), but without starting the transmitter. */
332 u16 *eaddrs = (u16 *)dev->dev_addr;
333 u16 *setup_frm = &tp->setup_frame[15*6];
336 /* 21140 bug: you must add the broadcast address. */
337 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
338 /* Fill the final entry of the table with our physical address. */
339 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
340 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
341 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
343 mapping = pci_map_single(tp->pdev, tp->setup_frame,
344 sizeof(tp->setup_frame),
346 tp->tx_buffers[tp->cur_tx].skb = NULL;
347 tp->tx_buffers[tp->cur_tx].mapping = mapping;
349 /* Put the setup frame on the Tx list. */
350 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
351 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
352 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
357 tp->saved_if_port = dev->if_port;
358 if (dev->if_port == 0)
359 dev->if_port = tp->default_port;
361 /* Allow selecting a default media. */
363 if (tp->mtable == NULL)
366 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
367 (dev->if_port == 12 ? 0 : dev->if_port);
368 for (i = 0; i < tp->mtable->leafcount; i++)
369 if (tp->mtable->mleaf[i].media == looking_for) {
370 printk(KERN_INFO "%s: Using user-specified media %s.\n",
371 dev->name, medianame[dev->if_port]);
375 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
376 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
377 for (i = 0; i < tp->mtable->leafcount; i++)
378 if (tp->mtable->mleaf[i].media == looking_for) {
379 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
380 dev->name, medianame[looking_for]);
384 /* Start sensing first non-full-duplex media. */
385 for (i = tp->mtable->leafcount - 1;
386 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
395 if (tp->chip_id == DC21143 &&
396 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
397 /* We must reset the media CSRs when we force-select MII mode. */
398 iowrite32(0x0000, ioaddr + CSR13);
399 iowrite32(0x0000, ioaddr + CSR14);
400 iowrite32(0x0008, ioaddr + CSR15);
402 tulip_select_media(dev, 1);
403 } else if (tp->chip_id == DC21142) {
405 tulip_select_media(dev, 1);
407 printk(KERN_INFO "%s: Using MII transceiver %d, status "
409 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
410 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
411 tp->csr6 = csr6_mask_hdcap;
413 iowrite32(0x0000, ioaddr + CSR13);
414 iowrite32(0x0000, ioaddr + CSR14);
416 t21142_start_nway(dev);
417 } else if (tp->chip_id == PNIC2) {
418 /* for initial startup advertise 10/100 Full and Half */
419 tp->sym_advertise = 0x01E0;
420 /* enable autonegotiate end interrupt */
421 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
422 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
423 pnic2_start_nway(dev);
424 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
427 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
428 iowrite32(0x0001, ioaddr + CSR15);
429 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
432 /* Start with 10mbps to do autonegotiation. */
433 iowrite32(0x32, ioaddr + CSR12);
434 tp->csr6 = 0x00420000;
435 iowrite32(0x0001B078, ioaddr + 0xB8);
436 iowrite32(0x0201B078, ioaddr + 0xB8);
439 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
440 && ! tp->medialock) {
442 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
443 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
444 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
445 /* Provided by BOLO, Macronix - 12/10/1998. */
447 tp->csr6 = 0x01a80200;
448 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
449 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
450 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
451 /* Enable automatic Tx underrun recovery. */
452 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
453 dev->if_port = tp->mii_cnt ? 11 : 0;
454 tp->csr6 = 0x00040000;
455 } else if (tp->chip_id == AX88140) {
456 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
458 tulip_select_media(dev, 1);
460 /* Start the chip's Tx to process setup frame. */
464 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
466 /* Enable interrupts by setting the interrupt mask. */
467 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
468 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
469 tulip_start_rxtx(tp);
470 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
472 if (tulip_debug > 2) {
473 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
474 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
475 ioread32(ioaddr + CSR6));
478 /* Set the timer to switch to check for link beat and perhaps switch
479 to an alternate media type. */
480 tp->timer.expires = RUN_AT(next_tick);
481 add_timer(&tp->timer);
482 #ifdef CONFIG_TULIP_NAPI
483 init_timer(&tp->oom_timer);
484 tp->oom_timer.data = (unsigned long)dev;
485 tp->oom_timer.function = oom_timer;
490 tulip_open(struct net_device *dev)
494 if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev)))
497 tulip_init_ring (dev);
501 netif_start_queue (dev);
507 static void tulip_tx_timeout(struct net_device *dev)
509 struct tulip_private *tp = netdev_priv(dev);
510 void __iomem *ioaddr = tp->base_addr;
513 spin_lock_irqsave (&tp->lock, flags);
515 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
516 /* Do nothing -- the media monitor should handle this. */
518 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
520 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
521 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
522 || tp->chip_id == DM910X || tp->chip_id == ULI526X) {
523 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
524 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
525 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
526 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
527 if ( ! tp->medialock && tp->mtable) {
530 while (tp->cur_index >= 0
531 && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
533 if (--tp->cur_index < 0) {
534 /* We start again, but should instead look for default. */
535 tp->cur_index = tp->mtable->leafcount - 1;
537 tulip_select_media(dev, 0);
538 printk(KERN_WARNING "%s: transmit timed out, switching to %s "
539 "media.\n", dev->name, medianame[dev->if_port]);
541 } else if (tp->chip_id == PNIC2) {
542 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
543 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
544 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
545 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
547 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
548 "%8.8x, resetting...\n",
549 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
553 #if defined(way_too_many_messages)
554 if (tulip_debug > 3) {
556 for (i = 0; i < RX_RING_SIZE; i++) {
557 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
559 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
560 "%2.2x %2.2x %2.2x.\n",
561 i, (unsigned int)tp->rx_ring[i].status,
562 (unsigned int)tp->rx_ring[i].length,
563 (unsigned int)tp->rx_ring[i].buffer1,
564 (unsigned int)tp->rx_ring[i].buffer2,
565 buf[0], buf[1], buf[2]);
566 for (j = 0; buf[j] != 0xee && j < 1600; j++)
567 if (j < 100) printk(" %2.2x", buf[j]);
568 printk(" j=%d.\n", j);
570 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
571 for (i = 0; i < RX_RING_SIZE; i++)
572 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
573 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
574 for (i = 0; i < TX_RING_SIZE; i++)
575 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
580 /* Stop and restart the chip's Tx processes . */
582 tulip_restart_rxtx(tp);
583 /* Trigger an immediate transmit demand. */
584 iowrite32(0, ioaddr + CSR1);
586 tp->stats.tx_errors++;
588 spin_unlock_irqrestore (&tp->lock, flags);
589 dev->trans_start = jiffies;
590 netif_wake_queue (dev);
594 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
595 static void tulip_init_ring(struct net_device *dev)
597 struct tulip_private *tp = netdev_priv(dev);
604 for (i = 0; i < RX_RING_SIZE; i++) {
605 tp->rx_ring[i].status = 0x00000000;
606 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
607 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
608 tp->rx_buffers[i].skb = NULL;
609 tp->rx_buffers[i].mapping = 0;
611 /* Mark the last entry as wrapping the ring. */
612 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
613 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
615 for (i = 0; i < RX_RING_SIZE; i++) {
618 /* Note the receive buffer must be longword aligned.
619 dev_alloc_skb() provides 16 byte alignment. But do *not*
620 use skb_reserve() to align the IP header! */
621 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
622 tp->rx_buffers[i].skb = skb;
625 mapping = pci_map_single(tp->pdev, skb->tail,
626 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
627 tp->rx_buffers[i].mapping = mapping;
628 skb->dev = dev; /* Mark as being used by this device. */
629 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
630 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
632 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
634 /* The Tx buffer descriptor is filled in as needed, but we
635 do need to clear the ownership bit. */
636 for (i = 0; i < TX_RING_SIZE; i++) {
637 tp->tx_buffers[i].skb = NULL;
638 tp->tx_buffers[i].mapping = 0;
639 tp->tx_ring[i].status = 0x00000000;
640 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
642 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
646 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
648 struct tulip_private *tp = netdev_priv(dev);
653 spin_lock_irq(&tp->lock);
655 /* Calculate the next Tx descriptor entry. */
656 entry = tp->cur_tx % TX_RING_SIZE;
658 tp->tx_buffers[entry].skb = skb;
659 mapping = pci_map_single(tp->pdev, skb->data,
660 skb->len, PCI_DMA_TODEVICE);
661 tp->tx_buffers[entry].mapping = mapping;
662 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
664 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
665 flag = 0x60000000; /* No interrupt */
666 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
667 flag = 0xe0000000; /* Tx-done intr. */
668 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
669 flag = 0x60000000; /* No Tx-done intr. */
670 } else { /* Leave room for set_rx_mode() to fill entries. */
671 flag = 0xe0000000; /* Tx-done intr. */
672 netif_stop_queue(dev);
674 if (entry == TX_RING_SIZE-1)
675 flag = 0xe0000000 | DESC_RING_WRAP;
677 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
678 /* if we were using Transmit Automatic Polling, we would need a
680 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
685 /* Trigger an immediate transmit demand. */
686 iowrite32(0, tp->base_addr + CSR1);
688 spin_unlock_irq(&tp->lock);
690 dev->trans_start = jiffies;
695 static void tulip_clean_tx_ring(struct tulip_private *tp)
697 unsigned int dirty_tx;
699 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
701 int entry = dirty_tx % TX_RING_SIZE;
702 int status = le32_to_cpu(tp->tx_ring[entry].status);
705 tp->stats.tx_errors++; /* It wasn't Txed */
706 tp->tx_ring[entry].status = 0;
709 /* Check for Tx filter setup frames. */
710 if (tp->tx_buffers[entry].skb == NULL) {
711 /* test because dummy frames not mapped */
712 if (tp->tx_buffers[entry].mapping)
713 pci_unmap_single(tp->pdev,
714 tp->tx_buffers[entry].mapping,
715 sizeof(tp->setup_frame),
720 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
721 tp->tx_buffers[entry].skb->len,
724 /* Free the original skb. */
725 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
726 tp->tx_buffers[entry].skb = NULL;
727 tp->tx_buffers[entry].mapping = 0;
731 static void tulip_down (struct net_device *dev)
733 struct tulip_private *tp = netdev_priv(dev);
734 void __iomem *ioaddr = tp->base_addr;
737 del_timer_sync (&tp->timer);
738 #ifdef CONFIG_TULIP_NAPI
739 del_timer_sync (&tp->oom_timer);
741 spin_lock_irqsave (&tp->lock, flags);
743 /* Disable interrupts by clearing the interrupt mask. */
744 iowrite32 (0x00000000, ioaddr + CSR7);
746 /* Stop the Tx and Rx processes. */
749 /* prepare receive buffers */
750 tulip_refill_rx(dev);
752 /* release any unconsumed transmit buffers */
753 tulip_clean_tx_ring(tp);
755 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
756 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
758 spin_unlock_irqrestore (&tp->lock, flags);
760 init_timer(&tp->timer);
761 tp->timer.data = (unsigned long)dev;
762 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
764 dev->if_port = tp->saved_if_port;
766 /* Leave the driver in snooze, not sleep, mode. */
767 tulip_set_power_state (tp, 0, 1);
771 static int tulip_close (struct net_device *dev)
773 struct tulip_private *tp = netdev_priv(dev);
774 void __iomem *ioaddr = tp->base_addr;
777 netif_stop_queue (dev);
782 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
783 dev->name, ioread32 (ioaddr + CSR5));
785 free_irq (dev->irq, dev);
787 /* Free all the skbuffs in the Rx queue. */
788 for (i = 0; i < RX_RING_SIZE; i++) {
789 struct sk_buff *skb = tp->rx_buffers[i].skb;
790 dma_addr_t mapping = tp->rx_buffers[i].mapping;
792 tp->rx_buffers[i].skb = NULL;
793 tp->rx_buffers[i].mapping = 0;
795 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
796 tp->rx_ring[i].length = 0;
797 tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
799 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
804 for (i = 0; i < TX_RING_SIZE; i++) {
805 struct sk_buff *skb = tp->tx_buffers[i].skb;
808 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
809 skb->len, PCI_DMA_TODEVICE);
812 tp->tx_buffers[i].skb = NULL;
813 tp->tx_buffers[i].mapping = 0;
819 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
821 struct tulip_private *tp = netdev_priv(dev);
822 void __iomem *ioaddr = tp->base_addr;
824 if (netif_running(dev)) {
827 spin_lock_irqsave (&tp->lock, flags);
829 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
831 spin_unlock_irqrestore(&tp->lock, flags);
838 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
840 struct tulip_private *np = netdev_priv(dev);
841 strcpy(info->driver, DRV_NAME);
842 strcpy(info->version, DRV_VERSION);
843 strcpy(info->bus_info, pci_name(np->pdev));
846 static struct ethtool_ops ops = {
847 .get_drvinfo = tulip_get_drvinfo
850 /* Provide ioctl() calls to examine the MII xcvr state. */
851 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
853 struct tulip_private *tp = netdev_priv(dev);
854 void __iomem *ioaddr = tp->base_addr;
855 struct mii_ioctl_data *data = if_mii(rq);
856 const unsigned int phy_idx = 0;
857 int phy = tp->phys[phy_idx] & 0x1f;
858 unsigned int regnum = data->reg_num;
861 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
864 else if (tp->flags & HAS_NWAY)
866 else if (tp->chip_id == COMET)
871 case SIOCGMIIREG: /* Read MII PHY register. */
872 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
873 int csr12 = ioread32 (ioaddr + CSR12);
874 int csr14 = ioread32 (ioaddr + CSR14);
877 if (((csr14<<5) & 0x1000) ||
878 (dev->if_port == 5 && tp->nwayset))
879 data->val_out = 0x1000;
881 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
882 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
887 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
888 ((csr12&0x06) == 6 ? 0 : 4);
889 data->val_out |= 0x6048;
892 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
894 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
895 ((csr14 >> 1) & 0x20) + 1;
896 data->val_out |= ((csr14 >> 9) & 0x03C0);
898 case 5: data->val_out = tp->lpar; break;
899 default: data->val_out = 0; break;
902 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
906 case SIOCSMIIREG: /* Write MII PHY register. */
907 if (!capable (CAP_NET_ADMIN))
911 if (data->phy_id == phy) {
912 u16 value = data->val_in;
914 case 0: /* Check for autonegotiation on or reset. */
915 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
916 if (tp->full_duplex_lock)
917 tp->full_duplex = (value & 0x0100) ? 1 : 0;
920 tp->advertising[phy_idx] =
921 tp->mii_advertise = data->val_in;
925 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
926 u16 value = data->val_in;
928 if ((value & 0x1200) == 0x1200) {
929 if (tp->chip_id == PNIC2) {
930 pnic2_start_nway (dev);
932 t21142_start_nway (dev);
935 } else if (regnum == 4)
936 tp->sym_advertise = value;
938 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
949 /* Set or clear the multicast filter for this adaptor.
950 Note that we only use exclusion around actually queueing the
951 new frame, not around filling tp->setup_frame. This is non-deterministic
952 when re-entered but still correct. */
955 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
957 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
959 struct tulip_private *tp = netdev_priv(dev);
961 struct dev_mc_list *mclist;
965 memset(hash_table, 0, sizeof(hash_table));
966 set_bit_le(255, hash_table); /* Broadcast entry */
967 /* This should work on big-endian machines as well. */
968 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
969 i++, mclist = mclist->next) {
970 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
972 set_bit_le(index, hash_table);
975 for (i = 0; i < 32; i++) {
976 *setup_frm++ = hash_table[i];
977 *setup_frm++ = hash_table[i];
979 setup_frm = &tp->setup_frame[13*6];
981 /* Fill the final entry with our physical address. */
982 eaddrs = (u16 *)dev->dev_addr;
983 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
984 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
985 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
988 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
990 struct tulip_private *tp = netdev_priv(dev);
991 struct dev_mc_list *mclist;
995 /* We have <= 14 addresses so we can use the wonderful
996 16 address perfect filtering of the Tulip. */
997 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
998 i++, mclist = mclist->next) {
999 eaddrs = (u16 *)mclist->dmi_addr;
1000 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1001 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1002 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1004 /* Fill the unused entries with the broadcast address. */
1005 memset(setup_frm, 0xff, (15-i)*12);
1006 setup_frm = &tp->setup_frame[15*6];
1008 /* Fill the final entry with our physical address. */
1009 eaddrs = (u16 *)dev->dev_addr;
1010 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1011 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1012 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1016 static void set_rx_mode(struct net_device *dev)
1018 struct tulip_private *tp = netdev_priv(dev);
1019 void __iomem *ioaddr = tp->base_addr;
1022 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1024 tp->csr6 &= ~0x00D5;
1025 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1026 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1027 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1028 /* Unconditionally log net taps. */
1029 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1030 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1031 /* Too many to filter well -- accept all multicasts. */
1032 tp->csr6 |= AcceptAllMulticast;
1033 csr6 |= AcceptAllMulticast;
1034 } else if (tp->flags & MC_HASH_ONLY) {
1035 /* Some work-alikes have only a 64-entry hash filter table. */
1036 /* Should verify correctness on big-endian/__powerpc__ */
1037 struct dev_mc_list *mclist;
1039 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1040 tp->csr6 |= AcceptAllMulticast;
1041 csr6 |= AcceptAllMulticast;
1043 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1045 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1046 i++, mclist = mclist->next) {
1047 if (tp->flags & COMET_MAC_ADDR)
1048 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1050 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1052 mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
1053 if (tulip_debug > 2) {
1054 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1055 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1056 mclist->dmi_addr[0], mclist->dmi_addr[1],
1057 mclist->dmi_addr[2], mclist->dmi_addr[3],
1058 mclist->dmi_addr[4], mclist->dmi_addr[5],
1059 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1062 if (mc_filter[0] == tp->mc_filter[0] &&
1063 mc_filter[1] == tp->mc_filter[1])
1065 else if (tp->flags & IS_ASIX) {
1066 iowrite32(2, ioaddr + CSR13);
1067 iowrite32(mc_filter[0], ioaddr + CSR14);
1068 iowrite32(3, ioaddr + CSR13);
1069 iowrite32(mc_filter[1], ioaddr + CSR14);
1070 } else if (tp->flags & COMET_MAC_ADDR) {
1071 iowrite32(mc_filter[0], ioaddr + 0xAC);
1072 iowrite32(mc_filter[1], ioaddr + 0xB0);
1074 tp->mc_filter[0] = mc_filter[0];
1075 tp->mc_filter[1] = mc_filter[1];
1078 unsigned long flags;
1079 u32 tx_flags = 0x08000000 | 192;
1081 /* Note that only the low-address shortword of setup_frame is valid!
1082 The values are doubled for big-endian architectures. */
1083 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1084 build_setup_frame_hash(tp->setup_frame, dev);
1085 tx_flags = 0x08400000 | 192;
1087 build_setup_frame_perfect(tp->setup_frame, dev);
1090 spin_lock_irqsave(&tp->lock, flags);
1092 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1093 /* Same setup recently queued, we need not add it. */
1098 /* Now add this frame to the Tx list. */
1100 entry = tp->cur_tx++ % TX_RING_SIZE;
1103 /* Avoid a chip errata by prefixing a dummy entry. Don't do
1104 this on the ULI526X as it triggers a different problem */
1105 if (!(tp->chip_id == ULI526X && (tp->revision = 0x40 || tp->revision == 0x50))) {
1106 tp->tx_buffers[entry].skb = NULL;
1107 tp->tx_buffers[entry].mapping = 0;
1108 tp->tx_ring[entry].length =
1109 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1110 tp->tx_ring[entry].buffer1 = 0;
1111 /* Must set DescOwned later to avoid race with chip */
1113 entry = tp->cur_tx++ % TX_RING_SIZE;
1117 tp->tx_buffers[entry].skb = NULL;
1118 tp->tx_buffers[entry].mapping =
1119 pci_map_single(tp->pdev, tp->setup_frame,
1120 sizeof(tp->setup_frame),
1122 /* Put the setup frame on the Tx list. */
1123 if (entry == TX_RING_SIZE-1)
1124 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1125 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1126 tp->tx_ring[entry].buffer1 =
1127 cpu_to_le32(tp->tx_buffers[entry].mapping);
1128 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1130 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1131 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1132 netif_stop_queue(dev);
1134 /* Trigger an immediate transmit demand. */
1135 iowrite32(0, ioaddr + CSR1);
1138 spin_unlock_irqrestore(&tp->lock, flags);
1141 iowrite32(csr6, ioaddr + CSR6);
1144 #ifdef CONFIG_TULIP_MWI
1145 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1146 struct net_device *dev)
1148 struct tulip_private *tp = netdev_priv(dev);
1153 if (tulip_debug > 3)
1154 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1156 tp->csr0 = csr0 = 0;
1158 /* if we have any cache line size at all, we can do MRM */
1161 /* ...and barring hardware bugs, MWI */
1162 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1165 /* set or disable MWI in the standard PCI command bit.
1166 * Check for the case where mwi is desired but not available
1168 if (csr0 & MWI) pci_set_mwi(pdev);
1169 else pci_clear_mwi(pdev);
1171 /* read result from hardware (in case bit refused to enable) */
1172 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1173 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1176 /* if cache line size hardwired to zero, no MWI */
1177 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1178 if ((csr0 & MWI) && (cache == 0)) {
1180 pci_clear_mwi(pdev);
1183 /* assign per-cacheline-size cache alignment and
1184 * burst length values
1188 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1191 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1194 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1201 /* if we have a good cache line size, we by now have a good
1202 * csr0, so save it and exit
1207 /* we don't have a good csr0 or cache line size, disable MWI */
1209 pci_clear_mwi(pdev);
1213 /* sane defaults for burst length and cache alignment
1214 * originally from de4x5 driver
1216 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1220 if (tulip_debug > 2)
1221 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1222 pci_name(pdev), cache, csr0);
1227 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1228 * is the DM910X and the on chip ULi devices
1231 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1233 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1235 if (pdev->vendor == 0x10b9 && pdev->device == 0x5261)
1237 if (pdev->vendor == 0x10b9 && pdev->device == 0x5263)
1242 static int __devinit tulip_init_one (struct pci_dev *pdev,
1243 const struct pci_device_id *ent)
1245 struct tulip_private *tp;
1246 /* See note below on the multiport cards. */
1247 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1248 static struct pci_device_id early_486_chipsets[] = {
1249 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1250 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1253 static int last_irq;
1254 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1258 unsigned char *ee_data;
1259 struct net_device *dev;
1260 void __iomem *ioaddr;
1261 static int board_idx = -1;
1262 int chip_idx = ent->driver_data;
1263 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1264 unsigned int eeprom_missing = 0;
1265 unsigned int force_csr0 = 0;
1268 static int did_version; /* Already printed version info. */
1269 if (tulip_debug > 0 && did_version++ == 0)
1270 printk (KERN_INFO "%s", version);
1276 * Lan media wire a tulip chip to a wan interface. Needs a very
1277 * different driver (lmc driver)
1280 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1281 printk (KERN_ERR PFX "skipping LMC card.\n");
1286 * Early DM9100's need software CRC and the DMFE driver
1289 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1292 /* Read Chip revision */
1293 pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1294 if(dev_rev < 0x02000030)
1296 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1302 * Looks for early PCI chipsets where people report hangs
1303 * without the workarounds being on.
1306 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1307 aligned. Aries might need this too. The Saturn errata are not
1308 pretty reading but thankfully it's an old 486 chipset.
1310 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1314 if (pci_dev_present(early_486_chipsets)) {
1315 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1319 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1320 if (chip_idx == AX88140) {
1321 if ((csr0 & 0x3f00) == 0)
1325 /* PNIC doesn't have MWI/MRL/MRM... */
1326 if (chip_idx == LC82C168)
1327 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1329 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1330 if (tulip_uli_dm_quirk(pdev)) {
1331 csr0 &= ~0x01f100ff;
1332 #if defined(__sparc__)
1333 csr0 = (csr0 & ~0xff00) | 0xe000;
1337 * And back to business
1340 i = pci_enable_device(pdev);
1342 printk (KERN_ERR PFX
1343 "Cannot enable tulip board #%d, aborting\n",
1350 /* alloc_etherdev ensures aligned and zeroed private structures */
1351 dev = alloc_etherdev (sizeof (*tp));
1353 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1357 SET_MODULE_OWNER(dev);
1358 SET_NETDEV_DEV(dev, &pdev->dev);
1359 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1360 printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1361 "aborting\n", pci_name(pdev),
1362 pci_resource_len (pdev, 0),
1363 pci_resource_start (pdev, 0));
1364 goto err_out_free_netdev;
1367 /* grab all resources from both PIO and MMIO regions, as we
1368 * don't want anyone else messing around with our hardware */
1369 if (pci_request_regions (pdev, "tulip"))
1370 goto err_out_free_netdev;
1373 ioaddr = pci_iomap(pdev, 1, tulip_tbl[chip_idx].io_size);
1375 ioaddr = pci_iomap(pdev, 0, tulip_tbl[chip_idx].io_size);
1378 goto err_out_free_res;
1380 pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1383 * initialize private data structure 'tp'
1384 * it is zeroed and aligned in alloc_etherdev
1386 tp = netdev_priv(dev);
1388 tp->rx_ring = pci_alloc_consistent(pdev,
1389 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1390 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1393 goto err_out_mtable;
1394 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1395 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1397 tp->chip_id = chip_idx;
1398 tp->flags = tulip_tbl[chip_idx].flags;
1400 tp->base_addr = ioaddr;
1401 tp->revision = chip_rev;
1403 spin_lock_init(&tp->lock);
1404 spin_lock_init(&tp->mii_lock);
1405 init_timer(&tp->timer);
1406 tp->timer.data = (unsigned long)dev;
1407 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1409 dev->base_addr = (unsigned long)ioaddr;
1411 #ifdef CONFIG_TULIP_MWI
1412 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1413 tulip_mwi_config (pdev, dev);
1415 /* MWI is broken for DC21143 rev 65... */
1416 if (chip_idx == DC21143 && chip_rev == 65)
1420 /* Stop the chip's Tx and Rx processes. */
1421 tulip_stop_rxtx(tp);
1423 pci_set_master(pdev);
1426 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1427 switch (pdev->subsystem_device) {
1436 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1437 chip_name = "GSC DS21140 Tulip";
1442 /* Clear the missed-packet counter. */
1443 ioread32(ioaddr + CSR8);
1445 /* The station address ROM is read byte serially. The register must
1446 be polled, waiting for the value to be read bit serially from the
1449 ee_data = tp->eeprom;
1451 if (chip_idx == LC82C168) {
1452 for (i = 0; i < 3; i++) {
1453 int value, boguscnt = 100000;
1454 iowrite32(0x600 | i, ioaddr + 0x98);
1456 value = ioread32(ioaddr + CSR9);
1457 while (value < 0 && --boguscnt > 0);
1458 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1459 sum += value & 0xffff;
1461 } else if (chip_idx == COMET) {
1462 /* No need to read the EEPROM. */
1463 put_unaligned(cpu_to_le32(ioread32(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
1464 put_unaligned(cpu_to_le16(ioread32(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
1465 for (i = 0; i < 6; i ++)
1466 sum += dev->dev_addr[i];
1468 /* A serial EEPROM interface, we read now and sort it out later. */
1470 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1472 for (i = 0; i < sizeof(tp->eeprom); i+=2) {
1473 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1474 ee_data[i] = data & 0xff;
1475 ee_data[i + 1] = data >> 8;
1478 /* DEC now has a specification (see Notes) but early board makers
1479 just put the address in the first EEPROM locations. */
1480 /* This does memcmp(ee_data, ee_data+16, 8) */
1481 for (i = 0; i < 8; i ++)
1482 if (ee_data[i] != ee_data[16+i])
1484 if (chip_idx == CONEXANT) {
1485 /* Check that the tuple type and length is correct. */
1486 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1488 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1490 sa_offset = 2; /* Grrr, damn Matrox boards. */
1493 #ifdef CONFIG_DDB5476
1494 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1495 /* DDB5476 MAC address in first EEPROM locations. */
1497 /* No media table either */
1498 tp->flags &= ~HAS_MEDIA_TABLE;
1501 #ifdef CONFIG_DDB5477
1502 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1503 /* DDB5477 MAC address in first EEPROM locations. */
1505 /* No media table either */
1506 tp->flags &= ~HAS_MEDIA_TABLE;
1509 #ifdef CONFIG_MIPS_COBALT
1510 if ((pdev->bus->number == 0) &&
1511 ((PCI_SLOT(pdev->devfn) == 7) ||
1512 (PCI_SLOT(pdev->devfn) == 12))) {
1513 /* Cobalt MAC address in first EEPROM locations. */
1515 /* No media table either */
1516 tp->flags &= ~HAS_MEDIA_TABLE;
1520 /* Check to see if we have a broken srom */
1521 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1522 /* pci_vendor_id and subsystem_id are swapped */
1523 ee_data[0] = ee_data[2];
1524 ee_data[1] = ee_data[3];
1528 /* HSC-PCI boards need to be byte-swaped and shifted
1529 * up 1 word. This shift needs to happen at the end
1530 * of the MAC first because of the 2 byte overlap.
1532 for (i = 4; i >= 0; i -= 2) {
1533 ee_data[17 + i + 3] = ee_data[17 + i];
1534 ee_data[16 + i + 5] = ee_data[16 + i];
1539 for (i = 0; i < 6; i ++) {
1540 dev->dev_addr[i] = ee_data[i + sa_offset];
1541 sum += ee_data[i + sa_offset];
1544 /* Lite-On boards have the address byte-swapped. */
1545 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1546 && dev->dev_addr[1] == 0x00)
1547 for (i = 0; i < 6; i+=2) {
1548 char tmp = dev->dev_addr[i];
1549 dev->dev_addr[i] = dev->dev_addr[i+1];
1550 dev->dev_addr[i+1] = tmp;
1552 /* On the Zynx 315 Etherarray and other multiport boards only the
1553 first Tulip has an EEPROM.
1554 On Sparc systems the mac address is held in the OBP property
1555 "local-mac-address".
1556 The addresses of the subsequent ports are derived from the first.
1557 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1558 that here as well. */
1559 if (sum == 0 || sum == 6*0xff) {
1560 #if defined(__sparc__)
1561 struct pcidev_cookie *pcp = pdev->sysdata;
1564 for (i = 0; i < 5; i++)
1565 dev->dev_addr[i] = last_phys_addr[i];
1566 dev->dev_addr[i] = last_phys_addr[i] + 1;
1567 #if defined(__sparc__)
1568 if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1569 "local-mac-address") == 6) {
1570 prom_getproperty(pcp->prom_node, "local-mac-address",
1574 #if defined(__i386__) /* Patch up x86 BIOS bug. */
1580 for (i = 0; i < 6; i++)
1581 last_phys_addr[i] = dev->dev_addr[i];
1585 /* The lower four bits are the media type. */
1586 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1587 if (options[board_idx] & MEDIA_MASK)
1588 tp->default_port = options[board_idx] & MEDIA_MASK;
1589 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1590 tp->full_duplex = 1;
1591 if (mtu[board_idx] > 0)
1592 dev->mtu = mtu[board_idx];
1594 if (dev->mem_start & MEDIA_MASK)
1595 tp->default_port = dev->mem_start & MEDIA_MASK;
1596 if (tp->default_port) {
1597 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1598 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1600 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1601 tp->full_duplex = 1;
1603 if (tp->full_duplex)
1604 tp->full_duplex_lock = 1;
1606 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1607 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1608 tp->mii_advertise = media2advert[tp->default_port - 9];
1609 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1612 if (tp->flags & HAS_MEDIA_TABLE) {
1613 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1614 tulip_parse_eeprom(dev);
1615 strcpy(dev->name, "eth%d"); /* un-hack */
1618 if ((tp->flags & ALWAYS_CHECK_MII) ||
1619 (tp->mtable && tp->mtable->has_mii) ||
1620 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1621 if (tp->mtable && tp->mtable->has_mii) {
1622 for (i = 0; i < tp->mtable->leafcount; i++)
1623 if (tp->mtable->mleaf[i].media == 11) {
1625 tp->saved_if_port = dev->if_port;
1626 tulip_select_media(dev, 2);
1627 dev->if_port = tp->saved_if_port;
1632 /* Find the connected MII xcvrs.
1633 Doing this in open() would allow detecting external xcvrs
1634 later, but takes much time. */
1635 tulip_find_mii (dev, board_idx);
1638 /* The Tulip-specific entries in the device structure. */
1639 dev->open = tulip_open;
1640 dev->hard_start_xmit = tulip_start_xmit;
1641 dev->tx_timeout = tulip_tx_timeout;
1642 dev->watchdog_timeo = TX_TIMEOUT;
1643 #ifdef CONFIG_TULIP_NAPI
1644 dev->poll = tulip_poll;
1647 dev->stop = tulip_close;
1648 dev->get_stats = tulip_get_stats;
1649 dev->do_ioctl = private_ioctl;
1650 dev->set_multicast_list = set_rx_mode;
1651 #ifdef CONFIG_NET_POLL_CONTROLLER
1652 dev->poll_controller = &poll_tulip;
1654 SET_ETHTOOL_OPS(dev, &ops);
1656 if (register_netdev(dev))
1657 goto err_out_free_ring;
1659 printk(KERN_INFO "%s: %s rev %d at %p,",
1660 dev->name, chip_name, chip_rev, ioaddr);
1661 pci_set_drvdata(pdev, dev);
1664 printk(" EEPROM not present,");
1665 for (i = 0; i < 6; i++)
1666 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1667 printk(", IRQ %d.\n", irq);
1669 if (tp->chip_id == PNIC2)
1670 tp->link_change = pnic2_lnk_change;
1671 else if (tp->flags & HAS_NWAY)
1672 tp->link_change = t21142_lnk_change;
1673 else if (tp->flags & HAS_PNICNWAY)
1674 tp->link_change = pnic_lnk_change;
1676 /* Reset the xcvr interface and turn on heartbeat. */
1683 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1686 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1687 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1688 iowrite32(0x0000, ioaddr + CSR13);
1689 iowrite32(0x0000, ioaddr + CSR14);
1690 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1692 t21142_start_nway(dev);
1695 /* just do a reset for sanity sake */
1696 iowrite32(0x0000, ioaddr + CSR13);
1697 iowrite32(0x0000, ioaddr + CSR14);
1700 if ( ! tp->mii_cnt) {
1703 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1704 iowrite32(0x30, ioaddr + CSR12);
1705 iowrite32(0x0001F078, ioaddr + CSR6);
1706 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1711 iowrite32(0x00000000, ioaddr + CSR6);
1712 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1713 iowrite32(0x00000001, ioaddr + CSR13);
1717 iowrite32(0x01a80000, ioaddr + CSR6);
1718 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1719 iowrite32(0x00001000, ioaddr + CSR12);
1722 /* No initialization necessary. */
1726 /* put the chip in snooze mode until opened */
1727 tulip_set_power_state (tp, 0, 1);
1732 pci_free_consistent (pdev,
1733 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1734 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1735 tp->rx_ring, tp->rx_ring_dma);
1740 pci_iounmap(pdev, ioaddr);
1743 pci_release_regions (pdev);
1745 err_out_free_netdev:
1753 static int tulip_suspend (struct pci_dev *pdev, u32 state)
1755 struct net_device *dev = pci_get_drvdata(pdev);
1757 if (dev && netif_running (dev) && netif_device_present (dev)) {
1758 netif_device_detach (dev);
1760 /* pci_power_off(pdev, -1); */
1766 static int tulip_resume(struct pci_dev *pdev)
1768 struct net_device *dev = pci_get_drvdata(pdev);
1770 if (dev && netif_running (dev) && !netif_device_present (dev)) {
1772 pci_enable_device (pdev);
1774 /* pci_power_on(pdev); */
1776 netif_device_attach (dev);
1781 #endif /* CONFIG_PM */
1784 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1786 struct net_device *dev = pci_get_drvdata (pdev);
1787 struct tulip_private *tp;
1792 tp = netdev_priv(dev);
1793 unregister_netdev(dev);
1794 pci_free_consistent (pdev,
1795 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1796 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1797 tp->rx_ring, tp->rx_ring_dma);
1800 pci_iounmap(pdev, tp->base_addr);
1802 pci_release_regions (pdev);
1803 pci_set_drvdata (pdev, NULL);
1805 /* pci_power_off (pdev, -1); */
1808 #ifdef CONFIG_NET_POLL_CONTROLLER
1810 * Polling 'interrupt' - used by things like netconsole to send skbs
1811 * without having to re-enable interrupts. It's not called while
1812 * the interrupt routine is executing.
1815 static void poll_tulip (struct net_device *dev)
1817 /* disable_irq here is not very nice, but with the lockless
1818 interrupt handler we have no other choice. */
1819 disable_irq(dev->irq);
1820 tulip_interrupt (dev->irq, dev, NULL);
1821 enable_irq(dev->irq);
1825 static struct pci_driver tulip_driver = {
1827 .id_table = tulip_pci_tbl,
1828 .probe = tulip_init_one,
1829 .remove = __devexit_p(tulip_remove_one),
1831 .suspend = tulip_suspend,
1832 .resume = tulip_resume,
1833 #endif /* CONFIG_PM */
1837 static int __init tulip_init (void)
1840 printk (KERN_INFO "%s", version);
1843 /* copy module parms into globals */
1844 tulip_rx_copybreak = rx_copybreak;
1845 tulip_max_interrupt_work = max_interrupt_work;
1847 /* probe for and init boards */
1848 return pci_module_init (&tulip_driver);
1852 static void __exit tulip_cleanup (void)
1854 pci_unregister_driver (&tulip_driver);
1858 module_init(tulip_init);
1859 module_exit(tulip_cleanup);