1 /******************************************************************************
3 Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 The full GNU General Public License is included in this distribution in the
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include <linux/sched.h>
30 #include <linux/interrupt.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/list.h>
34 #include <linux/delay.h>
35 #include <linux/skbuff.h>
37 #include <linux/socket.h>
38 #include <linux/if_arp.h>
39 #include <linux/wireless.h>
40 #include <linux/version.h>
41 #include <net/iw_handler.h> // new driver API
43 #include "ieee80211.h"
45 #include <linux/workqueue.h>
48 typedef void irqreturn_t;
55 #define IW_QUAL_QUAL_INVALID 0x10
56 #define IW_QUAL_LEVEL_INVALID 0x20
57 #define IW_QUAL_NOISE_INVALID 0x40
60 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
61 #define pci_dma_sync_single_for_cpu pci_dma_sync_single
62 #define pci_dma_sync_single_for_device pci_dma_sync_single
65 #ifndef HAVE_FREE_NETDEV
66 #define free_netdev(x) kfree(x)
72 struct ipw2100_tx_packet;
73 struct ipw2100_rx_packet;
75 #ifdef CONFIG_IPW_DEBUG
76 enum { IPW_DEBUG_ENABLED = 1 };
77 extern u32 ipw2100_debug_level;
78 #define IPW_DEBUG(level, message...) \
80 if (ipw2100_debug_level & (level)) { \
81 printk(KERN_DEBUG "ipw2100: %c %s ", \
82 in_interrupt() ? 'I' : 'U', __FUNCTION__); \
87 enum { IPW_DEBUG_ENABLED = 0 };
88 #define IPW_DEBUG(level, message...) do {} while (0)
89 #endif /* CONFIG_IPW_DEBUG */
91 #define IPW_DL_UNINIT 0x80000000
92 #define IPW_DL_NONE 0x00000000
93 #define IPW_DL_ALL 0x7FFFFFFF
96 * To use the debug system;
98 * If you are defining a new debug classification, simply add it to the #define
99 * list here in the form of:
101 * #define IPW_DL_xxxx VALUE
103 * shifting value to the left one bit from the previous entry. xxxx should be
104 * the name of the classification (for example, WEP)
106 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
107 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
108 * to send output to that classification.
110 * To add your debug level to the list of levels seen when you perform
112 * % cat /proc/net/ipw2100/debug_level
114 * you simply need to add your entry to the ipw2100_debug_levels array.
116 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
117 * CONFIG_IPW_DEBUG defined in your kernel configuration
121 #define IPW_DL_ERROR BIT(0)
122 #define IPW_DL_WARNING BIT(1)
123 #define IPW_DL_INFO BIT(2)
124 #define IPW_DL_WX BIT(3)
125 #define IPW_DL_HC BIT(5)
126 #define IPW_DL_STATE BIT(6)
128 #define IPW_DL_NOTIF BIT(10)
129 #define IPW_DL_SCAN BIT(11)
130 #define IPW_DL_ASSOC BIT(12)
131 #define IPW_DL_DROP BIT(13)
133 #define IPW_DL_IOCTL BIT(14)
134 #define IPW_DL_RF_KILL BIT(17)
137 #define IPW_DL_MANAGE BIT(15)
138 #define IPW_DL_FW BIT(16)
140 #define IPW_DL_FRAG BIT(21)
141 #define IPW_DL_WEP BIT(22)
142 #define IPW_DL_TX BIT(23)
143 #define IPW_DL_RX BIT(24)
144 #define IPW_DL_ISR BIT(25)
145 #define IPW_DL_IO BIT(26)
146 #define IPW_DL_TRACE BIT(28)
148 #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
149 #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
150 #define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
151 #define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
152 #define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
153 #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
154 #define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
155 #define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
156 #define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
157 #define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
158 #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
159 #define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
160 #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
161 #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
162 #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
163 #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
164 #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
165 #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
166 #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
167 #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
168 #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
180 IPW_HW_STATE_DISABLED = 1,
181 IPW_HW_STATE_ENABLED = 0
184 struct ssid_context {
185 char ssid[IW_ESSID_MAX_SIZE + 1];
187 unsigned char bssid[ETH_ALEN];
193 extern const char *port_type_str[];
194 extern const char *band_str[];
196 #define NUMBER_OF_BD_PER_COMMAND_PACKET 1
197 #define NUMBER_OF_BD_PER_DATA_PACKET 2
199 #define IPW_MAX_BDS 6
200 #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
201 #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
203 #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
204 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
208 struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields;
211 } __attribute__ ((packed));
213 #define IPW_BUFDESC_LAST_FRAG 0
218 struct bd_status status;
219 /* number of fragments for frame (should be set only for
223 } __attribute__ ((packed));
225 #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
226 #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
228 #define IPW_BD_STATUS_TX_FRAME_802_3 0x00
229 #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
230 #define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
231 #define IPW_BD_STATUS_TX_FRAME_802_11 0x04
232 #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
234 struct ipw2100_bd_queue {
235 /* driver (virtual) pointer to queue */
236 struct ipw2100_bd *drv;
238 /* firmware (physical) pointer to queue */
241 /* Length of phy memory allocated for BDs */
244 /* Number of BDs in queue (and in array) */
247 /* Number of available BDs (invalid for NIC BDs) */
250 /* Offset of oldest used BD in array (next one to
251 * check for completion) */
254 /* Offset of next available (unused) BD */
258 #define RX_QUEUE_LENGTH 256
259 #define TX_QUEUE_LENGTH 256
260 #define HW_QUEUE_LENGTH 256
262 #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
264 #define STATUS_TYPE_MASK 0x0000000f
265 #define COMMAND_STATUS_VAL 0
266 #define STATUS_CHANGE_VAL 1
267 #define P80211_DATA_VAL 2
268 #define P8023_DATA_VAL 3
269 #define HOST_NOTIFICATION_VAL 4
271 #define IPW2100_RSSI_TO_DBM (-98)
273 struct ipw2100_status {
277 #define IPW_STATUS_FLAG_DECRYPTED BIT(0)
278 #define IPW_STATUS_FLAG_WEP_ENCRYPTED BIT(1)
279 #define IPW_STATUS_FLAG_CRC_ERROR BIT(2)
281 } __attribute__ ((packed));
283 struct ipw2100_status_queue {
284 /* driver (virtual) pointer to queue */
285 struct ipw2100_status *drv;
287 /* firmware (physical) pointer to queue */
290 /* Length of phy memory allocated for BDs */
294 #define HOST_COMMAND_PARAMS_REG_LEN 100
295 #define CMD_STATUS_PARAMS_REG_LEN 3
297 #define IPW_WPA_CAPABILITIES 0x1
298 #define IPW_WPA_LISTENINTERVAL 0x2
299 #define IPW_WPA_AP_ADDRESS 0x4
301 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
303 struct ipw2100_wpa_assoc_frame {
308 u8 current_ap[ETH_ALEN];
311 u8 var_ie[IPW_MAX_VAR_IE_LEN];
315 #define IPW_MONITOR 2
319 * @struct _tx_cmd - HWCommand
320 * @brief H/W command structure.
322 struct ipw2100_cmd_header {
323 u32 host_command_reg;
324 u32 host_command_reg1;
326 u32 host_command_len_reg;
327 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
329 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
338 u32 status_change_reg;
342 } __attribute__ ((packed));
344 struct ipw2100_data_header {
345 u32 host_command_reg;
346 u32 host_command_reg1;
347 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
348 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
349 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
350 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
352 u8 reserved[10]; // f/w reserved
353 u8 src_addr[ETH_ALEN];
354 u8 dst_addr[ETH_ALEN];
356 } __attribute__ ((packed));
358 // Host command data structure
359 struct host_command {
360 u32 host_command; // COMMAND ID
361 u32 host_command1; // COMMAND ID
362 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
363 u32 host_command_length; // LENGTH
364 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
365 } __attribute__ ((packed));
370 EXIT_POWER_DOWN_RESET,
374 } ipw2100_reset_event;
383 struct ipw2100_tx_packet {
387 struct { /* COMMAND */
388 struct ipw2100_cmd_header* cmd;
392 struct ipw2100_data_header* data;
393 dma_addr_t data_phys;
394 struct ieee80211_txb *txb;
399 struct list_head list;
403 struct ipw2100_rx_packet {
404 struct ipw2100_rx *rxp;
408 struct list_head list;
411 #define FRAG_DISABLED BIT(31)
412 #define RTS_DISABLED BIT(31)
413 #define MAX_RTS_THRESHOLD 2304U
414 #define MIN_RTS_THRESHOLD 1U
415 #define DEFAULT_RTS_THRESHOLD 1000U
417 #define DEFAULT_BEACON_INTERVAL 100U
418 #define DEFAULT_SHORT_RETRY_LIMIT 7U
419 #define DEFAULT_LONG_RETRY_LIMIT 4U
421 struct ipw2100_ordinals {
428 /* Host Notification header */
429 struct ipw2100_notification {
430 u32 hnhdr_subtype; /* type of host notification */
431 u32 hnhdr_size; /* size in bytes of data
432 or number of entries, if table.
433 Does NOT include header */
434 } __attribute__ ((packed));
436 #define MAX_KEY_SIZE 16
439 #define IPW2100_WEP_ENABLE BIT(1)
440 #define IPW2100_WEP_DROP_CLEAR BIT(2)
442 #define IPW_NONE_CIPHER BIT(0)
443 #define IPW_WEP40_CIPHER BIT(1)
444 #define IPW_WEP104_CIPHER BIT(5)
445 #define IPW_TKIP_CIPHER BIT(2)
446 #define IPW_CKIP_CIPHER BIT(6)
447 #define IPW_CCMP_CIPHER BIT(4)
449 #define IPW_AUTH_OPEN 0
450 #define IPW_AUTH_SHARED 1
458 #define INIT_STAT(x) do { \
459 (x)->value = (x)->hi = 0; \
460 (x)->lo = 0x7fffffff; \
462 #define SET_STAT(x,y) do { \
464 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
465 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
467 #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
469 #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
472 #define IPW2100_ERROR_QUEUE 5
474 /* Power management code: enable or disable? */
477 IPW2100_PM_DISABLED = 0,
480 IPW2100_PM_DISABLED = 1,
485 #define STATUS_POWERED BIT(0)
486 #define STATUS_CMD_ACTIVE BIT(1) /**< host command in progress */
487 #define STATUS_RUNNING BIT(2) /* Card initialized, but not enabled */
488 #define STATUS_ENABLED BIT(3) /* Card enabled -- can scan,Tx,Rx */
489 #define STATUS_STOPPING BIT(4) /* Card is in shutdown phase */
490 #define STATUS_INITIALIZED BIT(5) /* Card is ready for external calls */
491 #define STATUS_ASSOCIATED BIT(9)
492 #define STATUS_INT_ENABLED BIT(11)
493 #define STATUS_RF_KILL_HW BIT(12)
494 #define STATUS_RF_KILL_SW BIT(13)
495 #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
496 #define STATUS_EXIT_PENDING BIT(14)
498 #define STATUS_SCAN_PENDING BIT(23)
499 #define STATUS_SCANNING BIT(24)
500 #define STATUS_SCAN_ABORTING BIT(25)
501 #define STATUS_SCAN_COMPLETE BIT(26)
502 #define STATUS_WX_EVENT_PENDING BIT(27)
503 #define STATUS_RESET_PENDING BIT(29)
504 #define STATUS_SECURITY_UPDATED BIT(30) /* Security sync needed */
508 /* Internal NIC states */
509 #define IPW_STATE_INITIALIZED BIT(0)
510 #define IPW_STATE_COUNTRY_FOUND BIT(1)
511 #define IPW_STATE_ASSOCIATED BIT(2)
512 #define IPW_STATE_ASSN_LOST BIT(3)
513 #define IPW_STATE_ASSN_CHANGED BIT(4)
514 #define IPW_STATE_SCAN_COMPLETE BIT(5)
515 #define IPW_STATE_ENTERED_PSP BIT(6)
516 #define IPW_STATE_LEFT_PSP BIT(7)
517 #define IPW_STATE_RF_KILL BIT(8)
518 #define IPW_STATE_DISABLED BIT(9)
519 #define IPW_STATE_POWER_DOWN BIT(10)
520 #define IPW_STATE_SCANNING BIT(11)
524 #define CFG_STATIC_CHANNEL BIT(0) /* Restrict assoc. to single channel */
525 #define CFG_STATIC_ESSID BIT(1) /* Restrict assoc. to single SSID */
526 #define CFG_STATIC_BSSID BIT(2) /* Restrict assoc. to single BSSID */
527 #define CFG_CUSTOM_MAC BIT(3)
528 #define CFG_LONG_PREAMBLE BIT(4)
529 #define CFG_ASSOCIATE BIT(6)
530 #define CFG_FIXED_RATE BIT(7)
531 #define CFG_ADHOC_CREATE BIT(8)
532 #define CFG_C3_DISABLED BIT(9)
533 #define CFG_PASSIVE_SCAN BIT(10)
535 #define CAP_SHARED_KEY BIT(0) /* Off = OPEN */
536 #define CAP_PRIVACY_ON BIT(1) /* Off = No privacy */
538 struct ipw2100_priv {
540 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
541 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
543 struct ieee80211_device *ieee;
544 unsigned long status;
545 unsigned long config;
546 unsigned long capability;
553 u8 essid[IW_ESSID_MAX_SIZE];
560 unsigned long connect_start;
561 unsigned long last_reset;
565 u32 fatal_errors[IPW2100_ERROR_QUEUE];
568 int firmware_version;
569 unsigned long hw_features;
572 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
575 u8 mandatory_bssid_mac[ETH_ALEN];
576 u8 mac_addr[ETH_ALEN];
581 struct ieee80211_security sec;
585 int short_retry_limit;
586 int long_retry_limit;
597 char nick[IW_ESSID_MAX_SIZE + 1];
599 struct ipw2100_status_queue status_queue;
601 struct statistic txq_stat;
602 struct statistic rxq_stat;
603 struct ipw2100_bd_queue rx_queue;
604 struct ipw2100_bd_queue tx_queue;
605 struct ipw2100_rx_packet *rx_buffers;
607 struct statistic fw_pend_stat;
608 struct list_head fw_pend_list;
610 struct statistic msg_free_stat;
611 struct statistic msg_pend_stat;
612 struct list_head msg_free_list;
613 struct list_head msg_pend_list;
614 struct ipw2100_tx_packet *msg_buffers;
616 struct statistic tx_free_stat;
617 struct statistic tx_pend_stat;
618 struct list_head tx_free_list;
619 struct list_head tx_pend_list;
620 struct ipw2100_tx_packet *tx_buffers;
622 struct ipw2100_ordinals ordinals;
624 struct pci_dev *pci_dev;
626 struct proc_dir_entry *dir_dev;
628 struct net_device *net_dev;
629 struct iw_statistics wstats;
631 struct tasklet_struct irq_tasklet;
633 struct workqueue_struct *workqueue;
634 struct work_struct reset_work;
635 struct work_struct security_work;
636 struct work_struct wx_event_work;
637 struct work_struct hang_check;
638 struct work_struct rf_kill;
647 wait_queue_head_t wait_command_queue;
648 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
649 u32 pm_state[PM_STATE_SIZE];
654 /*********************************************************
655 * Host Command -> From Driver to FW
656 *********************************************************/
659 * Host command identifiers
661 #define HOST_COMPLETE 2
662 #define SYSTEM_CONFIG 6
664 #define MANDATORY_BSSID 9
665 #define AUTHENTICATION_TYPE 10
666 #define ADAPTER_ADDRESS 11
668 #define INTERNATIONAL_MODE 13
670 #define RTS_THRESHOLD 15
671 #define FRAG_THRESHOLD 16
672 #define POWER_MODE 17
674 #define BASIC_TX_RATES 19
675 #define WEP_KEY_INFO 20
676 #define WEP_KEY_INDEX 25
678 #define ADD_MULTICAST 27
679 #define CLEAR_ALL_MULTICAST 28
680 #define BEACON_INTERVAL 29
681 #define ATIM_WINDOW 30
682 #define CLEAR_STATISTICS 31
684 #define TX_POWER_INDEX 36
685 #define BROADCAST_SCAN 43
686 #define CARD_DISABLE 44
687 #define PREFERRED_BSSID 45
688 #define SET_SCAN_OPTIONS 46
689 #define SCAN_DWELL_TIME 47
690 #define SWEEP_TABLE 48
691 #define AP_OR_STATION_TABLE 49
692 #define GROUP_ORDINALS 50
693 #define SHORT_RETRY_LIMIT 51
694 #define LONG_RETRY_LIMIT 52
696 #define HOST_PRE_POWER_DOWN 58
697 #define CARD_DISABLE_PHY_OFF 61
698 #define MSDU_TX_RATES 62
701 // Rogue AP Detection
702 #define SET_STATION_STAT_BITS 64
703 #define CLEAR_STATIONS_STAT_BITS 65
704 #define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
705 #define SET_SECURITY_INFORMATION 67
706 #define DISASSOCIATION_BSSID 68
707 #define SET_WPA_IE 69
711 // system configuration bit mask:
712 //#define IPW_CFG_ANTENNA_SETTING 0x03
713 //#define IPW_CFG_ANTENNA_A 0x01
714 //#define IPW_CFG_ANTENNA_B 0x02
715 #define IPW_CFG_PROMISCUOUS 0x00004
716 //#define IPW_CFG_TX_STATUS_ENABLE 0x00008
717 #define IPW_CFG_PREAMBLE_AUTO 0x00010
718 #define IPW_CFG_IBSS_AUTO_START 0x00020
719 //#define IPW_CFG_KERBEROS_ENABLE 0x00040
720 #define IPW_CFG_LOOPBACK 0x00100
721 //#define IPW_CFG_WNMP_PING_PASS 0x00200
722 //#define IPW_CFG_DEBUG_ENABLE 0x00400
723 #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
724 //#define IPW_CFG_BT_PRIORITY 0x01000
725 #define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
726 #define IPW_CFG_802_1x_ENABLE 0x04000
727 #define IPW_CFG_BSS_MASK 0x08000
728 #define IPW_CFG_IBSS_MASK 0x10000
729 //#define IPW_CFG_DYNAMIC_CW 0x10000
731 #define IPW_SCAN_NOASSOCIATE BIT(0)
732 #define IPW_SCAN_MIXED_CELL BIT(1)
733 /* RESERVED BIT(2) */
734 #define IPW_SCAN_PASSIVE BIT(3)
736 #define IPW_NIC_FATAL_ERROR 0x2A7F0
737 #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
738 #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
739 #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
740 #define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
741 #define IPW2100_ERR_FW_LOAD (0x12 << 24)
743 #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
744 #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
746 #define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
747 #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
748 #define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
749 #define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
751 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
752 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
753 #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
755 #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
756 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
758 #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
759 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
763 #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
764 #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
765 #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08)
766 #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c)
767 #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10)
768 #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14)
769 #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18)
770 #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c)
771 #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
772 #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84)
773 #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88)
774 #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c)
776 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \
777 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3))
778 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \
779 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3))
780 #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \
781 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2))
783 #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \
784 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00)
785 #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \
786 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04)
787 #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \
788 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08)
789 #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \
790 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c)
791 #define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \
792 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78)
796 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
797 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
799 #define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
800 #define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
801 #define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
802 #define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
803 #define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
804 #define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
805 #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
806 #define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
807 #define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
808 #define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
809 #define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
811 #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
812 #define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
813 #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
814 #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
815 #define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
816 #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
817 #define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
819 #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
820 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
821 #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
822 #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
823 #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
824 #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
825 #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
826 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
827 #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
829 #define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
830 #define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
831 #define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
832 #define IPW_BIT_GPIO_RF_KILL 0x00010000
834 #define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
836 #define IPW_REG_DOMAIN_0_OFFSET 0x0000
837 #define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
839 #define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
840 #define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
841 #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
842 #define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
843 #define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
844 #define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
845 #define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
846 #define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
847 #define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
848 #define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
849 #define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
850 #define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
852 #define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
854 #define IPW_INTERRUPT_MASK 0xC1010013
856 #define IPW2100_CONTROL_REG 0x220000
857 #define IPW2100_CONTROL_PHY_OFF 0x8
859 #define IPW2100_COMMAND 0x00300004
860 #define IPW2100_COMMAND_PHY_ON 0x0
861 #define IPW2100_COMMAND_PHY_OFF 0x1
863 /* in DEBUG_AREA, values of memory always 0xd55555d5 */
864 #define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
865 #define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
866 #define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
868 #define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
870 #define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
871 #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
872 #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
874 // BD ring queue read/write difference
875 #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
877 #define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
879 #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
880 #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
885 #define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_header_data)
886 #define IPW_MAX_80211_PAYLOAD_SIZE 2304U
887 #define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
888 #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
889 #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
890 #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
891 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
892 sizeof(struct ethhdr))
894 #define IPW_802_11_FCS_LENGTH 4
895 #define IPW_RX_NIC_BUFFER_LENGTH \
896 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
897 IPW_802_11_FCS_LENGTH)
899 #define IPW_802_11_PAYLOAD_OFFSET \
900 (sizeof(struct ieee80211_header_data) + \
901 sizeof(struct ieee80211_snap_hdr))
905 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
906 struct ieee80211_hdr header;
908 struct ipw2100_notification notification;
909 struct ipw2100_cmd_header command;
911 } __attribute__ ((packed));
913 // Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved
914 #define TX_RATE_1_MBIT 0x0001
915 #define TX_RATE_2_MBIT 0x0002
916 #define TX_RATE_5_5_MBIT 0x0004
917 #define TX_RATE_11_MBIT 0x0008
918 #define TX_RATE_MASK 0x000F
919 #define DEFAULT_TX_RATES 0x000F
921 #define IPW_POWER_MODE_CAM 0x00 //(always on)
922 #define IPW_POWER_INDEX_1 0x01
923 #define IPW_POWER_INDEX_2 0x02
924 #define IPW_POWER_INDEX_3 0x03
925 #define IPW_POWER_INDEX_4 0x04
926 #define IPW_POWER_INDEX_5 0x05
927 #define IPW_POWER_AUTO 0x06
928 #define IPW_POWER_MASK 0x0F
929 #define IPW_POWER_ENABLED 0x10
930 #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
932 #define IPW_TX_POWER_AUTO 0
933 #define IPW_TX_POWER_ENHANCED 1
935 #define IPW_TX_POWER_DEFAULT 32
936 #define IPW_TX_POWER_MIN 0
937 #define IPW_TX_POWER_MAX 16
938 #define IPW_TX_POWER_MIN_DBM (-12)
939 #define IPW_TX_POWER_MAX_DBM 16
941 #define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
942 #define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
944 #define REG_MIN_CHANNEL 0
945 #define REG_MAX_CHANNEL 14
947 #define REG_CHANNEL_MASK 0x00003FFF
948 #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
950 #define DIVERSITY_EITHER 0 // Use both antennas
951 #define DIVERSITY_ANTENNA_A 1 // Use antenna A
952 #define DIVERSITY_ANTENNA_B 2 // Use antenna B
955 #define HOST_COMMAND_WAIT 0
956 #define HOST_COMMAND_NO_WAIT 1
959 #define LOCK_DRIVER 1
962 #define TYPE_SWEEP_ORD 0x000D
963 #define TYPE_IBSS_STTN_ORD 0x000E
964 #define TYPE_BSS_AP_ORD 0x000F
965 #define TYPE_RAW_BEACON_ENTRY 0x0010
966 #define TYPE_CALIBRATION_DATA 0x0011
967 #define TYPE_ROGUE_AP_DATA 0x0012
968 #define TYPE_ASSOCIATION_REQUEST 0x0013
969 #define TYPE_REASSOCIATION_REQUEST 0x0014
972 #define HW_FEATURE_RFKILL (0x0001)
973 #define RF_KILLSWITCH_OFF (1)
974 #define RF_KILLSWITCH_ON (0)
976 #define IPW_COMMAND_POOL_SIZE 40
978 #define IPW_START_ORD_TAB_1 1
979 #define IPW_START_ORD_TAB_2 1000
981 #define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
983 #define IS_ORDINAL_TABLE_ONE(mgr,id) \
984 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
985 #define IS_ORDINAL_TABLE_TWO(mgr,id) \
986 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
988 #define BSS_ID_LENGTH 6
990 // Fixed size data: Ordinal Table 1
991 typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
992 // Transmit statistics
993 IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU)
994 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
995 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
997 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
998 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
999 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
1000 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
1001 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
1003 IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB
1004 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
1005 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
1006 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
1008 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
1009 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
1010 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
1011 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
1012 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
1013 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
1014 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
1015 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
1016 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
1017 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
1018 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
1019 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
1020 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
1021 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
1022 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
1024 IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes
1025 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
1026 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
1027 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
1028 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
1029 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
1031 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
1032 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
1033 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed
1034 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
1035 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
1036 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
1037 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
1038 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
1039 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
1041 // Receive statistics
1042 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
1043 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
1044 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
1045 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
1046 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
1047 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
1048 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
1050 IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets
1051 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
1052 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
1053 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
1054 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
1056 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
1057 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
1058 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
1059 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
1060 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
1061 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
1062 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
1063 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
1064 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
1065 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
1066 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
1067 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
1068 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
1069 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
1070 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
1071 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
1072 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
1073 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
1075 IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received
1076 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
1077 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
1078 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
1079 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
1080 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
1082 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
1083 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
1084 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
1085 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
1086 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
1088 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
1089 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
1090 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
1091 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
1092 IPW_ORD_SYS_BOOT_TIME, // # Boot time
1093 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
1094 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
1095 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
1096 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
1097 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
1098 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
1099 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
1100 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
1101 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
1104 IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended
1105 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
1106 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
1107 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt
1108 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
1109 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
1110 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
1112 // Association and roaming
1113 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
1114 IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons
1115 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
1116 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
1117 // AP table entry. set to 0 if not associated
1118 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
1119 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1120 IPW_ORD_STAT_AP_ASSNS, // # of associations
1121 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1122 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1123 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1125 IPW_ORD_CARD_DISABLED, // # Card Disabled
1126 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1128 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1129 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1130 // hops or no prob_ responses in last 3 minutes
1131 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1132 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1134 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1136 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1137 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1141 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1142 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1143 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1146 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1147 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1148 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1149 IPW_ORD_SELF_TEST_STATUS, //NS //
1150 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1151 IPW_ORD_POWER_MGMT_INDEX, //NS //
1152 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1153 IPW_ORD_COUNTRY_CHANNELS, // channels suported by country
1154 // IPW_ORD_COUNTRY_CHANNELS:
1155 // For 11b the lower 2-byte are used for channels from 1-14
1156 // and the higher 2-byte are not used.
1157 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1158 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1160 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1161 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1162 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1163 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1164 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1165 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1167 IPW_ORD_RTC_TIME = 190, // current RTC time
1168 IPW_ORD_PORT_TYPE, // operating mode
1169 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1170 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1171 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1172 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1173 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1174 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1175 IPW_ORD_CAPABILITIES, // Management frame capability field
1176 IPW_ORD_AUTH_TYPE, // Type of authentication
1177 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1178 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1179 IPW_ORD_INT_MODE, // International mode
1180 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1181 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1182 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1183 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1184 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1186 IPW_ORD_MAC_VERSION = 209, // MAC Version
1187 IPW_ORD_MAC_REVISION, // MAC Revision
1188 IPW_ORD_RADIO_VERSION, // Radio Version
1189 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1190 IPW_ORD_UCODE_VERSION, // Ucode Version
1191 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1196 // Variable length data:
1197 #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1199 typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1200 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1201 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1202 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1203 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1205 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1206 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1207 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1208 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1209 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1210 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1211 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1212 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1213 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1214 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1215 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1216 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1217 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1218 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1219 } ORDINALTABLE2; // NS - means Not Supported by FW
1221 #define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1223 #ifndef WIRELESS_SPY
1224 #define WIRELESS_SPY // enable iwspy support
1227 extern struct iw_handler_def ipw2100_wx_handler_def;
1228 extern struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev);
1229 extern void ipw2100_wx_event_work(struct ipw2100_priv *priv);
1231 #define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1232 #define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1234 #define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1235 #define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1237 #define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1238 #define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1240 #define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1241 #define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1243 #define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1244 #define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1246 struct ipw2100_fw_chunk {
1250 struct list_head list;
1253 struct ipw2100_fw_chunk_set {
1254 #ifdef CONFIG_IPW2100_LEGACY_FW_LOAD
1255 struct list_head chunk_list;
1256 unsigned int chunks;
1265 struct ipw2100_fw_chunk_set fw;
1266 struct ipw2100_fw_chunk_set uc;
1267 #ifndef CONFIG_IPW2100_LEGACY_FW_LOAD
1268 const struct firmware *fw_entry;
1272 int ipw2100_get_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1273 void ipw2100_release_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1274 int ipw2100_fw_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1275 int ipw2100_ucode_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1277 #define MAX_FW_VERSION_LEN 14
1279 int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf, size_t max);
1280 int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf, size_t max);
1282 #endif /* _IPW2100_H */