2 * $Id: pci.c,v 1.91 1999/01/21 13:34:01 davem Exp $
4 * PCI Bus Services, see include/linux/pci.h for further explanation.
6 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
9 * Copyright 1997 -- 2000 Martin Mares <mj@ucw.cz>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/module.h>
16 #include <linux/spinlock.h>
17 #include <asm/dma.h> /* isa_dma_bridge_buggy */
22 #define DBG(x...) printk(x)
28 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
29 * @bus: pointer to PCI bus structure to search
31 * Given a PCI bus, returns the highest PCI bus number present in the set
32 * including the given PCI bus and its list of child PCI buses.
34 unsigned char __devinit
35 pci_bus_max_busnr(struct pci_bus* bus)
37 struct list_head *tmp;
41 list_for_each(tmp, &bus->children) {
42 n = pci_bus_max_busnr(pci_bus_b(tmp));
50 * pci_max_busnr - returns maximum PCI bus number
52 * Returns the highest PCI bus number present in the system global list of
55 unsigned char __devinit
58 struct pci_bus *bus = NULL;
62 while ((bus = pci_find_next_bus(bus)) != NULL) {
63 n = pci_bus_max_busnr(bus);
70 static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_type, int cap)
76 pci_bus_read_config_word(bus, devfn, PCI_STATUS, &status);
77 if (!(status & PCI_STATUS_CAP_LIST))
81 case PCI_HEADER_TYPE_NORMAL:
82 case PCI_HEADER_TYPE_BRIDGE:
83 pci_bus_read_config_byte(bus, devfn, PCI_CAPABILITY_LIST, &pos);
85 case PCI_HEADER_TYPE_CARDBUS:
86 pci_bus_read_config_byte(bus, devfn, PCI_CB_CAPABILITY_LIST, &pos);
91 while (ttl-- && pos >= 0x40) {
93 pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID, &id);
98 pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_NEXT, &pos);
104 * pci_find_capability - query for devices' capabilities
105 * @dev: PCI device to query
106 * @cap: capability code
108 * Tell if a device supports a given PCI capability.
109 * Returns the address of the requested capability structure within the
110 * device's PCI configuration space or 0 in case the device does not
111 * support it. Possible values for @cap:
113 * %PCI_CAP_ID_PM Power Management
114 * %PCI_CAP_ID_AGP Accelerated Graphics Port
115 * %PCI_CAP_ID_VPD Vital Product Data
116 * %PCI_CAP_ID_SLOTID Slot Identification
117 * %PCI_CAP_ID_MSI Message Signalled Interrupts
118 * %PCI_CAP_ID_CHSWP CompactPCI HotSwap
119 * %PCI_CAP_ID_PCIX PCI-X
120 * %PCI_CAP_ID_EXP PCI Express
122 int pci_find_capability(struct pci_dev *dev, int cap)
124 return __pci_bus_find_cap(dev->bus, dev->devfn, dev->hdr_type, cap);
128 * pci_bus_find_capability - query for devices' capabilities
129 * @bus: the PCI bus to query
130 * @devfn: PCI device to query
131 * @cap: capability code
133 * Like pci_find_capability() but works for pci devices that do not have a
134 * pci_dev structure set up yet.
136 * Returns the address of the requested capability structure within the
137 * device's PCI configuration space or 0 in case the device does not
140 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
144 pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
146 return __pci_bus_find_cap(bus, devfn, hdr_type & 0x7f, cap);
150 * pci_find_ext_capability - Find an extended capability
151 * @dev: PCI device to query
152 * @cap: capability code
154 * Returns the address of the requested extended capability structure
155 * within the device's PCI configuration space or 0 if the device does
156 * not support it. Possible values for @cap:
158 * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting
159 * %PCI_EXT_CAP_ID_VC Virtual Channel
160 * %PCI_EXT_CAP_ID_DSN Device Serial Number
161 * %PCI_EXT_CAP_ID_PWR Power Budgeting
163 int pci_find_ext_capability(struct pci_dev *dev, int cap)
166 int ttl = 480; /* 3840 bytes, minimum 8 bytes per capability */
169 if (dev->cfg_size <= 256)
172 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
176 * If we have no capabilities, this is indicated by cap ID,
177 * cap version and next pointer all being 0.
183 if (PCI_EXT_CAP_ID(header) == cap)
186 pos = PCI_EXT_CAP_NEXT(header);
190 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
198 * pci_find_parent_resource - return resource region of parent bus of given region
199 * @dev: PCI device structure contains resources to be searched
200 * @res: child resource record for which parent is sought
202 * For given resource region of given device, return the resource
203 * region of parent bus the given region is contained in or where
204 * it should be allocated from.
207 pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
209 const struct pci_bus *bus = dev->bus;
211 struct resource *best = NULL;
213 for(i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
214 struct resource *r = bus->resource[i];
217 if (res->start && !(res->start >= r->start && res->end <= r->end))
218 continue; /* Not contained */
219 if ((res->flags ^ r->flags) & (IORESOURCE_IO | IORESOURCE_MEM))
220 continue; /* Wrong type */
221 if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH))
222 return r; /* Exact match */
223 if ((res->flags & IORESOURCE_PREFETCH) && !(r->flags & IORESOURCE_PREFETCH))
224 best = r; /* Approximating prefetchable by non-prefetchable */
230 * pci_set_power_state - Set the power state of a PCI device
231 * @dev: PCI device to be suspended
232 * @state: Power state we're entering
234 * Transition a device to a new power state, using the Power Management
235 * Capabilities in the device's config space.
238 * -EINVAL if trying to enter a lower state than we're already in.
239 * 0 if we're already in the requested state.
240 * -EIO if device does not support PCI PM.
241 * 0 if we can successfully change the power state.
245 pci_set_power_state(struct pci_dev *dev, int state)
250 /* bound the state we're entering */
251 if (state > 3) state = 3;
253 /* Validate current state:
254 * Can enter D0 from any state, but if we can only go deeper
255 * to sleep if we're already in a low power state
257 if (state > 0 && dev->current_state > state)
259 else if (dev->current_state == state)
260 return 0; /* we're already there */
262 /* find PCI PM capability in list */
263 pm = pci_find_capability(dev, PCI_CAP_ID_PM);
265 /* abort if the device doesn't support PM capabilities */
266 if (!pm) return -EIO;
268 /* check if this device supports the desired state */
269 if (state == 1 || state == 2) {
271 pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc);
272 if (state == 1 && !(pmc & PCI_PM_CAP_D1)) return -EIO;
273 else if (state == 2 && !(pmc & PCI_PM_CAP_D2)) return -EIO;
276 /* If we're in D3, force entire word to 0.
277 * This doesn't affect PME_Status, disables PME_En, and
278 * sets PowerState to 0.
280 if (dev->current_state >= 3)
283 pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
284 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
288 /* enter specified state */
289 pci_write_config_word(dev, pm + PCI_PM_CTRL, pmcsr);
291 /* Mandatory power management transition delays */
292 /* see PCI PM 1.1 5.6.1 table 18 */
293 if(state == 3 || dev->current_state == 3)
295 else if(state == 2 || dev->current_state == 2)
297 dev->current_state = state;
303 * pci_save_state - save the PCI configuration space of a device before suspending
304 * @dev: - PCI device that we're dealing with
305 * @buffer: - buffer to hold config space context
307 * @buffer must be large enough to hold the entire PCI 2.2 config space
311 pci_save_state(struct pci_dev *dev)
314 /* XXX: 100% dword access ok here? */
315 for (i = 0; i < 16; i++)
316 pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
321 * pci_restore_state - Restore the saved state of a PCI device
322 * @dev: - PCI device that we're dealing with
323 * @buffer: - saved PCI config space
327 pci_restore_state(struct pci_dev *dev)
331 for (i = 0; i < 16; i++)
332 pci_write_config_dword(dev,i * 4, dev->saved_config_space[i]);
337 * pci_enable_device_bars - Initialize some of a device for use
338 * @dev: PCI device to be initialized
339 * @bars: bitmask of BAR's that must be configured
341 * Initialize device before it's used by a driver. Ask low-level code
342 * to enable selected I/O and memory resources. Wake up the device if it
343 * was suspended. Beware, this function can fail.
347 pci_enable_device_bars(struct pci_dev *dev, int bars)
351 pci_set_power_state(dev, 0);
352 if ((err = pcibios_enable_device(dev, bars)) < 0)
358 * pci_enable_device - Initialize device before it's used by a driver.
359 * @dev: PCI device to be initialized
361 * Initialize device before it's used by a driver. Ask low-level code
362 * to enable I/O and memory. Wake up the device if it was suspended.
363 * Beware, this function can fail.
366 pci_enable_device(struct pci_dev *dev)
371 if ((err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1)))
373 pci_fixup_device(pci_fixup_enable, dev);
378 * pcibios_disable_device - disable arch specific PCI resources for device dev
379 * @dev: the PCI device to disable
381 * Disables architecture specific PCI resources for the device. This
382 * is the default implementation. Architecture implementations can
385 void __attribute__ ((weak)) pcibios_disable_device (struct pci_dev *dev) {}
388 * pci_disable_device - Disable PCI device after use
389 * @dev: PCI device to be disabled
391 * Signal to the system that the PCI device is not in use by the system
392 * anymore. This only involves disabling PCI bus-mastering, if active.
395 pci_disable_device(struct pci_dev *dev)
400 dev->is_busmaster = 0;
402 pci_read_config_word(dev, PCI_COMMAND, &pci_command);
403 if (pci_command & PCI_COMMAND_MASTER) {
404 pci_command &= ~PCI_COMMAND_MASTER;
405 pci_write_config_word(dev, PCI_COMMAND, pci_command);
408 pcibios_disable_device(dev);
412 * pci_enable_wake - enable device to generate PME# when suspended
413 * @dev: - PCI device to operate on
414 * @state: - Current state of device.
415 * @enable: - Flag to enable or disable generation
417 * Set the bits in the device's PM Capabilities to generate PME# when
418 * the system is suspended.
420 * -EIO is returned if device doesn't have PM Capabilities.
421 * -EINVAL is returned if device supports it, but can't generate wake events.
422 * 0 if operation is successful.
425 int pci_enable_wake(struct pci_dev *dev, u32 state, int enable)
430 /* find PCI PM capability in list */
431 pm = pci_find_capability(dev, PCI_CAP_ID_PM);
433 /* If device doesn't support PM Capabilities, but request is to disable
434 * wake events, it's a nop; otherwise fail */
436 return enable ? -EIO : 0;
438 /* Check device's ability to generate PME# */
439 pci_read_config_word(dev,pm+PCI_PM_PMC,&value);
441 value &= PCI_PM_CAP_PME_MASK;
442 value >>= ffs(PCI_PM_CAP_PME_MASK) - 1; /* First bit of mask */
444 /* Check if it can generate PME# from requested state. */
445 if (!value || !(value & (1 << state)))
446 return enable ? -EINVAL : 0;
448 pci_read_config_word(dev, pm + PCI_PM_CTRL, &value);
450 /* Clear PME_Status by writing 1 to it and enable PME# */
451 value |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE;
454 value &= ~PCI_PM_CTRL_PME_ENABLE;
456 pci_write_config_word(dev, pm + PCI_PM_CTRL, value);
462 pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge)
466 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
470 while (dev->bus->self) {
471 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
472 dev = dev->bus->self;
479 * pci_release_region - Release a PCI bar
480 * @pdev: PCI device whose resources were previously reserved by pci_request_region
481 * @bar: BAR to release
483 * Releases the PCI I/O and memory resources previously reserved by a
484 * successful call to pci_request_region. Call this function only
485 * after all use of the PCI regions has ceased.
487 void pci_release_region(struct pci_dev *pdev, int bar)
489 if (pci_resource_len(pdev, bar) == 0)
491 if (pci_resource_flags(pdev, bar) & IORESOURCE_IO)
492 release_region(pci_resource_start(pdev, bar),
493 pci_resource_len(pdev, bar));
494 else if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM)
495 release_mem_region(pci_resource_start(pdev, bar),
496 pci_resource_len(pdev, bar));
500 * pci_request_region - Reserved PCI I/O and memory resource
501 * @pdev: PCI device whose resources are to be reserved
502 * @bar: BAR to be reserved
503 * @res_name: Name to be associated with resource.
505 * Mark the PCI region associated with PCI device @pdev BR @bar as
506 * being reserved by owner @res_name. Do not access any
507 * address inside the PCI regions unless this call returns
510 * Returns 0 on success, or %EBUSY on error. A warning
511 * message is also printed on failure.
513 int pci_request_region(struct pci_dev *pdev, int bar, char *res_name)
515 if (pci_resource_len(pdev, bar) == 0)
518 if (pci_resource_flags(pdev, bar) & IORESOURCE_IO) {
519 if (!request_region(pci_resource_start(pdev, bar),
520 pci_resource_len(pdev, bar), res_name))
523 else if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
524 if (!request_mem_region(pci_resource_start(pdev, bar),
525 pci_resource_len(pdev, bar), res_name))
532 printk (KERN_WARNING "PCI: Unable to reserve %s region #%d:%lx@%lx for device %s\n",
533 pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem",
534 bar + 1, /* PCI BAR # */
535 pci_resource_len(pdev, bar), pci_resource_start(pdev, bar),
542 * pci_release_regions - Release reserved PCI I/O and memory resources
543 * @pdev: PCI device whose resources were previously reserved by pci_request_regions
545 * Releases all PCI I/O and memory resources previously reserved by a
546 * successful call to pci_request_regions. Call this function only
547 * after all use of the PCI regions has ceased.
550 void pci_release_regions(struct pci_dev *pdev)
554 for (i = 0; i < 6; i++)
555 pci_release_region(pdev, i);
559 * pci_request_regions - Reserved PCI I/O and memory resources
560 * @pdev: PCI device whose resources are to be reserved
561 * @res_name: Name to be associated with resource.
563 * Mark all PCI regions associated with PCI device @pdev as
564 * being reserved by owner @res_name. Do not access any
565 * address inside the PCI regions unless this call returns
568 * Returns 0 on success, or %EBUSY on error. A warning
569 * message is also printed on failure.
571 int pci_request_regions(struct pci_dev *pdev, char *res_name)
575 for (i = 0; i < 6; i++)
576 if(pci_request_region(pdev, i, res_name))
582 pci_release_region(pdev, i);
588 * pci_set_master - enables bus-mastering for device dev
589 * @dev: the PCI device to enable
591 * Enables bus-mastering on the device and calls pcibios_set_master()
592 * to do the needed arch specific settings.
595 pci_set_master(struct pci_dev *dev)
599 pci_read_config_word(dev, PCI_COMMAND, &cmd);
600 if (! (cmd & PCI_COMMAND_MASTER)) {
601 DBG("PCI: Enabling bus mastering for device %s\n", pci_name(dev));
602 cmd |= PCI_COMMAND_MASTER;
603 pci_write_config_word(dev, PCI_COMMAND, cmd);
605 dev->is_busmaster = 1;
606 pcibios_set_master(dev);
609 #ifndef HAVE_ARCH_PCI_MWI
610 /* This can be overridden by arch code. */
611 u8 pci_cache_line_size = L1_CACHE_BYTES >> 2;
614 * pci_generic_prep_mwi - helper function for pci_set_mwi
615 * @dev: the PCI device for which MWI is enabled
617 * Helper function for generic implementation of pcibios_prep_mwi
618 * function. Originally copied from drivers/net/acenic.c.
619 * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>.
621 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
624 pci_generic_prep_mwi(struct pci_dev *dev)
628 if (!pci_cache_line_size)
629 return -EINVAL; /* The system doesn't support MWI. */
631 /* Validate current setting: the PCI_CACHE_LINE_SIZE must be
632 equal to or multiple of the right value. */
633 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size);
634 if (cacheline_size >= pci_cache_line_size &&
635 (cacheline_size % pci_cache_line_size) == 0)
638 /* Write the correct value. */
639 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cache_line_size);
641 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size);
642 if (cacheline_size == pci_cache_line_size)
645 printk(KERN_DEBUG "PCI: cache line size of %d is not supported "
646 "by device %s\n", pci_cache_line_size << 2, pci_name(dev));
650 #endif /* !HAVE_ARCH_PCI_MWI */
653 * pci_set_mwi - enables memory-write-invalidate PCI transaction
654 * @dev: the PCI device for which MWI is enabled
656 * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND,
657 * and then calls @pcibios_set_mwi to do the needed arch specific
658 * operations or a generic mwi-prep function.
660 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
663 pci_set_mwi(struct pci_dev *dev)
668 #ifdef HAVE_ARCH_PCI_MWI
669 rc = pcibios_prep_mwi(dev);
671 rc = pci_generic_prep_mwi(dev);
677 pci_read_config_word(dev, PCI_COMMAND, &cmd);
678 if (! (cmd & PCI_COMMAND_INVALIDATE)) {
679 DBG("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev));
680 cmd |= PCI_COMMAND_INVALIDATE;
681 pci_write_config_word(dev, PCI_COMMAND, cmd);
688 * pci_clear_mwi - disables Memory-Write-Invalidate for device dev
689 * @dev: the PCI device to disable
691 * Disables PCI Memory-Write-Invalidate transaction on the device
694 pci_clear_mwi(struct pci_dev *dev)
698 pci_read_config_word(dev, PCI_COMMAND, &cmd);
699 if (cmd & PCI_COMMAND_INVALIDATE) {
700 cmd &= ~PCI_COMMAND_INVALIDATE;
701 pci_write_config_word(dev, PCI_COMMAND, cmd);
705 #ifndef HAVE_ARCH_PCI_SET_DMA_MASK
707 * These can be overridden by arch-specific implementations
710 pci_set_dma_mask(struct pci_dev *dev, u64 mask)
712 if (!pci_dma_supported(dev, mask))
715 dev->dma_mask = mask;
721 pci_dac_set_dma_mask(struct pci_dev *dev, u64 mask)
723 if (!pci_dac_dma_supported(dev, mask))
726 dev->dma_mask = mask;
732 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
734 if (!pci_dma_supported(dev, mask))
737 dev->dev.coherent_dma_mask = mask;
743 static int __devinit pci_init(void)
745 struct pci_dev *dev = NULL;
747 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
748 pci_fixup_device(pci_fixup_final, dev);
753 static int __devinit pci_setup(char *str)
756 char *k = strchr(str, ',');
759 if (*str && (str = pcibios_setup(str)) && *str) {
760 /* PCI layer options should be handled here */
761 printk(KERN_ERR "PCI: Unknown option `%s'\n", str);
768 device_initcall(pci_init);
770 __setup("pci=", pci_setup);
772 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
773 /* FIXME: Some boxes have multiple ISA bridges! */
774 struct pci_dev *isa_bridge;
775 EXPORT_SYMBOL(isa_bridge);
778 EXPORT_SYMBOL(pci_enable_device_bars);
779 EXPORT_SYMBOL(pci_enable_device);
780 EXPORT_SYMBOL(pci_disable_device);
781 EXPORT_SYMBOL(pci_max_busnr);
782 EXPORT_SYMBOL(pci_bus_max_busnr);
783 EXPORT_SYMBOL(pci_find_capability);
784 EXPORT_SYMBOL(pci_bus_find_capability);
785 EXPORT_SYMBOL(pci_release_regions);
786 EXPORT_SYMBOL(pci_request_regions);
787 EXPORT_SYMBOL(pci_release_region);
788 EXPORT_SYMBOL(pci_request_region);
789 EXPORT_SYMBOL(pci_set_master);
790 EXPORT_SYMBOL(pci_set_mwi);
791 EXPORT_SYMBOL(pci_clear_mwi);
792 EXPORT_SYMBOL(pci_set_dma_mask);
793 EXPORT_SYMBOL(pci_dac_set_dma_mask);
794 EXPORT_SYMBOL(pci_set_consistent_dma_mask);
795 EXPORT_SYMBOL(pci_assign_resource);
796 EXPORT_SYMBOL(pci_find_parent_resource);
798 EXPORT_SYMBOL(pci_set_power_state);
799 EXPORT_SYMBOL(pci_save_state);
800 EXPORT_SYMBOL(pci_restore_state);
801 EXPORT_SYMBOL(pci_enable_wake);
805 EXPORT_SYMBOL(isa_dma_bridge_buggy);
806 EXPORT_SYMBOL(pci_pci_problems);