1 /*======================================================================
3 Device driver for Intel 82365 and compatible PC Card controllers.
5 i82365.c 1.265 1999/11/10 18:36:21
7 The contents of this file are subject to the Mozilla Public
8 License Version 1.1 (the "License"); you may not use this file
9 except in compliance with the License. You may obtain a copy of
10 the License at http://www.mozilla.org/MPL/
12 Software distributed under the License is distributed on an "AS
13 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
14 implied. See the License for the specific language governing
15 rights and limitations under the License.
17 The initial developer of the original code is David A. Hinds
18 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
19 are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
21 Alternatively, the contents of this file may be used under the
22 terms of the GNU General Public License version 2 (the "GPL"), in which
23 case the provisions of the GPL are applicable instead of the
24 above. If you wish to allow the use of your version of this file
25 only under the terms of the GPL and not to allow others to use
26 your version of this file under the MPL, indicate your decision
27 by deleting the provisions above and replace them with the notice
28 and other provisions required by the GPL. If you do not delete
29 the provisions above, a recipient may use your version of this
30 file under either the MPL or the GPL.
32 ======================================================================*/
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/init.h>
37 #include <linux/config.h>
38 #include <linux/types.h>
39 #include <linux/fcntl.h>
40 #include <linux/string.h>
41 #include <linux/kernel.h>
42 #include <linux/errno.h>
43 #include <linux/timer.h>
44 #include <linux/sched.h>
45 #include <linux/slab.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/workqueue.h>
49 #include <linux/interrupt.h>
50 #include <linux/device.h>
53 #include <asm/bitops.h>
54 #include <asm/system.h>
56 #include <pcmcia/version.h>
57 #include <pcmcia/cs_types.h>
58 #include <pcmcia/ss.h>
59 #include <pcmcia/cs.h>
61 #include <linux/isapnp.h>
63 /* ISA-bus controllers */
71 static const char version[] =
72 "i82365.c 1.265 1999/11/10 18:36:21 (David Hinds)";
76 module_param(pc_debug, int, 0644);
78 #define debug(lvl, fmt, arg...) do { \
79 if (pc_debug > (lvl)) \
80 printk(KERN_DEBUG "i82365: " fmt , ## arg); \
83 #define debug(lvl, fmt, arg...) do { } while (0)
86 static irqreturn_t i365_count_irq(int, void *, struct pt_regs *);
87 static inline int _check_irq(int irq, int flags)
89 if (request_irq(irq, i365_count_irq, flags, "x", i365_count_irq) != 0)
91 free_irq(irq, i365_count_irq);
95 /*====================================================================*/
97 /* Parameters that can be set with 'insmod' */
99 /* Default base address for i82365sl and other ISA chips */
100 static int i365_base = 0x3e0;
101 /* Should we probe at 0x3e2 for an extra ISA controller? */
102 static int extra_sockets = 0;
103 /* Specify a socket number to ignore */
104 static int ignore = -1;
105 /* Bit map or list of interrupts to choose from */
106 static u_int irq_mask = 0xffff;
107 static int irq_list[16];
108 static int irq_list_count;
109 /* The card status change interrupt -- 0 means autoselect */
110 static int cs_irq = 0;
112 /* Probe for safe interrupts? */
113 static int do_scan = 1;
114 /* Poll status interval -- 0 means default to interrupt */
115 static int poll_interval = 0;
116 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
117 static int cycle_time = 120;
120 static int has_dma = -1;
121 static int has_led = -1;
122 static int has_ring = -1;
123 static int dynamic_mode = 0;
124 static int freq_bypass = -1;
125 static int setup_time = -1;
126 static int cmd_time = -1;
127 static int recov_time = -1;
130 static int async_clock = -1;
131 static int cable_mode = -1;
132 static int wakeup = 0;
134 module_param(i365_base, int, 0444);
135 module_param(ignore, int, 0444);
136 module_param(extra_sockets, int, 0444);
137 module_param(irq_mask, int, 0444);
138 module_param_array(irq_list, int, irq_list_count, 0444);
139 module_param(cs_irq, int, 0444);
140 module_param(async_clock, int, 0444);
141 module_param(cable_mode, int, 0444);
142 module_param(wakeup, int, 0444);
144 module_param(do_scan, int, 0444);
145 module_param(poll_interval, int, 0444);
146 module_param(cycle_time, int, 0444);
147 module_param(has_dma, int, 0444);
148 module_param(has_led, int, 0444);
149 module_param(has_ring, int, 0444);
150 module_param(dynamic_mode, int, 0444);
151 module_param(freq_bypass, int, 0444);
152 module_param(setup_time, int, 0444);
153 module_param(cmd_time, int, 0444);
154 module_param(recov_time, int, 0444);
156 /*====================================================================*/
158 typedef struct cirrus_state_t {
163 typedef struct vg46x_state_t {
167 struct i82365_socket {
169 struct pcmcia_socket socket;
175 cirrus_state_t cirrus;
180 /* Where we keep track of our sockets... */
181 static int sockets = 0;
182 static struct i82365_socket socket[8] = {
186 /* Default ISA interrupt mask */
187 #define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */
190 static spinlock_t isa_lock = SPIN_LOCK_UNLOCKED;
191 #define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f)
192 #define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f)
194 static struct timer_list poll_timer;
196 /*====================================================================*/
198 /* These definitions must match the pcic table! */
199 typedef enum pcic_id {
200 IS_I82365A, IS_I82365B, IS_I82365DF,
201 IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469,
202 IS_PD6710, IS_PD672X, IS_VT83C469,
205 /* Flags for classifying groups of controllers */
206 #define IS_VADEM 0x0001
207 #define IS_CIRRUS 0x0002
208 #define IS_VIA 0x0010
209 #define IS_UNKNOWN 0x0400
210 #define IS_VG_PWR 0x0800
211 #define IS_DF_PWR 0x1000
212 #define IS_ALIVE 0x8000
214 typedef struct pcic_t {
219 static pcic_t pcic[] = {
220 { "Intel i82365sl A step", 0 },
221 { "Intel i82365sl B step", 0 },
222 { "Intel i82365sl DF", IS_DF_PWR },
224 { "Ricoh RF5C296/396", 0 },
225 { "VLSI 82C146", 0 },
226 { "Vadem VG-468", IS_VADEM },
227 { "Vadem VG-469", IS_VADEM|IS_VG_PWR },
228 { "Cirrus PD6710", IS_CIRRUS },
229 { "Cirrus PD672x", IS_CIRRUS },
230 { "VIA VT83C469", IS_CIRRUS|IS_VIA },
233 #define PCIC_COUNT (sizeof(pcic)/sizeof(pcic_t))
235 /*====================================================================*/
237 static spinlock_t bus_lock = SPIN_LOCK_UNLOCKED;
239 static u_char i365_get(u_short sock, u_short reg)
242 spin_lock_irqsave(&bus_lock,flags);
244 ioaddr_t port = socket[sock].ioaddr;
246 reg = I365_REG(socket[sock].psock, reg);
247 outb(reg, port); val = inb(port+1);
248 spin_unlock_irqrestore(&bus_lock,flags);
253 static void i365_set(u_short sock, u_short reg, u_char data)
256 spin_lock_irqsave(&bus_lock,flags);
258 ioaddr_t port = socket[sock].ioaddr;
259 u_char val = I365_REG(socket[sock].psock, reg);
260 outb(val, port); outb(data, port+1);
261 spin_unlock_irqrestore(&bus_lock,flags);
265 static void i365_bset(u_short sock, u_short reg, u_char mask)
267 u_char d = i365_get(sock, reg);
269 i365_set(sock, reg, d);
272 static void i365_bclr(u_short sock, u_short reg, u_char mask)
274 u_char d = i365_get(sock, reg);
276 i365_set(sock, reg, d);
279 static void i365_bflip(u_short sock, u_short reg, u_char mask, int b)
281 u_char d = i365_get(sock, reg);
286 i365_set(sock, reg, d);
289 static u_short i365_get_pair(u_short sock, u_short reg)
292 a = i365_get(sock, reg);
293 b = i365_get(sock, reg+1);
297 static void i365_set_pair(u_short sock, u_short reg, u_short data)
299 i365_set(sock, reg, data & 0xff);
300 i365_set(sock, reg+1, data >> 8);
303 /*======================================================================
305 Code to save and restore global state information for Cirrus
306 PD67xx controllers, and to set and report global configuration
309 The VIA controllers also use these routines, as they are mostly
310 Cirrus lookalikes, without the timing registers.
312 ======================================================================*/
314 #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b))))
316 static void cirrus_get_state(u_short s)
319 cirrus_state_t *p = &socket[s].state.cirrus;
320 p->misc1 = i365_get(s, PD67_MISC_CTL_1);
321 p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
322 p->misc2 = i365_get(s, PD67_MISC_CTL_2);
323 for (i = 0; i < 6; i++)
324 p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i);
327 static void cirrus_set_state(u_short s)
331 cirrus_state_t *p = &socket[s].state.cirrus;
333 misc = i365_get(s, PD67_MISC_CTL_2);
334 i365_set(s, PD67_MISC_CTL_2, p->misc2);
335 if (misc & PD67_MC2_SUSPEND) mdelay(50);
336 misc = i365_get(s, PD67_MISC_CTL_1);
337 misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
338 i365_set(s, PD67_MISC_CTL_1, misc | p->misc1);
339 for (i = 0; i < 6; i++)
340 i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]);
343 static u_int __init cirrus_set_opts(u_short s, char *buf)
345 struct i82365_socket *t = &socket[s];
346 cirrus_state_t *p = &socket[s].state.cirrus;
349 if (has_ring == -1) has_ring = 1;
350 flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring);
351 flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode);
352 flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass);
353 if (p->misc2 & PD67_MC2_IRQ15_RI)
354 strcat(buf, " [ring]");
355 if (p->misc2 & PD67_MC2_DYNAMIC_MODE)
356 strcat(buf, " [dyn mode]");
357 if (p->misc2 & PD67_MC2_FREQ_BYPASS)
358 strcat(buf, " [freq bypass]");
359 if (p->misc1 & PD67_MC1_INPACK_ENA)
360 strcat(buf, " [inpack]");
361 if (p->misc2 & PD67_MC2_IRQ15_RI)
364 strcat(buf, " [led]");
368 strcat(buf, " [dma]");
371 if (!(t->flags & IS_VIA)) {
373 p->timer[0] = p->timer[3] = setup_time;
375 p->timer[1] = cmd_time;
376 p->timer[4] = cmd_time*2+4;
378 if (p->timer[1] == 0) {
379 p->timer[1] = 6; p->timer[4] = 16;
380 if (p->timer[0] == 0)
381 p->timer[0] = p->timer[3] = 1;
384 p->timer[2] = p->timer[5] = recov_time;
386 sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1],
387 p->timer[2], p->timer[3], p->timer[4], p->timer[5]);
392 /*======================================================================
394 Code to save and restore global state information for Vadem VG468
395 and VG469 controllers, and to set and report global configuration
398 ======================================================================*/
400 static void vg46x_get_state(u_short s)
402 vg46x_state_t *p = &socket[s].state.vg46x;
403 p->ctl = i365_get(s, VG468_CTL);
404 if (socket[s].type == IS_VG469)
405 p->ema = i365_get(s, VG469_EXT_MODE);
408 static void vg46x_set_state(u_short s)
410 vg46x_state_t *p = &socket[s].state.vg46x;
411 i365_set(s, VG468_CTL, p->ctl);
412 if (socket[s].type == IS_VG469)
413 i365_set(s, VG469_EXT_MODE, p->ema);
416 static u_int __init vg46x_set_opts(u_short s, char *buf)
418 vg46x_state_t *p = &socket[s].state.vg46x;
420 flip(p->ctl, VG468_CTL_ASYNC, async_clock);
421 flip(p->ema, VG469_MODE_CABLE, cable_mode);
422 if (p->ctl & VG468_CTL_ASYNC)
423 strcat(buf, " [async]");
424 if (p->ctl & VG468_CTL_INPACK)
425 strcat(buf, " [inpack]");
426 if (socket[s].type == IS_VG469) {
427 u_char vsel = i365_get(s, VG469_VSELECT);
428 if (vsel & VG469_VSEL_EXT_STAT) {
429 strcat(buf, " [ext mode]");
430 if (vsel & VG469_VSEL_EXT_BUS)
431 strcat(buf, " [isa buf]");
433 if (p->ema & VG469_MODE_CABLE)
434 strcat(buf, " [cable]");
435 if (p->ema & VG469_MODE_COMPAT)
436 strcat(buf, " [c step]");
441 /*======================================================================
443 Generic routines to get and set controller options
445 ======================================================================*/
447 static void get_bridge_state(u_short s)
449 struct i82365_socket *t = &socket[s];
450 if (t->flags & IS_CIRRUS)
452 else if (t->flags & IS_VADEM)
456 static void set_bridge_state(u_short s)
458 struct i82365_socket *t = &socket[s];
459 if (t->flags & IS_CIRRUS)
462 i365_set(s, I365_GBLCTL, 0x00);
463 i365_set(s, I365_GENCTL, 0x00);
465 i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr);
466 if (t->flags & IS_VADEM)
470 static u_int __init set_bridge_opts(u_short s, u_short ns)
476 for (i = s; i < s+ns; i++) {
477 if (socket[i].flags & IS_ALIVE) {
478 printk(KERN_INFO " host opts [%d]: already alive!\n", i);
483 if (socket[i].flags & IS_CIRRUS)
484 m = cirrus_set_opts(i, buf);
485 else if (socket[i].flags & IS_VADEM)
486 m = vg46x_set_opts(i, buf);
488 printk(KERN_INFO " host opts [%d]:%s\n", i,
489 (*buf) ? buf : " none");
494 /*======================================================================
496 Interrupt testing code, for ISA and PCI interrupts
498 ======================================================================*/
500 static volatile u_int irq_hits;
501 static u_short irq_sock;
503 static irqreturn_t i365_count_irq(int irq, void *dev, struct pt_regs *regs)
505 i365_get(irq_sock, I365_CSC);
507 debug(2, "-> hit on irq %d\n", irq);
511 static u_int __init test_irq(u_short sock, int irq)
513 debug(2, " testing ISA irq %d\n", irq);
514 if (request_irq(irq, i365_count_irq, 0, "scan", i365_count_irq) != 0)
516 irq_hits = 0; irq_sock = sock;
517 __set_current_state(TASK_UNINTERRUPTIBLE);
518 schedule_timeout(HZ/100);
520 free_irq(irq, i365_count_irq);
521 debug(2, " spurious hit!\n");
525 /* Generate one interrupt */
526 i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4));
527 i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ);
530 free_irq(irq, i365_count_irq);
532 /* mask all interrupts */
533 i365_set(sock, I365_CSCINT, 0);
534 debug(2, " hits = %d\n", irq_hits);
536 return (irq_hits != 1);
539 static u_int __init isa_scan(u_short sock, u_int mask0)
546 /* Don't probe level-triggered interrupts -- reserved for PCI */
547 mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8));
551 set_bridge_state(sock);
552 i365_set(sock, I365_CSCINT, 0);
553 for (i = 0; i < 16; i++)
554 if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0))
556 for (i = 0; i < 16; i++)
557 if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0))
561 printk(KERN_INFO " ISA irqs (");
565 /* Fallback: just find interrupts that aren't in use */
566 for (i = 0; i < 16; i++)
567 if ((mask0 & (1 << i)) && (_check_irq(i, 0) == 0))
570 /* If scan failed, default to polled status */
571 if (!cs_irq && (poll_interval == 0)) poll_interval = HZ;
575 for (i = 0; i < 16; i++)
577 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
578 if (mask1 == 0) printk("none!");
583 /*====================================================================*/
585 /* Time conversion functions */
587 static int to_cycles(int ns)
589 return ns/cycle_time;
592 /*====================================================================*/
594 static int __init identify(u_short port, u_short sock)
599 /* Use the next free entry in the socket table */
600 socket[sockets].ioaddr = port;
601 socket[sockets].psock = sock;
603 /* Wake up a sleepy Cirrus controller */
605 i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND);
606 /* Pause at least 50 ms */
610 if ((val = i365_get(sockets, I365_IDENT)) & 0x70)
614 type = IS_I82365A; break;
616 type = IS_I82365B; break;
618 type = IS_I82365DF; break;
619 case 0x88: case 0x89: case 0x8a:
620 type = IS_IBM; break;
623 /* Check for Vadem VG-468 chips */
626 i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV);
627 val = i365_get(sockets, I365_IDENT);
628 if (val & I365_IDENT_VADEM) {
629 i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV);
630 type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468;
633 /* Check for Ricoh chips */
634 val = i365_get(sockets, RF5C_CHIP_ID);
635 if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396))
638 /* Check for Cirrus CL-PD67xx chips */
639 i365_set(sockets, PD67_CHIP_INFO, 0);
640 val = i365_get(sockets, PD67_CHIP_INFO);
641 if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) {
642 val = i365_get(sockets, PD67_CHIP_INFO);
643 if ((val & PD67_INFO_CHIP_ID) == 0) {
644 type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710;
645 i365_set(sockets, PD67_EXT_INDEX, 0xe5);
646 if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5)
653 /*======================================================================
655 See if a card is present, powered up, in IO mode, and already
656 bound to a (non PC Card) Linux driver. We leave these alone.
658 We make an exception for cards that seem to be serial devices.
660 ======================================================================*/
662 static int __init is_alive(u_short sock)
667 stat = i365_get(sock, I365_STATUS);
668 start = i365_get_pair(sock, I365_IO(0)+I365_W_START);
669 stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP);
670 if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) &&
671 (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) &&
672 (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) &&
673 (check_region(start, stop-start+1) != 0) &&
674 ((start & 0xfeef) != 0x02e8))
680 /*====================================================================*/
682 static void __init add_socket(u_short port, int psock, int type)
684 socket[sockets].ioaddr = port;
685 socket[sockets].psock = psock;
686 socket[sockets].type = type;
687 socket[sockets].flags = pcic[type].flags;
688 if (is_alive(sockets))
689 socket[sockets].flags |= IS_ALIVE;
693 static void __init add_pcic(int ns, int type)
695 u_int mask = 0, i, base;
697 struct i82365_socket *t = &socket[sockets-ns];
700 if (t->ioaddr > 0) request_region(t->ioaddr, 2, "i82365");
702 if (base == 0) printk("\n");
703 printk(KERN_INFO " %s", pcic[type].name);
704 printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x",
705 t->ioaddr, t->psock*0x40);
706 printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : ""));
708 /* Set host options, build basic interrupt mask */
709 if (irq_list_count == 0)
712 for (i = mask = 0; i < irq_list_count; i++)
713 mask |= (1<<irq_list[i]);
714 mask &= I365_MASK & set_bridge_opts(base, ns);
715 /* Scan for ISA interrupts */
716 mask = isa_scan(base, mask);
718 /* Poll if only two interrupts available */
719 if (!poll_interval) {
720 u_int tmp = (mask & 0xff20);
722 if ((tmp & (tmp-1)) == 0)
725 /* Only try an ISA cs_irq if this is the first controller */
726 if (!grab_irq && (cs_irq || !poll_interval)) {
727 /* Avoid irq 12 unless it is explicitly requested */
728 u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12));
729 for (cs_irq = 15; cs_irq > 0; cs_irq--)
730 if ((cs_mask & (1 << cs_irq)) &&
731 (_check_irq(cs_irq, 0) == 0))
736 printk(" status change on irq %d\n", cs_irq);
741 if (poll_interval == 0)
743 printk(" polling interval = %d ms\n",
744 poll_interval * 1000 / HZ);
748 /* Update socket interrupt information, capabilities */
749 for (i = 0; i < ns; i++) {
750 t[i].socket.features |= SS_CAP_PCCARD;
751 t[i].socket.map_size = 0x1000;
752 t[i].socket.irq_mask = mask;
753 t[i].cs_irq = isa_irq;
758 /*====================================================================*/
761 static struct isapnp_device_id id_table[] __initdata = {
762 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
763 ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" },
764 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
765 ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" },
766 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'),
767 ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" },
770 MODULE_DEVICE_TABLE(isapnp, id_table);
772 static struct pnp_dev *i82365_pnpdev;
775 static void __init isa_probe(void)
777 int i, j, sock, k, ns, id;
780 struct isapnp_device_id *devid;
783 for (devid = id_table; devid->vendor; devid++) {
784 if ((dev = pnp_find_dev(NULL, devid->vendor, devid->function, NULL))) {
786 if (pnp_device_attach(dev) < 0)
789 if (pnp_activate_dev(dev) < 0) {
790 printk("activate failed\n");
791 pnp_device_detach(dev);
795 if (!pnp_port_valid(dev, 0)) {
796 printk("invalid resources ?\n");
797 pnp_device_detach(dev);
800 i365_base = pnp_port_start(dev, 0);
807 if (check_region(i365_base, 2) != 0) {
809 printk("port conflict at %#x\n", i365_base);
813 id = identify(i365_base, 0);
814 if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) {
815 for (i = 0; i < 4; i++) {
816 if (i == ignore) continue;
817 port = i365_base + ((i & 1) << 2) + ((i & 2) << 1);
819 if (identify(port, sock) == IS_I82365DF) {
820 add_socket(port, sock, IS_VLSI);
821 add_pcic(1, IS_VLSI);
825 for (i = 0; i < 8; i += 2) {
826 if (sockets && !extra_sockets && (i == 4))
828 port = i365_base + 2*(i>>2);
830 id = identify(port, sock);
831 if (id < 0) continue;
833 for (j = ns = 0; j < 2; j++) {
834 /* Does the socket exist? */
835 if ((ignore == i+j) || (identify(port, sock+j) < 0))
837 /* Check for bad socket decode */
838 for (k = 0; k <= sockets; k++)
839 i365_set(k, I365_MEM(0)+I365_W_OFF, k);
840 for (k = 0; k <= sockets; k++)
841 if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k)
843 if (k <= sockets) break;
844 add_socket(port, sock+j, id); ns++;
846 if (ns != 0) add_pcic(ns, id);
851 /*====================================================================*/
853 static irqreturn_t pcic_interrupt(int irq, void *dev,
854 struct pt_regs *regs)
857 u_int events, active;
861 debug(4, "pcic_interrupt(%d)\n", irq);
863 for (j = 0; j < 20; j++) {
865 for (i = 0; i < sockets; i++) {
866 if (socket[i].cs_irq != irq)
870 csc = i365_get(i, I365_CSC);
871 if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) {
872 ISA_UNLOCK(i, flags);
875 events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
877 if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD)
878 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
880 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
881 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
882 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
884 ISA_UNLOCK(i, flags);
885 debug(2, "socket %d event 0x%02x\n", i, events);
888 pcmcia_parse_events(&socket[i].socket, events);
895 printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n");
897 debug(4, "interrupt done\n");
898 return IRQ_RETVAL(handled);
899 } /* pcic_interrupt */
901 static void pcic_interrupt_wrapper(u_long data)
903 pcic_interrupt(0, NULL, NULL);
904 poll_timer.expires = jiffies + poll_interval;
905 add_timer(&poll_timer);
908 /*====================================================================*/
910 static int i365_get_status(u_short sock, u_int *value)
914 status = i365_get(sock, I365_STATUS);
915 *value = ((status & I365_CS_DETECT) == I365_CS_DETECT)
918 if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD)
919 *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
921 *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
922 *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
924 *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
925 *value |= (status & I365_CS_READY) ? SS_READY : 0;
926 *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
928 if (socket[sock].type == IS_VG469) {
929 status = i365_get(sock, VG469_VSENSE);
930 if (socket[sock].psock & 1) {
931 *value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD;
932 *value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD;
934 *value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD;
935 *value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD;
939 debug(1, "GetStatus(%d) = %#4.4x\n", sock, *value);
941 } /* i365_get_status */
943 /*====================================================================*/
945 static int i365_get_socket(u_short sock, socket_state_t *state)
947 struct i82365_socket *t = &socket[sock];
948 u_char reg, vcc, vpp;
950 reg = i365_get(sock, I365_POWER);
951 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
952 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
953 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK;
954 state->Vcc = state->Vpp = 0;
955 if (t->flags & IS_CIRRUS) {
956 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_VCC_3V) {
957 if (reg & I365_VCC_5V) state->Vcc = 33;
958 if (vpp == I365_VPP1_5V) state->Vpp = 33;
960 if (reg & I365_VCC_5V) state->Vcc = 50;
961 if (vpp == I365_VPP1_5V) state->Vpp = 50;
963 if (vpp == I365_VPP1_12V) state->Vpp = 120;
964 } else if (t->flags & IS_VG_PWR) {
965 if (i365_get(sock, VG469_VSELECT) & VG469_VSEL_VCC) {
966 if (reg & I365_VCC_5V) state->Vcc = 33;
967 if (vpp == I365_VPP1_5V) state->Vpp = 33;
969 if (reg & I365_VCC_5V) state->Vcc = 50;
970 if (vpp == I365_VPP1_5V) state->Vpp = 50;
972 if (vpp == I365_VPP1_12V) state->Vpp = 120;
973 } else if (t->flags & IS_DF_PWR) {
974 if (vcc == I365_VCC_3V) state->Vcc = 33;
975 if (vcc == I365_VCC_5V) state->Vcc = 50;
976 if (vpp == I365_VPP1_5V) state->Vpp = 50;
977 if (vpp == I365_VPP1_12V) state->Vpp = 120;
979 if (reg & I365_VCC_5V) {
981 if (vpp == I365_VPP1_5V) state->Vpp = 50;
982 if (vpp == I365_VPP1_12V) state->Vpp = 120;
986 /* IO card, RESET flags, IO interrupt */
987 reg = i365_get(sock, I365_INTCTL);
988 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
989 if (reg & I365_PC_IOCARD) state->flags |= SS_IOCARD;
990 state->io_irq = reg & I365_IRQ_MASK;
992 /* speaker control */
993 if (t->flags & IS_CIRRUS) {
994 if (i365_get(sock, PD67_MISC_CTL_1) & PD67_MC1_SPKR_ENA)
995 state->flags |= SS_SPKR_ENA;
998 /* Card status change mask */
999 reg = i365_get(sock, I365_CSCINT);
1000 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
1001 if (state->flags & SS_IOCARD)
1002 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
1004 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
1005 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
1006 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
1009 debug(1, "GetSocket(%d) = flags %#3.3x, Vcc %d, Vpp %d, "
1010 "io_irq %d, csc_mask %#2.2x\n", sock, state->flags,
1011 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1013 } /* i365_get_socket */
1015 /*====================================================================*/
1017 static int i365_set_socket(u_short sock, socket_state_t *state)
1019 struct i82365_socket *t = &socket[sock];
1022 debug(1, "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
1023 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags,
1024 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
1026 /* First set global controller options */
1027 set_bridge_state(sock);
1029 /* IO card, RESET flag, IO interrupt */
1031 reg |= state->io_irq;
1032 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
1033 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
1034 i365_set(sock, I365_INTCTL, reg);
1036 reg = I365_PWR_NORESET;
1037 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
1038 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
1040 if (t->flags & IS_CIRRUS) {
1041 if (state->Vpp != 0) {
1042 if (state->Vpp == 120)
1043 reg |= I365_VPP1_12V;
1044 else if (state->Vpp == state->Vcc)
1045 reg |= I365_VPP1_5V;
1046 else return -EINVAL;
1048 if (state->Vcc != 0) {
1050 if (state->Vcc == 33)
1051 i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1052 else if (state->Vcc == 50)
1053 i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
1054 else return -EINVAL;
1056 } else if (t->flags & IS_VG_PWR) {
1057 if (state->Vpp != 0) {
1058 if (state->Vpp == 120)
1059 reg |= I365_VPP1_12V;
1060 else if (state->Vpp == state->Vcc)
1061 reg |= I365_VPP1_5V;
1062 else return -EINVAL;
1064 if (state->Vcc != 0) {
1066 if (state->Vcc == 33)
1067 i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC);
1068 else if (state->Vcc == 50)
1069 i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC);
1070 else return -EINVAL;
1072 } else if (t->flags & IS_DF_PWR) {
1073 switch (state->Vcc) {
1075 case 33: reg |= I365_VCC_3V; break;
1076 case 50: reg |= I365_VCC_5V; break;
1077 default: return -EINVAL;
1079 switch (state->Vpp) {
1081 case 50: reg |= I365_VPP1_5V; break;
1082 case 120: reg |= I365_VPP1_12V; break;
1083 default: return -EINVAL;
1086 switch (state->Vcc) {
1088 case 50: reg |= I365_VCC_5V; break;
1089 default: return -EINVAL;
1091 switch (state->Vpp) {
1093 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break;
1094 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break;
1095 default: return -EINVAL;
1099 if (reg != i365_get(sock, I365_POWER))
1100 i365_set(sock, I365_POWER, reg);
1102 /* Chipset-specific functions */
1103 if (t->flags & IS_CIRRUS) {
1104 /* Speaker control */
1105 i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA,
1106 state->flags & SS_SPKR_ENA);
1109 /* Card status change interrupt mask */
1110 reg = t->cs_irq << 4;
1111 if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT;
1112 if (state->flags & SS_IOCARD) {
1113 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
1115 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
1116 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
1117 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
1119 i365_set(sock, I365_CSCINT, reg);
1120 i365_get(sock, I365_CSC);
1123 } /* i365_set_socket */
1125 /*====================================================================*/
1127 static int i365_set_io_map(u_short sock, struct pccard_io_map *io)
1131 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, "
1132 "%#4.4x-%#4.4x)\n", sock, io->map, io->flags,
1133 io->speed, io->start, io->stop);
1135 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
1136 (io->stop < io->start)) return -EINVAL;
1137 /* Turn off the window before changing anything */
1138 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map))
1139 i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map));
1140 i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start);
1141 i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop);
1142 ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map);
1143 if (io->speed) ioctl |= I365_IOCTL_WAIT(map);
1144 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
1145 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
1146 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
1147 i365_set(sock, I365_IOCTL, ioctl);
1148 /* Turn on the window if necessary */
1149 if (io->flags & MAP_ACTIVE)
1150 i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map));
1152 } /* i365_set_io_map */
1154 /*====================================================================*/
1156 static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem)
1161 debug(1, "SetMemMap(%d, %d, %#2.2x, %d ns, %#5.5lx-%#5.5"
1162 "lx, %#5.5x)\n", sock, mem->map, mem->flags, mem->speed,
1163 mem->sys_start, mem->sys_stop, mem->card_start);
1166 if ((map > 4) || (mem->card_start > 0x3ffffff) ||
1167 (mem->sys_start > mem->sys_stop) || (mem->speed > 1000))
1169 if ((mem->sys_start > 0xffffff) || (mem->sys_stop > 0xffffff))
1172 /* Turn off the window before changing anything */
1173 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
1174 i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1176 base = I365_MEM(map);
1177 i = (mem->sys_start >> 12) & 0x0fff;
1178 if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT;
1179 if (mem->flags & MAP_0WS) i |= I365_MEM_0WS;
1180 i365_set_pair(sock, base+I365_W_START, i);
1182 i = (mem->sys_stop >> 12) & 0x0fff;
1183 switch (to_cycles(mem->speed)) {
1185 case 1: i |= I365_MEM_WS0; break;
1186 case 2: i |= I365_MEM_WS1; break;
1187 default: i |= I365_MEM_WS1 | I365_MEM_WS0; break;
1189 i365_set_pair(sock, base+I365_W_STOP, i);
1191 i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
1192 if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT;
1193 if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG;
1194 i365_set_pair(sock, base+I365_W_OFF, i);
1196 /* Turn on the window if necessary */
1197 if (mem->flags & MAP_ACTIVE)
1198 i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map));
1200 } /* i365_set_mem_map */
1202 #if 0 /* driver model ordering issue */
1203 /*======================================================================
1205 Routines for accessing socket information and register dumps via
1206 /sys/class/pcmcia_socket/...
1208 ======================================================================*/
1210 static ssize_t show_info(struct class_device *class_dev, char *buf)
1212 struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev);
1213 return sprintf(buf, "type: %s\npsock: %d\n",
1214 pcic[s->type].name, s->psock);
1217 static ssize_t show_exca(struct class_device *class_dev, char *buf)
1219 struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev);
1220 unsigned short sock;
1223 unsigned long flags = 0;
1227 ISA_LOCK(sock, flags);
1228 for (i = 0; i < 0x40; i += 4) {
1229 ret += sprintf(buf, "%02x %02x %02x %02x%s",
1230 i365_get(sock,i), i365_get(sock,i+1),
1231 i365_get(sock,i+2), i365_get(sock,i+3),
1232 ((i % 16) == 12) ? "\n" : " ");
1235 ISA_UNLOCK(sock, flags);
1240 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
1241 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
1244 /*====================================================================*/
1246 /* this is horribly ugly... proper locking needs to be done here at
1248 #define LOCKED(x) do { \
1250 unsigned long flags; \
1251 spin_lock_irqsave(&isa_lock, flags); \
1253 spin_unlock_irqrestore(&isa_lock, flags); \
1258 static int pcic_get_status(struct pcmcia_socket *s, u_int *value)
1260 unsigned int sock = container_of(s, struct i82365_socket, socket)->number;
1262 if (socket[sock].flags & IS_ALIVE) {
1267 LOCKED(i365_get_status(sock, value));
1270 static int pcic_get_socket(struct pcmcia_socket *s, socket_state_t *state)
1272 unsigned int sock = container_of(s, struct i82365_socket, socket)->number;
1274 if (socket[sock].flags & IS_ALIVE)
1277 LOCKED(i365_get_socket(sock, state));
1280 static int pcic_set_socket(struct pcmcia_socket *s, socket_state_t *state)
1282 unsigned int sock = container_of(s, struct i82365_socket, socket)->number;
1284 if (socket[sock].flags & IS_ALIVE)
1287 LOCKED(i365_set_socket(sock, state));
1290 static int pcic_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
1292 unsigned int sock = container_of(s, struct i82365_socket, socket)->number;
1293 if (socket[sock].flags & IS_ALIVE)
1296 LOCKED(i365_set_io_map(sock, io));
1299 static int pcic_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
1301 unsigned int sock = container_of(s, struct i82365_socket, socket)->number;
1302 if (socket[sock].flags & IS_ALIVE)
1305 LOCKED(i365_set_mem_map(sock, mem));
1308 static int pcic_init(struct pcmcia_socket *s)
1311 pccard_io_map io = { 0, 0, 0, 0, 1 };
1312 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
1314 mem.sys_stop = 0x1000;
1315 for (i = 0; i < 2; i++) {
1317 pcic_set_io_map(s, &io);
1319 for (i = 0; i < 5; i++) {
1321 pcic_set_mem_map(s, &mem);
1326 static int pcic_suspend(struct pcmcia_socket *sock)
1328 return pcic_set_socket(sock, &dead_socket);
1331 static struct pccard_operations pcic_operations = {
1333 .suspend = pcic_suspend,
1334 .get_status = pcic_get_status,
1335 .get_socket = pcic_get_socket,
1336 .set_socket = pcic_set_socket,
1337 .set_io_map = pcic_set_io_map,
1338 .set_mem_map = pcic_set_mem_map,
1341 /*====================================================================*/
1343 static int i82365_suspend(struct device *dev, u32 state, u32 level)
1346 if (level == SUSPEND_SAVE_STATE)
1347 ret = pcmcia_socket_dev_suspend(dev, state);
1351 static int i82365_resume(struct device *dev, u32 level)
1354 if (level == RESUME_RESTORE_STATE)
1355 ret = pcmcia_socket_dev_resume(dev);
1359 static struct device_driver i82365_driver = {
1361 .bus = &platform_bus_type,
1362 .suspend = i82365_suspend,
1363 .resume = i82365_resume,
1366 static struct platform_device i82365_device = {
1371 static int __init init_i82365(void)
1375 if (driver_register(&i82365_driver))
1378 printk(KERN_INFO "Intel ISA PCIC probe: ");
1384 printk("not found.\n");
1385 driver_unregister(&i82365_driver);
1389 platform_device_register(&i82365_device);
1391 /* Set up interrupt handler(s) */
1393 request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt);
1395 /* register sockets with the pcmcia core */
1396 for (i = 0; i < sockets; i++) {
1397 socket[i].socket.dev.dev = &i82365_device.dev;
1398 socket[i].socket.ops = &pcic_operations;
1399 socket[i].socket.owner = THIS_MODULE;
1400 socket[i].number = i;
1401 ret = pcmcia_register_socket(&socket[i].socket);
1404 pcmcia_unregister_socket(&socket[i].socket);
1407 #if 0 /* driver model ordering issue */
1408 class_device_create_file(&socket[i].socket.dev,
1409 &class_device_attr_info);
1410 class_device_create_file(&socket[i].socket.dev,
1411 &class_device_attr_exca);
1415 /* Finally, schedule a polling interrupt */
1416 if (poll_interval != 0) {
1417 poll_timer.function = pcic_interrupt_wrapper;
1418 poll_timer.data = 0;
1419 init_timer(&poll_timer);
1420 poll_timer.expires = jiffies + poll_interval;
1421 add_timer(&poll_timer);
1428 static void __exit exit_i82365(void)
1432 for (i = 0; i < sockets; i++) {
1433 pcmcia_unregister_socket(&socket[i].socket);
1435 platform_device_unregister(&i82365_device);
1436 if (poll_interval != 0)
1437 del_timer_sync(&poll_timer);
1439 free_irq(cs_irq, pcic_interrupt);
1440 for (i = 0; i < sockets; i++) {
1441 /* Turn off all interrupt sources! */
1442 i365_set(i, I365_CSCINT, 0);
1443 release_region(socket[i].ioaddr, 2);
1447 pnp_disable_dev(i82365_pnpdev);
1449 driver_unregister(&i82365_driver);
1452 module_init(init_i82365);
1453 module_exit(exit_i82365);
1454 MODULE_LICENSE("Dual MPL/GPL");
1455 /*====================================================================*/