1 /*======================================================================
3 Device driver for the PCMCIA control functionality of PXA2xx
6 The contents of this file may be used under the
7 terms of the GNU Public License version 2 (the "GPL")
9 (c) Ian Molton (spyro@f2s.com) 2003
10 (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
12 derived from sa11xx_base.c
14 Portions created by John G. Dorsey are
15 Copyright (C) 1999 John G. Dorsey.
17 ======================================================================*/
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/config.h>
22 #include <linux/cpufreq.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel.h>
25 #include <linux/spinlock.h>
27 #include <asm/hardware.h>
30 #include <asm/system.h>
32 #include <pcmcia/cs_types.h>
33 #include <pcmcia/ss.h>
34 #include <pcmcia/bulkmem.h>
35 #include <pcmcia/cistpl.h>
37 #include "cs_internal.h"
38 #include "soc_common.h"
39 #include "pxa2xx_base.h"
42 #define MCXX_SETUP_MASK (0x7f)
43 #define MCXX_ASST_MASK (0x1f)
44 #define MCXX_HOLD_MASK (0x3f)
45 #define MCXX_SETUP_SHIFT (0)
46 #define MCXX_ASST_SHIFT (7)
47 #define MCXX_HOLD_SHIFT (14)
49 static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
52 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
53 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
56 static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
59 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
60 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
63 static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
66 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
67 return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
70 /* This function returns the (approximate) command assertion period, in
71 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
73 static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
74 u_int pcmcia_mcxx_asst)
76 return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
79 static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
81 MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
82 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
83 | ((pxa2xx_mcxx_asst(speed, clock)
84 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
85 | ((pxa2xx_mcxx_hold(speed, clock)
86 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
91 static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
93 MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
94 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
95 | ((pxa2xx_mcxx_asst(speed, clock)
96 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
97 | ((pxa2xx_mcxx_hold(speed, clock)
98 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
103 static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
105 MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
106 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
107 | ((pxa2xx_mcxx_asst(speed, clock)
108 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
109 | ((pxa2xx_mcxx_hold(speed, clock)
110 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
115 static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
117 struct soc_pcmcia_timing timing;
120 soc_common_pcmcia_get_timing(skt, &timing);
122 pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
123 pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
124 pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
129 static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
131 unsigned int clk = get_memclk_frequency_10khz();
132 return pxa2xx_pcmcia_set_mcxx(skt, clk);
135 #ifdef CONFIG_CPU_FREQ
138 pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
140 struct cpufreq_freqs *freqs)
142 #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
144 case CPUFREQ_PRECHANGE:
145 if (freqs->new > freqs->old) {
146 debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
148 freqs->new / 1000, (freqs->new / 100) % 10,
149 freqs->old / 1000, (freqs->old / 100) % 10);
150 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
154 case CPUFREQ_POSTCHANGE:
155 if (freqs->new < freqs->old) {
156 debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
158 freqs->new / 1000, (freqs->new / 100) % 10,
159 freqs->old / 1000, (freqs->old / 100) % 10);
160 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
168 int pxa2xx_drv_pcmcia_probe(struct device *dev)
171 struct pcmcia_low_level *ops;
174 if (!dev || !dev->platform_data)
177 ops = (struct pcmcia_low_level *)dev->platform_data;
181 /* Setup GPIOs for PCMCIA/CF alternate function mode.
183 * It would be nice if set_GPIO_mode included support
184 * for driving GPIO outputs to default high/low state
185 * before programming GPIOs as outputs. Setting GPIO
186 * outputs to default high/low state via GPSR/GPCR
187 * before defining them as outputs should reduce
188 * the possibility of glitching outputs during GPIO
189 * setup. This of course assumes external terminators
190 * are present to hold GPIOs in a defined state.
192 * In the meantime, setup default state of GPIO
193 * outputs before we enable them as outputs.
196 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
197 GPIO_bit(GPIO49_nPWE) |
198 GPIO_bit(GPIO50_nPIOR) |
199 GPIO_bit(GPIO51_nPIOW) |
200 GPIO_bit(GPIO52_nPCE_1) |
201 GPIO_bit(GPIO53_nPCE_2);
203 pxa_gpio_mode(GPIO48_nPOE_MD);
204 pxa_gpio_mode(GPIO49_nPWE_MD);
205 pxa_gpio_mode(GPIO50_nPIOR_MD);
206 pxa_gpio_mode(GPIO51_nPIOW_MD);
207 pxa_gpio_mode(GPIO52_nPCE_1_MD);
208 pxa_gpio_mode(GPIO53_nPCE_2_MD);
209 pxa_gpio_mode(GPIO54_pSKTSEL_MD); /* REVISIT: s/b dependent on num sockets */
210 pxa_gpio_mode(GPIO55_nPREG_MD);
211 pxa_gpio_mode(GPIO56_nPWAIT_MD);
212 pxa_gpio_mode(GPIO57_nIOIS16_MD);
214 /* Provide our PXA2xx specific timing routines. */
215 ops->set_timing = pxa2xx_pcmcia_set_timing;
216 #ifdef CONFIG_CPU_FREQ
217 ops->frequency_change = pxa2xx_pcmcia_frequency_change;
220 ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
224 * We have at least one socket, so set MECR:CIT
229 /* Set MECR:NOS (Number Of Sockets) */
238 EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe);
240 static int pxa2xx_drv_pcmcia_suspend(struct device *dev, u32 state, u32 level)
243 if (level == SUSPEND_SAVE_STATE)
244 ret = pcmcia_socket_dev_suspend(dev, state);
248 static int pxa2xx_drv_pcmcia_resume(struct device *dev, u32 level)
251 if (level == RESUME_RESTORE_STATE)
252 ret = pcmcia_socket_dev_resume(dev);
256 static struct device_driver pxa2xx_pcmcia_driver = {
257 .probe = pxa2xx_drv_pcmcia_probe,
258 .remove = soc_common_drv_pcmcia_remove,
259 .suspend = pxa2xx_drv_pcmcia_suspend,
260 .resume = pxa2xx_drv_pcmcia_resume,
261 .name = "pxa2xx-pcmcia",
262 .bus = &platform_bus_type,
265 static int __init pxa2xx_pcmcia_init(void)
267 return driver_register(&pxa2xx_pcmcia_driver);
270 static void __exit pxa2xx_pcmcia_exit(void)
272 driver_unregister(&pxa2xx_pcmcia_driver);
275 module_init(pxa2xx_pcmcia_init);
276 module_exit(pxa2xx_pcmcia_exit);
278 MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
279 MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
280 MODULE_LICENSE("GPL");