1 /* -*- mode: c; c-basic-offset: 8 -*- */
3 /* Driver for 53c700 and 53c700-66 chips from NCR and Symbios
5 * Copyright (C) 2001 by James.Bottomley@HansenPartnership.com
11 #include <linux/interrupt.h>
14 #include <scsi/scsi_device.h>
17 #if defined(CONFIG_53C700_MEM_MAPPED) && defined(CONFIG_53C700_IO_MAPPED)
18 #define CONFIG_53C700_BOTH_MAPPED
21 /* Turn on for general debugging---too verbose for normal use */
23 /* Debug the tag queues, checking hash queue allocation and deallocation
24 * and search for duplicate tags */
25 #undef NCR_700_TAG_DEBUG
28 #define DEBUG(x) printk x
33 /* The number of available command slots */
34 #define NCR_700_COMMAND_SLOTS_PER_HOST 64
35 /* The maximum number of Scatter Gathers we allow */
36 #define NCR_700_SG_SEGMENTS 32
37 /* The maximum number of luns (make this of the form 2^n) */
38 #define NCR_700_MAX_LUNS 32
39 #define NCR_700_LUN_MASK (NCR_700_MAX_LUNS - 1)
40 /* Maximum number of tags the driver ever allows per device */
41 #define NCR_700_MAX_TAGS 16
42 /* Tag depth the driver starts out with (can be altered in sysfs) */
43 #define NCR_700_DEFAULT_TAGS 4
44 /* This is the default number of commands per LUN in the untagged case.
45 * two is a good value because it means we can have one command active and
46 * one command fully prepared and waiting
48 #define NCR_700_CMD_PER_LUN 2
49 /* magic byte identifying an internally generated REQUEST_SENSE command */
50 #define NCR_700_INTERNAL_SENSE_MAGIC 0x42
52 /* WARNING: Leave this in for now: the dependency preprocessor doesn't
53 * pick up file specific flags, so must define here if they are not
55 #if !defined(CONFIG_53C700_IO_MAPPED) && !defined(CONFIG_53C700_MEM_MAPPED)
56 #error "Config.in must define either CONFIG_53C700_IO_MAPPED or CONFIG_53C700_MEM_MAPPED to use this scsi core."
59 struct NCR_700_Host_Parameters;
61 /* These are the externally used routines */
62 struct Scsi_Host *NCR_700_detect(struct scsi_host_template *,
63 struct NCR_700_Host_Parameters *, struct device *,
65 int NCR_700_release(struct Scsi_Host *host);
66 irqreturn_t NCR_700_intr(int, void *, struct pt_regs *);
69 enum NCR_700_Host_State {
74 struct NCR_700_SG_List {
75 /* The following is a script fragment to move the buffer onto the
76 * bus and then link the next fragment or return */
77 #define SCRIPT_MOVE_DATA_IN 0x09000000
78 #define SCRIPT_MOVE_DATA_OUT 0x08000000
81 #define SCRIPT_NOP 0x80000000
82 #define SCRIPT_RETURN 0x90080000
85 /* We use device->hostdata to store negotiated parameters. This is
86 * supposed to be a pointer to a device private area, but we cannot
87 * really use it as such since it will never be freed, so just use the
88 * 32 bits to cram the information. The SYNC negotiation sequence looks
91 * If DEV_NEGOTIATED_SYNC not set, tack and SDTR message on to the
92 * initial identify for the device and set DEV_BEGIN_SYNC_NEGOTATION
93 * If we get an SDTR reply, work out the SXFER parameters, squirrel
94 * them away here, clear DEV_BEGIN_SYNC_NEGOTIATION and set
95 * DEV_NEGOTIATED_SYNC. If we get a REJECT msg, squirrel
98 * 0:7 SXFER_REG negotiated value for this device
99 * 8:15 Current queue depth
100 * 16 negotiated SYNC flag
101 * 17 begin SYNC negotiation flag
102 * 18 device supports tag queueing */
103 #define NCR_700_DEV_NEGOTIATED_SYNC (1<<16)
104 #define NCR_700_DEV_BEGIN_SYNC_NEGOTIATION (1<<17)
105 #define NCR_700_DEV_BEGIN_TAG_QUEUEING (1<<18)
106 #define NCR_700_DEV_PRINT_SYNC_NEGOTIATION (1<<19)
109 NCR_700_set_depth(struct scsi_device *SDp, __u8 depth)
111 long l = (long)SDp->hostdata;
114 l |= 0xff00 & (depth << 8);
115 SDp->hostdata = (void *)l;
118 NCR_700_get_depth(struct scsi_device *SDp)
120 return ((((unsigned long)SDp->hostdata) & 0xff00)>>8);
123 NCR_700_is_flag_set(struct scsi_device *SDp, __u32 flag)
125 return (spi_flags(SDp->sdev_target) & flag) == flag;
128 NCR_700_is_flag_clear(struct scsi_device *SDp, __u32 flag)
130 return (spi_flags(SDp->sdev_target) & flag) == 0;
133 NCR_700_set_flag(struct scsi_device *SDp, __u32 flag)
135 spi_flags(SDp->sdev_target) |= flag;
138 NCR_700_clear_flag(struct scsi_device *SDp, __u32 flag)
140 spi_flags(SDp->sdev_target) &= ~flag;
143 struct NCR_700_command_slot {
144 struct NCR_700_SG_List SG[NCR_700_SG_SEGMENTS+1];
145 struct NCR_700_SG_List *pSG;
146 #define NCR_700_SLOT_MASK 0xFC
147 #define NCR_700_SLOT_MAGIC 0xb8
148 #define NCR_700_SLOT_FREE (0|NCR_700_SLOT_MAGIC) /* slot may be used */
149 #define NCR_700_SLOT_BUSY (1|NCR_700_SLOT_MAGIC) /* slot has command active on HA */
150 #define NCR_700_SLOT_QUEUED (2|NCR_700_SLOT_MAGIC) /* slot has command to be made active on HA */
154 struct scsi_cmnd *cmnd;
155 /* The pci_mapped address of the actual command in cmnd */
158 /* if this command is a pci_single mapping, holds the dma address
159 * for later unmapping in the done routine */
160 dma_addr_t dma_handle;
161 /* historical remnant, now used to link free commands */
162 struct NCR_700_command_slot *ITL_forw;
165 struct NCR_700_Host_Parameters {
166 /* These must be filled in by the calling driver */
167 int clock; /* board clock speed in MHz */
168 unsigned long base; /* the base for the port (copied to host) */
170 __u32 dmode_extra; /* adjustable bus settings */
171 __u32 differential:1; /* if we are differential */
172 #ifdef CONFIG_53C700_LE_ON_BE
173 /* This option is for HP only. Set it if your chip is wired for
174 * little endian on this platform (which is big endian) */
175 __u32 force_le_on_be:1;
177 __u32 chip710:1; /* set if really a 710 not 700 */
178 __u32 burst_disable:1; /* set to 1 to disable 710 bursting */
180 /* NOTHING BELOW HERE NEEDS ALTERING */
181 __u32 fast:1; /* if we can alter the SCSI bus clock
182 speed (so can negiotiate sync) */
183 #ifdef CONFIG_53C700_BOTH_MAPPED
184 __u32 mem_mapped; /* set if memory mapped */
186 int sync_clock; /* The speed of the SYNC core */
188 __u32 *script; /* pointer to script location */
189 __u32 pScript; /* physical mem addr of script */
191 enum NCR_700_Host_State state; /* protected by state lock */
192 struct scsi_cmnd *cmd;
193 /* Note: pScript contains the single consistent block of
194 * memory. All the msgin, msgout and status are allocated in
195 * this memory too (at separate cache lines). TOTAL_MEM_SIZE
196 * represents the total size of this area */
197 #define MSG_ARRAY_SIZE 8
198 #define MSGOUT_OFFSET (L1_CACHE_ALIGN(sizeof(SCRIPT)))
200 #define MSGIN_OFFSET (MSGOUT_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE))
202 #define STATUS_OFFSET (MSGIN_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE))
204 #define SLOTS_OFFSET (STATUS_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE))
205 struct NCR_700_command_slot *slots;
206 #define TOTAL_MEM_SIZE (SLOTS_OFFSET + L1_CACHE_ALIGN(sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST))
207 int saved_slot_position;
208 int command_slot_count; /* protected by state lock */
214 /* Free list, singly linked by ITL_forw elements */
215 struct NCR_700_command_slot *free_list;
216 /* Completion for waited for ops, like reset, abort or
219 * NOTE: relies on single threading in the error handler to
220 * have only one outstanding at once */
221 struct completion *eh_complete;
225 * 53C700 Register Interface - the offset from the Selected base
227 #ifdef CONFIG_53C700_LE_ON_BE
228 #define bE (hostdata->force_le_on_be ? 0 : 3)
229 #define bSWAP (hostdata->force_le_on_be)
230 #elif defined(__BIG_ENDIAN)
233 #elif defined(__LITTLE_ENDIAN)
237 #error "__BIG_ENDIAN or __LITTLE_ENDIAN must be defined, did you include byteorder.h?"
239 #define bS_to_cpu(x) (bSWAP ? le32_to_cpu(x) : (x))
240 #define bS_to_host(x) (bSWAP ? cpu_to_le32(x) : (x))
242 /* NOTE: These registers are in the LE register space only, the required byte
243 * swapping is done by the NCR_700_{read|write}[b] functions */
244 #define SCNTL0_REG 0x00
245 #define FULL_ARBITRATION 0xc0
247 #define ENABLE_PARITY 0x04
248 #define AUTO_ATN 0x02
249 #define SCNTL1_REG 0x01
250 #define SLOW_BUS 0x80
251 #define ENABLE_SELECT 0x20
252 #define ASSERT_RST 0x08
253 #define ASSERT_EVEN_PARITY 0x04
254 #define SDID_REG 0x02
255 #define SIEN_REG 0x03
256 #define PHASE_MM_INT 0x80
257 #define FUNC_COMP_INT 0x40
258 #define SEL_TIMEOUT_INT 0x20
259 #define SELECT_INT 0x10
260 #define GROSS_ERR_INT 0x08
261 #define UX_DISC_INT 0x04
263 #define PAR_ERR_INT 0x01
264 #define SCID_REG 0x04
265 #define SXFER_REG 0x05
266 #define ASYNC_OPERATION 0x00
267 #define SODL_REG 0x06
268 #define SOCL_REG 0x07
269 #define SFBR_REG 0x08
270 #define SIDL_REG 0x09
271 #define SBDL_REG 0x0A
272 #define SBCL_REG 0x0B
276 #define SYNC_DIV_AS_ASYNC 0x00
277 #define SYNC_DIV_1_0 0x01
278 #define SYNC_DIV_1_5 0x02
279 #define SYNC_DIV_2_0 0x03
280 #define DSTAT_REG 0x0C
281 #define ILGL_INST_DETECTED 0x01
282 #define WATCH_DOG_INTERRUPT 0x02
283 #define SCRIPT_INT_RECEIVED 0x04
285 #define SSTAT0_REG 0x0D
286 #define PARITY_ERROR 0x01
287 #define SCSI_RESET_DETECTED 0x02
288 #define UNEXPECTED_DISCONNECT 0x04
289 #define SCSI_GROSS_ERROR 0x08
290 #define SELECTED 0x10
291 #define SELECTION_TIMEOUT 0x20
292 #define FUNCTION_COMPLETE 0x40
293 #define PHASE_MISMATCH 0x80
294 #define SSTAT1_REG 0x0E
295 #define SIDL_REG_FULL 0x80
296 #define SODR_REG_FULL 0x40
297 #define SODL_REG_FULL 0x20
298 #define SSTAT2_REG 0x0F
299 #define CTEST0_REG 0x14
300 #define BTB_TIMER_DISABLE 0x40
301 #define CTEST1_REG 0x15
302 #define CTEST2_REG 0x16
303 #define CTEST3_REG 0x17
304 #define CTEST4_REG 0x18
305 #define DISABLE_FIFO 0x00
308 #define BYTE_LANE0 0x04
309 #define BYTE_LANE1 0x05
310 #define BYTE_LANE2 0x06
311 #define BYTE_LANE3 0x07
312 #define SCSI_ZMODE 0x20
314 #define CTEST5_REG 0x19
315 #define MASTER_CONTROL 0x10
316 #define DMA_DIRECTION 0x08
317 #define CTEST7_REG 0x1B
318 #define BURST_DISABLE 0x80 /* 710 only */
319 #define SEL_TIMEOUT_DISABLE 0x10 /* 710 only */
323 #define CTEST6_REG 0x1A
324 #define TEMP_REG 0x1C
325 #define DFIFO_REG 0x20
326 #define FLUSH_DMA_FIFO 0x80
327 #define CLR_FIFO 0x40
328 #define ISTAT_REG 0x21
329 #define ABORT_OPERATION 0x80
330 #define SOFTWARE_RESET_710 0x40
331 #define DMA_INT_PENDING 0x01
332 #define SCSI_INT_PENDING 0x02
333 #define CONNECTED 0x08
334 #define CTEST8_REG 0x22
335 #define LAST_DIS_ENBL 0x01
336 #define SHORTEN_FILTERING 0x04
337 #define ENABLE_ACTIVE_NEGATION 0x10
338 #define GENERATE_RECEIVE_PARITY 0x20
339 #define CLR_FIFO_710 0x04
340 #define FLUSH_DMA_FIFO_710 0x08
341 #define CTEST9_REG 0x23
343 #define DCMD_REG 0x27
344 #define DNAD_REG 0x28
345 #define DIEN_REG 0x39
346 #define BUS_FAULT 0x20
347 #define ABORT_INT 0x10
348 #define INT_INST_INT 0x04
350 #define ILGL_INST_INT 0x01
351 #define DCNTL_REG 0x3B
352 #define SOFTWARE_RESET 0x01
353 #define COMPAT_700_MODE 0x01
354 #define SCRPTS_16BITS 0x20
355 #define ASYNC_DIV_2_0 0x00
356 #define ASYNC_DIV_1_5 0x40
357 #define ASYNC_DIV_1_0 0x80
358 #define ASYNC_DIV_3_0 0xc0
359 #define DMODE_710_REG 0x38
360 #define DMODE_700_REG 0x34
361 #define BURST_LENGTH_1 0x00
362 #define BURST_LENGTH_2 0x40
363 #define BURST_LENGTH_4 0x80
364 #define BURST_LENGTH_8 0xC0
365 #define DMODE_FC1 0x10
366 #define DMODE_FC2 0x20
373 #define DSPS_REG 0x30
375 /* Parameters to begin SDTR negotiations. Empirically, I find that
376 * the 53c700-66 cannot handle an offset >8, so don't change this */
377 #define NCR_700_MAX_OFFSET 8
378 /* Was hoping the max offset would be greater for the 710, but
379 * empirically it seems to be 8 also */
380 #define NCR_710_MAX_OFFSET 8
381 #define NCR_700_MIN_XFERP 1
382 #define NCR_710_MIN_XFERP 0
383 #define NCR_700_MIN_PERIOD 25 /* for SDTR message, 100ns */
385 #define script_patch_32(script, symbol, value) \
388 for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
389 __u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]) + value; \
390 (script)[A_##symbol##_used[i]] = bS_to_host(val); \
391 dma_cache_sync(&(script)[A_##symbol##_used[i]], 4, DMA_TO_DEVICE); \
392 DEBUG((" script, patching %s at %d to 0x%lx\n", \
393 #symbol, A_##symbol##_used[i], (value))); \
397 #define script_patch_32_abs(script, symbol, value) \
400 for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
401 (script)[A_##symbol##_used[i]] = bS_to_host(value); \
402 dma_cache_sync(&(script)[A_##symbol##_used[i]], 4, DMA_TO_DEVICE); \
403 DEBUG((" script, patching %s at %d to 0x%lx\n", \
404 #symbol, A_##symbol##_used[i], (value))); \
408 /* Used for patching the SCSI ID in the SELECT instruction */
409 #define script_patch_ID(script, symbol, value) \
412 for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
413 __u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]); \
415 val |= ((value) & 0xff) << 16; \
416 (script)[A_##symbol##_used[i]] = bS_to_host(val); \
417 dma_cache_sync(&(script)[A_##symbol##_used[i]], 4, DMA_TO_DEVICE); \
418 DEBUG((" script, patching ID field %s at %d to 0x%x\n", \
419 #symbol, A_##symbol##_used[i], val)); \
423 #define script_patch_16(script, symbol, value) \
426 for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
427 __u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]); \
429 val |= ((value) & 0xffff); \
430 (script)[A_##symbol##_used[i]] = bS_to_host(val); \
431 dma_cache_sync(&(script)[A_##symbol##_used[i]], 4, DMA_TO_DEVICE); \
432 DEBUG((" script, patching short field %s at %d to 0x%x\n", \
433 #symbol, A_##symbol##_used[i], val)); \
439 NCR_700_mem_readb(struct Scsi_Host *host, __u32 reg)
441 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
442 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
444 return readb(host->base + (reg^bE));
448 NCR_700_mem_readl(struct Scsi_Host *host, __u32 reg)
450 __u32 value = __raw_readl(host->base + reg);
451 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
452 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
454 /* sanity check the register */
459 return bS_to_cpu(value);
463 NCR_700_mem_writeb(__u8 value, struct Scsi_Host *host, __u32 reg)
465 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
466 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
468 writeb(value, host->base + (reg^bE));
472 NCR_700_mem_writel(__u32 value, struct Scsi_Host *host, __u32 reg)
474 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
475 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
478 /* sanity check the register */
483 __raw_writel(bS_to_host(value), host->base + reg);
487 NCR_700_io_readb(struct Scsi_Host *host, __u32 reg)
489 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
490 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
492 return inb(host->base + (reg^bE));
496 NCR_700_io_readl(struct Scsi_Host *host, __u32 reg)
498 __u32 value = inl(host->base + reg);
499 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
500 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
503 /* sanity check the register */
508 return bS_to_cpu(value);
512 NCR_700_io_writeb(__u8 value, struct Scsi_Host *host, __u32 reg)
514 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
515 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
517 outb(value, host->base + (reg^bE));
521 NCR_700_io_writel(__u32 value, struct Scsi_Host *host, __u32 reg)
523 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
524 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
527 /* sanity check the register */
532 outl(bS_to_host(value), host->base + reg);
535 #ifdef CONFIG_53C700_BOTH_MAPPED
538 NCR_700_readb(struct Scsi_Host *host, __u32 reg)
542 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
543 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
545 if(hostdata->mem_mapped)
546 val = NCR_700_mem_readb(host, reg);
548 val = NCR_700_io_readb(host, reg);
554 NCR_700_readl(struct Scsi_Host *host, __u32 reg)
558 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
559 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
561 if(hostdata->mem_mapped)
562 val = NCR_700_mem_readl(host, reg);
564 val = NCR_700_io_readl(host, reg);
570 NCR_700_writeb(__u8 value, struct Scsi_Host *host, __u32 reg)
572 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
573 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
575 if(hostdata->mem_mapped)
576 NCR_700_mem_writeb(value, host, reg);
578 NCR_700_io_writeb(value, host, reg);
582 NCR_700_writel(__u32 value, struct Scsi_Host *host, __u32 reg)
584 const struct NCR_700_Host_Parameters *hostdata __attribute__((unused))
585 = (struct NCR_700_Host_Parameters *)host->hostdata[0];
587 if(hostdata->mem_mapped)
588 NCR_700_mem_writel(value, host, reg);
590 NCR_700_io_writel(value, host, reg);
594 NCR_700_set_mem_mapped(struct NCR_700_Host_Parameters *hostdata)
596 hostdata->mem_mapped = 1;
600 NCR_700_set_io_mapped(struct NCR_700_Host_Parameters *hostdata)
602 hostdata->mem_mapped = 0;
606 #elif defined(CONFIG_53C700_IO_MAPPED)
608 #define NCR_700_readb NCR_700_io_readb
609 #define NCR_700_readl NCR_700_io_readl
610 #define NCR_700_writeb NCR_700_io_writeb
611 #define NCR_700_writel NCR_700_io_writel
613 #define NCR_700_set_io_mapped(x)
614 #define NCR_700_set_mem_mapped(x) error I/O mapped only
616 #elif defined(CONFIG_53C700_MEM_MAPPED)
618 #define NCR_700_readb NCR_700_mem_readb
619 #define NCR_700_readl NCR_700_mem_readl
620 #define NCR_700_writeb NCR_700_mem_writeb
621 #define NCR_700_writel NCR_700_mem_writel
623 #define NCR_700_set_io_mapped(x) error MEM mapped only
624 #define NCR_700_set_mem_mapped(x)
627 #error neither CONFIG_53C700_MEM_MAPPED nor CONFIG_53C700_IO_MAPPED is set