2 * sata_nv.c - NVIDIA nForce SATA
4 * Copyright 2004 NVIDIA Corp. All rights reserved.
5 * Copyright 2004 Andrew Chew
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
26 * No hardware documentation available outside of NVIDIA.
27 * This driver programs the NVIDIA SATA controller in a similar
28 * fashion as with other PCI IDE BMDMA controllers, with a few
29 * NV-specific details such as register offsets, SATA phy location,
33 * - Fixed spurious interrupts issue seen with the Maxtor 6H500F0 500GB
34 * drive. Also made the check_hotplug() callbacks return whether there
35 * was a hotplug interrupt or not. This was not the source of the
36 * spurious interrupts, but is the right thing to do anyway.
39 * - Fixed bug introduced by 0.08's MCP51 and MCP55 support.
42 * - Added support for MCP51 and MCP55.
45 * - Added support for RAID class code.
48 * - Added generic SATA support by using a pci_device_id that filters on
49 * the IDE storage class code.
52 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
53 * mmio_base, which is only set for the CK804/MCP04 case.
56 * - Added support for CK804 SATA controller.
62 #include <linux/config.h>
63 #include <linux/kernel.h>
64 #include <linux/module.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #include <linux/blkdev.h>
68 #include <linux/delay.h>
69 #include <linux/interrupt.h>
70 #include <linux/device.h>
71 #include <scsi/scsi_host.h>
72 #include <linux/libata.h>
74 #define DRV_NAME "sata_nv"
75 #define DRV_VERSION "0.8"
78 #define NV_PIO_MASK 0x1f
79 #define NV_MWDMA_MASK 0x07
80 #define NV_UDMA_MASK 0x7f
81 #define NV_PORT0_SCR_REG_OFFSET 0x00
82 #define NV_PORT1_SCR_REG_OFFSET 0x40
84 #define NV_INT_STATUS 0x10
85 #define NV_INT_STATUS_CK804 0x440
86 #define NV_INT_STATUS_PDEV_INT 0x01
87 #define NV_INT_STATUS_PDEV_PM 0x02
88 #define NV_INT_STATUS_PDEV_ADDED 0x04
89 #define NV_INT_STATUS_PDEV_REMOVED 0x08
90 #define NV_INT_STATUS_SDEV_INT 0x10
91 #define NV_INT_STATUS_SDEV_PM 0x20
92 #define NV_INT_STATUS_SDEV_ADDED 0x40
93 #define NV_INT_STATUS_SDEV_REMOVED 0x80
94 #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
95 NV_INT_STATUS_PDEV_REMOVED)
96 #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
97 NV_INT_STATUS_SDEV_REMOVED)
98 #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
99 NV_INT_STATUS_SDEV_HOTPLUG)
101 #define NV_INT_ENABLE 0x11
102 #define NV_INT_ENABLE_CK804 0x441
103 #define NV_INT_ENABLE_PDEV_MASK 0x01
104 #define NV_INT_ENABLE_PDEV_PM 0x02
105 #define NV_INT_ENABLE_PDEV_ADDED 0x04
106 #define NV_INT_ENABLE_PDEV_REMOVED 0x08
107 #define NV_INT_ENABLE_SDEV_MASK 0x10
108 #define NV_INT_ENABLE_SDEV_PM 0x20
109 #define NV_INT_ENABLE_SDEV_ADDED 0x40
110 #define NV_INT_ENABLE_SDEV_REMOVED 0x80
111 #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
112 NV_INT_ENABLE_PDEV_REMOVED)
113 #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
114 NV_INT_ENABLE_SDEV_REMOVED)
115 #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
116 NV_INT_ENABLE_SDEV_HOTPLUG)
118 #define NV_INT_CONFIG 0x12
119 #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
121 // For PCI config register 20
122 #define NV_MCP_SATA_CFG_20 0x50
123 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
125 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
126 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
127 struct pt_regs *regs);
128 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
129 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
130 static void nv_host_stop (struct ata_host_set *host_set);
131 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
132 static void nv_disable_hotplug(struct ata_host_set *host_set);
133 static int nv_check_hotplug(struct ata_host_set *host_set);
134 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
135 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
136 static int nv_check_hotplug_ck804(struct ata_host_set *host_set);
146 static const struct pci_device_id nv_pci_tbl[] = {
147 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
148 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
149 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
151 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
161 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
163 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
164 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
165 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
166 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
167 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2,
168 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
169 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA,
170 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
171 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2,
172 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
173 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3,
174 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
175 { PCI_VENDOR_ID_NVIDIA, 0x045c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
176 { PCI_VENDOR_ID_NVIDIA, 0x045d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
177 { PCI_VENDOR_ID_NVIDIA, 0x045e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
178 { PCI_VENDOR_ID_NVIDIA, 0x045f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
179 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
180 PCI_ANY_ID, PCI_ANY_ID,
181 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
182 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
183 PCI_ANY_ID, PCI_ANY_ID,
184 PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC },
185 { 0, } /* terminate list */
188 #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
192 enum nv_host_type host_type;
193 void (*enable_hotplug)(struct ata_probe_ent *probe_ent);
194 void (*disable_hotplug)(struct ata_host_set *host_set);
195 int (*check_hotplug)(struct ata_host_set *host_set);
198 static struct nv_host_desc nv_device_tbl[] = {
200 .host_type = GENERIC,
201 .enable_hotplug = NULL,
202 .disable_hotplug= NULL,
203 .check_hotplug = NULL,
206 .host_type = NFORCE2,
207 .enable_hotplug = nv_enable_hotplug,
208 .disable_hotplug= nv_disable_hotplug,
209 .check_hotplug = nv_check_hotplug,
212 .host_type = NFORCE3,
213 .enable_hotplug = nv_enable_hotplug,
214 .disable_hotplug= nv_disable_hotplug,
215 .check_hotplug = nv_check_hotplug,
217 { .host_type = CK804,
218 .enable_hotplug = nv_enable_hotplug_ck804,
219 .disable_hotplug= nv_disable_hotplug_ck804,
220 .check_hotplug = nv_check_hotplug_ck804,
226 struct nv_host_desc *host_desc;
227 unsigned long host_flags;
230 static struct pci_driver nv_pci_driver = {
232 .id_table = nv_pci_tbl,
233 .probe = nv_init_one,
234 .remove = ata_pci_remove_one,
237 static struct scsi_host_template nv_sht = {
238 .module = THIS_MODULE,
240 .ioctl = ata_scsi_ioctl,
241 .queuecommand = ata_scsi_queuecmd,
242 .eh_strategy_handler = ata_scsi_error,
243 .can_queue = ATA_DEF_QUEUE,
244 .this_id = ATA_SHT_THIS_ID,
245 .sg_tablesize = LIBATA_MAX_PRD,
246 .max_sectors = ATA_MAX_SECTORS,
247 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
248 .emulated = ATA_SHT_EMULATED,
249 .use_clustering = ATA_SHT_USE_CLUSTERING,
250 .proc_name = DRV_NAME,
251 .dma_boundary = ATA_DMA_BOUNDARY,
252 .slave_configure = ata_scsi_slave_config,
253 .bios_param = ata_std_bios_param,
256 static const struct ata_port_operations nv_ops = {
257 .port_disable = ata_port_disable,
258 .tf_load = ata_tf_load,
259 .tf_read = ata_tf_read,
260 .exec_command = ata_exec_command,
261 .check_status = ata_check_status,
262 .dev_select = ata_std_dev_select,
263 .phy_reset = sata_phy_reset,
264 .bmdma_setup = ata_bmdma_setup,
265 .bmdma_start = ata_bmdma_start,
266 .bmdma_stop = ata_bmdma_stop,
267 .bmdma_status = ata_bmdma_status,
268 .qc_prep = ata_qc_prep,
269 .qc_issue = ata_qc_issue_prot,
270 .eng_timeout = ata_eng_timeout,
271 .irq_handler = nv_interrupt,
272 .irq_clear = ata_bmdma_irq_clear,
273 .scr_read = nv_scr_read,
274 .scr_write = nv_scr_write,
275 .port_start = ata_port_start,
276 .port_stop = ata_port_stop,
277 .host_stop = nv_host_stop,
280 /* FIXME: The hardware provides the necessary SATA PHY controls
281 * to support ATA_FLAG_SATA_RESET. However, it is currently
282 * necessary to disable that flag, to solve misdetection problems.
283 * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
285 * This problem really needs to be investigated further. But in the
286 * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
288 static struct ata_port_info nv_port_info = {
290 .host_flags = ATA_FLAG_SATA |
291 /* ATA_FLAG_SATA_RESET | */
294 .pio_mask = NV_PIO_MASK,
295 .mwdma_mask = NV_MWDMA_MASK,
296 .udma_mask = NV_UDMA_MASK,
300 MODULE_AUTHOR("NVIDIA");
301 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
302 MODULE_LICENSE("GPL");
303 MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
304 MODULE_VERSION(DRV_VERSION);
306 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
307 struct pt_regs *regs)
309 struct ata_host_set *host_set = dev_instance;
310 struct nv_host *host = host_set->private_data;
312 unsigned int handled = 0;
315 spin_lock_irqsave(&host_set->lock, flags);
317 for (i = 0; i < host_set->n_ports; i++) {
320 ap = host_set->ports[i];
322 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
323 struct ata_queued_cmd *qc;
325 qc = ata_qc_from_tag(ap, ap->active_tag);
326 if (qc && (!(qc->tf.ctl & ATA_NIEN)))
327 handled += ata_host_intr(ap, qc);
329 // No request pending? Clear interrupt status
330 // anyway, in case there's one pending.
331 ap->ops->check_status(ap);
336 if (host->host_desc->check_hotplug)
337 handled += host->host_desc->check_hotplug(host_set);
339 spin_unlock_irqrestore(&host_set->lock, flags);
341 return IRQ_RETVAL(handled);
344 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
346 struct ata_host_set *host_set = ap->host_set;
347 struct nv_host *host = host_set->private_data;
349 if (sc_reg > SCR_CONTROL)
352 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
353 return readl((void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
355 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
358 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
360 struct ata_host_set *host_set = ap->host_set;
361 struct nv_host *host = host_set->private_data;
363 if (sc_reg > SCR_CONTROL)
366 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
367 writel(val, (void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
369 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
372 static void nv_host_stop (struct ata_host_set *host_set)
374 struct nv_host *host = host_set->private_data;
375 struct pci_dev *pdev = to_pci_dev(host_set->dev);
377 // Disable hotplug event interrupts.
378 if (host->host_desc->disable_hotplug)
379 host->host_desc->disable_hotplug(host_set);
383 if (host_set->mmio_base)
384 pci_iounmap(pdev, host_set->mmio_base);
387 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
389 static int printed_version = 0;
390 struct nv_host *host;
391 struct ata_port_info *ppi;
392 struct ata_probe_ent *probe_ent;
393 int pci_dev_busy = 0;
397 // Make sure this is a SATA controller by counting the number of bars
398 // (NVIDIA SATA controllers will always have six bars). Otherwise,
399 // it's an IDE controller and we ignore it.
400 for (bar=0; bar<6; bar++)
401 if (pci_resource_start(pdev, bar) == 0)
404 if (!printed_version++)
405 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
407 rc = pci_enable_device(pdev);
411 rc = pci_request_regions(pdev, DRV_NAME);
414 goto err_out_disable;
417 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
419 goto err_out_regions;
420 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
422 goto err_out_regions;
427 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
429 goto err_out_regions;
431 host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
433 goto err_out_free_ent;
435 memset(host, 0, sizeof(struct nv_host));
436 host->host_desc = &nv_device_tbl[ent->driver_data];
438 probe_ent->private_data = host;
440 if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
441 host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
443 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
446 probe_ent->mmio_base = pci_iomap(pdev, 5, 0);
447 if (probe_ent->mmio_base == NULL) {
449 goto err_out_free_host;
452 base = (unsigned long)probe_ent->mmio_base;
454 probe_ent->port[0].scr_addr =
455 base + NV_PORT0_SCR_REG_OFFSET;
456 probe_ent->port[1].scr_addr =
457 base + NV_PORT1_SCR_REG_OFFSET;
460 probe_ent->port[0].scr_addr =
461 pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
462 probe_ent->port[1].scr_addr =
463 pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
466 pci_set_master(pdev);
468 rc = ata_device_add(probe_ent);
470 goto err_out_iounmap;
472 // Enable hotplug event interrupts.
473 if (host->host_desc->enable_hotplug)
474 host->host_desc->enable_hotplug(probe_ent);
481 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
482 pci_iounmap(pdev, probe_ent->mmio_base);
488 pci_release_regions(pdev);
491 pci_disable_device(pdev);
496 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
500 outb(NV_INT_STATUS_HOTPLUG,
501 probe_ent->port[0].scr_addr + NV_INT_STATUS);
503 intr_mask = inb(probe_ent->port[0].scr_addr + NV_INT_ENABLE);
504 intr_mask |= NV_INT_ENABLE_HOTPLUG;
506 outb(intr_mask, probe_ent->port[0].scr_addr + NV_INT_ENABLE);
509 static void nv_disable_hotplug(struct ata_host_set *host_set)
513 intr_mask = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
515 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
517 outb(intr_mask, host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
520 static int nv_check_hotplug(struct ata_host_set *host_set)
524 intr_status = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
526 // Clear interrupt status.
527 outb(0xff, host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
529 if (intr_status & NV_INT_STATUS_HOTPLUG) {
530 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
531 printk(KERN_WARNING "nv_sata: "
532 "Primary device added\n");
534 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
535 printk(KERN_WARNING "nv_sata: "
536 "Primary device removed\n");
538 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
539 printk(KERN_WARNING "nv_sata: "
540 "Secondary device added\n");
542 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
543 printk(KERN_WARNING "nv_sata: "
544 "Secondary device removed\n");
552 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
554 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
558 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, ®val);
559 regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
560 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
562 writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
564 intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
565 intr_mask |= NV_INT_ENABLE_HOTPLUG;
567 writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
570 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
572 struct pci_dev *pdev = to_pci_dev(host_set->dev);
576 intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
578 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
580 writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
582 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, ®val);
583 regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
584 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
587 static int nv_check_hotplug_ck804(struct ata_host_set *host_set)
591 intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
593 // Clear interrupt status.
594 writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
596 if (intr_status & NV_INT_STATUS_HOTPLUG) {
597 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
598 printk(KERN_WARNING "nv_sata: "
599 "Primary device added\n");
601 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
602 printk(KERN_WARNING "nv_sata: "
603 "Primary device removed\n");
605 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
606 printk(KERN_WARNING "nv_sata: "
607 "Secondary device added\n");
609 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
610 printk(KERN_WARNING "nv_sata: "
611 "Secondary device removed\n");
619 static int __init nv_init(void)
621 return pci_module_init(&nv_pci_driver);
624 static void __exit nv_exit(void)
626 pci_unregister_driver(&nv_pci_driver);
629 module_init(nv_init);
630 module_exit(nv_exit);