2 * sata_svw.c - ServerWorks / Apple K2 SATA
4 * Maintained by: Benjamin Herrenschmidt <benh@kernel.crashing.org> and
5 * Jeff Garzik <jgarzik@pobox.com>
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
11 * Bits from Jeff Garzik, Copyright RedHat, Inc.
13 * This driver probably works with non-Apple versions of the
16 * The contents of this file are subject to the Open
17 * Software License version 1.1 that can be found at
18 * http://www.opensource.org/licenses/osl-1.1.txt and is included herein
21 * Alternatively, the contents of this file may be used under the terms
22 * of the GNU General Public License version 2 (the "GPL") as distributed
23 * in the kernel source COPYING file, in which case the provisions of
24 * the GPL are applicable instead of the above. If you wish to allow
25 * the use of your version of this file only under the terms of the
26 * GPL and not to allow others to use your version of this file under
27 * the OSL, indicate your decision by deleting the provisions above and
28 * replace them with the notice and other provisions required by the GPL.
29 * If you do not delete the provisions above, a recipient may use your
30 * version of this file under either the OSL or the GPL.
34 #include <linux/config.h>
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/blkdev.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
44 #include <linux/libata.h>
48 #include <asm/pci-bridge.h>
49 #endif /* CONFIG_PPC_OF */
51 #define DRV_NAME "sata_svw"
52 #define DRV_VERSION "1.04"
54 /* Taskfile registers offsets */
55 #define K2_SATA_TF_CMD_OFFSET 0x00
56 #define K2_SATA_TF_DATA_OFFSET 0x00
57 #define K2_SATA_TF_ERROR_OFFSET 0x04
58 #define K2_SATA_TF_NSECT_OFFSET 0x08
59 #define K2_SATA_TF_LBAL_OFFSET 0x0c
60 #define K2_SATA_TF_LBAM_OFFSET 0x10
61 #define K2_SATA_TF_LBAH_OFFSET 0x14
62 #define K2_SATA_TF_DEVICE_OFFSET 0x18
63 #define K2_SATA_TF_CMDSTAT_OFFSET 0x1c
64 #define K2_SATA_TF_CTL_OFFSET 0x20
67 #define K2_SATA_DMA_CMD_OFFSET 0x30
70 #define K2_SATA_SCR_STATUS_OFFSET 0x40
71 #define K2_SATA_SCR_ERROR_OFFSET 0x44
72 #define K2_SATA_SCR_CONTROL_OFFSET 0x48
75 #define K2_SATA_SICR1_OFFSET 0x80
76 #define K2_SATA_SICR2_OFFSET 0x84
77 #define K2_SATA_SIM_OFFSET 0x88
80 #define K2_SATA_PORT_OFFSET 0x100
83 static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
85 if (sc_reg > SCR_CONTROL)
87 return readl((void *) ap->ioaddr.scr_addr + (sc_reg * 4));
91 static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
94 if (sc_reg > SCR_CONTROL)
96 writel(val, (void *) ap->ioaddr.scr_addr + (sc_reg * 4));
100 static void k2_sata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
102 struct ata_ioports *ioaddr = &ap->ioaddr;
103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
105 if (tf->ctl != ap->last_ctl) {
106 writeb(tf->ctl, ioaddr->ctl_addr);
107 ap->last_ctl = tf->ctl;
110 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
111 writew(tf->feature | (((u16)tf->hob_feature) << 8), ioaddr->feature_addr);
112 writew(tf->nsect | (((u16)tf->hob_nsect) << 8), ioaddr->nsect_addr);
113 writew(tf->lbal | (((u16)tf->hob_lbal) << 8), ioaddr->lbal_addr);
114 writew(tf->lbam | (((u16)tf->hob_lbam) << 8), ioaddr->lbam_addr);
115 writew(tf->lbah | (((u16)tf->hob_lbah) << 8), ioaddr->lbah_addr);
116 } else if (is_addr) {
117 writew(tf->feature, ioaddr->feature_addr);
118 writew(tf->nsect, ioaddr->nsect_addr);
119 writew(tf->lbal, ioaddr->lbal_addr);
120 writew(tf->lbam, ioaddr->lbam_addr);
121 writew(tf->lbah, ioaddr->lbah_addr);
124 if (tf->flags & ATA_TFLAG_DEVICE)
125 writeb(tf->device, ioaddr->device_addr);
131 static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
133 struct ata_ioports *ioaddr = &ap->ioaddr;
134 u16 nsect, lbal, lbam, lbah;
136 nsect = tf->nsect = readw(ioaddr->nsect_addr);
137 lbal = tf->lbal = readw(ioaddr->lbal_addr);
138 lbam = tf->lbam = readw(ioaddr->lbam_addr);
139 lbah = tf->lbah = readw(ioaddr->lbah_addr);
140 tf->device = readw(ioaddr->device_addr);
142 if (tf->flags & ATA_TFLAG_LBA48) {
143 tf->hob_feature = readw(ioaddr->error_addr) >> 8;
144 tf->hob_nsect = nsect >> 8;
145 tf->hob_lbal = lbal >> 8;
146 tf->hob_lbam = lbam >> 8;
147 tf->hob_lbah = lbah >> 8;
152 static u8 k2_stat_check_status(struct ata_port *ap)
154 return readl((void *) ap->ioaddr.status_addr);
160 * inout : decides on the direction of the dataflow and the meaning of the
162 * buffer: If inout==FALSE data is being written to it else read from it
163 * *start: If inout==FALSE start of the valid data in the buffer
164 * offset: If inout==FALSE offset from the beginning of the imaginary file
165 * from which we start writing into the buffer
166 * length: If inout==FALSE max number of bytes to be written into the buffer
167 * else number of bytes in the buffer
169 static int k2_sata_proc_info(struct Scsi_Host *shost, char *page, char **start,
170 off_t offset, int count, int inout)
173 struct device_node *np;
176 /* Find the ata_port */
177 ap = (struct ata_port *) &shost->hostdata[0];
181 /* Find the OF node for the PCI device proper */
182 np = pci_device_to_OF_node(ap->host_set->pdev);
186 /* Match it to a port node */
187 index = (ap == ap->host_set->ports[0]) ? 0 : 1;
188 for (np = np->child; np != NULL; np = np->sibling) {
189 u32 *reg = (u32 *)get_property(np, "reg", NULL);
198 len = sprintf(page, "devspec: %s\n", np->full_name);
202 #endif /* CONFIG_PPC_OF */
205 static Scsi_Host_Template k2_sata_sht = {
206 .module = THIS_MODULE,
208 .queuecommand = ata_scsi_queuecmd,
209 .eh_strategy_handler = ata_scsi_error,
210 .can_queue = ATA_DEF_QUEUE,
211 .this_id = ATA_SHT_THIS_ID,
212 .sg_tablesize = LIBATA_MAX_PRD,
213 .max_sectors = ATA_MAX_SECTORS,
214 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
215 .emulated = ATA_SHT_EMULATED,
216 .use_clustering = ATA_SHT_USE_CLUSTERING,
217 .proc_name = DRV_NAME,
218 .dma_boundary = ATA_DMA_BOUNDARY,
219 .slave_configure = ata_scsi_slave_config,
221 .proc_info = k2_sata_proc_info,
223 .bios_param = ata_std_bios_param,
227 static struct ata_port_operations k2_sata_ops = {
228 .port_disable = ata_port_disable,
229 .tf_load = k2_sata_tf_load,
230 .tf_read = k2_sata_tf_read,
231 .check_status = k2_stat_check_status,
232 .exec_command = ata_exec_command_mmio,
233 .phy_reset = sata_phy_reset,
234 .bmdma_setup = ata_bmdma_setup_mmio,
235 .bmdma_start = ata_bmdma_start_mmio,
236 .fill_sg = ata_fill_sg,
237 .eng_timeout = ata_eng_timeout,
238 .irq_handler = ata_interrupt,
239 .scr_read = k2_sata_scr_read,
240 .scr_write = k2_sata_scr_write,
241 .port_start = ata_port_start,
242 .port_stop = ata_port_stop,
245 static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
247 port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET;
248 port->data_addr = base + K2_SATA_TF_DATA_OFFSET;
250 port->error_addr = base + K2_SATA_TF_ERROR_OFFSET;
251 port->nsect_addr = base + K2_SATA_TF_NSECT_OFFSET;
252 port->lbal_addr = base + K2_SATA_TF_LBAL_OFFSET;
253 port->lbam_addr = base + K2_SATA_TF_LBAM_OFFSET;
254 port->lbah_addr = base + K2_SATA_TF_LBAH_OFFSET;
255 port->device_addr = base + K2_SATA_TF_DEVICE_OFFSET;
257 port->status_addr = base + K2_SATA_TF_CMDSTAT_OFFSET;
258 port->altstatus_addr =
259 port->ctl_addr = base + K2_SATA_TF_CTL_OFFSET;
260 port->bmdma_addr = base + K2_SATA_DMA_CMD_OFFSET;
261 port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET;
265 static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
267 static int printed_version;
268 struct ata_probe_ent *probe_ent = NULL;
273 if (!printed_version++)
274 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
277 * If this driver happens to only be useful on Apple's K2, then
278 * we should check that here as it has a normal Serverworks ID
280 rc = pci_enable_device(pdev);
284 * Check if we have resources mapped at all (second function may
285 * have been disabled by firmware)
287 if (pci_resource_len(pdev, 5) == 0)
290 /* Request PCI regions */
291 rc = pci_request_regions(pdev, DRV_NAME);
295 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
297 goto err_out_regions;
298 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
300 goto err_out_regions;
302 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
303 if (probe_ent == NULL) {
305 goto err_out_regions;
308 memset(probe_ent, 0, sizeof(*probe_ent));
309 probe_ent->pdev = pdev;
310 INIT_LIST_HEAD(&probe_ent->node);
312 mmio_base = ioremap(pci_resource_start(pdev, 5),
313 pci_resource_len(pdev, 5));
314 if (mmio_base == NULL) {
316 goto err_out_free_ent;
318 base = (unsigned long) mmio_base;
320 /* Clear a magic bit in SCR1 according to Darwin, those help
321 * some funky seagate drives (though so far, those were already
322 * set by the firmware on the machines I had access to
324 writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
325 mmio_base + K2_SATA_SICR1_OFFSET);
327 /* Clear SATA error & interrupts we don't use */
328 writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET);
329 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
331 probe_ent->sht = &k2_sata_sht;
332 probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
333 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO;
334 probe_ent->port_ops = &k2_sata_ops;
335 probe_ent->n_ports = 4;
336 probe_ent->irq = pdev->irq;
337 probe_ent->irq_flags = SA_SHIRQ;
338 probe_ent->mmio_base = mmio_base;
340 /* We don't care much about the PIO/UDMA masks, but the core won't like us
341 * if we don't fill these
343 probe_ent->pio_mask = 0x1f;
344 probe_ent->udma_mask = 0x7f;
346 /* We have 4 ports per PCI function */
347 k2_sata_setup_port(&probe_ent->port[0], base + 0 * K2_SATA_PORT_OFFSET);
348 k2_sata_setup_port(&probe_ent->port[1], base + 1 * K2_SATA_PORT_OFFSET);
349 k2_sata_setup_port(&probe_ent->port[2], base + 2 * K2_SATA_PORT_OFFSET);
350 k2_sata_setup_port(&probe_ent->port[3], base + 3 * K2_SATA_PORT_OFFSET);
352 pci_set_master(pdev);
354 /* FIXME: check ata_device_add return value */
355 ata_device_add(probe_ent);
363 pci_release_regions(pdev);
365 pci_disable_device(pdev);
370 static struct pci_device_id k2_sata_pci_tbl[] = {
371 { 0x1166, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
376 static struct pci_driver k2_sata_pci_driver = {
378 .id_table = k2_sata_pci_tbl,
379 .probe = k2_sata_init_one,
380 .remove = ata_pci_remove_one,
384 static int __init k2_sata_init(void)
386 return pci_module_init(&k2_sata_pci_driver);
389 static void __exit k2_sata_exit(void)
391 pci_unregister_driver(&k2_sata_pci_driver);
395 MODULE_AUTHOR("Benjamin Herrenschmidt");
396 MODULE_DESCRIPTION("low-level driver for K2 SATA controller");
397 MODULE_LICENSE("GPL");
398 MODULE_DEVICE_TABLE(pci, k2_sata_pci_tbl);
400 module_init(k2_sata_init);
401 module_exit(k2_sata_exit);