2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
18 * Other major contributions:
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
23 *-----------------------------------------------------------------------------
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. The name of the author may not be used to endorse or promote products
31 * derived from this software without specific prior written permission.
33 * Where this Software is combined with software released under the terms of
34 * the GNU Public License ("GPL") and the terms of the GPL would require the
35 * combined work to also be released under the terms of the GPL, the terms
36 * and conditions of this License will apply in addition to those of the
37 * GPL with the exception of any terms or conditions of this License that
38 * conflict with, or are expressly prohibited by, the GPL.
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
44 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * Scripts for SYMBIOS-Processor
56 * We have to know the offsets of all labels before we reach
57 * them (for forward jumps). Therefore we declare a struct
58 * here. If you make changes inside the script,
60 * DONT FORGET TO CHANGE THE LENGTHS HERE!
64 * Script fragments which are loaded into the on-chip RAM
65 * of 825A, 875, 876, 895, 895A, 896 and 1010 chips.
66 * Must not exceed 4K bytes.
70 u32 getjob_begin [ 4];
74 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
82 #ifdef SYM_CONF_IARB_SUPPORT
93 u32 datai_done_wsr [ 20];
95 u32 datao_done_wss [ 6];
100 #ifdef SYM_CONF_IARB_SUPPORT
112 u32 complete_error [ 5];
115 u32 disconnect [ 11];
116 u32 disconnect2 [ 5];
118 #ifdef SYM_CONF_IARB_SUPPORT
123 #ifdef SYM_CONF_IARB_SUPPORT
128 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
133 u32 reselected [ 19];
136 u32 reselected1 [ 25];
141 #if SYM_CONF_MAX_TASK*4 > 512
143 #elif SYM_CONF_MAX_TASK*4 > 256
154 u32 resel_no_tag [ 4];
156 u32 data_in [SYM_CONF_MAX_SG * 2];
158 u32 data_out [SYM_CONF_MAX_SG * 2];
161 u32 pm0_data_out [ 6];
162 u32 pm0_data_end [ 7];
163 u32 pm_data_end [ 4];
166 u32 pm1_data_out [ 6];
167 u32 pm1_data_end [ 9];
171 * Script fragments which stay in main memory for all chips
172 * except for chips that support 8K on-chip RAM.
176 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
177 u32 sel_for_abort [ 18];
179 u32 sel_for_abort [ 16];
181 u32 sel_for_abort_1 [ 2];
182 u32 msg_in_etc [ 12];
183 u32 msg_received [ 5];
184 u32 msg_weird_seen [ 5];
185 u32 msg_extended [ 17];
196 u32 nego_bad_phase [ 4];
198 u32 msg_out_done [ 4];
200 u32 data_ovrun1 [ 22];
201 u32 data_ovrun2 [ 8];
202 u32 abort_resel [ 16];
203 u32 resend_ident [ 4];
204 u32 ident_break [ 4];
205 u32 ident_break_atn [ 4];
207 u32 resel_bad_lun [ 4];
209 u32 bad_i_t_l_q [ 4];
211 u32 wsr_ma_helper [ 4];
213 #ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
214 /* Unknown direction handling */
216 u32 data_io_com [ 8];
217 u32 data_io_out [ 7];
231 * Script fragments used at initialisations.
232 * Only runs out of main memory.
239 static struct SYM_FWA_SCR SYM_FWA_SCR = {
240 /*--------------------------< START >----------------------------*/ {
243 * Will be patched with a NO_OP if LED
244 * not needed or not desired.
246 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
251 SCR_FROM_REG (ctest2),
254 * Stop here if the C code wants to perform
255 * some error recovery procedure manually.
256 * (Indicate this by setting SEM in ISTAT)
258 SCR_FROM_REG (istat),
261 * Report to the C code the next position in
262 * the start queue the SCRIPTS will schedule.
263 * The C code must not change SCRATCHA.
268 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
271 * Start the next job.
273 * @DSA = start point for this job.
274 * SCRATCHA = address of this job in the start queue.
276 * We will restore startpos with SCRATCHA if we fails the
277 * arbitration or if it is the idle job.
279 * The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
280 * is a critical path. If it is partially executed, it then
281 * may happen that the job address is not yet in the DSA
282 * and the next queue position points to the next JOB.
284 }/*-------------------------< GETJOB_BEGIN >---------------------*/,{
286 * Copy to a fixed location both the next STARTPOS
287 * and the current JOB address, using self modifying
294 }/*-------------------------< _SMS_A10 >-------------------------*/,{
298 * Move the start address to TEMP using self-
299 * modifying SCRIPTS and jump indirectly to
305 }/*-------------------------< GETJOB_END >-----------------------*/,{
310 }/*-------------------------< _SMS_A20 >-------------------------*/,{
315 }/*-------------------------< SELECT >---------------------------*/,{
317 * DSA contains the address of a scheduled
320 * SCRATCHA contains the address of the start queue
321 * entry which points to the next job.
323 * Set Initiator mode.
325 * (Target mode is left as an exercise for the reader)
327 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
332 * And try to select this target.
334 SCR_SEL_TBL_ATN ^ offsetof (struct sym_dsb, select),
337 * Now there are 4 possibilities:
339 * (1) The chip loses arbitration.
340 * This is ok, because it will try again,
341 * when the bus becomes idle.
342 * (But beware of the timeout function!)
344 * (2) The chip is reselected.
345 * Then the script processor takes the jump
346 * to the RESELECT label.
348 * (3) The chip wins arbitration.
349 * Then it will execute SCRIPTS instruction until
350 * the next instruction that checks SCSI phase.
351 * Then will stop and wait for selection to be
352 * complete or selection time-out to occur.
354 * After having won arbitration, the SCRIPTS
355 * processor is able to execute instructions while
356 * the SCSI core is performing SCSI selection.
360 * Copy the CCB header to a fixed location
361 * in the HCB using self-modifying SCRIPTS.
366 SCR_COPY (sizeof(struct sym_ccbh)),
367 }/*-------------------------< _SMS_A30 >-------------------------*/,{
371 * Initialize the status register
374 HADDR_1 (ccb_head.status),
376 }/*-------------------------< WF_SEL_DONE >----------------------*/,{
377 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
378 SIR_SEL_ATN_NO_MSG_OUT,
379 }/*-------------------------< SEND_IDENT >-----------------------*/,{
381 * Selection complete.
382 * Send the IDENTIFY and possibly the TAG message
383 * and negotiation message if present.
385 SCR_MOVE_TBL ^ SCR_MSG_OUT,
386 offsetof (struct sym_dsb, smsg),
387 }/*-------------------------< SELECT2 >--------------------------*/,{
388 #ifdef SYM_CONF_IARB_SUPPORT
390 * Set IMMEDIATE ARBITRATION if we have been given
391 * a hint to do so. (Some job to do after this one).
393 SCR_FROM_REG (HF_REG),
395 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
397 SCR_REG_REG (scntl1, SCR_OR, IARB),
401 * Anticipate the COMMAND phase.
402 * This is the PHASE we expect at this point.
404 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)),
405 PADDR_A (sel_no_cmd),
406 }/*-------------------------< COMMAND >--------------------------*/,{
408 * ... and send the command
410 SCR_MOVE_TBL ^ SCR_COMMAND,
411 offsetof (struct sym_dsb, cmd),
412 }/*-------------------------< DISPATCH >-------------------------*/,{
414 * MSG_IN is the only phase that shall be
415 * entered at least once for each (re)selection.
416 * So we test it first.
418 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
420 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT)),
421 PADDR_A (datao_phase),
422 SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN)),
423 PADDR_A (datai_phase),
424 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
426 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
428 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
431 * Discard as many illegal phases as
432 * required and tell the C code about.
434 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_OUT)),
436 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
438 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_OUT)),
440 SCR_JUMPR ^ IFFALSE (WHEN (SCR_ILG_IN)),
442 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
444 SCR_JUMPR ^ IFTRUE (WHEN (SCR_ILG_IN)),
450 }/*-------------------------< SEL_NO_CMD >-----------------------*/,{
452 * The target does not switch to command
453 * phase after IDENTIFY has been sent.
455 * If it stays in MSG OUT phase send it
456 * the IDENTIFY again.
458 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
459 PADDR_B (resend_ident),
461 * If target does not switch to MSG IN phase
462 * and we sent a negotiation, assert the
463 * failure immediately.
465 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
467 SCR_FROM_REG (HS_REG),
469 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
472 * Jump to dispatcher.
476 }/*-------------------------< INIT >-----------------------------*/,{
478 * Wait for the SCSI RESET signal to be
479 * inactive before restarting operations,
480 * since the chip may hang on SEL_ATN
481 * if SCSI RESET is active.
483 SCR_FROM_REG (sstat0),
485 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
489 }/*-------------------------< CLRACK >---------------------------*/,{
491 * Terminate possible pending message phase.
497 }/*-------------------------< DATAI_DONE >-----------------------*/,{
499 * Save current pointer to LASTP.
503 HADDR_1 (ccb_head.lastp),
505 * If the SWIDE is not full, jump to dispatcher.
506 * We anticipate a STATUS phase.
508 SCR_FROM_REG (scntl2),
510 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
511 PADDR_A (datai_done_wsr),
512 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
516 }/*-------------------------< DATAI_DONE_WSR >-------------------*/,{
519 * Clear this condition.
521 SCR_REG_REG (scntl2, SCR_OR, WSR),
524 * We are expecting an IGNORE RESIDUE message
525 * from the device, otherwise we are in data
526 * overrun condition. Check against MSG_IN phase.
528 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
530 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
533 * We are in MSG_IN phase,
534 * Read the first byte of the message.
535 * If it is not an IGNORE RESIDUE message,
536 * signal overrun and jump to message
539 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
541 SCR_INT ^ IFFALSE (DATA (M_IGN_RESIDUE)),
543 SCR_JUMP ^ IFFALSE (DATA (M_IGN_RESIDUE)),
546 * We got the message we expected.
547 * Read the 2nd byte, and jump to dispatcher.
551 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
557 }/*-------------------------< DATAO_DONE >-----------------------*/,{
559 * Save current pointer to LASTP.
563 HADDR_1 (ccb_head.lastp),
565 * If the SODL is not full jump to dispatcher.
566 * We anticipate a STATUS phase.
568 SCR_FROM_REG (scntl2),
570 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
571 PADDR_A (datao_done_wss),
572 SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)),
576 }/*-------------------------< DATAO_DONE_WSS >-------------------*/,{
578 * The SODL is full, clear this condition.
580 SCR_REG_REG (scntl2, SCR_OR, WSS),
583 * And signal a DATA UNDERRUN condition
590 }/*-------------------------< DATAI_PHASE >----------------------*/,{
592 * Jump to current pointer.
595 HADDR_1 (ccb_head.lastp),
599 }/*-------------------------< DATAO_PHASE >----------------------*/,{
601 * Jump to current pointer.
604 HADDR_1 (ccb_head.lastp),
608 }/*-------------------------< MSG_IN >---------------------------*/,{
610 * Get the first byte of the message.
612 * The script processor doesn't negate the
613 * ACK signal after this transfer.
615 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
617 }/*-------------------------< MSG_IN2 >--------------------------*/,{
619 * Check first against 1 byte messages
620 * that we handle from SCRIPTS.
622 SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)),
624 SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)),
625 PADDR_A (disconnect),
626 SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)),
628 SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)),
629 PADDR_A (restore_dp),
631 * We handle all other messages from the
632 * C code, so no need to waste on-chip RAM
636 PADDR_B (msg_in_etc),
637 }/*-------------------------< STATUS >---------------------------*/,{
641 SCR_MOVE_ABS (1) ^ SCR_STATUS,
643 #ifdef SYM_CONF_IARB_SUPPORT
645 * If STATUS is not GOOD, clear IMMEDIATE ARBITRATION,
646 * since we may have to tamper the start queue from
649 SCR_JUMPR ^ IFTRUE (DATA (S_GOOD)),
651 SCR_REG_REG (scntl1, SCR_AND, ~IARB),
655 * save status to scsi_status.
660 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
663 * Anticipate the MESSAGE PHASE for
664 * the TASK COMPLETE message.
666 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
670 }/*-------------------------< COMPLETE >-------------------------*/,{
674 * When we terminate the cycle by clearing ACK,
675 * the target may disconnect immediately.
677 * We don't want to be told of an "unexpected disconnect",
678 * so we disable this feature.
680 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
683 * Terminate cycle ...
685 SCR_CLR (SCR_ACK|SCR_ATN),
688 * ... and wait for the disconnect.
692 }/*-------------------------< COMPLETE2 >------------------------*/,{
698 HADDR_1 (ccb_head.status),
700 * Move back the CCB header using self-modifying
706 SCR_COPY (sizeof(struct sym_ccbh)),
708 }/*-------------------------< _SMS_A40 >-------------------------*/,{
711 * Some bridges may reorder DMA writes to memory.
712 * We donnot want the CPU to deal with completions
713 * without all the posted write having been flushed
714 * to memory. This DUMMY READ should flush posted
715 * buffers prior to the CPU having to deal with
718 SCR_COPY (4), /* DUMMY READ */
719 HADDR_1 (ccb_head.status),
722 * If command resulted in not GOOD status,
723 * call the C code if needed.
725 SCR_FROM_REG (SS_REG),
727 SCR_CALL ^ IFFALSE (DATA (S_GOOD)),
728 PADDR_B (bad_status),
730 * If we performed an auto-sense, call
731 * the C code to synchronyze task aborts
732 * with UNIT ATTENTION conditions.
734 SCR_FROM_REG (HF_REG),
736 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
737 PADDR_A (complete_error),
738 }/*-------------------------< DONE >-----------------------------*/,{
740 * Copy the DSA to the DONE QUEUE and
741 * signal completion to the host.
742 * If we are interrupted between DONE
743 * and DONE_END, we must reset, otherwise
744 * the completed CCB may be lost.
751 }/*-------------------------< _SMS_A50 >-------------------------*/,{
757 * The instruction below reads the DONE QUEUE next
758 * free position from memory.
759 * In addition it ensures that all PCI posted writes
760 * are flushed and so the DSA value of the done
761 * CCB is visible by the CPU before INTFLY is raised.
764 }/*-------------------------< _SMS_A60 >-------------------------*/,{
767 }/*-------------------------< DONE_END >-------------------------*/,{
772 }/*-------------------------< COMPLETE_ERROR >-------------------*/,{
778 }/*-------------------------< SAVE_DP >--------------------------*/,{
780 * Clear ACK immediately.
781 * No need to delay it.
786 * Keep track we received a SAVE DP, so
787 * we will switch to the other PM context
788 * on the next PM since the DP may point
789 * to the current PM context.
791 SCR_REG_REG (HF_REG, SCR_OR, HF_DP_SAVED),
795 * Copy LASTP to SAVEP.
798 HADDR_1 (ccb_head.lastp),
799 HADDR_1 (ccb_head.savep),
801 * Anticipate the MESSAGE PHASE for
802 * the DISCONNECT message.
804 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)),
808 }/*-------------------------< RESTORE_DP >-----------------------*/,{
810 * Clear ACK immediately.
811 * No need to delay it.
816 * Copy SAVEP to LASTP.
819 HADDR_1 (ccb_head.savep),
820 HADDR_1 (ccb_head.lastp),
823 }/*-------------------------< DISCONNECT >-----------------------*/,{
827 * disable the "unexpected disconnect" feature,
828 * and remove the ACK signal.
830 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
832 SCR_CLR (SCR_ACK|SCR_ATN),
835 * Wait for the disconnect.
840 * Status is: DISCONNECTED.
842 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
849 HADDR_1 (ccb_head.status),
850 }/*-------------------------< DISCONNECT2 >----------------------*/,{
852 * Move back the CCB header using self-modifying
858 SCR_COPY (sizeof(struct sym_ccbh)),
860 }/*-------------------------< _SMS_A65 >-------------------------*/,{
864 }/*-------------------------< IDLE >-----------------------------*/,{
867 * Switch the LED off and wait for reselect.
868 * Will be patched with a NO_OP if LED
869 * not needed or not desired.
871 SCR_REG_REG (gpreg, SCR_OR, 0x01),
873 #ifdef SYM_CONF_IARB_SUPPORT
877 }/*-------------------------< UNGETJOB >-------------------------*/,{
878 #ifdef SYM_CONF_IARB_SUPPORT
880 * Set IMMEDIATE ARBITRATION, for the next time.
881 * This will give us better chance to win arbitration
882 * for the job we just wanted to do.
884 SCR_REG_REG (scntl1, SCR_OR, IARB),
888 * We are not able to restart the SCRIPTS if we are
889 * interrupted and these instruction haven't been
890 * all executed. BTW, this is very unlikely to
891 * happen, but we check that from the C code.
893 SCR_LOAD_REG (dsa, 0xff),
898 }/*-------------------------< RESELECT >-------------------------*/,{
899 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
901 * Make sure we are in initiator mode.
907 * Sleep waiting for a reselection.
911 }/*-------------------------< RESELECTED >-----------------------*/,{
914 * Will be patched with a NO_OP if LED
915 * not needed or not desired.
917 SCR_REG_REG (gpreg, SCR_AND, 0xfe),
920 * load the target id into the sdid
922 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
927 * Load the target control block address
932 SCR_SFBR_REG (dsa, SCR_SHL, 0),
934 SCR_REG_REG (dsa, SCR_SHL, 0),
936 SCR_REG_REG (dsa, SCR_AND, 0x3c),
942 }/*-------------------------< _SMS_A70 >-------------------------*/,{
946 * Copy the TCB header to a fixed place in
952 SCR_COPY (sizeof(struct sym_tcbh)),
953 }/*-------------------------< _SMS_A80 >-------------------------*/,{
957 * We expect MESSAGE IN phase.
958 * If not, get help from the C code.
960 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)),
962 }/*-------------------------< RESELECTED1 >----------------------*/,{
964 * Load the synchronous transfer registers.
967 HADDR_1 (tcb_head.wval),
970 HADDR_1 (tcb_head.sval),
973 * Get the IDENTIFY message.
975 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
978 * If IDENTIFY LUN #0, use a faster path
979 * to find the LCB structure.
981 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
982 PADDR_A (resel_lun0),
984 * If message isn't an IDENTIFY,
985 * tell the C code about.
987 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
988 SIR_RESEL_NO_IDENTIFY,
990 * It is an IDENTIFY message,
991 * Load the LUN control block address.
994 HADDR_1 (tcb_head.luntbl_sa),
996 SCR_SFBR_REG (dsa, SCR_SHL, 0),
998 SCR_REG_REG (dsa, SCR_SHL, 0),
1000 SCR_REG_REG (dsa, SCR_AND, 0xfc),
1006 }/*-------------------------< _SMS_A90 >-------------------------*/,{
1011 }/*-------------------------< RESEL_LUN0 >-----------------------*/,{
1013 * LUN 0 special case (but usual one :))
1016 HADDR_1 (tcb_head.lun0_sa),
1019 * Jump indirectly to the reselect action for this LUN.
1020 * (lcb.head.resel_sa assumed at offset zero of lcb).
1024 PADDR_A (_sms_a100),
1026 }/*-------------------------< _SMS_A100 >------------------------*/,{
1031 /* In normal situations, we jump to RESEL_TAG or RESEL_NO_TAG */
1032 }/*-------------------------< RESEL_TAG >------------------------*/,{
1034 * ACK the IDENTIFY previously received.
1039 * It shall be a tagged command.
1041 * The C code will deal with errors.
1042 * Agressive optimization, is'nt it? :)
1044 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
1047 * Copy the LCB header to a fixed place in
1048 * the HCB using self-modifying SCRIPTS.
1052 PADDR_A (_sms_a110),
1053 SCR_COPY (sizeof(struct sym_lcbh)),
1054 }/*-------------------------< _SMS_A110 >------------------------*/,{
1058 * Load the pointer to the tagged task
1059 * table for this LUN.
1062 HADDR_1 (lcb_head.itlq_tbl_sa),
1065 * The SIDL still contains the TAG value.
1066 * Agressive optimization, isn't it? :):)
1068 SCR_REG_SFBR (sidl, SCR_SHL, 0),
1070 #if SYM_CONF_MAX_TASK*4 > 512
1071 SCR_JUMPR ^ IFFALSE (CARRYSET),
1073 SCR_REG_REG (dsa1, SCR_OR, 2),
1075 SCR_REG_REG (sfbr, SCR_SHL, 0),
1077 SCR_JUMPR ^ IFFALSE (CARRYSET),
1079 SCR_REG_REG (dsa1, SCR_OR, 1),
1081 #elif SYM_CONF_MAX_TASK*4 > 256
1082 SCR_JUMPR ^ IFFALSE (CARRYSET),
1084 SCR_REG_REG (dsa1, SCR_OR, 1),
1088 * Retrieve the DSA of this task.
1089 * JUMP indirectly to the restart point of the CCB.
1091 SCR_SFBR_REG (dsa, SCR_AND, 0xfc),
1095 PADDR_A (_sms_a120),
1097 }/*-------------------------< _SMS_A120 >------------------------*/,{
1100 }/*-------------------------< RESEL_GO >-------------------------*/,{
1103 PADDR_A (_sms_a130),
1105 * Move 'ccb.phys.head.go' action to
1106 * scratch/scratch1. So scratch1 will
1107 * contain the 'restart' field of the
1111 }/*-------------------------< _SMS_A130 >------------------------*/,{
1115 PADDR_B (scratch1), /* phys.head.go.restart */
1119 /* In normal situations we branch to RESEL_DSA */
1120 }/*-------------------------< RESEL_DSA >------------------------*/,{
1122 * ACK the IDENTIFY or TAG previously received.
1126 }/*-------------------------< RESEL_DSA1 >-----------------------*/,{
1128 * Copy the CCB header to a fixed location
1129 * in the HCB using self-modifying SCRIPTS.
1133 PADDR_A (_sms_a140),
1134 SCR_COPY (sizeof(struct sym_ccbh)),
1135 }/*-------------------------< _SMS_A140 >------------------------*/,{
1139 * Initialize the status register
1142 HADDR_1 (ccb_head.status),
1145 * Jump to dispatcher.
1149 }/*-------------------------< RESEL_NO_TAG >---------------------*/,{
1151 * Copy the LCB header to a fixed place in
1152 * the HCB using self-modifying SCRIPTS.
1156 PADDR_A (_sms_a145),
1157 SCR_COPY (sizeof(struct sym_lcbh)),
1158 }/*-------------------------< _SMS_A145 >------------------------*/,{
1162 * Load the DSA with the unique ITL task.
1165 HADDR_1 (lcb_head.itl_task_sa),
1169 }/*-------------------------< DATA_IN >--------------------------*/,{
1171 * Because the size depends on the
1172 * #define SYM_CONF_MAX_SG parameter,
1173 * it is filled in at runtime.
1175 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1176 * || SCR_CHMOV_TBL ^ SCR_DATA_IN,
1177 * || offsetof (struct sym_dsb, data[ i]),
1178 * ##==========================================
1181 }/*-------------------------< DATA_IN2 >-------------------------*/,{
1183 PADDR_A (datai_done),
1185 PADDR_B (data_ovrun),
1186 }/*-------------------------< DATA_OUT >-------------------------*/,{
1188 * Because the size depends on the
1189 * #define SYM_CONF_MAX_SG parameter,
1190 * it is filled in at runtime.
1192 * ##===========< i=0; i<SYM_CONF_MAX_SG >=========
1193 * || SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1194 * || offsetof (struct sym_dsb, data[ i]),
1195 * ##==========================================
1198 }/*-------------------------< DATA_OUT2 >------------------------*/,{
1200 PADDR_A (datao_done),
1202 PADDR_B (data_ovrun),
1203 }/*-------------------------< PM0_DATA >-------------------------*/,{
1205 * Read our host flags to SFBR, so we will be able
1206 * to check against the data direction we expect.
1208 SCR_FROM_REG (HF_REG),
1211 * Check against actual DATA PHASE.
1213 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1214 PADDR_A (pm0_data_out),
1216 * Actual phase is DATA IN.
1217 * Check against expected direction.
1219 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1220 PADDR_B (data_ovrun),
1222 * Keep track we are moving data from the
1223 * PM0 DATA mini-script.
1225 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1228 * Move the data to memory.
1230 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1231 offsetof (struct sym_ccb, phys.pm0.sg),
1233 PADDR_A (pm0_data_end),
1234 }/*-------------------------< PM0_DATA_OUT >---------------------*/,{
1236 * Actual phase is DATA OUT.
1237 * Check against expected direction.
1239 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1240 PADDR_B (data_ovrun),
1242 * Keep track we are moving data from the
1243 * PM0 DATA mini-script.
1245 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM0),
1248 * Move the data from memory.
1250 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1251 offsetof (struct sym_ccb, phys.pm0.sg),
1252 }/*-------------------------< PM0_DATA_END >---------------------*/,{
1254 * Clear the flag that told we were moving
1255 * data from the PM0 DATA mini-script.
1257 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM0)),
1260 * Return to the previous DATA script which
1261 * is guaranteed by design (if no bug) to be
1262 * the main DATA script for this transfer.
1267 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm0.ret)),
1269 }/*-------------------------< PM_DATA_END >----------------------*/,{
1272 PADDR_A (_sms_a150),
1274 }/*-------------------------< _SMS_A150 >------------------------*/,{
1279 }/*-------------------------< PM1_DATA >-------------------------*/,{
1281 * Read our host flags to SFBR, so we will be able
1282 * to check against the data direction we expect.
1284 SCR_FROM_REG (HF_REG),
1287 * Check against actual DATA PHASE.
1289 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
1290 PADDR_A (pm1_data_out),
1292 * Actual phase is DATA IN.
1293 * Check against expected direction.
1295 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1296 PADDR_B (data_ovrun),
1298 * Keep track we are moving data from the
1299 * PM1 DATA mini-script.
1301 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1304 * Move the data to memory.
1306 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1307 offsetof (struct sym_ccb, phys.pm1.sg),
1309 PADDR_A (pm1_data_end),
1310 }/*-------------------------< PM1_DATA_OUT >---------------------*/,{
1312 * Actual phase is DATA OUT.
1313 * Check against expected direction.
1315 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
1316 PADDR_B (data_ovrun),
1318 * Keep track we are moving data from the
1319 * PM1 DATA mini-script.
1321 SCR_REG_REG (HF_REG, SCR_OR, HF_IN_PM1),
1324 * Move the data from memory.
1326 SCR_CHMOV_TBL ^ SCR_DATA_OUT,
1327 offsetof (struct sym_ccb, phys.pm1.sg),
1328 }/*-------------------------< PM1_DATA_END >---------------------*/,{
1330 * Clear the flag that told we were moving
1331 * data from the PM1 DATA mini-script.
1333 SCR_REG_REG (HF_REG, SCR_AND, (~HF_IN_PM1)),
1336 * Return to the previous DATA script which
1337 * is guaranteed by design (if no bug) to be
1338 * the main DATA script for this transfer.
1343 SCR_REG_REG (scratcha, SCR_ADD, offsetof (struct sym_ccb,phys.pm1.ret)),
1346 PADDR_A (pm_data_end),
1347 }/*--------------------------<>----------------------------------*/
1350 static struct SYM_FWB_SCR SYM_FWB_SCR = {
1351 /*-------------------------< NO_DATA >--------------------------*/ {
1353 PADDR_B (data_ovrun),
1354 }/*-------------------------< SEL_FOR_ABORT >--------------------*/,{
1356 * We are jumped here by the C code, if we have
1357 * some target to reset or some disconnected
1358 * job to abort. Since error recovery is a serious
1359 * busyness, we will really reset the SCSI BUS, if
1360 * case of a SCSI interrupt occurring in this path.
1363 #ifdef SYM_CONF_TARGET_ROLE_SUPPORT
1365 * Set initiator mode.
1371 * And try to select this target.
1373 SCR_SEL_TBL_ATN ^ offsetof (struct sym_hcb, abrt_sel),
1376 * Wait for the selection to complete or
1377 * the selection to time out.
1379 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1385 SIR_TARGET_SELECTED,
1387 * The C code should let us continue here.
1388 * Send the 'kiss of death' message.
1389 * We expect an immediate disconnect once
1390 * the target has eaten the message.
1392 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1394 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1395 offsetof (struct sym_hcb, abrt_tbl),
1396 SCR_CLR (SCR_ACK|SCR_ATN),
1401 * Tell the C code that we are done.
1405 }/*-------------------------< SEL_FOR_ABORT_1 >------------------*/,{
1407 * Jump at scheduler.
1411 }/*-------------------------< MSG_IN_ETC >-----------------------*/,{
1413 * If it is an EXTENDED (variable size message)
1416 SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)),
1417 PADDR_B (msg_extended),
1419 * Let the C code handle any other
1422 SCR_JUMP ^ IFTRUE (MASK (0x00, 0xf0)),
1423 PADDR_B (msg_received),
1424 SCR_JUMP ^ IFTRUE (MASK (0x10, 0xf0)),
1425 PADDR_B (msg_received),
1427 * We donnot handle 2 bytes messages from SCRIPTS.
1428 * So, let the C code deal with these ones too.
1430 SCR_JUMP ^ IFFALSE (MASK (0x20, 0xf0)),
1431 PADDR_B (msg_weird_seen),
1434 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1436 }/*-------------------------< MSG_RECEIVED >---------------------*/,{
1437 SCR_COPY (4), /* DUMMY READ */
1442 }/*-------------------------< MSG_WEIRD_SEEN >-------------------*/,{
1443 SCR_COPY (4), /* DUMMY READ */
1448 }/*-------------------------< MSG_EXTENDED >---------------------*/,{
1450 * Clear ACK and get the next byte
1451 * assumed to be the message length.
1455 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1458 * Try to catch some unlikely situations as 0 length
1459 * or too large the length.
1461 SCR_JUMP ^ IFTRUE (DATA (0)),
1462 PADDR_B (msg_weird_seen),
1463 SCR_TO_REG (scratcha),
1465 SCR_REG_REG (sfbr, SCR_ADD, (256-8)),
1467 SCR_JUMP ^ IFTRUE (CARRYSET),
1468 PADDR_B (msg_weird_seen),
1470 * We donnot handle extended messages from SCRIPTS.
1471 * Read the amount of data correponding to the
1472 * message length and call the C code.
1479 }/*-------------------------< _SMS_B10 >-------------------------*/,{
1480 SCR_MOVE_ABS (0) ^ SCR_MSG_IN,
1483 PADDR_B (msg_received),
1484 }/*-------------------------< MSG_BAD >--------------------------*/,{
1486 * unimplemented message - reject it.
1494 }/*-------------------------< MSG_WEIRD >------------------------*/,{
1496 * weird message received
1497 * ignore all MSG IN phases and reject it.
1503 }/*-------------------------< MSG_WEIRD1 >-----------------------*/,{
1506 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1508 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1511 PADDR_B (msg_weird1),
1512 }/*-------------------------< WDTR_RESP >------------------------*/,{
1514 * let the target fetch our answer.
1520 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1521 PADDR_B (nego_bad_phase),
1522 }/*-------------------------< SEND_WDTR >------------------------*/,{
1524 * Send the M_X_WIDE_REQ
1526 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
1529 PADDR_B (msg_out_done),
1530 }/*-------------------------< SDTR_RESP >------------------------*/,{
1532 * let the target fetch our answer.
1538 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1539 PADDR_B (nego_bad_phase),
1540 }/*-------------------------< SEND_SDTR >------------------------*/,{
1542 * Send the M_X_SYNC_REQ
1544 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
1547 PADDR_B (msg_out_done),
1548 }/*-------------------------< PPR_RESP >-------------------------*/,{
1550 * let the target fetch our answer.
1556 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)),
1557 PADDR_B (nego_bad_phase),
1558 }/*-------------------------< SEND_PPR >-------------------------*/,{
1560 * Send the M_X_PPR_REQ
1562 SCR_MOVE_ABS (8) ^ SCR_MSG_OUT,
1565 PADDR_B (msg_out_done),
1566 }/*-------------------------< NEGO_BAD_PHASE >-------------------*/,{
1571 }/*-------------------------< MSG_OUT >--------------------------*/,{
1573 * The target requests a message.
1574 * We donnot send messages that may
1575 * require the device to go to bus free.
1577 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1580 * ... wait for the next phase
1581 * if it's a message out, send it again, ...
1583 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1585 }/*-------------------------< MSG_OUT_DONE >---------------------*/,{
1587 * Let the C code be aware of the
1588 * sent message and clear the message.
1593 * ... and process the next phase
1597 }/*-------------------------< DATA_OVRUN >-----------------------*/,{
1599 * Zero scratcha that will count the
1605 }/*-------------------------< DATA_OVRUN1 >----------------------*/,{
1607 * The target may want to transfer too much data.
1609 * If phase is DATA OUT write 1 byte and count it.
1611 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1613 SCR_CHMOV_ABS (1) ^ SCR_DATA_OUT,
1616 PADDR_B (data_ovrun2),
1618 * If WSR is set, clear this condition, and
1621 SCR_FROM_REG (scntl2),
1623 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1625 SCR_REG_REG (scntl2, SCR_OR, WSR),
1628 PADDR_B (data_ovrun2),
1630 * Finally check against DATA IN phase.
1631 * Signal data overrun to the C code
1632 * and jump to dispatcher if not so.
1633 * Read 1 byte otherwise and count it.
1635 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_IN)),
1641 SCR_CHMOV_ABS (1) ^ SCR_DATA_IN,
1643 }/*-------------------------< DATA_OVRUN2 >----------------------*/,{
1646 * This will allow to return a negative
1649 SCR_REG_REG (scratcha, SCR_ADD, 0x01),
1651 SCR_REG_REG (scratcha1, SCR_ADDC, 0),
1653 SCR_REG_REG (scratcha2, SCR_ADDC, 0),
1656 * .. and repeat as required.
1659 PADDR_B (data_ovrun1),
1660 }/*-------------------------< ABORT_RESEL >----------------------*/,{
1666 * send the abort/abortag/reset message
1667 * we expect an immediate disconnect
1669 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1671 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
1673 SCR_CLR (SCR_ACK|SCR_ATN),
1681 }/*-------------------------< RESEND_IDENT >---------------------*/,{
1683 * The target stays in MSG OUT phase after having acked
1684 * Identify [+ Tag [+ Extended message ]]. Targets shall
1685 * behave this way on parity error.
1686 * We must send it again all the messages.
1688 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */
1689 0, /* 1rst ACK = 90 ns. Hope the chip isn't too fast */
1691 PADDR_A (send_ident),
1692 }/*-------------------------< IDENT_BREAK >----------------------*/,{
1697 }/*-------------------------< IDENT_BREAK_ATN >------------------*/,{
1702 }/*-------------------------< SDATA_IN >-------------------------*/,{
1703 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1704 offsetof (struct sym_dsb, sense),
1706 PADDR_A (datai_done),
1708 PADDR_B (data_ovrun),
1709 }/*-------------------------< RESEL_BAD_LUN >--------------------*/,{
1711 * Message is an IDENTIFY, but lun is unknown.
1712 * Signal problem to C code for logging the event.
1713 * Send a M_ABORT to clear all pending tasks.
1718 PADDR_B (abort_resel),
1719 }/*-------------------------< BAD_I_T_L >------------------------*/,{
1721 * We donnot have a task for that I_T_L.
1722 * Signal problem to C code for logging the event.
1723 * Send a M_ABORT message.
1726 SIR_RESEL_BAD_I_T_L,
1728 PADDR_B (abort_resel),
1729 }/*-------------------------< BAD_I_T_L_Q >----------------------*/,{
1731 * We donnot have a task that matches the tag.
1732 * Signal problem to C code for logging the event.
1733 * Send a M_ABORTTAG message.
1736 SIR_RESEL_BAD_I_T_L_Q,
1738 PADDR_B (abort_resel),
1739 }/*-------------------------< BAD_STATUS >-----------------------*/,{
1741 * Anything different from INTERMEDIATE
1742 * CONDITION MET should be a bad SCSI status,
1743 * given that GOOD status has already been tested.
1749 SCR_INT ^ IFFALSE (DATA (S_COND_MET)),
1750 SIR_BAD_SCSI_STATUS,
1753 }/*-------------------------< WSR_MA_HELPER >--------------------*/,{
1755 * Helper for the C code when WSR bit is set.
1756 * Perform the move of the residual byte.
1758 SCR_CHMOV_TBL ^ SCR_DATA_IN,
1759 offsetof (struct sym_ccb, phys.wresid),
1763 #ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
1764 }/*-------------------------< DATA_IO >--------------------------*/,{
1766 * We jump here if the data direction was unknown at the
1767 * time we had to queue the command to the scripts processor.
1768 * Pointers had been set as follow in this situation:
1770 * lastp --> start pointer when DATA_IN
1771 * wlastp --> start pointer when DATA_OUT
1772 * This script sets savep and lastp according to the
1773 * direction chosen by the target.
1775 SCR_JUMP ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1776 PADDR_B (data_io_out),
1777 }/*-------------------------< DATA_IO_COM >----------------------*/,{
1779 * Direction is DATA IN.
1782 HADDR_1 (ccb_head.lastp),
1783 HADDR_1 (ccb_head.savep),
1785 * Jump to the SCRIPTS according to actual direction.
1788 HADDR_1 (ccb_head.savep),
1792 }/*-------------------------< DATA_IO_OUT >----------------------*/,{
1794 * Direction is DATA OUT.
1796 SCR_REG_REG (HF_REG, SCR_AND, (~HF_DATA_IN)),
1799 HADDR_1 (ccb_head.wlastp),
1800 HADDR_1 (ccb_head.lastp),
1802 PADDR_B(data_io_com),
1803 #endif /* SYM_OPT_HANDLE_DIR_UNKNOWN */
1805 }/*-------------------------< ZERO >-----------------------------*/,{
1807 }/*-------------------------< SCRATCH >--------------------------*/,{
1808 SCR_DATA_ZERO, /* MUST BE BEFORE SCRATCH1 */
1809 }/*-------------------------< SCRATCH1 >-------------------------*/,{
1811 }/*-------------------------< PREV_DONE >------------------------*/,{
1812 SCR_DATA_ZERO, /* MUST BE BEFORE DONE_POS ! */
1813 }/*-------------------------< DONE_POS >-------------------------*/,{
1815 }/*-------------------------< NEXTJOB >--------------------------*/,{
1816 SCR_DATA_ZERO, /* MUST BE BEFORE STARTPOS ! */
1817 }/*-------------------------< STARTPOS >-------------------------*/,{
1819 }/*-------------------------< TARGTBL >--------------------------*/,{
1821 }/*--------------------------<>----------------------------------*/
1824 static struct SYM_FWZ_SCR SYM_FWZ_SCR = {
1825 /*-------------------------< SNOOPTEST >------------------------*/{
1827 * Read the variable.
1833 * Write the variable.
1839 * Read back the variable.
1844 }/*-------------------------< SNOOPEND >-------------------------*/,{
1850 }/*--------------------------<>----------------------------------*/