2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
18 * Other major contributions:
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
23 *-----------------------------------------------------------------------------
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. The name of the author may not be used to endorse or promote products
31 * derived from this software without specific prior written permission.
33 * Where this Software is combined with software released under the terms of
34 * the GNU Public License ("GPL") and the terms of the GPL would require the
35 * combined work to also be released under the terms of the GPL, the terms
36 * and conditions of this License will apply in addition to those of the
37 * GPL with the exception of any terms or conditions of this License that
38 * conflict with, or are expressly prohibited by, the GPL.
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
44 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 #include <linux/config.h>
57 #include <linux/delay.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/string.h>
61 #include <linux/timer.h>
62 #include <linux/types.h>
69 #include <scsi/scsi.h>
70 #include <scsi/scsi_cmnd.h>
71 #include <scsi/scsi_device.h>
72 #include <scsi/scsi_host.h>
75 #define bzero(d, n) memset((d), 0, (n))
79 * General driver includes.
86 * Configuration addendum for Linux.
88 #define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2)
90 #define SYM_OPT_HANDLE_DIR_UNKNOWN
91 #define SYM_OPT_HANDLE_DEVICE_QUEUEING
92 #define SYM_OPT_NVRAM_PRE_READ
93 #define SYM_OPT_LIMIT_COMMAND_REORDERING
94 #define SYM_OPT_ANNOUNCE_TRANSFER_RATE
97 * Print a message with severity.
99 #define printf_emerg(args...) printk(KERN_EMERG args)
100 #define printf_alert(args...) printk(KERN_ALERT args)
101 #define printf_crit(args...) printk(KERN_CRIT args)
102 #define printf_err(args...) printk(KERN_ERR args)
103 #define printf_warning(args...) printk(KERN_WARNING args)
104 #define printf_notice(args...) printk(KERN_NOTICE args)
105 #define printf_info(args...) printk(KERN_INFO args)
106 #define printf_debug(args...) printk(KERN_DEBUG args)
107 #define printf(args...) printk(args)
110 * Insert a delay in micro-seconds and milli-seconds.
112 #define sym_udelay(us) udelay(us)
113 #define sym_mdelay(ms) mdelay(ms)
116 * A 'read barrier' flushes any data that have been prefetched
117 * by the processor due to out of order execution. Such a barrier
118 * must notably be inserted prior to looking at data that have
119 * been DMAed, assuming that program does memory READs in proper
120 * order and that the device ensured proper ordering of WRITEs.
122 * A 'write barrier' prevents any previous WRITEs to pass further
123 * WRITEs. Such barriers must be inserted each time another agent
124 * relies on ordering of WRITEs.
126 * Note that, due to posting of PCI memory writes, we also must
127 * insert dummy PCI read transactions when some ordering involving
128 * both directions over the PCI does matter. PCI transactions are
129 * fully ordered in each direction.
132 #define MEMORY_READ_BARRIER() rmb()
133 #define MEMORY_WRITE_BARRIER() wmb()
136 * Let the compiler know about driver data structure names.
138 typedef struct sym_tcb *tcb_p;
139 typedef struct sym_lcb *lcb_p;
140 typedef struct sym_ccb *ccb_p;
141 typedef struct sym_hcb *hcb_p;
144 * Define a reference to the O/S dependent IO request.
146 typedef struct scsi_cmnd *cam_ccb_p; /* Generic */
147 typedef struct scsi_cmnd *cam_scsiio_p;/* SCSI I/O */
151 * IO functions definition for big/little endian CPU support.
152 * For now, PCI chips are only supported in little endian addressing mode,
159 #define outw_b2l outw
160 #define outl_b2l outl
161 #define readw_l2b readw
162 #define readl_l2b readl
163 #define writew_b2l writew
164 #define writel_b2l writel
166 #else /* little endian */
170 #define outw_raw outw
171 #define outl_raw outl
173 #define readw_raw readw
174 #define readl_raw readl
175 #define writew_raw writew
176 #define writel_raw writel
180 #ifdef SYM_CONF_CHIP_BIG_ENDIAN
181 #error "Chips in BIG ENDIAN addressing mode are not (yet) supported"
186 * If the chip uses big endian addressing mode over the
187 * PCI, actual io register addresses for byte and word
188 * accesses must be changed according to lane routing.
189 * Btw, sym_offb() and sym_offw() macros only apply to
190 * constants and so donnot generate bloated code.
193 #if defined(SYM_CONF_CHIP_BIG_ENDIAN)
195 #define sym_offb(o) (((o)&~3)+((~((o)&3))&3))
196 #define sym_offw(o) (((o)&~3)+((~((o)&3))&2))
200 #define sym_offb(o) (o)
201 #define sym_offw(o) (o)
206 * If the CPU and the chip use same endian-ness addressing,
207 * no byte reordering is needed for script patching.
208 * Macro cpu_to_scr() is to be used for script patching.
209 * Macro scr_to_cpu() is to be used for getting a DWORD
213 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
215 #define cpu_to_scr(dw) cpu_to_le32(dw)
216 #define scr_to_cpu(dw) le32_to_cpu(dw)
218 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
220 #define cpu_to_scr(dw) cpu_to_be32(dw)
221 #define scr_to_cpu(dw) be32_to_cpu(dw)
225 #define cpu_to_scr(dw) (dw)
226 #define scr_to_cpu(dw) (dw)
231 * Access to the controller chip.
233 * If SYM_CONF_IOMAPPED is defined, the driver will use
234 * normal IOs instead of the MEMORY MAPPED IO method
235 * recommended by PCI specifications.
236 * If all PCI bridges, host brigdes and architectures
237 * would have been correctly designed for PCI, this
238 * option would be useless.
240 * If the CPU and the chip use same endian-ness addressing,
241 * no byte reordering is needed for accessing chip io
242 * registers. Functions suffixed by '_raw' are assumed
243 * to access the chip over the PCI without doing byte
244 * reordering. Functions suffixed by '_l2b' are
245 * assumed to perform little-endian to big-endian byte
246 * reordering, those suffixed by '_b2l' blah, blah,
250 #if defined(SYM_CONF_IOMAPPED)
253 * IO mapped only input / ouput
256 #define INB_OFF(o) inb (np->s.io_port + sym_offb(o))
257 #define OUTB_OFF(o, val) outb ((val), np->s.io_port + sym_offb(o))
259 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
261 #define INW_OFF(o) inw_l2b (np->s.io_port + sym_offw(o))
262 #define INL_OFF(o) inl_l2b (np->s.io_port + (o))
264 #define OUTW_OFF(o, val) outw_b2l ((val), np->s.io_port + sym_offw(o))
265 #define OUTL_OFF(o, val) outl_b2l ((val), np->s.io_port + (o))
267 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
269 #define INW_OFF(o) inw_b2l (np->s.io_port + sym_offw(o))
270 #define INL_OFF(o) inl_b2l (np->s.io_port + (o))
272 #define OUTW_OFF(o, val) outw_l2b ((val), np->s.io_port + sym_offw(o))
273 #define OUTL_OFF(o, val) outl_l2b ((val), np->s.io_port + (o))
277 #define INW_OFF(o) inw_raw (np->s.io_port + sym_offw(o))
278 #define INL_OFF(o) inl_raw (np->s.io_port + (o))
280 #define OUTW_OFF(o, val) outw_raw ((val), np->s.io_port + sym_offw(o))
281 #define OUTL_OFF(o, val) outl_raw ((val), np->s.io_port + (o))
285 #else /* defined SYM_CONF_IOMAPPED */
288 * MEMORY mapped IO input / output
291 #define INB_OFF(o) readb(np->s.mmio_va + sym_offb(o))
292 #define OUTB_OFF(o, val) writeb((val), np->s.mmio_va + sym_offb(o))
294 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
296 #define INW_OFF(o) readw_l2b(np->s.mmio_va + sym_offw(o))
297 #define INL_OFF(o) readl_l2b(np->s.mmio_va + (o))
299 #define OUTW_OFF(o, val) writew_b2l((val), np->s.mmio_va + sym_offw(o))
300 #define OUTL_OFF(o, val) writel_b2l((val), np->s.mmio_va + (o))
302 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
304 #define INW_OFF(o) readw_b2l(np->s.mmio_va + sym_offw(o))
305 #define INL_OFF(o) readl_b2l(np->s.mmio_va + (o))
307 #define OUTW_OFF(o, val) writew_l2b((val), np->s.mmio_va + sym_offw(o))
308 #define OUTL_OFF(o, val) writel_l2b((val), np->s.mmio_va + (o))
312 #define INW_OFF(o) readw_raw(np->s.mmio_va + sym_offw(o))
313 #define INL_OFF(o) readl_raw(np->s.mmio_va + (o))
315 #define OUTW_OFF(o, val) writew_raw((val), np->s.mmio_va + sym_offw(o))
316 #define OUTL_OFF(o, val) writel_raw((val), np->s.mmio_va + (o))
320 #endif /* defined SYM_CONF_IOMAPPED */
322 #define OUTRAM_OFF(o, a, l) memcpy_toio(np->s.ram_va + (o), (a), (l))
325 * Remap some status field values.
327 #define CAM_REQ_CMP DID_OK
328 #define CAM_SEL_TIMEOUT DID_NO_CONNECT
329 #define CAM_CMD_TIMEOUT DID_TIME_OUT
330 #define CAM_REQ_ABORTED DID_ABORT
331 #define CAM_UNCOR_PARITY DID_PARITY
332 #define CAM_SCSI_BUS_RESET DID_RESET
333 #define CAM_REQUEUE_REQ DID_SOFT_ERROR
334 #define CAM_UNEXP_BUSFREE DID_ERROR
335 #define CAM_SCSI_BUSY DID_BUS_BUSY
337 #define CAM_DEV_NOT_THERE DID_NO_CONNECT
338 #define CAM_REQ_INVALID DID_ERROR
339 #define CAM_REQ_TOO_BIG DID_ERROR
341 #define CAM_RESRC_UNAVAIL DID_ERROR
344 * Remap data direction values.
346 #define CAM_DIR_NONE DMA_NONE
347 #define CAM_DIR_IN DMA_FROM_DEVICE
348 #define CAM_DIR_OUT DMA_TO_DEVICE
349 #define CAM_DIR_UNKNOWN DMA_BIDIRECTIONAL
352 * These ones are used as return code from
353 * error recovery handlers under Linux.
355 #define SCSI_SUCCESS SUCCESS
356 #define SCSI_FAILED FAILED
359 * System specific target data structure.
360 * None for now, under Linux.
362 /* #define SYM_HAVE_STCB */
365 * System specific lun data structure.
367 #define SYM_HAVE_SLCB
369 u_short reqtags; /* Number of tags requested by user */
370 u_short scdev_depth; /* Queue depth set in select_queue_depth() */
374 * System specific command data structure.
375 * Not needed under Linux.
377 /* struct sym_sccb */
380 * System specific host data structure.
384 * Chip and controller indentification.
389 struct pci_dev *device;
391 struct Scsi_Host *host;
393 void __iomem * mmio_va; /* MMIO kernel virtual address */
394 void __iomem * ram_va; /* RAM kernel virtual address */
395 u_long io_port; /* IO port address cookie */
396 u_short io_ws; /* IO window size */
397 int irq; /* IRQ number */
399 SYM_QUEHEAD wait_cmdq; /* Awaiting SCSI commands */
400 SYM_QUEHEAD busy_cmdq; /* Enqueued SCSI commands */
402 struct timer_list timer; /* Timer handler link header */
404 u_long settle_time; /* Resetting the SCSI BUS */
405 u_char settle_time_valid;
409 * Return the name of the controller.
411 #define sym_name(np) (np)->s.inst_name
414 * Data structure used as input for the NVRAM reading.
415 * Must resolve the IO macros and sym_name(), when
416 * used as sub-field 's' of another structure.
424 /* port and address fields to fit INB, OUTB macros */
426 void __iomem * mmio_va;
433 struct pci_dev *pdev;
435 struct sym_pci_chip chip;
436 struct sym_nvram *nvram;
442 * Driver host data structure.
449 * The driver definitions (sym_hipd.h) must know about a
450 * couple of things related to the memory allocator.
452 typedef u_long m_addr_t; /* Enough bits to represent any address */
453 #define SYM_MEM_PAGE_ORDER 0 /* 1 PAGE maximum */
454 #define SYM_MEM_CLUSTER_SHIFT (PAGE_SHIFT+SYM_MEM_PAGE_ORDER)
456 #define SYM_MEM_FREE_UNUSED /* Free unused pages immediately */
458 typedef struct pci_dev *m_pool_ident_t;
461 * Include driver soft definitions.
464 #include "sym_hipd.h"
467 * Memory allocator related stuff.
470 #define SYM_MEM_GFP_FLAGS GFP_ATOMIC
471 #define SYM_MEM_WARN 1 /* Warn on failed operations */
473 #define sym_get_mem_cluster() \
474 __get_free_pages(SYM_MEM_GFP_FLAGS, SYM_MEM_PAGE_ORDER)
475 #define sym_free_mem_cluster(p) \
476 free_pages(p, SYM_MEM_PAGE_ORDER)
478 void *sym_calloc(int size, char *name);
479 void sym_mfree(void *m, int size, char *name);
482 * We have to provide the driver memory allocator with methods for
483 * it to maintain virtual to bus physical address translations.
486 #define sym_m_pool_match(mp_id1, mp_id2) (mp_id1 == mp_id2)
488 static __inline m_addr_t sym_m_get_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
491 dma_addr_t baddr = 0;
493 vaddr = pci_alloc_consistent(mp->dev_dmat,SYM_MEM_CLUSTER_SIZE, &baddr);
495 vbp->vaddr = (m_addr_t) vaddr;
496 vbp->baddr = (m_addr_t) baddr;
498 return (m_addr_t) vaddr;
501 static __inline void sym_m_free_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
503 pci_free_consistent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE,
504 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
507 #define sym_m_create_dma_mem_tag(mp) (0)
508 #define sym_m_delete_dma_mem_tag(mp) do { ; } while (0)
510 void *__sym_calloc_dma(m_pool_ident_t dev_dmat, int size, char *name);
511 void __sym_mfree_dma(m_pool_ident_t dev_dmat, void *m, int size, char *name);
512 m_addr_t __vtobus(m_pool_ident_t dev_dmat, void *m);
515 * Set the status field of a CAM CCB.
518 sym_set_cam_status(struct scsi_cmnd *ccb, int status)
520 ccb->result &= ~(0xff << 16);
521 ccb->result |= (status << 16);
525 * Get the status field of a CAM CCB.
528 sym_get_cam_status(struct scsi_cmnd *ccb)
530 return ((ccb->result >> 16) & 0xff);
534 * The dma mapping is mostly handled by the
535 * SCSI layer and the driver glue under Linux.
537 #define sym_data_dmamap_create(np, cp) (0)
538 #define sym_data_dmamap_destroy(np, cp) do { ; } while (0)
539 #define sym_data_dmamap_unload(np, cp) do { ; } while (0)
540 #define sym_data_dmamap_presync(np, cp) do { ; } while (0)
541 #define sym_data_dmamap_postsync(np, cp) do { ; } while (0)
544 * Async handler for negotiations.
546 void sym_xpt_async_nego_wide(hcb_p np, int target);
547 #define sym_xpt_async_nego_sync(np, target) \
548 sym_announce_transfer_rate(np, target)
549 #define sym_xpt_async_nego_ppr(np, target) \
550 sym_announce_transfer_rate(np, target)
553 * Build CAM result for a successful IO and for a failed IO.
555 static __inline void sym_set_cam_result_ok(hcb_p np, ccb_p cp, int resid)
557 struct scsi_cmnd *cmd = cp->cam_ccb;
560 cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f));
562 void sym_set_cam_result_error(hcb_p np, ccb_p cp, int resid);
565 * Other O/S specific methods.
567 #define sym_cam_target_id(ccb) (ccb)->target
568 #define sym_cam_target_lun(ccb) (ccb)->lun
569 #define sym_freeze_cam_ccb(ccb) do { ; } while (0)
570 void sym_xpt_done(hcb_p np, cam_ccb_p ccb);
571 void sym_xpt_done2(hcb_p np, cam_ccb_p ccb, int cam_status);
572 void sym_print_addr (ccb_p cp);
573 void sym_xpt_async_bus_reset(hcb_p np);
574 void sym_xpt_async_sent_bdr(hcb_p np, int target);
575 int sym_setup_data_and_start (hcb_p np, cam_scsiio_p csio, ccb_p cp);
576 void sym_log_bus_error(hcb_p np);
577 void sym_sniff_inquiry(hcb_p np, struct scsi_cmnd *cmd, int resid);
579 #endif /* SYM_GLUE_H */