2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2004 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include "sym_nvram.h"
44 #define SYM_DEBUG_GENERIC_SUPPORT
48 * Needed function prototypes.
50 static void sym_int_ma (hcb_p np);
51 static void sym_int_sir (hcb_p np);
52 static ccb_p sym_alloc_ccb(hcb_p np);
53 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa);
54 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
55 static void sym_complete_error (hcb_p np, ccb_p cp);
56 static void sym_complete_ok (hcb_p np, ccb_p cp);
57 static int sym_compute_residual(hcb_p np, ccb_p cp);
60 * Returns the name of this driver.
62 char *sym_driver_name(void)
64 return SYM_DRIVER_NAME;
67 * Print a buffer in hexadecimal format.
69 static void sym_printb_hex (u_char *p, int n)
76 * Same with a label at beginning and .\n at end.
78 static void sym_printl_hex (char *label, u_char *p, int n)
81 sym_printb_hex (p, n);
86 * Print something which allows to retrieve the controler type,
87 * unit, target, lun concerned by a kernel message.
89 static void sym_print_target (hcb_p np, int target)
91 printf ("%s:%d:", sym_name(np), target);
94 static void sym_print_lun(hcb_p np, int target, int lun)
96 printf ("%s:%d:%d:", sym_name(np), target, lun);
100 * Print out the content of a SCSI message.
102 static int sym_show_msg (u_char * msg)
106 if (*msg==M_EXTENDED) {
108 if (i-1>msg[1]) break;
109 printf ("-%x",msg[i]);
112 } else if ((*msg & 0xf0) == 0x20) {
113 printf ("-%x",msg[1]);
119 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
123 printf ("%s: ", label);
125 (void) sym_show_msg (msg);
129 static void sym_print_nego_msg (hcb_p np, int target, char *label, u_char *msg)
131 PRINT_TARGET(np, target);
133 printf ("%s: ", label);
135 (void) sym_show_msg (msg);
140 * Print something that tells about extended errors.
142 void sym_print_xerr(ccb_p cp, int x_status)
144 if (x_status & XE_PARITY_ERR) {
146 printf ("unrecovered SCSI parity error.\n");
148 if (x_status & XE_EXTRA_DATA) {
150 printf ("extraneous data discarded.\n");
152 if (x_status & XE_BAD_PHASE) {
154 printf ("illegal scsi phase (4/5).\n");
156 if (x_status & XE_SODL_UNRUN) {
158 printf ("ODD transfer in DATA OUT phase.\n");
160 if (x_status & XE_SWIDE_OVRUN) {
162 printf ("ODD transfer in DATA IN phase.\n");
167 * Return a string for SCSI BUS mode.
169 static char *sym_scsi_bus_mode(int mode)
172 case SMODE_HVD: return "HVD";
173 case SMODE_SE: return "SE";
174 case SMODE_LVD: return "LVD";
180 * Soft reset the chip.
182 * Raising SRST when the chip is running may cause
183 * problems on dual function chips (see below).
184 * On the other hand, LVD devices need some delay
185 * to settle and report actual BUS mode in STEST4.
187 static void sym_chip_reset (hcb_p np)
189 OUTB (nc_istat, SRST);
192 UDELAY(2000); /* For BUS MODE to settle */
196 * Really soft reset the chip.:)
198 * Some 896 and 876 chip revisions may hang-up if we set
199 * the SRST (soft reset) bit at the wrong time when SCRIPTS
201 * So, we need to abort the current operation prior to
202 * soft resetting the chip.
204 static void sym_soft_reset (hcb_p np)
209 if (!(np->features & FE_ISTAT1) || !(INB (nc_istat1) & SCRUN))
212 OUTB (nc_istat, CABRT);
213 for (i = 100000 ; i ; --i) {
214 istat = INB (nc_istat);
218 else if (istat & DIP) {
219 if (INB (nc_dstat) & ABRT)
226 printf("%s: unable to abort current chip operation, "
227 "ISTAT=0x%02x.\n", sym_name(np), istat);
233 * Start reset process.
235 * The interrupt handler will reinitialize the chip.
237 static void sym_start_reset(hcb_p np)
239 (void) sym_reset_scsi_bus(np, 1);
242 int sym_reset_scsi_bus(hcb_p np, int enab_int)
247 sym_soft_reset(np); /* Soft reset the chip */
251 * Enable Tolerant, reset IRQD if present and
252 * properly set IRQ mode, prior to resetting the bus.
254 OUTB (nc_stest3, TE);
255 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
256 OUTB (nc_scntl1, CRST);
259 if (!SYM_SETUP_SCSI_BUS_CHECK)
262 * Check for no terminators or SCSI bus shorts to ground.
263 * Read SCSI data bus, data parity bits and control signals.
264 * We are expecting RESET to be TRUE and other signals to be
267 term = INB(nc_sstat0);
268 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
269 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
270 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
271 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
272 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
277 if (term != (2<<7)) {
278 printf("%s: suspicious SCSI data while resetting the BUS.\n",
280 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
281 "0x%lx, expecting 0x%lx\n",
283 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
284 (u_long)term, (u_long)(2<<7));
285 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
294 * Select SCSI clock frequency
296 static void sym_selectclock(hcb_p np, u_char scntl3)
299 * If multiplier not present or not selected, leave here.
301 if (np->multiplier <= 1) {
302 OUTB(nc_scntl3, scntl3);
306 if (sym_verbose >= 2)
307 printf ("%s: enabling clock multiplier\n", sym_name(np));
309 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
311 * Wait for the LCKFRQ bit to be set if supported by the chip.
312 * Otherwise wait 50 micro-seconds (at least).
314 if (np->features & FE_LCKFRQ) {
316 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
319 printf("%s: the chip cannot lock the frequency\n",
323 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
324 OUTB(nc_scntl3, scntl3);
325 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
326 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
331 * Determine the chip's clock frequency.
333 * This is essential for the negotiation of the synchronous
336 * Note: we have to return the correct value.
337 * THERE IS NO SAFE DEFAULT VALUE.
339 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
340 * 53C860 and 53C875 rev. 1 support fast20 transfers but
341 * do not have a clock doubler and so are provided with a
342 * 80 MHz clock. All other fast20 boards incorporate a doubler
343 * and so should be delivered with a 40 MHz clock.
344 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
345 * clock and provide a clock quadrupler (160 Mhz).
349 * calculate SCSI clock frequency (in KHz)
351 static unsigned getfreq (hcb_p np, int gen)
357 * Measure GEN timer delay in order
358 * to calculate SCSI clock frequency
360 * This code will never execute too
361 * many loop iterations (if DELAY is
362 * reasonably correct). It could get
363 * too low a delay (too high a freq.)
364 * if the CPU is slow executing the
365 * loop for some reason (an NMI, for
366 * example). For this reason we will
367 * if multiple measurements are to be
368 * performed trust the higher delay
369 * (lower frequency returned).
371 OUTW (nc_sien , 0); /* mask all scsi interrupts */
372 (void) INW (nc_sist); /* clear pending scsi interrupt */
373 OUTB (nc_dien , 0); /* mask all dma interrupts */
374 (void) INW (nc_sist); /* another one, just to be sure :) */
376 * The C1010-33 core does not report GEN in SIST,
377 * if this interrupt is masked in SIEN.
378 * I don't know yet if the C1010-66 behaves the same way.
380 if (np->features & FE_C10) {
382 OUTB (nc_istat1, SIRQD);
384 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
385 OUTB (nc_stime1, 0); /* disable general purpose timer */
386 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
387 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
388 UDELAY (1000/4);/* count in 1/4 of ms */
389 OUTB (nc_stime1, 0); /* disable general purpose timer */
391 * Undo C1010-33 specific settings.
393 if (np->features & FE_C10) {
398 * set prescaler to divide by whatever 0 means
399 * 0 ought to choose divide by 2, but appears
400 * to set divide by 3.5 mode in my 53c810 ...
405 * adjust for prescaler, and convert into KHz
407 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
410 * The C1010-33 result is biased by a factor
411 * of 2/3 compared to earlier chips.
413 if (np->features & FE_C10)
416 if (sym_verbose >= 2)
417 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
418 sym_name(np), gen, ms/4, f);
423 static unsigned sym_getfreq (hcb_p np)
428 (void) getfreq (np, gen); /* throw away first result */
429 f1 = getfreq (np, gen);
430 f2 = getfreq (np, gen);
431 if (f1 > f2) f1 = f2; /* trust lower result */
436 * Get/probe chip SCSI clock frequency
438 static void sym_getclock (hcb_p np, int mult)
440 unsigned char scntl3 = np->sv_scntl3;
441 unsigned char stest1 = np->sv_stest1;
447 * True with 875/895/896/895A with clock multiplier selected
449 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
450 if (sym_verbose >= 2)
451 printf ("%s: clock multiplier found\n", sym_name(np));
452 np->multiplier = mult;
456 * If multiplier not found or scntl3 not 7,5,3,
457 * reset chip and get frequency from general purpose timer.
458 * Otherwise trust scntl3 BIOS setting.
460 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
461 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
462 f1 = sym_getfreq (np);
465 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
467 if (f1 < 45000) f1 = 40000;
468 else if (f1 < 55000) f1 = 50000;
471 if (f1 < 80000 && mult > 1) {
472 if (sym_verbose >= 2)
473 printf ("%s: clock multiplier assumed\n",
475 np->multiplier = mult;
478 if ((scntl3 & 7) == 3) f1 = 40000;
479 else if ((scntl3 & 7) == 5) f1 = 80000;
482 f1 /= np->multiplier;
486 * Compute controller synchronous parameters.
488 f1 *= np->multiplier;
493 * Get/probe PCI clock frequency
495 static int sym_getpciclock (hcb_p np)
500 * For now, we only need to know about the actual
501 * PCI BUS clock frequency for C1010-66 chips.
504 if (np->features & FE_66MHZ) {
508 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
509 f = (int) sym_getfreq (np);
518 * SYMBIOS chip clock divisor table.
520 * Divisors are multiplied by 10,000,000 in order to make
521 * calculations more simple.
524 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
527 * Get clock factor and sync divisor for a given
528 * synchronous factor period.
531 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
533 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
534 int div = np->clock_divn; /* Number of divisors supported */
535 u32 fak; /* Sync factor in sxfer */
536 u32 per; /* Period in tenths of ns */
537 u32 kpc; /* (per * clk) */
541 * Compute the synchronous period in tenths of nano-seconds
543 if (dt && sfac <= 9) per = 125;
544 else if (sfac <= 10) per = 250;
545 else if (sfac == 11) per = 303;
546 else if (sfac == 12) per = 500;
547 else per = 40 * sfac;
555 * For earliest C10 revision 0, we cannot use extra
556 * clocks for the setting of the SCSI clocking.
557 * Note that this limits the lowest sync data transfer
558 * to 5 Mega-transfers per second and may result in
559 * using higher clock divisors.
562 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
564 * Look for the lowest clock divisor that allows an
565 * output speed not faster than the period.
569 if (kpc > (div_10M[div] << 2)) {
574 fak = 0; /* No extra clocks */
575 if (div == np->clock_divn) { /* Are we too fast ? */
585 * Look for the greatest clock divisor that allows an
586 * input speed faster than the period.
589 if (kpc >= (div_10M[div] << 2)) break;
592 * Calculate the lowest clock factor that allows an output
593 * speed not faster than the period, and the max output speed.
594 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
595 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
598 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
599 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
601 fak = (kpc - 1) / div_10M[div] + 1 - 4;
602 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
606 * Check against our hardware limits, or bugs :).
614 * Compute and return sync parameters.
623 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
624 * 128 transfers. All chips support at least 16 transfers
625 * bursts. The 825A, 875 and 895 chips support bursts of up
626 * to 128 transfers and the 895A and 896 support bursts of up
627 * to 64 transfers. All other chips support up to 16
630 * For PCI 32 bit data transfers each transfer is a DWORD.
631 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
633 * We use log base 2 (burst length) as internal code, with
634 * value 0 meaning "burst disabled".
638 * Burst length from burst code.
640 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
643 * Burst code from io register bits.
645 #define burst_code(dmode, ctest4, ctest5) \
646 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
649 * Set initial io register bits from burst code.
651 static __inline void sym_init_burst(hcb_p np, u_char bc)
653 np->rv_ctest4 &= ~0x80;
654 np->rv_dmode &= ~(0x3 << 6);
655 np->rv_ctest5 &= ~0x4;
658 np->rv_ctest4 |= 0x80;
662 np->rv_dmode |= ((bc & 0x3) << 6);
663 np->rv_ctest5 |= (bc & 0x4);
669 * Print out the list of targets that have some flag disabled by user.
671 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
676 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
679 if (np->target[i].usrflags & mask) {
681 printf("%s: %s disabled for targets",
691 * Save initial settings of some IO registers.
692 * Assumed to have been set by BIOS.
693 * We cannot reset the chip prior to reading the
694 * IO registers, since informations will be lost.
695 * Since the SCRIPTS processor may be running, this
696 * is not safe on paper, but it seems to work quite
699 static void sym_save_initial_setting (hcb_p np)
701 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
702 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
703 np->sv_dmode = INB(nc_dmode) & 0xce;
704 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
705 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
706 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
707 np->sv_gpcntl = INB(nc_gpcntl);
708 np->sv_stest1 = INB(nc_stest1);
709 np->sv_stest2 = INB(nc_stest2) & 0x20;
710 np->sv_stest4 = INB(nc_stest4);
711 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
712 np->sv_scntl4 = INB(nc_scntl4);
713 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
716 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
720 static u32 parisc_setup_hcb(hcb_p np, u32 period)
722 unsigned long pdc_period;
724 struct hardware_path hwpath;
726 /* Host firmware (PDC) keeps a table for crippling SCSI capabilities.
727 * Many newer machines export one channel of 53c896 chip
728 * as SE, 50-pin HD. Also used for Multi-initiator SCSI clusters
729 * to set the SCSI Initiator ID.
731 get_pci_node_path(np->s.device, &hwpath);
732 if (!pdc_get_initiator(&hwpath, &np->myaddr, &pdc_period,
733 &np->maxwide, &scsi_mode))
736 if (scsi_mode >= 0) {
737 /* C3000 PDC reports period/mode */
738 SYM_SETUP_SCSI_DIFF = 0;
740 case 0: np->scsi_mode = SMODE_SE; break;
741 case 1: np->scsi_mode = SMODE_HVD; break;
742 case 2: np->scsi_mode = SMODE_LVD; break;
747 return (u32) pdc_period;
750 static inline int parisc_setup_hcb(hcb_p np, u32 period) { return period; }
753 * Prepare io register values used by sym_start_up()
754 * according to selected and supported features.
756 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
765 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
768 * Guess the frequency of the chip's clock.
770 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
771 np->clock_khz = 160000;
772 else if (np->features & FE_ULTRA)
773 np->clock_khz = 80000;
775 np->clock_khz = 40000;
778 * Get the clock multiplier factor.
780 if (np->features & FE_QUAD)
782 else if (np->features & FE_DBLR)
788 * Measure SCSI clock frequency for chips
789 * it may vary from assumed one.
791 if (np->features & FE_VARCLK)
792 sym_getclock(np, np->multiplier);
795 * Divisor to be used for async (timer pre-scaler).
797 i = np->clock_divn - 1;
799 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
807 * The C1010 uses hardwired divisors for async.
808 * So, we just throw away, the async. divisor.:-)
810 if (np->features & FE_C10)
814 * Minimum synchronous period factor supported by the chip.
815 * Btw, 'period' is in tenths of nanoseconds.
817 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
819 period = parisc_setup_hcb(np, period);
821 if (period <= 250) np->minsync = 10;
822 else if (period <= 303) np->minsync = 11;
823 else if (period <= 500) np->minsync = 12;
824 else np->minsync = (period + 40 - 1) / 40;
827 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
829 if (np->minsync < 25 &&
830 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
832 else if (np->minsync < 12 &&
833 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
837 * Maximum synchronous period factor supported by the chip.
839 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
840 np->maxsync = period > 2540 ? 254 : period / 10;
843 * If chip is a C1010, guess the sync limits in DT mode.
845 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
846 if (np->clock_khz == 160000) {
849 np->maxoffs_dt = nvram->type ? 62 : 31;
854 * 64 bit addressing (895A/896/1010) ?
856 if (np->features & FE_DAC) {
857 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
858 np->rv_ccntl1 |= (DDAC);
859 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
861 np->rv_ccntl1 |= (DDAC);
863 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
864 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
866 np->rv_ccntl1 |= (DDAC);
868 np->rv_ccntl1 |= (0 | EXTIBMV);
873 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
875 if (np->features & FE_NOPM)
876 np->rv_ccntl0 |= (ENPMJ);
879 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
880 * In dual channel mode, contention occurs if internal cycles
881 * are used. Disable internal cycles.
883 if (np->device_id == PCI_ID_LSI53C1010_33 &&
884 np->revision_id < 0x1)
885 np->rv_ccntl0 |= DILS;
888 * Select burst length (dwords)
890 burst_max = SYM_SETUP_BURST_ORDER;
891 if (burst_max == 255)
892 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
896 if (burst_max > np->maxburst)
897 burst_max = np->maxburst;
900 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
901 * This chip and the 860 Rev 1 may wrongly use PCI cache line
902 * based transactions on LOAD/STORE instructions. So we have
903 * to prevent these chips from using such PCI transactions in
904 * this driver. The generic ncr driver that does not use
905 * LOAD/STORE instructions does not need this work-around.
907 if ((np->device_id == PCI_ID_SYM53C810 &&
908 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
909 (np->device_id == PCI_ID_SYM53C860 &&
910 np->revision_id <= 0x1))
911 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
914 * Select all supported special features.
915 * If we are using on-board RAM for scripts, prefetch (PFEN)
916 * does not help, but burst op fetch (BOF) does.
917 * Disabling PFEN makes sure BOF will be used.
919 if (np->features & FE_ERL)
920 np->rv_dmode |= ERL; /* Enable Read Line */
921 if (np->features & FE_BOF)
922 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
923 if (np->features & FE_ERMP)
924 np->rv_dmode |= ERMP; /* Enable Read Multiple */
926 if ((np->features & FE_PFEN) && !np->ram_ba)
928 if (np->features & FE_PFEN)
930 np->rv_dcntl |= PFEN; /* Prefetch Enable */
931 if (np->features & FE_CLSE)
932 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
933 if (np->features & FE_WRIE)
934 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
935 if (np->features & FE_DFS)
936 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
941 if (SYM_SETUP_PCI_PARITY)
942 np->rv_ctest4 |= MPEE; /* Master parity checking */
943 if (SYM_SETUP_SCSI_PARITY)
944 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
947 * Get parity checking, host ID and verbose mode from NVRAM
950 sym_nvram_setup_host (np, nvram);
953 * Get SCSI addr of host adapter (set by bios?).
955 if (np->myaddr == 255) {
956 np->myaddr = INB(nc_scid) & 0x07;
958 np->myaddr = SYM_SETUP_HOST_ID;
962 * Prepare initial io register bits for burst length
964 sym_init_burst(np, burst_max);
968 * - LVD capable chips (895/895A/896/1010) report the
969 * current BUS mode through the STEST4 IO register.
970 * - For previous generation chips (825/825A/875),
971 * user has to tell us how to check against HVD,
972 * since a 100% safe algorithm is not possible.
974 np->scsi_mode = SMODE_SE;
975 if (np->features & (FE_ULTRA2|FE_ULTRA3))
976 np->scsi_mode = (np->sv_stest4 & SMODE);
977 else if (np->features & FE_DIFF) {
978 if (SYM_SETUP_SCSI_DIFF == 1) {
980 if (np->sv_stest2 & 0x20)
981 np->scsi_mode = SMODE_HVD;
983 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
984 if (!(INB(nc_gpreg) & 0x08))
985 np->scsi_mode = SMODE_HVD;
988 else if (SYM_SETUP_SCSI_DIFF == 2)
989 np->scsi_mode = SMODE_HVD;
991 if (np->scsi_mode == SMODE_HVD)
992 np->rv_stest2 |= 0x20;
995 * Set LED support from SCRIPTS.
996 * Ignore this feature for boards known to use a
997 * specific GPIO wiring and for the 895A, 896
998 * and 1010 that drive the LED directly.
1000 if ((SYM_SETUP_SCSI_LED ||
1001 (nvram->type == SYM_SYMBIOS_NVRAM ||
1002 (nvram->type == SYM_TEKRAM_NVRAM &&
1003 np->device_id == PCI_ID_SYM53C895))) &&
1004 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
1005 np->features |= FE_LED0;
1010 switch(SYM_SETUP_IRQ_MODE & 3) {
1012 np->rv_dcntl |= IRQM;
1015 np->rv_dcntl |= (np->sv_dcntl & IRQM);
1022 * Configure targets according to driver setup.
1023 * If NVRAM present get targets setup from NVRAM.
1025 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
1026 tcb_p tp = &np->target[i];
1028 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
1029 tp->usrtags = SYM_SETUP_MAX_TAG;
1031 sym_nvram_setup_target (np, i, nvram);
1034 tp->usrflags &= ~SYM_TAGS_ENABLED;
1038 * Let user know about the settings.
1041 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
1042 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
1043 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
1045 (np->features & FE_ULTRA3) ? 80 :
1046 (np->features & FE_ULTRA2) ? 40 :
1047 (np->features & FE_ULTRA) ? 20 : 10,
1048 sym_scsi_bus_mode(np->scsi_mode),
1049 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
1051 * Tell him more on demand.
1054 printf("%s: %s IRQ line driver%s\n",
1056 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
1057 np->ram_ba ? ", using on-chip SRAM" : "");
1058 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
1059 if (np->features & FE_NOPM)
1060 printf("%s: handling phase mismatch from SCRIPTS.\n",
1066 if (sym_verbose >= 2) {
1067 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
1068 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
1069 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
1070 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
1072 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
1073 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
1074 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
1075 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
1078 * Let user be aware of targets that have some disable flags set.
1080 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
1082 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
1089 * Test the pci bus snoop logic :-(
1091 * Has to be called with interrupts disabled.
1093 #ifndef SYM_CONF_IOMAPPED
1094 static int sym_regtest (hcb_p np)
1096 register volatile u32 data;
1098 * chip registers may NOT be cached.
1099 * write 0xffffffff to a read only register area,
1100 * and try to read it back.
1103 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
1104 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
1106 if (data == 0xffffffff) {
1108 if ((data & 0xe2f0fffd) != 0x02000080) {
1110 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1118 static int sym_snooptest (hcb_p np)
1120 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1122 #ifndef SYM_CONF_IOMAPPED
1123 err |= sym_regtest (np);
1124 if (err) return (err);
1128 * Enable Master Parity Checking as we intend
1129 * to enable it for normal operations.
1131 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
1135 pc = SCRIPTZ_BA (np, snooptest);
1139 * Set memory and register.
1141 np->scratch = cpu_to_scr(host_wr);
1142 OUTL (nc_temp, sym_wr);
1144 * Start script (exchange values)
1146 OUTL (nc_dsa, np->hcb_ba);
1149 * Wait 'til done (with timeout)
1151 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1152 if (INB(nc_istat) & (INTF|SIP|DIP))
1154 if (i>=SYM_SNOOP_TIMEOUT) {
1155 printf ("CACHE TEST FAILED: timeout.\n");
1159 * Check for fatal DMA errors.
1161 dstat = INB (nc_dstat);
1162 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1163 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1164 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1165 "DISABLING MASTER DATA PARITY CHECKING.\n",
1167 np->rv_ctest4 &= ~MPEE;
1171 if (dstat & (MDPE|BF|IID)) {
1172 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1176 * Save termination position.
1180 * Read memory and register.
1182 host_rd = scr_to_cpu(np->scratch);
1183 sym_rd = INL (nc_scratcha);
1184 sym_bk = INL (nc_temp);
1186 * Check termination position.
1188 if (pc != SCRIPTZ_BA (np, snoopend)+8) {
1189 printf ("CACHE TEST FAILED: script execution failed.\n");
1190 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1191 (u_long) SCRIPTZ_BA (np, snooptest), (u_long) pc,
1192 (u_long) SCRIPTZ_BA (np, snoopend) +8);
1198 if (host_wr != sym_rd) {
1199 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1200 (int) host_wr, (int) sym_rd);
1203 if (host_rd != sym_wr) {
1204 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1205 (int) sym_wr, (int) host_rd);
1208 if (sym_bk != sym_wr) {
1209 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1210 (int) sym_wr, (int) sym_bk);
1218 * log message for real hard errors
1220 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1221 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1223 * exception register:
1228 * so: control lines as driven by chip.
1229 * si: control lines as seen by chip.
1230 * sd: scsi data lines as seen by chip.
1233 * sx: sxfer (see the manual)
1234 * s3: scntl3 (see the manual)
1235 * s4: scntl4 (see the manual)
1237 * current script command:
1238 * dsp: script address (relative to start of script).
1239 * dbc: first word of script command.
1241 * First 24 register of the chip:
1244 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
1250 u_char *script_base;
1255 if (dsp > np->scripta_ba &&
1256 dsp <= np->scripta_ba + np->scripta_sz) {
1257 script_ofs = dsp - np->scripta_ba;
1258 script_size = np->scripta_sz;
1259 script_base = (u_char *) np->scripta0;
1260 script_name = "scripta";
1262 else if (np->scriptb_ba < dsp &&
1263 dsp <= np->scriptb_ba + np->scriptb_sz) {
1264 script_ofs = dsp - np->scriptb_ba;
1265 script_size = np->scriptb_sz;
1266 script_base = (u_char *) np->scriptb0;
1267 script_name = "scriptb";
1272 script_name = "mem";
1275 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1276 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
1277 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
1278 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
1279 (unsigned)INB (nc_scntl3),
1280 (np->features & FE_C10) ? (unsigned)INB (nc_scntl4) : 0,
1281 script_name, script_ofs, (unsigned)INL (nc_dbc));
1283 if (((script_ofs & 3) == 0) &&
1284 (unsigned)script_ofs < script_size) {
1285 printf ("%s: script cmd = %08x\n", sym_name(np),
1286 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1289 printf ("%s: regdump:", sym_name(np));
1291 printf (" %02x", (unsigned)INB_OFF(i));
1297 if (dstat & (MDPE|BF))
1298 sym_log_bus_error(np);
1301 static struct sym_pci_chip sym_pci_dev_table[] = {
1302 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
1305 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1306 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
1310 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
1311 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1314 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
1317 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
1318 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1320 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
1321 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1323 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
1324 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1326 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
1327 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1328 FE_RAM|FE_DIFF|FE_VARCLK}
1330 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
1331 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1332 FE_RAM|FE_DIFF|FE_VARCLK}
1334 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
1335 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1336 FE_RAM|FE_DIFF|FE_VARCLK}
1338 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
1339 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1340 FE_RAM|FE_DIFF|FE_VARCLK}
1342 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1343 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
1344 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1348 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
1349 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1353 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
1354 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1355 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1357 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
1358 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1359 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1361 {PCI_ID_SYM53C875A, 0xff, "875a", 6, 31, 7, 4,
1362 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1363 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1365 {PCI_ID_LSI53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1366 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1367 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1370 {PCI_ID_LSI53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1371 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1372 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1375 {PCI_ID_LSI53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1376 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1377 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1380 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
1381 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1382 FE_RAM|FE_IO256|FE_LEDC}
1385 #define sym_pci_num_devs \
1386 (sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
1389 * Look up the chip table.
1391 * Return a pointer to the chip entry if found,
1394 struct sym_pci_chip *
1395 sym_lookup_pci_chip_table (u_short device_id, u_char revision)
1397 struct sym_pci_chip *chip;
1400 for (i = 0; i < sym_pci_num_devs; i++) {
1401 chip = &sym_pci_dev_table[i];
1402 if (device_id != chip->device_id)
1404 if (revision > chip->revision_id)
1412 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1414 * Lookup the 64 bit DMA segments map.
1415 * This is only used if the direct mapping
1416 * has been unsuccessful.
1418 int sym_lookup_dmap(hcb_p np, u32 h, int s)
1425 /* Look up existing mappings */
1426 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1427 if (h == np->dmap_bah[i])
1430 /* If direct mapping is free, get it */
1431 if (!np->dmap_bah[s])
1433 /* Collision -> lookup free mappings */
1434 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1435 if (!np->dmap_bah[s])
1439 panic("sym: ran out of 64 bit DMA segment registers");
1442 np->dmap_bah[s] = h;
1448 * Update IO registers scratch C..R so they will be
1449 * in sync. with queued CCB expectations.
1451 static void sym_update_dmap_regs(hcb_p np)
1455 if (!np->dmap_dirty)
1457 o = offsetof(struct sym_reg, nc_scrx[0]);
1458 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1459 OUTL_OFF(o, np->dmap_bah[i]);
1466 static void sym_check_goals(struct scsi_device *sdev)
1468 struct sym_hcb *np = ((struct host_data *)sdev->host->hostdata)->ncb;
1469 struct sym_trans *st = &np->target[sdev->id].tinfo.goal;
1471 /* here we enforce all the fiddly SPI rules */
1473 if (!scsi_device_wide(sdev))
1476 if (!scsi_device_sync(sdev)) {
1483 if (scsi_device_dt(sdev)) {
1484 if (scsi_device_dt_only(sdev))
1485 st->options |= PPR_OPT_DT;
1487 if (st->offset == 0)
1488 st->options &= ~PPR_OPT_DT;
1490 st->options &= ~PPR_OPT_DT;
1493 if (!(np->features & FE_ULTRA3))
1494 st->options &= ~PPR_OPT_DT;
1496 if (st->options & PPR_OPT_DT) {
1497 /* all DT transfers must be wide */
1499 if (st->offset > np->maxoffs_dt)
1500 st->offset = np->maxoffs_dt;
1501 if (st->period < np->minsync_dt)
1502 st->period = np->minsync_dt;
1503 if (st->period > np->maxsync_dt)
1504 st->period = np->maxsync_dt;
1506 st->options &= ~PPR_OPT_MASK;
1507 if (st->offset > np->maxoffs)
1508 st->offset = np->maxoffs;
1509 if (st->period < np->minsync)
1510 st->period = np->minsync;
1511 if (st->period > np->maxsync)
1512 st->period = np->maxsync;
1517 * Prepare the next negotiation message if needed.
1519 * Fill in the part of message buffer that contains the
1520 * negotiation and the nego_status field of the CCB.
1521 * Returns the size of the message in bytes.
1523 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
1525 tcb_p tp = &np->target[cp->target];
1527 struct scsi_device *sdev = tp->sdev;
1530 sym_check_goals(sdev);
1533 * Early C1010 chips need a work-around for DT
1534 * data transfer to work.
1536 if (!(np->features & FE_U3EN))
1537 tp->tinfo.goal.options = 0;
1539 * negotiate using PPR ?
1541 if (scsi_device_dt(sdev)) {
1545 * negotiate wide transfers ?
1547 if (tp->tinfo.curr.width != tp->tinfo.goal.width)
1550 * negotiate synchronous transfers?
1552 else if (tp->tinfo.curr.period != tp->tinfo.goal.period ||
1553 tp->tinfo.curr.offset != tp->tinfo.goal.offset)
1559 msgptr[msglen++] = M_EXTENDED;
1560 msgptr[msglen++] = 3;
1561 msgptr[msglen++] = M_X_SYNC_REQ;
1562 msgptr[msglen++] = tp->tinfo.goal.period;
1563 msgptr[msglen++] = tp->tinfo.goal.offset;
1566 msgptr[msglen++] = M_EXTENDED;
1567 msgptr[msglen++] = 2;
1568 msgptr[msglen++] = M_X_WIDE_REQ;
1569 msgptr[msglen++] = tp->tinfo.goal.width;
1572 msgptr[msglen++] = M_EXTENDED;
1573 msgptr[msglen++] = 6;
1574 msgptr[msglen++] = M_X_PPR_REQ;
1575 msgptr[msglen++] = tp->tinfo.goal.period;
1576 msgptr[msglen++] = 0;
1577 msgptr[msglen++] = tp->tinfo.goal.offset;
1578 msgptr[msglen++] = tp->tinfo.goal.width;
1579 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_MASK;
1583 cp->nego_status = nego;
1586 tp->nego_cp = cp; /* Keep track a nego will be performed */
1587 if (DEBUG_FLAGS & DEBUG_NEGO) {
1588 sym_print_nego_msg(np, cp->target,
1589 nego == NS_SYNC ? "sync msgout" :
1590 nego == NS_WIDE ? "wide msgout" :
1591 "ppr msgout", msgptr);
1599 * Insert a job into the start queue.
1601 void sym_put_start_queue(hcb_p np, ccb_p cp)
1605 #ifdef SYM_CONF_IARB_SUPPORT
1607 * If the previously queued CCB is not yet done,
1608 * set the IARB hint. The SCRIPTS will go with IARB
1609 * for this job when starting the previous one.
1610 * We leave devices a chance to win arbitration by
1611 * not using more than 'iarb_max' consecutive
1612 * immediate arbitrations.
1614 if (np->last_cp && np->iarb_count < np->iarb_max) {
1615 np->last_cp->host_flags |= HF_HINT_IARB;
1623 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1625 * Make SCRIPTS aware of the 64 bit DMA
1626 * segment registers not being up-to-date.
1629 cp->host_xflags |= HX_DMAP_DIRTY;
1633 * Optionnaly, set the IO timeout condition.
1635 #ifdef SYM_OPT_HANDLE_IO_TIMEOUT
1636 sym_timeout_ccb(np, cp, sym_cam_timeout(cp->cam_ccb));
1640 * Insert first the idle task and then our job.
1641 * The MBs should ensure proper ordering.
1643 qidx = np->squeueput + 2;
1644 if (qidx >= MAX_QUEUE*2) qidx = 0;
1646 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1647 MEMORY_WRITE_BARRIER();
1648 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1650 np->squeueput = qidx;
1652 if (DEBUG_FLAGS & DEBUG_QUEUE)
1653 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
1656 * Script processor may be waiting for reselect.
1659 MEMORY_WRITE_BARRIER();
1660 OUTB (nc_istat, SIGP|np->istat_sem);
1663 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1665 * Start next ready-to-start CCBs.
1667 void sym_start_next_ccbs(hcb_p np, lcb_p lp, int maxn)
1673 * Paranoia, as usual. :-)
1675 assert(!lp->started_tags || !lp->started_no_tag);
1678 * Try to start as many commands as asked by caller.
1679 * Prevent from having both tagged and untagged
1680 * commands queued to the device at the same time.
1683 qp = sym_remque_head(&lp->waiting_ccbq);
1686 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1687 if (cp->tag != NO_TAG) {
1688 if (lp->started_no_tag ||
1689 lp->started_tags >= lp->started_max) {
1690 sym_insque_head(qp, &lp->waiting_ccbq);
1693 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1695 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
1698 if (lp->started_no_tag || lp->started_tags) {
1699 sym_insque_head(qp, &lp->waiting_ccbq);
1702 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1704 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
1705 ++lp->started_no_tag;
1708 sym_insque_tail(qp, &lp->started_ccbq);
1709 sym_put_start_queue(np, cp);
1712 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1715 * The chip may have completed jobs. Look at the DONE QUEUE.
1717 * On paper, memory read barriers may be needed here to
1718 * prevent out of order LOADs by the CPU from having
1719 * prefetched stale data prior to DMA having occurred.
1721 static int sym_wakeup_done (hcb_p np)
1730 /* MEMORY_READ_BARRIER(); */
1732 dsa = scr_to_cpu(np->dqueue[i]);
1736 if ((i = i+2) >= MAX_QUEUE*2)
1739 cp = sym_ccb_from_dsa(np, dsa);
1741 MEMORY_READ_BARRIER();
1742 sym_complete_ok (np, cp);
1746 printf ("%s: bad DSA (%x) in done queue.\n",
1747 sym_name(np), (u_int) dsa);
1755 * Complete all active CCBs with error.
1756 * Used on CHIP/SCSI RESET.
1758 static void sym_flush_busy_queue (hcb_p np, int cam_status)
1761 * Move all active CCBs to the COMP queue
1762 * and flush this queue.
1764 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1765 sym_que_init(&np->busy_ccbq);
1766 sym_flush_comp_queue(np, cam_status);
1773 * 0: initialisation.
1774 * 1: SCSI BUS RESET delivered or received.
1775 * 2: SCSI BUS MODE changed.
1777 void sym_start_up (hcb_p np, int reason)
1783 * Reset chip if asked, otherwise just clear fifos.
1788 OUTB (nc_stest3, TE|CSF);
1789 OUTONB (nc_ctest3, CLF);
1795 phys = np->squeue_ba;
1796 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1797 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1798 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1800 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1803 * Start at first entry.
1810 phys = np->dqueue_ba;
1811 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1813 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1815 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1818 * Start at first entry.
1823 * Install patches in scripts.
1824 * This also let point to first position the start
1825 * and done queue pointers used from SCRIPTS.
1830 * Wakeup all pending jobs.
1832 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
1837 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
1838 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
1840 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
1841 /* full arb., ena parity, par->ATN */
1842 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1844 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1846 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1847 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1848 OUTB (nc_istat , SIGP ); /* Signal Process */
1849 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1850 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1852 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1853 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1854 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
1856 /* Extended Sreq/Sack filtering not supported on the C10 */
1857 if (np->features & FE_C10)
1858 OUTB (nc_stest2, np->rv_stest2);
1860 OUTB (nc_stest2, EXT|np->rv_stest2);
1862 OUTB (nc_stest3, TE); /* TolerANT enable */
1863 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1866 * For now, disable AIP generation on C1010-66.
1868 if (np->device_id == PCI_ID_LSI53C1010_66)
1869 OUTB (nc_aipcntl1, DISAIP);
1872 * C10101 rev. 0 errata.
1873 * Errant SGE's when in narrow. Write bits 4 & 5 of
1874 * STEST1 register to disable SGE. We probably should do
1875 * that from SCRIPTS for each selection/reselection, but
1876 * I just don't want. :)
1878 if (np->device_id == PCI_ID_LSI53C1010_33 &&
1879 np->revision_id < 1)
1880 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
1883 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1884 * Disable overlapped arbitration for some dual function devices,
1885 * regardless revision id (kind of post-chip-design feature. ;-))
1887 if (np->device_id == PCI_ID_SYM53C875)
1888 OUTB (nc_ctest0, (1<<5));
1889 else if (np->device_id == PCI_ID_SYM53C896)
1890 np->rv_ccntl0 |= DPR;
1893 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1894 * and/or hardware phase mismatch, since only such chips
1895 * seem to support those IO registers.
1897 if (np->features & (FE_DAC|FE_NOPM)) {
1898 OUTB (nc_ccntl0, np->rv_ccntl0);
1899 OUTB (nc_ccntl1, np->rv_ccntl1);
1902 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1904 * Set up scratch C and DRS IO registers to map the 32 bit
1905 * DMA address range our data structures are located in.
1908 np->dmap_bah[0] = 0; /* ??? */
1909 OUTL (nc_scrx[0], np->dmap_bah[0]);
1910 OUTL (nc_drs, np->dmap_bah[0]);
1915 * If phase mismatch handled by scripts (895A/896/1010),
1916 * set PM jump addresses.
1918 if (np->features & FE_NOPM) {
1919 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
1920 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
1924 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1925 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1927 if (np->features & FE_LED0)
1928 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
1929 else if (np->features & FE_LEDC)
1930 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
1935 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1936 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
1939 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1940 * Try to eat the spurious SBMC interrupt that may occur when
1941 * we reset the chip but not the SCSI BUS (at initialization).
1943 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1944 OUTONW (nc_sien, SBMC);
1949 np->scsi_mode = INB (nc_stest4) & SMODE;
1953 * Fill in target structure.
1954 * Reinitialize usrsync.
1955 * Reinitialize usrwide.
1956 * Prepare sync negotiation according to actual SCSI bus mode.
1958 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1959 tcb_p tp = &np->target[i];
1963 tp->head.wval = np->rv_scntl3;
1966 tp->tinfo.curr.period = 0;
1967 tp->tinfo.curr.offset = 0;
1968 tp->tinfo.curr.width = BUS_8_BIT;
1969 tp->tinfo.curr.options = 0;
1973 * Download SCSI SCRIPTS to on-chip RAM if present,
1974 * and start script processor.
1975 * We do the download preferently from the CPU.
1976 * For platforms that may not support PCI memory mapping,
1977 * we use simple SCRIPTS that performs MEMORY MOVEs.
1980 if (sym_verbose >= 2)
1981 printf ("%s: Downloading SCSI SCRIPTS.\n",
1983 if (np->ram_ws == 8192) {
1984 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
1985 phys = scr_to_cpu(np->scr_ram_seg);
1986 OUTL (nc_mmws, phys);
1987 OUTL (nc_mmrs, phys);
1988 OUTL (nc_sfs, phys);
1989 phys = SCRIPTB_BA (np, start64);
1992 phys = SCRIPTA_BA (np, init);
1993 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
1996 phys = SCRIPTA_BA (np, init);
2000 OUTL (nc_dsa, np->hcb_ba);
2004 * Notify the XPT about the RESET condition.
2007 sym_xpt_async_bus_reset(np);
2011 * Switch trans mode for current job and it's target.
2013 static void sym_settrans(hcb_p np, int target, u_char opts, u_char ofs,
2014 u_char per, u_char wide, u_char div, u_char fak)
2017 u_char sval, wval, uval;
2018 tcb_p tp = &np->target[target];
2020 assert(target == (INB (nc_sdid) & 0x0f));
2022 sval = tp->head.sval;
2023 wval = tp->head.wval;
2024 uval = tp->head.uval;
2027 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
2028 sval, wval, uval, np->rv_scntl3);
2033 if (!(np->features & FE_C10))
2034 sval = (sval & ~0x1f) | ofs;
2036 sval = (sval & ~0x3f) | ofs;
2039 * Set the sync divisor and extra clock factor.
2042 wval = (wval & ~0x70) | ((div+1) << 4);
2043 if (!(np->features & FE_C10))
2044 sval = (sval & ~0xe0) | (fak << 5);
2046 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
2047 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
2048 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
2053 * Set the bus width.
2060 * Set misc. ultra enable bits.
2062 if (np->features & FE_C10) {
2063 uval = uval & ~(U3EN|AIPCKEN);
2065 assert(np->features & FE_U3EN);
2070 wval = wval & ~ULTRA;
2071 if (per <= 12) wval |= ULTRA;
2075 * Stop there if sync parameters are unchanged.
2077 if (tp->head.sval == sval &&
2078 tp->head.wval == wval &&
2079 tp->head.uval == uval)
2081 tp->head.sval = sval;
2082 tp->head.wval = wval;
2083 tp->head.uval = uval;
2086 * Disable extended Sreq/Sack filtering if per < 50.
2087 * Not supported on the C1010.
2089 if (per < 50 && !(np->features & FE_C10))
2090 OUTOFFB (nc_stest2, EXT);
2093 * set actual value and sync_status
2095 OUTB (nc_sxfer, tp->head.sval);
2096 OUTB (nc_scntl3, tp->head.wval);
2098 if (np->features & FE_C10) {
2099 OUTB (nc_scntl4, tp->head.uval);
2103 * patch ALL busy ccbs of this target.
2105 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2107 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2108 if (cp->target != target)
2110 cp->phys.select.sel_scntl3 = tp->head.wval;
2111 cp->phys.select.sel_sxfer = tp->head.sval;
2112 if (np->features & FE_C10) {
2113 cp->phys.select.sel_scntl4 = tp->head.uval;
2119 * We received a WDTR.
2120 * Let everything be aware of the changes.
2122 static void sym_setwide(hcb_p np, int target, u_char wide)
2124 tcb_p tp = &np->target[target];
2126 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2128 tp->tinfo.goal.width = tp->tinfo.curr.width = wide;
2129 tp->tinfo.curr.offset = 0;
2130 tp->tinfo.curr.period = 0;
2131 tp->tinfo.curr.options = 0;
2133 sym_xpt_async_nego_wide(np, target);
2137 * We received a SDTR.
2138 * Let everything be aware of the changes.
2141 sym_setsync(hcb_p np, int target,
2142 u_char ofs, u_char per, u_char div, u_char fak)
2144 tcb_p tp = &np->target[target];
2145 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2147 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2149 tp->tinfo.curr.period = per;
2150 tp->tinfo.curr.offset = ofs;
2151 tp->tinfo.curr.options = 0;
2153 if (!(tp->tinfo.goal.options & PPR_OPT_MASK)) {
2154 tp->tinfo.goal.period = per;
2155 tp->tinfo.goal.offset = ofs;
2156 tp->tinfo.goal.options = 0;
2159 sym_xpt_async_nego_sync(np, target);
2163 * We received a PPR.
2164 * Let everything be aware of the changes.
2167 sym_setpprot(hcb_p np, int target, u_char opts, u_char ofs,
2168 u_char per, u_char wide, u_char div, u_char fak)
2170 tcb_p tp = &np->target[target];
2172 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2174 tp->tinfo.goal.width = tp->tinfo.curr.width = wide;
2175 tp->tinfo.goal.period = tp->tinfo.curr.period = per;
2176 tp->tinfo.goal.offset = tp->tinfo.curr.offset = ofs;
2177 tp->tinfo.goal.options = tp->tinfo.curr.options = opts;
2179 sym_xpt_async_nego_ppr(np, target);
2183 * generic recovery from scsi interrupt
2185 * The doc says that when the chip gets an SCSI interrupt,
2186 * it tries to stop in an orderly fashion, by completing
2187 * an instruction fetch that had started or by flushing
2188 * the DMA fifo for a write to memory that was executing.
2189 * Such a fashion is not enough to know if the instruction
2190 * that was just before the current DSP value has been
2193 * There are some small SCRIPTS sections that deal with
2194 * the start queue and the done queue that may break any
2195 * assomption from the C code if we are interrupted
2196 * inside, so we reset if this happens. Btw, since these
2197 * SCRIPTS sections are executed while the SCRIPTS hasn't
2198 * started SCSI operations, it is very unlikely to happen.
2200 * All the driver data structures are supposed to be
2201 * allocated from the same 4 GB memory window, so there
2202 * is a 1 to 1 relationship between DSA and driver data
2203 * structures. Since we are careful :) to invalidate the
2204 * DSA when we complete a command or when the SCRIPTS
2205 * pushes a DSA into a queue, we can trust it when it
2208 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
2210 u32 dsp = INL (nc_dsp);
2211 u32 dsa = INL (nc_dsa);
2212 ccb_p cp = sym_ccb_from_dsa(np, dsa);
2215 * If we haven't been interrupted inside the SCRIPTS
2216 * critical pathes, we can safely restart the SCRIPTS
2217 * and trust the DSA value if it matches a CCB.
2219 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
2220 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
2221 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
2222 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
2223 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
2224 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
2225 (!(dsp > SCRIPTA_BA (np, done) &&
2226 dsp < SCRIPTA_BA (np, done_end) + 1))) {
2227 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2228 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
2230 * If we have a CCB, let the SCRIPTS call us back for
2231 * the handling of the error with SCRATCHA filled with
2232 * STARTPOS. This way, we will be able to freeze the
2233 * device queue and requeue awaiting IOs.
2236 cp->host_status = hsts;
2237 OUTL_DSP (SCRIPTA_BA (np, complete_error));
2240 * Otherwise just restart the SCRIPTS.
2243 OUTL (nc_dsa, 0xffffff);
2244 OUTL_DSP (SCRIPTA_BA (np, start));
2253 sym_start_reset(np);
2257 * chip exception handler for selection timeout
2259 static void sym_int_sto (hcb_p np)
2261 u32 dsp = INL (nc_dsp);
2263 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2265 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
2266 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2268 sym_start_reset(np);
2272 * chip exception handler for unexpected disconnect
2274 static void sym_int_udc (hcb_p np)
2276 printf ("%s: unexpected disconnect\n", sym_name(np));
2277 sym_recover_scsi_int(np, HS_UNEXPECTED);
2281 * chip exception handler for SCSI bus mode change
2283 * spi2-r12 11.2.3 says a transceiver mode change must
2284 * generate a reset event and a device that detects a reset
2285 * event shall initiate a hard reset. It says also that a
2286 * device that detects a mode change shall set data transfer
2287 * mode to eight bit asynchronous, etc...
2288 * So, just reinitializing all except chip should be enough.
2290 static void sym_int_sbmc (hcb_p np)
2292 u_char scsi_mode = INB (nc_stest4) & SMODE;
2297 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2298 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2301 * Should suspend command processing for a few seconds and
2302 * reinitialize all except the chip.
2304 sym_start_up (np, 2);
2308 * chip exception handler for SCSI parity error.
2310 * When the chip detects a SCSI parity error and is
2311 * currently executing a (CH)MOV instruction, it does
2312 * not interrupt immediately, but tries to finish the
2313 * transfer of the current scatter entry before
2314 * interrupting. The following situations may occur:
2316 * - The complete scatter entry has been transferred
2317 * without the device having changed phase.
2318 * The chip will then interrupt with the DSP pointing
2319 * to the instruction that follows the MOV.
2321 * - A phase mismatch occurs before the MOV finished
2322 * and phase errors are to be handled by the C code.
2323 * The chip will then interrupt with both PAR and MA
2326 * - A phase mismatch occurs before the MOV finished and
2327 * phase errors are to be handled by SCRIPTS.
2328 * The chip will load the DSP with the phase mismatch
2329 * JUMP address and interrupt the host processor.
2331 static void sym_int_par (hcb_p np, u_short sist)
2333 u_char hsts = INB (HS_PRT);
2334 u32 dsp = INL (nc_dsp);
2335 u32 dbc = INL (nc_dbc);
2336 u32 dsa = INL (nc_dsa);
2337 u_char sbcl = INB (nc_sbcl);
2338 u_char cmd = dbc >> 24;
2339 int phase = cmd & 7;
2340 ccb_p cp = sym_ccb_from_dsa(np, dsa);
2342 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2343 sym_name(np), hsts, dbc, sbcl);
2346 * Check that the chip is connected to the SCSI BUS.
2348 if (!(INB (nc_scntl1) & ISCON)) {
2349 sym_recover_scsi_int(np, HS_UNEXPECTED);
2354 * If the nexus is not clearly identified, reset the bus.
2355 * We will try to do better later.
2361 * Check instruction was a MOV, direction was INPUT and
2364 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2368 * Keep track of the parity error.
2370 OUTONB (HF_PRT, HF_EXT_ERR);
2371 cp->xerr_status |= XE_PARITY_ERR;
2374 * Prepare the message to send to the device.
2376 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2379 * If the old phase was DATA IN phase, we have to deal with
2380 * the 3 situations described above.
2381 * For other input phases (MSG IN and STATUS), the device
2382 * must resend the whole thing that failed parity checking
2383 * or signal error. So, jumping to dispatcher should be OK.
2385 if (phase == 1 || phase == 5) {
2386 /* Phase mismatch handled by SCRIPTS */
2387 if (dsp == SCRIPTB_BA (np, pm_handle))
2389 /* Phase mismatch handled by the C code */
2392 /* No phase mismatch occurred */
2394 sym_set_script_dp (np, cp, dsp);
2395 OUTL_DSP (SCRIPTA_BA (np, dispatch));
2398 else if (phase == 7) /* We definitely cannot handle parity errors */
2399 #if 1 /* in message-in phase due to the relection */
2400 goto reset_all; /* path and various message anticipations. */
2402 OUTL_DSP (SCRIPTA_BA (np, clrack));
2405 OUTL_DSP (SCRIPTA_BA (np, dispatch));
2409 sym_start_reset(np);
2414 * chip exception handler for phase errors.
2416 * We have to construct a new transfer descriptor,
2417 * to transfer the rest of the current block.
2419 static void sym_int_ma (hcb_p np)
2432 u_char hflags, hflags0;
2441 rest = dbc & 0xffffff;
2445 * locate matching cp if any.
2447 cp = sym_ccb_from_dsa(np, dsa);
2450 * Donnot take into account dma fifo and various buffers in
2451 * INPUT phase since the chip flushes everything before
2452 * raising the MA interrupt for interrupted INPUT phases.
2453 * For DATA IN phase, we will check for the SWIDE later.
2455 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2458 if (np->features & FE_DFBC)
2459 delta = INW (nc_dfbc);
2464 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2466 dfifo = INL(nc_dfifo);
2469 * Calculate remaining bytes in DMA fifo.
2470 * (CTEST5 = dfifo >> 16)
2472 if (dfifo & (DFS << 16))
2473 delta = ((((dfifo >> 8) & 0x300) |
2474 (dfifo & 0xff)) - rest) & 0x3ff;
2476 delta = ((dfifo & 0xff) - rest) & 0x7f;
2480 * The data in the dma fifo has not been transfered to
2481 * the target -> add the amount to the rest
2482 * and clear the data.
2483 * Check the sstat2 register in case of wide transfer.
2486 ss0 = INB (nc_sstat0);
2487 if (ss0 & OLF) rest++;
2488 if (!(np->features & FE_C10))
2489 if (ss0 & ORF) rest++;
2490 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2491 ss2 = INB (nc_sstat2);
2492 if (ss2 & OLF1) rest++;
2493 if (!(np->features & FE_C10))
2494 if (ss2 & ORF1) rest++;
2500 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2501 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
2505 * log the information
2507 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2508 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
2509 (unsigned) rest, (unsigned) delta);
2512 * try to find the interrupted script command,
2513 * and the address at which to continue.
2517 if (dsp > np->scripta_ba &&
2518 dsp <= np->scripta_ba + np->scripta_sz) {
2519 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2522 else if (dsp > np->scriptb_ba &&
2523 dsp <= np->scriptb_ba + np->scriptb_sz) {
2524 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2529 * log the information
2531 if (DEBUG_FLAGS & DEBUG_PHASE) {
2532 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2533 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2537 printf ("%s: interrupted SCRIPT address not found.\n",
2543 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2549 * get old startaddress and old length.
2551 oadr = scr_to_cpu(vdsp[1]);
2553 if (cmd & 0x10) { /* Table indirect */
2554 tblp = (u32 *) ((char*) &cp->phys + oadr);
2555 olen = scr_to_cpu(tblp[0]);
2556 oadr = scr_to_cpu(tblp[1]);
2559 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2562 if (DEBUG_FLAGS & DEBUG_PHASE) {
2563 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2564 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2571 * check cmd against assumed interrupted script command.
2572 * If dt data phase, the MOVE instruction hasn't bit 4 of
2575 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2577 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2578 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
2584 * if old phase not dataphase, leave here.
2588 printf ("phase change %x-%x %d@%08x resid=%d.\n",
2589 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
2590 (unsigned)oadr, (unsigned)rest);
2591 goto unexpected_phase;
2595 * Choose the correct PM save area.
2597 * Look at the PM_SAVE SCRIPT if you want to understand
2598 * this stuff. The equivalent code is implemented in
2599 * SCRIPTS for the 895A, 896 and 1010 that are able to
2600 * handle PM from the SCRIPTS processor.
2602 hflags0 = INB (HF_PRT);
2605 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2606 if (hflags & HF_IN_PM0)
2607 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2608 else if (hflags & HF_IN_PM1)
2609 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2611 if (hflags & HF_DP_SAVED)
2612 hflags ^= HF_ACT_PM;
2615 if (!(hflags & HF_ACT_PM)) {
2617 newcmd = SCRIPTA_BA (np, pm0_data);
2621 newcmd = SCRIPTA_BA (np, pm1_data);
2624 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2625 if (hflags != hflags0)
2626 OUTB (HF_PRT, hflags);
2629 * fillin the phase mismatch context
2631 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2632 pm->sg.size = cpu_to_scr(rest);
2633 pm->ret = cpu_to_scr(nxtdsp);
2636 * If we have a SWIDE,
2637 * - prepare the address to write the SWIDE from SCRIPTS,
2638 * - compute the SCRIPTS address to restart from,
2639 * - move current data pointer context by one byte.
2641 nxtdsp = SCRIPTA_BA (np, dispatch);
2642 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2643 (INB (nc_scntl2) & WSR)) {
2647 * Set up the table indirect for the MOVE
2648 * of the residual byte and adjust the data
2651 tmp = scr_to_cpu(pm->sg.addr);
2652 cp->phys.wresid.addr = cpu_to_scr(tmp);
2653 pm->sg.addr = cpu_to_scr(tmp + 1);
2654 tmp = scr_to_cpu(pm->sg.size);
2655 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2656 pm->sg.size = cpu_to_scr(tmp - 1);
2659 * If only the residual byte is to be moved,
2660 * no PM context is needed.
2662 if ((tmp&0xffffff) == 1)
2666 * Prepare the address of SCRIPTS that will
2667 * move the residual byte to memory.
2669 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
2672 if (DEBUG_FLAGS & DEBUG_PHASE) {
2674 printf ("PM %x %x %x / %x %x %x.\n",
2675 hflags0, hflags, newcmd,
2676 (unsigned)scr_to_cpu(pm->sg.addr),
2677 (unsigned)scr_to_cpu(pm->sg.size),
2678 (unsigned)scr_to_cpu(pm->ret));
2682 * Restart the SCRIPTS processor.
2684 sym_set_script_dp (np, cp, newcmd);
2689 * Unexpected phase changes that occurs when the current phase
2690 * is not a DATA IN or DATA OUT phase are due to error conditions.
2691 * Such event may only happen when the SCRIPTS is using a
2692 * multibyte SCSI MOVE.
2694 * Phase change Some possible cause
2696 * COMMAND --> MSG IN SCSI parity error detected by target.
2697 * COMMAND --> STATUS Bad command or refused by target.
2698 * MSG OUT --> MSG IN Message rejected by target.
2699 * MSG OUT --> COMMAND Bogus target that discards extended
2700 * negotiation messages.
2702 * The code below does not care of the new phase and so
2703 * trusts the target. Why to annoy it ?
2704 * If the interrupted phase is COMMAND phase, we restart at
2706 * If a target does not get all the messages after selection,
2707 * the code assumes blindly that the target discards extended
2708 * messages and clears the negotiation status.
2709 * If the target does not want all our response to negotiation,
2710 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2711 * bloat for such a should_not_happen situation).
2712 * In all other situation, we reset the BUS.
2713 * Are these assumptions reasonnable ? (Wait and see ...)
2720 case 2: /* COMMAND phase */
2721 nxtdsp = SCRIPTA_BA (np, dispatch);
2724 case 3: /* STATUS phase */
2725 nxtdsp = SCRIPTA_BA (np, dispatch);
2728 case 6: /* MSG OUT phase */
2730 * If the device may want to use untagged when we want
2731 * tagged, we prepare an IDENTIFY without disc. granted,
2732 * since we will not be able to handle reselect.
2733 * Otherwise, we just don't care.
2735 if (dsp == SCRIPTA_BA (np, send_ident)) {
2736 if (cp->tag != NO_TAG && olen - rest <= 3) {
2737 cp->host_status = HS_BUSY;
2738 np->msgout[0] = IDENTIFY(0, cp->lun);
2739 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
2742 nxtdsp = SCRIPTB_BA (np, ident_break);
2744 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
2745 dsp == SCRIPTB_BA (np, send_sdtr) ||
2746 dsp == SCRIPTB_BA (np, send_ppr)) {
2747 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
2751 case 7: /* MSG IN phase */
2752 nxtdsp = SCRIPTA_BA (np, clrack);
2763 sym_start_reset(np);
2767 * chip interrupt handler
2769 * In normal situations, interrupt conditions occur one at
2770 * a time. But when something bad happens on the SCSI BUS,
2771 * the chip may raise several interrupt flags before
2772 * stopping and interrupting the CPU. The additionnal
2773 * interrupt flags are stacked in some extra registers
2774 * after the SIP and/or DIP flag has been raised in the
2775 * ISTAT. After the CPU has read the interrupt condition
2776 * flag from SIST or DSTAT, the chip unstacks the other
2777 * interrupt flags and sets the corresponding bits in
2778 * SIST or DSTAT. Since the chip starts stacking once the
2779 * SIP or DIP flag is set, there is a small window of time
2780 * where the stacking does not occur.
2782 * Typically, multiple interrupt conditions may happen in
2783 * the following situations:
2785 * - SCSI parity error + Phase mismatch (PAR|MA)
2786 * When an parity error is detected in input phase
2787 * and the device switches to msg-in phase inside a
2789 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2790 * When a stupid device does not want to handle the
2791 * recovery of an SCSI parity error.
2792 * - Some combinations of STO, PAR, UDC, ...
2793 * When using non compliant SCSI stuff, when user is
2794 * doing non compliant hot tampering on the BUS, when
2795 * something really bad happens to a device, etc ...
2797 * The heuristic suggested by SYMBIOS to handle
2798 * multiple interrupts is to try unstacking all
2799 * interrupts conditions and to handle them on some
2800 * priority based on error severity.
2801 * This will work when the unstacking has been
2802 * successful, but we cannot be 100 % sure of that,
2803 * since the CPU may have been faster to unstack than
2804 * the chip is able to stack. Hmmm ... But it seems that
2805 * such a situation is very unlikely to happen.
2807 * If this happen, for example STO caught by the CPU
2808 * then UDC happenning before the CPU have restarted
2809 * the SCRIPTS, the driver may wrongly complete the
2810 * same command on UDC, since the SCRIPTS didn't restart
2811 * and the DSA still points to the same command.
2812 * We avoid this situation by setting the DSA to an
2813 * invalid value when the CCB is completed and before
2814 * restarting the SCRIPTS.
2816 * Another issue is that we need some section of our
2817 * recovery procedures to be somehow uninterruptible but
2818 * the SCRIPTS processor does not provides such a
2819 * feature. For this reason, we handle recovery preferently
2820 * from the C code and check against some SCRIPTS critical
2821 * sections from the C code.
2823 * Hopefully, the interrupt handling of the driver is now
2824 * able to resist to weird BUS error conditions, but donnot
2825 * ask me for any guarantee that it will never fail. :-)
2826 * Use at your own decision and risk.
2829 void sym_interrupt (hcb_p np)
2831 u_char istat, istatc;
2836 * interrupt on the fly ?
2837 * (SCRIPTS may still be running)
2839 * A `dummy read' is needed to ensure that the
2840 * clear of the INTF flag reaches the device
2841 * and that posted writes are flushed to memory
2842 * before the scanning of the DONE queue.
2843 * Note that SCRIPTS also (dummy) read to memory
2844 * prior to deliver the INTF interrupt condition.
2846 istat = INB (nc_istat);
2848 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2849 istat = INB (nc_istat); /* DUMMY READ */
2850 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2851 (void)sym_wakeup_done (np);
2854 if (!(istat & (SIP|DIP)))
2857 #if 0 /* We should never get this one */
2859 OUTB (nc_istat, CABRT);
2863 * PAR and MA interrupts may occur at the same time,
2864 * and we need to know of both in order to handle
2865 * this situation properly. We try to unstack SCSI
2866 * interrupts for that reason. BTW, I dislike a LOT
2867 * such a loop inside the interrupt routine.
2868 * Even if DMA interrupt stacking is very unlikely to
2869 * happen, we also try unstacking these ones, since
2870 * this has no performance impact.
2877 sist |= INW (nc_sist);
2879 dstat |= INB (nc_dstat);
2880 istatc = INB (nc_istat);
2882 } while (istatc & (SIP|DIP));
2884 if (DEBUG_FLAGS & DEBUG_TINY)
2885 printf ("<%d|%x:%x|%x:%x>",
2888 (unsigned)INL(nc_dsp),
2889 (unsigned)INL(nc_dbc));
2891 * On paper, a memory read barrier may be needed here to
2892 * prevent out of order LOADs by the CPU from having
2893 * prefetched stale data prior to DMA having occurred.
2894 * And since we are paranoid ... :)
2896 MEMORY_READ_BARRIER();
2899 * First, interrupts we want to service cleanly.
2901 * Phase mismatch (MA) is the most frequent interrupt
2902 * for chip earlier than the 896 and so we have to service
2903 * it as quickly as possible.
2904 * A SCSI parity error (PAR) may be combined with a phase
2905 * mismatch condition (MA).
2906 * Programmed interrupts (SIR) are used to call the C code
2908 * The single step interrupt (SSI) is not used in this
2911 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2912 !(dstat & (MDPE|BF|ABRT|IID))) {
2913 if (sist & PAR) sym_int_par (np, sist);
2914 else if (sist & MA) sym_int_ma (np);
2915 else if (dstat & SIR) sym_int_sir (np);
2916 else if (dstat & SSI) OUTONB_STD ();
2917 else goto unknown_int;
2922 * Now, interrupts that donnot happen in normal
2923 * situations and that we may need to recover from.
2925 * On SCSI RESET (RST), we reset everything.
2926 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2927 * active CCBs with RESET status, prepare all devices
2928 * for negotiating again and restart the SCRIPTS.
2929 * On STO and UDC, we complete the CCB with the corres-
2930 * ponding status and restart the SCRIPTS.
2933 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2934 sym_start_up (np, 1);
2938 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2939 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
2941 if (!(sist & (GEN|HTH|SGE)) &&
2942 !(dstat & (MDPE|BF|ABRT|IID))) {
2943 if (sist & SBMC) sym_int_sbmc (np);
2944 else if (sist & STO) sym_int_sto (np);
2945 else if (sist & UDC) sym_int_udc (np);
2946 else goto unknown_int;
2951 * Now, interrupts we are not able to recover cleanly.
2953 * Log message for hard errors.
2957 sym_log_hard_error(np, sist, dstat);
2959 if ((sist & (GEN|HTH|SGE)) ||
2960 (dstat & (MDPE|BF|ABRT|IID))) {
2961 sym_start_reset(np);
2967 * We just miss the cause of the interrupt. :(
2968 * Print a message. The timeout will do the real work.
2970 printf( "%s: unknown interrupt(s) ignored, "
2971 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2972 sym_name(np), istat, dstat, sist);
2976 * Dequeue from the START queue all CCBs that match
2977 * a given target/lun/task condition (-1 means all),
2978 * and move them from the BUSY queue to the COMP queue
2979 * with CAM_REQUEUE_REQ status condition.
2980 * This function is used during error handling/recovery.
2981 * It is called with SCRIPTS not running.
2984 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
2990 * Make sure the starting index is within range.
2992 assert((i >= 0) && (i < 2*MAX_QUEUE));
2995 * Walk until end of START queue and dequeue every job
2996 * that matches the target/lun/task condition.
2999 while (i != np->squeueput) {
3000 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
3002 #ifdef SYM_CONF_IARB_SUPPORT
3003 /* Forget hints for IARB, they may be no longer relevant */
3004 cp->host_flags &= ~HF_HINT_IARB;
3006 if ((target == -1 || cp->target == target) &&
3007 (lun == -1 || cp->lun == lun) &&
3008 (task == -1 || cp->tag == task)) {
3009 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
3010 sym_remque(&cp->link_ccbq);
3011 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3015 np->squeue[j] = np->squeue[i];
3016 if ((j += 2) >= MAX_QUEUE*2) j = 0;
3018 if ((i += 2) >= MAX_QUEUE*2) i = 0;
3020 if (i != j) /* Copy back the idle task if needed */
3021 np->squeue[j] = np->squeue[i];
3022 np->squeueput = j; /* Update our current start queue pointer */
3028 * Complete all CCBs queued to the COMP queue.
3030 * These CCBs are assumed:
3031 * - Not to be referenced either by devices or
3032 * SCRIPTS-related queues and datas.
3033 * - To have to be completed with an error condition
3036 * The device queue freeze count is incremented
3037 * for each CCB that does not prevent this.
3038 * This function is called when all CCBs involved
3039 * in error handling/recovery have been reaped.
3041 void sym_flush_comp_queue(hcb_p np, int cam_status)
3046 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
3048 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3049 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3050 /* Leave quiet CCBs waiting for resources */
3051 if (cp->host_status == HS_WAIT)
3055 sym_set_cam_status(ccb, cam_status);
3056 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
3057 if (sym_get_cam_status(ccb) == CAM_REQUEUE_REQ) {
3058 tcb_p tp = &np->target[cp->target];
3059 lcb_p lp = sym_lp(np, tp, cp->lun);
3061 sym_remque(&cp->link2_ccbq);
3062 sym_insque_tail(&cp->link2_ccbq,
3065 if (cp->tag != NO_TAG)
3068 --lp->started_no_tag;
3075 sym_free_ccb(np, cp);
3076 sym_freeze_cam_ccb(ccb);
3077 sym_xpt_done(np, ccb);
3082 * chip handler for bad SCSI status condition
3084 * In case of bad SCSI status, we unqueue all the tasks
3085 * currently queued to the controller but not yet started
3086 * and then restart the SCRIPTS processor immediately.
3088 * QUEUE FULL and BUSY conditions are handled the same way.
3089 * Basically all the not yet started tasks are requeued in
3090 * device queue and the queue is frozen until a completion.
3092 * For CHECK CONDITION and COMMAND TERMINATED status, we use
3093 * the CCB of the failed command to prepare a REQUEST SENSE
3094 * SCSI command and queue it to the controller queue.
3096 * SCRATCHA is assumed to have been loaded with STARTPOS
3097 * before the SCRIPTS called the C code.
3099 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
3101 tcb_p tp = &np->target[cp->target];
3103 u_char s_status = cp->ssss_status;
3104 u_char h_flags = cp->host_flags;
3110 * Compute the index of the next job to start from SCRIPTS.
3112 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
3115 * The last CCB queued used for IARB hint may be
3116 * no longer relevant. Forget it.
3118 #ifdef SYM_CONF_IARB_SUPPORT
3124 * Now deal with the SCSI status.
3129 if (sym_verbose >= 2) {
3132 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
3134 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3135 sym_complete_error (np, cp);
3140 * If we get an SCSI error when requesting sense, give up.
3142 if (h_flags & HF_SENSE) {
3143 sym_complete_error (np, cp);
3148 * Dequeue all queued CCBs for that device not yet started,
3149 * and restart the SCRIPTS processor immediately.
3151 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3152 OUTL_DSP (SCRIPTA_BA (np, start));
3155 * Save some info of the actual IO.
3156 * Compute the data residual.
3158 cp->sv_scsi_status = cp->ssss_status;
3159 cp->sv_xerr_status = cp->xerr_status;
3160 cp->sv_resid = sym_compute_residual(np, cp);
3163 * Prepare all needed data structures for
3164 * requesting sense data.
3167 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3171 * If we are currently using anything different from
3172 * async. 8 bit data transfers with that target,
3173 * start a negotiation, since the device may want
3174 * to report us a UNIT ATTENTION condition due to
3175 * a cause we currently ignore, and we donnot want
3176 * to be stuck with WIDE and/or SYNC data transfer.
3178 * cp->nego_status is filled by sym_prepare_nego().
3180 cp->nego_status = 0;
3182 if (tp->tinfo.curr.options & PPR_OPT_MASK)
3184 else if (tp->tinfo.curr.width != BUS_8_BIT)
3186 else if (tp->tinfo.curr.offset != 0)
3190 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
3192 * Message table indirect structure.
3194 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
3195 cp->phys.smsg.size = cpu_to_scr(msglen);
3200 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
3201 cp->phys.cmd.size = cpu_to_scr(6);
3204 * patch requested size into sense command
3206 cp->sensecmd[0] = REQUEST_SENSE;
3207 cp->sensecmd[1] = 0;
3208 if (tp->tinfo.curr.scsi_version <= 2 && cp->lun <= 7)
3209 cp->sensecmd[1] = cp->lun << 5;
3210 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3211 cp->data_len = SYM_SNS_BBUF_LEN;
3216 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
3217 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
3218 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3221 * requeue the command.
3223 startp = SCRIPTB_BA (np, sdata_in);
3225 cp->phys.head.savep = cpu_to_scr(startp);
3226 cp->phys.head.lastp = cpu_to_scr(startp);
3227 cp->startp = cpu_to_scr(startp);
3228 cp->goalp = cpu_to_scr(startp + 16);
3230 cp->host_xflags = 0;
3231 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3232 cp->ssss_status = S_ILLEGAL;
3233 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3234 cp->xerr_status = 0;
3235 cp->extra_bytes = 0;
3237 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
3240 * Requeue the command.
3242 sym_put_start_queue(np, cp);
3245 * Give back to upper layer everything we have dequeued.
3247 sym_flush_comp_queue(np, 0);
3253 * After a device has accepted some management message
3254 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3255 * a device signals a UNIT ATTENTION condition, some
3256 * tasks are thrown away by the device. We are required
3257 * to reflect that on our tasks list since the device
3258 * will never complete these tasks.
3260 * This function move from the BUSY queue to the COMP
3261 * queue all disconnected CCBs for a given target that
3262 * match the following criteria:
3263 * - lun=-1 means any logical UNIT otherwise a given one.
3264 * - task=-1 means any task, otherwise a given one.
3266 int sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
3268 SYM_QUEHEAD qtmp, *qp;
3273 * Move the entire BUSY queue to our temporary queue.
3275 sym_que_init(&qtmp);
3276 sym_que_splice(&np->busy_ccbq, &qtmp);
3277 sym_que_init(&np->busy_ccbq);
3280 * Put all CCBs that matches our criteria into
3281 * the COMP queue and put back other ones into
3284 while ((qp = sym_remque_head(&qtmp)) != 0) {
3286 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3288 if (cp->host_status != HS_DISCONNECT ||
3289 cp->target != target ||
3290 (lun != -1 && cp->lun != lun) ||
3292 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3293 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3296 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3298 /* Preserve the software timeout condition */
3299 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
3300 sym_set_cam_status(ccb, cam_status);
3303 printf("XXXX TASK @%p CLEARED\n", cp);
3310 * chip handler for TASKS recovery
3312 * We cannot safely abort a command, while the SCRIPTS
3313 * processor is running, since we just would be in race
3316 * As long as we have tasks to abort, we keep the SEM
3317 * bit set in the ISTAT. When this bit is set, the
3318 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3319 * each time it enters the scheduler.
3321 * If we have to reset a target, clear tasks of a unit,
3322 * or to perform the abort of a disconnected job, we
3323 * restart the SCRIPTS for selecting the target. Once
3324 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3325 * If it loses arbitration, the SCRIPTS will interrupt again
3326 * the next time it will enter its scheduler, and so on ...
3328 * On SIR_TARGET_SELECTED, we scan for the more
3329 * appropriate thing to do:
3331 * - If nothing, we just sent a M_ABORT message to the
3332 * target to get rid of the useless SCSI bus ownership.
3333 * According to the specs, no tasks shall be affected.
3334 * - If the target is to be reset, we send it a M_RESET
3336 * - If a logical UNIT is to be cleared , we send the
3337 * IDENTIFY(lun) + M_ABORT.
3338 * - If an untagged task is to be aborted, we send the
3339 * IDENTIFY(lun) + M_ABORT.
3340 * - If a tagged task is to be aborted, we send the
3341 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3343 * Once our 'kiss of death' :) message has been accepted
3344 * by the target, the SCRIPTS interrupts again
3345 * (SIR_ABORT_SENT). On this interrupt, we complete
3346 * all the CCBs that should have been aborted by the
3347 * target according to our message.
3349 static void sym_sir_task_recovery(hcb_p np, int num)
3354 int target=-1, lun=-1, task;
3359 * The SCRIPTS processor stopped before starting
3360 * the next command in order to allow us to perform
3361 * some task recovery.
3363 case SIR_SCRIPT_STOPPED:
3365 * Do we have any target to reset or unit to clear ?
3367 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3368 tp = &np->target[i];
3370 (tp->lun0p && tp->lun0p->to_clear)) {
3376 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3377 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3387 * If not, walk the busy queue for any
3388 * disconnected CCB to be aborted.
3391 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3392 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3393 if (cp->host_status != HS_DISCONNECT)
3396 target = cp->target;
3403 * If some target is to be selected,
3404 * prepare and start the selection.
3407 tp = &np->target[target];
3408 np->abrt_sel.sel_id = target;
3409 np->abrt_sel.sel_scntl3 = tp->head.wval;
3410 np->abrt_sel.sel_sxfer = tp->head.sval;
3411 OUTL(nc_dsa, np->hcb_ba);
3412 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
3417 * Now look for a CCB to abort that haven't started yet.
3418 * Btw, the SCRIPTS processor is still stopped, so
3419 * we are not in race.
3423 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3424 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3425 if (cp->host_status != HS_BUSY &&
3426 cp->host_status != HS_NEGOTIATE)
3430 #ifdef SYM_CONF_IARB_SUPPORT
3432 * If we are using IMMEDIATE ARBITRATION, we donnot
3433 * want to cancel the last queued CCB, since the
3434 * SCRIPTS may have anticipated the selection.
3436 if (cp == np->last_cp) {
3441 i = 1; /* Means we have found some */
3446 * We are done, so we donnot need
3447 * to synchronize with the SCRIPTS anylonger.
3448 * Remove the SEM flag from the ISTAT.
3451 OUTB (nc_istat, SIGP);
3455 * Compute index of next position in the start
3456 * queue the SCRIPTS intends to start and dequeue
3457 * all CCBs for that device that haven't been started.
3459 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
3460 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3463 * Make sure at least our IO to abort has been dequeued.
3465 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3466 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
3468 sym_remque(&cp->link_ccbq);
3469 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3472 * Keep track in cam status of the reason of the abort.
3474 if (cp->to_abort == 2)
3475 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
3477 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
3480 * Complete with error everything that we have dequeued.
3482 sym_flush_comp_queue(np, 0);
3485 * The SCRIPTS processor has selected a target
3486 * we may have some manual recovery to perform for.
3488 case SIR_TARGET_SELECTED:
3489 target = (INB (nc_sdid) & 0xf);
3490 tp = &np->target[target];
3492 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3495 * If the target is to be reset, prepare a
3496 * M_RESET message and clear the to_reset flag
3497 * since we donnot expect this operation to fail.
3500 np->abrt_msg[0] = M_RESET;
3501 np->abrt_tbl.size = 1;
3507 * Otherwise, look for some logical unit to be cleared.
3509 if (tp->lun0p && tp->lun0p->to_clear)
3511 else if (tp->lunmp) {
3512 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3513 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3521 * If a logical unit is to be cleared, prepare
3522 * an IDENTIFY(lun) + ABORT MESSAGE.
3525 lcb_p lp = sym_lp(np, tp, lun);
3526 lp->to_clear = 0; /* We don't expect to fail here */
3527 np->abrt_msg[0] = IDENTIFY(0, lun);
3528 np->abrt_msg[1] = M_ABORT;
3529 np->abrt_tbl.size = 2;
3534 * Otherwise, look for some disconnected job to
3535 * abort for this target.
3539 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3540 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3541 if (cp->host_status != HS_DISCONNECT)
3543 if (cp->target != target)
3547 i = 1; /* Means we have some */
3552 * If we have none, probably since the device has
3553 * completed the command before we won abitration,
3554 * send a M_ABORT message without IDENTIFY.
3555 * According to the specs, the device must just
3556 * disconnect the BUS and not abort any task.
3559 np->abrt_msg[0] = M_ABORT;
3560 np->abrt_tbl.size = 1;
3565 * We have some task to abort.
3566 * Set the IDENTIFY(lun)
3568 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3571 * If we want to abort an untagged command, we
3572 * will send a IDENTIFY + M_ABORT.
3573 * Otherwise (tagged command), we will send
3574 * a IDENTITFY + task attributes + ABORT TAG.
3576 if (cp->tag == NO_TAG) {
3577 np->abrt_msg[1] = M_ABORT;
3578 np->abrt_tbl.size = 2;
3580 np->abrt_msg[1] = cp->scsi_smsg[1];
3581 np->abrt_msg[2] = cp->scsi_smsg[2];
3582 np->abrt_msg[3] = M_ABORT_TAG;
3583 np->abrt_tbl.size = 4;
3586 * Keep track of software timeout condition, since the
3587 * peripheral driver may not count retries on abort
3588 * conditions not due to timeout.
3590 if (cp->to_abort == 2)
3591 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
3592 cp->to_abort = 0; /* We donnot expect to fail here */
3596 * The target has accepted our message and switched
3597 * to BUS FREE phase as we expected.
3599 case SIR_ABORT_SENT:
3600 target = (INB (nc_sdid) & 0xf);
3601 tp = &np->target[target];
3604 ** If we didn't abort anything, leave here.
3606 if (np->abrt_msg[0] == M_ABORT)
3610 * If we sent a M_RESET, then a hardware reset has
3611 * been performed by the target.
3612 * - Reset everything to async 8 bit
3613 * - Tell ourself to negotiate next time :-)
3614 * - Prepare to clear all disconnected CCBs for
3615 * this target from our task list (lun=task=-1)
3619 if (np->abrt_msg[0] == M_RESET) {
3621 tp->head.wval = np->rv_scntl3;
3623 tp->tinfo.curr.period = 0;
3624 tp->tinfo.curr.offset = 0;
3625 tp->tinfo.curr.width = BUS_8_BIT;
3626 tp->tinfo.curr.options = 0;
3630 * Otherwise, check for the LUN and TASK(s)
3631 * concerned by the cancelation.
3632 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3633 * or an ABORT message :-)
3636 lun = np->abrt_msg[0] & 0x3f;
3637 if (np->abrt_msg[1] == M_ABORT_TAG)
3638 task = np->abrt_msg[2];
3642 * Complete all the CCBs the device should have
3643 * aborted due to our 'kiss of death' message.
3645 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
3646 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
3647 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
3648 sym_flush_comp_queue(np, 0);
3651 * If we sent a BDR, make upper layer aware of that.
3653 if (np->abrt_msg[0] == M_RESET)
3654 sym_xpt_async_sent_bdr(np, target);
3659 * Print to the log the message we intend to send.
3661 if (num == SIR_TARGET_SELECTED) {
3662 PRINT_TARGET(np, target);
3663 sym_printl_hex("control msgout:", np->abrt_msg,
3665 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3669 * Let the SCRIPTS processor continue.
3675 * Gerard's alchemy:) that deals with with the data
3676 * pointer for both MDP and the residual calculation.
3678 * I didn't want to bloat the code by more than 200
3679 * lignes for the handling of both MDP and the residual.
3680 * This has been achieved by using a data pointer
3681 * representation consisting in an index in the data
3682 * array (dp_sg) and a negative offset (dp_ofs) that
3683 * have the following meaning:
3685 * - dp_sg = SYM_CONF_MAX_SG
3686 * we are at the end of the data script.
3687 * - dp_sg < SYM_CONF_MAX_SG
3688 * dp_sg points to the next entry of the scatter array
3689 * we want to transfer.
3691 * dp_ofs represents the residual of bytes of the
3692 * previous entry scatter entry we will send first.
3694 * no residual to send first.
3696 * The function sym_evaluate_dp() accepts an arbitray
3697 * offset (basically from the MDP message) and returns
3698 * the corresponding values of dp_sg and dp_ofs.
3701 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
3704 int dp_ofs, dp_sg, dp_sgmin;
3709 * Compute the resulted data pointer in term of a script
3710 * address within some DATA script and a signed byte offset.
3714 if (dp_scr == SCRIPTA_BA (np, pm0_data))
3716 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
3722 dp_scr = scr_to_cpu(pm->ret);
3723 dp_ofs -= scr_to_cpu(pm->sg.size);
3727 * If we are auto-sensing, then we are done.
3729 if (cp->host_flags & HF_SENSE) {
3735 * Deduce the index of the sg entry.
3736 * Keep track of the index of the first valid entry.
3737 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3740 tmp = scr_to_cpu(sym_goalp(cp));
3741 dp_sg = SYM_CONF_MAX_SG;
3743 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3744 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3747 * Move to the sg entry the data pointer belongs to.
3749 * If we are inside the data area, we expect result to be:
3752 * dp_ofs = 0 and dp_sg is the index of the sg entry
3753 * the data pointer belongs to (or the end of the data)
3755 * dp_ofs < 0 and dp_sg is the index of the sg entry
3756 * the data pointer belongs to + 1.
3760 while (dp_sg > dp_sgmin) {
3762 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3763 n = dp_ofs + (tmp & 0xffffff);
3771 else if (dp_ofs > 0) {
3772 while (dp_sg < SYM_CONF_MAX_SG) {
3773 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3774 dp_ofs -= (tmp & 0xffffff);
3782 * Make sure the data pointer is inside the data area.
3783 * If not, return some error.
3785 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3787 else if (dp_sg > SYM_CONF_MAX_SG ||
3788 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3792 * Save the extreme pointer if needed.
3794 if (dp_sg > cp->ext_sg ||
3795 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3797 cp->ext_ofs = dp_ofs;
3811 * chip handler for MODIFY DATA POINTER MESSAGE
3813 * We also call this function on IGNORE WIDE RESIDUE
3814 * messages that do not match a SWIDE full condition.
3815 * Btw, we assume in that situation that such a message
3816 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3819 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
3822 u32 dp_scr = sym_get_script_dp (np, cp);
3830 * Not supported for auto-sense.
3832 if (cp->host_flags & HF_SENSE)
3836 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3837 * to the resulted data pointer.
3839 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3844 * And our alchemy:) allows to easily calculate the data
3845 * script address we want to return for the next data phase.
3847 dp_ret = cpu_to_scr(sym_goalp(cp));
3848 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3851 * If offset / scatter entry is zero we donnot need
3852 * a context for the new current data pointer.
3860 * Get a context for the new current data pointer.
3862 hflags = INB (HF_PRT);
3864 if (hflags & HF_DP_SAVED)
3865 hflags ^= HF_ACT_PM;
3867 if (!(hflags & HF_ACT_PM)) {
3869 dp_scr = SCRIPTA_BA (np, pm0_data);
3873 dp_scr = SCRIPTA_BA (np, pm1_data);
3876 hflags &= ~(HF_DP_SAVED);
3878 OUTB (HF_PRT, hflags);
3881 * Set up the new current data pointer.
3882 * ofs < 0 there, and for the next data phase, we
3883 * want to transfer part of the data of the sg entry
3884 * corresponding to index dp_sg-1 prior to returning
3885 * to the main data script.
3887 pm->ret = cpu_to_scr(dp_ret);
3888 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3889 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3890 pm->sg.addr = cpu_to_scr(tmp);
3891 pm->sg.size = cpu_to_scr(-dp_ofs);
3894 sym_set_script_dp (np, cp, dp_scr);
3895 OUTL_DSP (SCRIPTA_BA (np, clrack));
3899 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
3904 * chip calculation of the data residual.
3906 * As I used to say, the requirement of data residual
3907 * in SCSI is broken, useless and cannot be achieved
3908 * without huge complexity.
3909 * But most OSes and even the official CAM require it.
3910 * When stupidity happens to be so widely spread inside
3911 * a community, it gets hard to convince.
3913 * Anyway, I don't care, since I am not going to use
3914 * any software that considers this data residual as
3915 * a relevant information. :)
3918 int sym_compute_residual(hcb_p np, ccb_p cp)
3920 int dp_sg, dp_sgmin, resid = 0;
3924 * Check for some data lost or just thrown away.
3925 * We are not required to be quite accurate in this
3926 * situation. Btw, if we are odd for output and the
3927 * device claims some more data, it may well happen
3928 * than our residual be zero. :-)
3930 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3931 if (cp->xerr_status & XE_EXTRA_DATA)
3932 resid -= cp->extra_bytes;
3933 if (cp->xerr_status & XE_SODL_UNRUN)
3935 if (cp->xerr_status & XE_SWIDE_OVRUN)
3940 * If all data has been transferred,
3941 * there is no residual.
3943 if (cp->phys.head.lastp == sym_goalp(cp))
3947 * If no data transfer occurs, or if the data
3948 * pointer is weird, return full residual.
3950 if (cp->startp == cp->phys.head.lastp ||
3951 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3953 return cp->data_len;
3957 * If we were auto-sensing, then we are done.
3959 if (cp->host_flags & HF_SENSE) {
3964 * We are now full comfortable in the computation
3965 * of the data residual (2's complement).
3967 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3968 resid = -cp->ext_ofs;
3969 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3970 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3971 resid += (tmp & 0xffffff);
3975 * Hopefully, the result is not too wrong.
3981 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3983 * When we try to negotiate, we append the negotiation message
3984 * to the identify and (maybe) simple tag message.
3985 * The host status field is set to HS_NEGOTIATE to mark this
3988 * If the target doesn't answer this message immediately
3989 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3990 * will be raised eventually.
3991 * The handler removes the HS_NEGOTIATE status, and sets the
3992 * negotiated value to the default (async / nowide).
3994 * If we receive a matching answer immediately, we check it
3995 * for validity, and set the values.
3997 * If we receive a Reject message immediately, we assume the
3998 * negotiation has failed, and fall back to standard values.
4000 * If we receive a negotiation message while not in HS_NEGOTIATE
4001 * state, it's a target initiated negotiation. We prepare a
4002 * (hopefully) valid answer, set our parameters, and send back
4003 * this answer to the target.
4005 * If the target doesn't fetch the answer (no message out phase),
4006 * we assume the negotiation has failed, and fall back to default
4007 * settings (SIR_NEGO_PROTO interrupt).
4009 * When we set the values, we adjust them in all ccbs belonging
4010 * to this target, in the controller's register, and in the "phys"
4011 * field of the controller's struct sym_hcb.
4015 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
4018 sym_sync_nego_check(hcb_p np, int req, int target)
4020 u_char chg, ofs, per, fak, div;
4022 if (DEBUG_FLAGS & DEBUG_NEGO) {
4023 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
4027 * Get requested values.
4034 * Check values against our limits.
4037 if (ofs > np->maxoffs)
4038 {chg = 1; ofs = np->maxoffs;}
4042 if (per < np->minsync)
4043 {chg = 1; per = np->minsync;}
4047 * Get new chip synchronous parameters value.
4050 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
4053 if (DEBUG_FLAGS & DEBUG_NEGO) {
4054 PRINT_TARGET(np, target);
4055 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
4056 ofs, per, div, fak, chg);
4060 * If it was an answer we want to change,
4061 * then it isn't acceptable. Reject it.
4069 sym_setsync (np, target, ofs, per, div, fak);
4072 * It was an answer. We are done.
4078 * It was a request. Prepare an answer message.
4080 np->msgout[0] = M_EXTENDED;
4082 np->msgout[2] = M_X_SYNC_REQ;
4083 np->msgout[3] = per;
4084 np->msgout[4] = ofs;
4086 if (DEBUG_FLAGS & DEBUG_NEGO) {
4087 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
4090 np->msgin [0] = M_NOOP;
4095 sym_setsync (np, target, 0, 0, 0, 0);
4099 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
4105 * Request or answer ?
4107 if (INB (HS_PRT) == HS_NEGOTIATE) {
4108 OUTB (HS_PRT, HS_BUSY);
4109 if (cp->nego_status && cp->nego_status != NS_SYNC)
4115 * Check and apply new values.
4117 result = sym_sync_nego_check(np, req, cp->target);
4118 if (result) /* Not acceptable, reject it */
4120 if (req) { /* Was a request, send response. */
4121 cp->nego_status = NS_SYNC;
4122 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
4124 else /* Was a response, we are done. */
4125 OUTL_DSP (SCRIPTA_BA (np, clrack));
4129 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
4133 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4136 sym_ppr_nego_check(hcb_p np, int req, int target)
4138 tcb_p tp = &np->target[target];
4139 unsigned char fak, div;
4142 unsigned char per = np->msgin[3];
4143 unsigned char ofs = np->msgin[5];
4144 unsigned char wide = np->msgin[6];
4145 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4147 if (DEBUG_FLAGS & DEBUG_NEGO) {
4148 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4152 * Check values against our limits.
4154 if (wide > np->maxwide) {
4158 if (!wide || !(np->features & FE_ULTRA3))
4161 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
4164 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4167 dt = opts & PPR_OPT_DT;
4170 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4171 if (ofs > maxoffs) {
4178 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4179 if (per < np->minsync_dt) {
4186 * Get new chip synchronous parameters value.
4189 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4193 * If it was an answer we want to change,
4194 * then it isn't acceptable. Reject it.
4202 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4205 * It was an answer. We are done.
4211 * It was a request. Prepare an answer message.
4213 np->msgout[0] = M_EXTENDED;
4215 np->msgout[2] = M_X_PPR_REQ;
4216 np->msgout[3] = per;
4218 np->msgout[5] = ofs;
4219 np->msgout[6] = wide;
4220 np->msgout[7] = opts;
4222 if (DEBUG_FLAGS & DEBUG_NEGO) {
4223 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4226 np->msgin [0] = M_NOOP;
4231 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4233 * If it is a device response that should result in
4234 * ST, we may want to try a legacy negotiation later.
4236 if (!req && !opts) {
4237 tp->tinfo.goal.options = 0;
4238 tp->tinfo.goal.width = wide;
4239 tp->tinfo.goal.period = per;
4240 tp->tinfo.goal.offset = ofs;
4245 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
4251 * Request or answer ?
4253 if (INB (HS_PRT) == HS_NEGOTIATE) {
4254 OUTB (HS_PRT, HS_BUSY);
4255 if (cp->nego_status && cp->nego_status != NS_PPR)
4261 * Check and apply new values.
4263 result = sym_ppr_nego_check(np, req, cp->target);
4264 if (result) /* Not acceptable, reject it */
4266 if (req) { /* Was a request, send response. */
4267 cp->nego_status = NS_PPR;
4268 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
4270 else /* Was a response, we are done. */
4271 OUTL_DSP (SCRIPTA_BA (np, clrack));
4275 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
4279 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4282 sym_wide_nego_check(hcb_p np, int req, int target)
4286 if (DEBUG_FLAGS & DEBUG_NEGO) {
4287 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4291 * Get requested values.
4294 wide = np->msgin[3];
4297 * Check values against our limits.
4299 if (wide > np->maxwide) {
4304 if (DEBUG_FLAGS & DEBUG_NEGO) {
4305 PRINT_TARGET(np, target);
4306 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
4310 * If it was an answer we want to change,
4311 * then it isn't acceptable. Reject it.
4319 sym_setwide (np, target, wide);
4322 * It was an answer. We are done.
4328 * It was a request. Prepare an answer message.
4330 np->msgout[0] = M_EXTENDED;
4332 np->msgout[2] = M_X_WIDE_REQ;
4333 np->msgout[3] = wide;
4335 np->msgin [0] = M_NOOP;
4337 if (DEBUG_FLAGS & DEBUG_NEGO) {
4338 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4347 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
4353 * Request or answer ?
4355 if (INB (HS_PRT) == HS_NEGOTIATE) {
4356 OUTB (HS_PRT, HS_BUSY);
4357 if (cp->nego_status && cp->nego_status != NS_WIDE)
4363 * Check and apply new values.
4365 result = sym_wide_nego_check(np, req, cp->target);
4366 if (result) /* Not acceptable, reject it */
4368 if (req) { /* Was a request, send response. */
4369 cp->nego_status = NS_WIDE;
4370 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
4372 else { /* Was a response. */
4374 * Negotiate for SYNC immediately after WIDE response.
4375 * This allows to negotiate for both WIDE and SYNC on
4376 * a single SCSI command (Suggested by Justin Gibbs).
4378 if (tp->tinfo.goal.offset) {
4379 np->msgout[0] = M_EXTENDED;
4381 np->msgout[2] = M_X_SYNC_REQ;
4382 np->msgout[3] = tp->tinfo.goal.period;
4383 np->msgout[4] = tp->tinfo.goal.offset;
4385 if (DEBUG_FLAGS & DEBUG_NEGO) {
4386 sym_print_nego_msg(np, cp->target,
4387 "sync msgout", np->msgout);
4390 cp->nego_status = NS_SYNC;
4391 OUTB (HS_PRT, HS_NEGOTIATE);
4392 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
4396 OUTL_DSP (SCRIPTA_BA (np, clrack));
4402 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
4406 * Reset DT, SYNC or WIDE to default settings.
4408 * Called when a negotiation does not succeed either
4409 * on rejection or on protocol error.
4411 * A target that understands a PPR message should never
4412 * reject it, and messing with it is very unlikely.
4413 * So, if a PPR makes problems, we may just want to
4414 * try a legacy negotiation later.
4416 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
4418 switch (cp->nego_status) {
4421 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4423 tp->tinfo.goal.options = 0;
4424 if (tp->tinfo.goal.period < np->minsync)
4425 tp->tinfo.goal.period = np->minsync;
4426 if (tp->tinfo.goal.offset > np->maxoffs)
4427 tp->tinfo.goal.offset = np->maxoffs;
4431 sym_setsync (np, cp->target, 0, 0, 0, 0);
4434 sym_setwide (np, cp->target, 0);
4437 np->msgin [0] = M_NOOP;
4438 np->msgout[0] = M_NOOP;
4439 cp->nego_status = 0;
4443 * chip handler for MESSAGE REJECT received in response to
4444 * PPR, WIDE or SYNCHRONOUS negotiation.
4446 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
4448 sym_nego_default(np, tp, cp);
4449 OUTB (HS_PRT, HS_BUSY);
4453 * chip exception handler for programmed interrupts.
4455 static void sym_int_sir (hcb_p np)
4457 u_char num = INB (nc_dsps);
4458 u32 dsa = INL (nc_dsa);
4459 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4460 u_char target = INB (nc_sdid) & 0x0f;
4461 tcb_p tp = &np->target[target];
4464 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4467 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4469 * SCRIPTS tell us that we may have to update
4470 * 64 bit DMA segment registers.
4472 case SIR_DMAP_DIRTY:
4473 sym_update_dmap_regs(np);
4477 * Command has been completed with error condition
4478 * or has been auto-sensed.
4480 case SIR_COMPLETE_ERROR:
4481 sym_complete_error(np, cp);
4484 * The C code is currently trying to recover from something.
4485 * Typically, user want to abort some command.
4487 case SIR_SCRIPT_STOPPED:
4488 case SIR_TARGET_SELECTED:
4489 case SIR_ABORT_SENT:
4490 sym_sir_task_recovery(np, num);
4493 * The device didn't go to MSG OUT phase after having
4494 * been selected with ATN. We donnot want to handle
4497 case SIR_SEL_ATN_NO_MSG_OUT:
4498 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4499 sym_name (np), target);
4502 * The device didn't switch to MSG IN phase after
4503 * having reseleted the initiator.
4505 case SIR_RESEL_NO_MSG_IN:
4506 printf ("%s:%d: No MSG IN phase after reselection.\n",
4507 sym_name (np), target);
4510 * After reselection, the device sent a message that wasn't
4513 case SIR_RESEL_NO_IDENTIFY:
4514 printf ("%s:%d: No IDENTIFY after reselection.\n",
4515 sym_name (np), target);
4518 * The device reselected a LUN we donnot know about.
4520 case SIR_RESEL_BAD_LUN:
4521 np->msgout[0] = M_RESET;
4524 * The device reselected for an untagged nexus and we
4527 case SIR_RESEL_BAD_I_T_L:
4528 np->msgout[0] = M_ABORT;
4531 * The device reselected for a tagged nexus that we donnot
4534 case SIR_RESEL_BAD_I_T_L_Q:
4535 np->msgout[0] = M_ABORT_TAG;
4538 * The SCRIPTS let us know that the device has grabbed
4539 * our message and will abort the job.
4541 case SIR_RESEL_ABORTED:
4542 np->lastmsg = np->msgout[0];
4543 np->msgout[0] = M_NOOP;
4544 printf ("%s:%d: message %x sent on bad reselection.\n",
4545 sym_name (np), target, np->lastmsg);
4548 * The SCRIPTS let us know that a message has been
4549 * successfully sent to the device.
4551 case SIR_MSG_OUT_DONE:
4552 np->lastmsg = np->msgout[0];
4553 np->msgout[0] = M_NOOP;
4554 /* Should we really care of that */
4555 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4557 cp->xerr_status &= ~XE_PARITY_ERR;
4558 if (!cp->xerr_status)
4559 OUTOFFB (HF_PRT, HF_EXT_ERR);
4564 * The device didn't send a GOOD SCSI status.
4565 * We may have some work to do prior to allow
4566 * the SCRIPTS processor to continue.
4568 case SIR_BAD_SCSI_STATUS:
4571 sym_sir_bad_scsi_status(np, num, cp);
4574 * We are asked by the SCRIPTS to prepare a
4577 case SIR_REJECT_TO_SEND:
4578 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4579 np->msgout[0] = M_REJECT;
4582 * We have been ODD at the end of a DATA IN
4583 * transfer and the device didn't send a
4584 * IGNORE WIDE RESIDUE message.
4585 * It is a data overrun condition.
4587 case SIR_SWIDE_OVERRUN:
4589 OUTONB (HF_PRT, HF_EXT_ERR);
4590 cp->xerr_status |= XE_SWIDE_OVRUN;
4594 * We have been ODD at the end of a DATA OUT
4596 * It is a data underrun condition.
4598 case SIR_SODL_UNDERRUN:
4600 OUTONB (HF_PRT, HF_EXT_ERR);
4601 cp->xerr_status |= XE_SODL_UNRUN;
4605 * The device wants us to tranfer more data than
4606 * expected or in the wrong direction.
4607 * The number of extra bytes is in scratcha.
4608 * It is a data overrun condition.
4610 case SIR_DATA_OVERRUN:
4612 OUTONB (HF_PRT, HF_EXT_ERR);
4613 cp->xerr_status |= XE_EXTRA_DATA;
4614 cp->extra_bytes += INL (nc_scratcha);
4618 * The device switched to an illegal phase (4/5).
4622 OUTONB (HF_PRT, HF_EXT_ERR);
4623 cp->xerr_status |= XE_BAD_PHASE;
4627 * We received a message.
4629 case SIR_MSG_RECEIVED:
4632 switch (np->msgin [0]) {
4634 * We received an extended message.
4635 * We handle MODIFY DATA POINTER, SDTR, WDTR
4636 * and reject all other extended messages.
4639 switch (np->msgin [2]) {
4641 if (DEBUG_FLAGS & DEBUG_POINTER)
4642 sym_print_msg(cp,"modify DP",np->msgin);
4643 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4644 (np->msgin[5]<<8) + (np->msgin[6]);
4645 sym_modify_dp(np, tp, cp, tmp);
4648 sym_sync_nego(np, tp, cp);
4651 sym_ppr_nego(np, tp, cp);
4654 sym_wide_nego(np, tp, cp);
4661 * We received a 1/2 byte message not handled from SCRIPTS.
4662 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4663 * RESIDUE messages that haven't been anticipated by
4664 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4665 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4668 if (DEBUG_FLAGS & DEBUG_POINTER)
4669 sym_print_msg(cp,"ign wide residue", np->msgin);
4670 if (cp->host_flags & HF_SENSE)
4671 OUTL_DSP (SCRIPTA_BA (np, clrack));
4673 sym_modify_dp(np, tp, cp, -1);
4676 if (INB (HS_PRT) == HS_NEGOTIATE)
4677 sym_nego_rejected(np, tp, cp);
4680 printf ("M_REJECT received (%x:%x).\n",
4681 scr_to_cpu(np->lastmsg), np->msgout[0]);
4690 * We received an unknown message.
4691 * Ignore all MSG IN phases and reject it.
4694 sym_print_msg(cp, "WEIRD message received", np->msgin);
4695 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
4698 * Negotiation failed.
4699 * Target does not send us the reply.
4700 * Remove the HS_NEGOTIATE status.
4702 case SIR_NEGO_FAILED:
4703 OUTB (HS_PRT, HS_BUSY);
4705 * Negotiation failed.
4706 * Target does not want answer message.
4708 case SIR_NEGO_PROTO:
4709 sym_nego_default(np, tp, cp);
4717 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
4720 OUTL_DSP (SCRIPTA_BA (np, clrack));
4727 * Acquire a control block
4729 ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
4731 tcb_p tp = &np->target[tn];
4732 lcb_p lp = sym_lp(np, tp, ln);
4733 u_short tag = NO_TAG;
4735 ccb_p cp = (ccb_p) 0;
4738 * Look for a free CCB
4740 if (sym_que_empty(&np->free_ccbq))
4741 (void) sym_alloc_ccb(np);
4742 qp = sym_remque_head(&np->free_ccbq);
4745 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4747 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4749 * If the LCB is not yet available and the LUN
4750 * has been probed ok, try to allocate the LCB.
4752 if (!lp && sym_is_bit(tp->lun_map, ln)) {
4753 lp = sym_alloc_lcb(np, tn, ln);
4760 * If the LCB is not available here, then the
4761 * logical unit is not yet discovered. For those
4762 * ones only accept 1 SCSI IO per logical unit,
4763 * since we cannot allow disconnections.
4766 if (!sym_is_bit(tp->busy0_map, ln))
4767 sym_set_bit(tp->busy0_map, ln);
4772 * If we have been asked for a tagged command.
4776 * Debugging purpose.
4778 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4779 assert(lp->busy_itl == 0);
4782 * Allocate resources for tags if not yet.
4785 sym_alloc_lcb_tags(np, tn, ln);
4790 * Get a tag for this SCSI IO and set up
4791 * the CCB bus address for reselection,
4792 * and count it for this LUN.
4793 * Toggle reselect path to tagged.
4795 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4796 tag = lp->cb_tags[lp->ia_tag];
4797 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4800 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4801 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4803 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
4805 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4806 cp->tags_si = lp->tags_si;
4807 ++lp->tags_sum[cp->tags_si];
4815 * This command will not be tagged.
4816 * If we already have either a tagged or untagged
4817 * one, refuse to overlap this untagged one.
4821 * Debugging purpose.
4823 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4824 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
4827 * Count this nexus for this LUN.
4828 * Set up the CCB bus address for reselection.
4829 * Toggle reselect path to untagged.
4832 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4833 if (lp->busy_itl == 1) {
4834 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4836 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
4844 * Put the CCB into the busy queue.
4846 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4847 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4849 sym_remque(&cp->link2_ccbq);
4850 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4855 * Remember all informations needed to free this CCB.
4859 cp->order = tag_order;
4863 if (DEBUG_FLAGS & DEBUG_TAGS) {
4864 PRINT_LUN(np, tn, ln);
4865 printf ("ccb @%p using tag %d.\n", cp, tag);
4871 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4876 * Release one control block
4878 void sym_free_ccb (hcb_p np, ccb_p cp)
4880 tcb_p tp = &np->target[cp->target];
4881 lcb_p lp = sym_lp(np, tp, cp->lun);
4883 if (DEBUG_FLAGS & DEBUG_TAGS) {
4884 PRINT_LUN(np, cp->target, cp->lun);
4885 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
4893 * If tagged, release the tag, set the relect path
4895 if (cp->tag != NO_TAG) {
4896 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4897 --lp->tags_sum[cp->tags_si];
4900 * Free the tag value.
4902 lp->cb_tags[lp->if_tag] = cp->tag;
4903 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4906 * Make the reselect path invalid,
4907 * and uncount this CCB.
4909 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4911 } else { /* Untagged */
4913 * Make the reselect path invalid,
4914 * and uncount this CCB.
4916 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4920 * If no JOB active, make the LUN reselect path invalid.
4922 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4924 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
4927 * Otherwise, we only accept 1 IO per LUN.
4928 * Clear the bit that keeps track of this IO.
4931 sym_clr_bit(tp->busy0_map, cp->lun);
4934 * We donnot queue more than 1 ccb per target
4935 * with negotiation at any time. If this ccb was
4936 * used for negotiation, clear this info in the tcb.
4938 if (cp == tp->nego_cp)
4941 #ifdef SYM_CONF_IARB_SUPPORT
4943 * If we just complete the last queued CCB,
4944 * clear this info that is no longer relevant.
4946 if (cp == np->last_cp)
4951 * Unmap user data from DMA map if needed.
4953 sym_data_dmamap_unload(np, cp);
4956 * Make this CCB available.
4959 cp->host_status = HS_IDLE;
4960 sym_remque(&cp->link_ccbq);
4961 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4963 #ifdef SYM_OPT_HANDLE_IO_TIMEOUT
4965 * Cancel any pending timeout condition.
4967 sym_untimeout_ccb(np, cp);
4970 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4972 sym_remque(&cp->link2_ccbq);
4973 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4975 if (cp->tag != NO_TAG)
4978 --lp->started_no_tag;
4986 * Allocate a CCB from memory and initialize its fixed part.
4988 static ccb_p sym_alloc_ccb(hcb_p np)
4994 * Prevent from allocating more CCBs than we can
4995 * queue to the controller.
4997 if (np->actccbs >= SYM_CONF_MAX_START)
5001 * Allocate memory for this CCB.
5003 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
5008 * Allocate a bounce buffer for sense data.
5010 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
5015 * Allocate a map for the DMA of user data.
5017 if (sym_data_dmamap_create(np, cp))
5026 * Compute the bus address of this ccb.
5028 cp->ccb_ba = vtobus(cp);
5031 * Insert this ccb into the hashed list.
5033 hcode = CCB_HASH_CODE(cp->ccb_ba);
5034 cp->link_ccbh = np->ccbh[hcode];
5035 np->ccbh[hcode] = cp;
5038 * Initialyze the start and restart actions.
5040 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
5041 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
5044 * Initilialyze some other fields.
5046 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
5049 * Chain into free ccb queue.
5051 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
5054 * Chain into optionnal lists.
5056 #ifdef SYM_OPT_HANDLE_IO_TIMEOUT
5057 sym_insque_head(&cp->tmo_linkq, &np->tmo0_ccbq);
5059 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5060 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
5066 sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
5067 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5073 * Look up a CCB from a DSA value.
5075 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
5080 hcode = CCB_HASH_CODE(dsa);
5081 cp = np->ccbh[hcode];
5083 if (cp->ccb_ba == dsa)
5092 * Target control block initialisation.
5093 * Nothing important to do at the moment.
5095 static void sym_init_tcb (hcb_p np, u_char tn)
5097 #if 0 /* Hmmm... this checking looks paranoid. */
5099 * Check some alignments required by the chip.
5101 assert (((offsetof(struct sym_reg, nc_sxfer) ^
5102 offsetof(struct sym_tcb, head.sval)) &3) == 0);
5103 assert (((offsetof(struct sym_reg, nc_scntl3) ^
5104 offsetof(struct sym_tcb, head.wval)) &3) == 0);
5109 * Lun control block allocation and initialization.
5111 lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
5113 tcb_p tp = &np->target[tn];
5114 lcb_p lp = sym_lp(np, tp, ln);
5117 * Already done, just return.
5123 * Donnot allow LUN control block
5124 * allocation for not probed LUNs.
5126 if (!sym_is_bit(tp->lun_map, ln))
5130 * Initialize the target control block if not yet.
5132 sym_init_tcb (np, tn);
5135 * Allocate the LCB bus address array.
5136 * Compute the bus address of this table.
5138 if (ln && !tp->luntbl) {
5141 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
5144 for (i = 0 ; i < 64 ; i++)
5145 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5146 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
5150 * Allocate the table of pointers for LUN(s) > 0, if needed.
5152 if (ln && !tp->lunmp) {
5153 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
5161 * Make it available to the chip.
5163 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
5168 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
5172 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
5176 * Let the itl task point to error handling.
5178 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
5181 * Set the reselect pattern to our default. :)
5183 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
5186 * Set user capabilities.
5188 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
5190 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5192 * Initialize device queueing.
5194 sym_que_init(&lp->waiting_ccbq);
5195 sym_que_init(&lp->started_ccbq);
5196 lp->started_max = SYM_CONF_MAX_TASK;
5197 lp->started_limit = SYM_CONF_MAX_TASK;
5200 * If we are busy, count the IO.
5202 if (sym_is_bit(tp->busy0_map, ln)) {
5204 sym_clr_bit(tp->busy0_map, ln);
5211 * Allocate LCB resources for tagged command queuing.
5213 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
5215 tcb_p tp = &np->target[tn];
5216 lcb_p lp = sym_lp(np, tp, ln);
5220 * If LCB not available, try to allocate it.
5222 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
5226 * Allocate the task table and and the tag allocation
5227 * circular buffer. We want both or none.
5229 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5232 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
5234 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5235 lp->itlq_tbl = NULL;
5240 * Initialize the task table with invalid entries.
5242 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5243 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5246 * Fill up the tag buffer with tag numbers.
5248 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5252 * Make the task table available to SCRIPTS,
5253 * And accept tagged commands now.
5255 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5263 * Queue a SCSI IO to the controller.
5265 int sym_queue_scsiio(hcb_p np, cam_scsiio_p csio, ccb_p cp)
5274 * Keep track of the IO in our CCB.
5276 cp->cam_ccb = (cam_ccb_p) csio;
5279 * Retrieve the target descriptor.
5281 tp = &np->target[cp->target];
5284 * Retrieve the lun descriptor.
5286 lp = sym_lp(np, tp, cp->lun);
5288 can_disconnect = (cp->tag != NO_TAG) ||
5289 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5291 msgptr = cp->scsi_smsg;
5293 msgptr[msglen++] = IDENTIFY(can_disconnect, cp->lun);
5296 * Build the tag message if present.
5298 if (cp->tag != NO_TAG) {
5299 u_char order = cp->order;
5307 order = M_SIMPLE_TAG;
5309 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5311 * Avoid too much reordering of SCSI commands.
5312 * The algorithm tries to prevent completion of any
5313 * tagged command from being delayed against more
5314 * than 3 times the max number of queued commands.
5316 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5317 lp->tags_si = !(lp->tags_si);
5318 if (lp->tags_sum[lp->tags_si]) {
5319 order = M_ORDERED_TAG;
5320 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5322 printf("ordered tag forced.\n");
5328 msgptr[msglen++] = order;
5331 * For less than 128 tags, actual tags are numbered
5332 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5333 * with devices that have problems with #TAG 0 or too
5334 * great #TAG numbers. For more tags (up to 256),
5335 * we use directly our tag number.
5337 #if SYM_CONF_MAX_TASK > (512/4)
5338 msgptr[msglen++] = cp->tag;
5340 msgptr[msglen++] = (cp->tag << 1) + 1;
5345 * Build a negotiation message if needed.
5346 * (nego_status is filled by sym_prepare_nego())
5348 cp->nego_status = 0;
5349 if (tp->tinfo.curr.width != tp->tinfo.goal.width ||
5350 tp->tinfo.curr.period != tp->tinfo.goal.period ||
5351 tp->tinfo.curr.offset != tp->tinfo.goal.offset ||
5352 tp->tinfo.curr.options != tp->tinfo.goal.options) {
5353 if (!tp->nego_cp && lp)
5354 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
5360 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
5361 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
5366 cp->phys.select.sel_id = cp->target;
5367 cp->phys.select.sel_scntl3 = tp->head.wval;
5368 cp->phys.select.sel_sxfer = tp->head.sval;
5369 cp->phys.select.sel_scntl4 = tp->head.uval;
5374 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
5375 cp->phys.smsg.size = cpu_to_scr(msglen);
5380 cp->host_xflags = 0;
5381 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5382 cp->ssss_status = S_ILLEGAL;
5383 cp->xerr_status = 0;
5385 cp->extra_bytes = 0;
5388 * extreme data pointer.
5389 * shall be positive, so -1 is lower than lowest.:)
5395 * Build the CDB and DATA descriptor block
5398 return sym_setup_data_and_start(np, csio, cp);
5402 * Reset a SCSI target (all LUNs of this target).
5404 int sym_reset_scsi_target(hcb_p np, int target)
5408 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5411 tp = &np->target[target];
5414 np->istat_sem = SEM;
5415 OUTB (nc_istat, SIGP|SEM);
5423 int sym_abort_ccb(hcb_p np, ccb_p cp, int timed_out)
5426 * Check that the IO is active.
5428 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5432 * If a previous abort didn't succeed in time,
5433 * perform a BUS reset.
5436 sym_reset_scsi_bus(np, 1);
5441 * Mark the CCB for abort and allow time for.
5443 cp->to_abort = timed_out ? 2 : 1;
5446 * Tell the SCRIPTS processor to stop and synchronize with us.
5448 np->istat_sem = SEM;
5449 OUTB (nc_istat, SIGP|SEM);
5453 int sym_abort_scsiio(hcb_p np, cam_ccb_p ccb, int timed_out)
5459 * Look up our CCB control block.
5462 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5463 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5464 if (cp2->cam_ccb == ccb) {
5470 return sym_abort_ccb(np, cp, timed_out);
5474 * Complete execution of a SCSI command with extented
5475 * error, SCSI status error, or having been auto-sensed.
5477 * The SCRIPTS processor is not running there, so we
5478 * can safely access IO registers and remove JOBs from
5480 * SCRATCHA is assumed to have been loaded with STARTPOS
5481 * before the SCRIPTS called the C code.
5483 void sym_complete_error (hcb_p np, ccb_p cp)
5491 * Paranoid check. :)
5493 if (!cp || !cp->cam_ccb)
5496 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5497 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
5498 cp->host_status, cp->ssss_status, cp->host_flags,
5499 cp->target, cp->lun);
5503 * Get target and lun pointers.
5505 tp = &np->target[cp->target];
5506 lp = sym_lp(np, tp, cp->lun);
5509 * Check for extended errors.
5511 if (cp->xerr_status) {
5513 sym_print_xerr(cp, cp->xerr_status);
5514 if (cp->host_status == HS_COMPLETE)
5515 cp->host_status = HS_COMP_ERR;
5519 * Calculate the residual.
5521 resid = sym_compute_residual(np, cp);
5523 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5524 resid = 0; /* throw them away. :) */
5529 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5533 * Dequeue all queued CCBs for that device
5534 * not yet started by SCRIPTS.
5536 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5537 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5540 * Restart the SCRIPTS processor.
5542 OUTL_DSP (SCRIPTA_BA (np, start));
5544 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5545 if (cp->host_status == HS_COMPLETE &&
5546 cp->ssss_status == S_QUEUE_FULL) {
5547 if (!lp || lp->started_tags - i < 2)
5550 * Decrease queue depth as needed.
5552 lp->started_max = lp->started_tags - i - 1;
5555 if (sym_verbose >= 2) {
5556 PRINT_LUN(np, cp->target, cp->lun);
5557 printf(" queue depth is now %d\n", lp->started_max);
5563 cp->host_status = HS_BUSY;
5564 cp->ssss_status = S_ILLEGAL;
5567 * Let's requeue it to device.
5569 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
5575 * Synchronize DMA map if needed.
5577 sym_data_dmamap_postsync(np, cp);
5580 * Build result in CAM ccb.
5582 sym_set_cam_result_error(np, cp, resid);
5584 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5588 * Add this one to the COMP queue.
5590 sym_remque(&cp->link_ccbq);
5591 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5594 * Complete all those commands with either error
5595 * or requeue condition.
5597 sym_flush_comp_queue(np, 0);
5599 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5601 * Donnot start more than 1 command after an error.
5604 sym_start_next_ccbs(np, lp, 1);
5609 * Complete execution of a successful SCSI command.
5611 * Only successful commands go to the DONE queue,
5612 * since we need to have the SCRIPTS processor
5613 * stopped on any error condition.
5614 * The SCRIPTS processor is running while we are
5615 * completing successful commands.
5617 void sym_complete_ok (hcb_p np, ccb_p cp)
5625 * Paranoid check. :)
5627 if (!cp || !cp->cam_ccb)
5629 assert (cp->host_status == HS_COMPLETE);
5637 * Get target and lun pointers.
5639 tp = &np->target[cp->target];
5640 lp = sym_lp(np, tp, cp->lun);
5643 * Assume device discovered on first success.
5646 sym_set_bit(tp->lun_map, cp->lun);
5649 * If all data have been transferred, given than no
5650 * extended error did occur, there is no residual.
5653 if (cp->phys.head.lastp != sym_goalp(cp))
5654 resid = sym_compute_residual(np, cp);
5657 * Wrong transfer residuals may be worse than just always
5658 * returning zero. User can disable this feature from
5659 * sym_conf.h. Residual support is enabled by default.
5661 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5665 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5669 * Synchronize DMA map if needed.
5671 sym_data_dmamap_postsync(np, cp);
5674 * Build result in CAM ccb.
5676 sym_set_cam_result_ok(np, cp, resid);
5678 #ifdef SYM_OPT_SNIFF_INQUIRY
5680 * On standard INQUIRY response (EVPD and CmDt
5681 * not set), sniff out device capabilities.
5683 if (cp->cdb_buf[0] == INQUIRY && !(cp->cdb_buf[1] & 0x3))
5684 sym_sniff_inquiry(np, cp->cam_ccb, resid);
5687 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5689 * If max number of started ccbs had been reduced,
5690 * increase it if 200 good status received.
5692 if (lp && lp->started_max < lp->started_limit) {
5694 if (lp->num_sgood >= 200) {
5697 if (sym_verbose >= 2) {
5698 PRINT_LUN(np, cp->target, cp->lun);
5699 printf(" queue depth is now %d\n",
5709 sym_free_ccb (np, cp);
5711 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5713 * Requeue a couple of awaiting scsi commands.
5715 if (lp && !sym_que_empty(&lp->waiting_ccbq))
5716 sym_start_next_ccbs(np, lp, 2);
5719 * Complete the command.
5721 sym_xpt_done(np, ccb);
5725 * Soft-attach the controller.
5727 int sym_hcb_attach(hcb_p np, struct sym_fw *fw, struct sym_nvram *nvram)
5732 * Get some info about the firmware.
5734 np->scripta_sz = fw->a_size;
5735 np->scriptb_sz = fw->b_size;
5736 np->scriptz_sz = fw->z_size;
5737 np->fw_setup = fw->setup;
5738 np->fw_patch = fw->patch;
5739 np->fw_name = fw->name;
5742 * Save setting of some IO registers, so we will
5743 * be able to probe specific implementations.
5745 sym_save_initial_setting (np);
5748 * Reset the chip now, since it has been reported
5749 * that SCSI clock calibration may not work properly
5750 * if the chip is currently active.
5752 sym_chip_reset (np);
5755 * Prepare controller and devices settings, according
5756 * to chip features, user set-up and driver set-up.
5758 (void) sym_prepare_setting(np, nvram);
5761 * Check the PCI clock frequency.
5762 * Must be performed after prepare_setting since it destroys
5763 * STEST1 that is used to probe for the clock doubler.
5765 i = sym_getpciclock(np);
5766 if (i > 37000 && !(np->features & FE_66MHZ))
5767 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5771 * Allocate the start queue.
5773 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5776 np->squeue_ba = vtobus(np->squeue);
5779 * Allocate the done queue.
5781 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5784 np->dqueue_ba = vtobus(np->dqueue);
5787 * Allocate the target bus address array.
5789 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
5792 np->targtbl_ba = vtobus(np->targtbl);
5795 * Allocate SCRIPTS areas.
5797 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5798 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5799 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5800 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5804 * Allocate the array of lists of CCBs hashed by DSA.
5806 np->ccbh = sym_calloc(sizeof(ccb_p *)*CCB_HASH_SIZE, "CCBH");
5811 * Initialyze the CCB free and busy queues.
5813 sym_que_init(&np->free_ccbq);
5814 sym_que_init(&np->busy_ccbq);
5815 sym_que_init(&np->comp_ccbq);
5818 * Initializations for optional handling
5819 * of IO timeouts and device queueing.
5821 #ifdef SYM_OPT_HANDLE_IO_TIMEOUT
5822 sym_que_init(&np->tmo0_ccbq);
5824 sym_calloc(2*SYM_CONF_TIMEOUT_ORDER_MAX*sizeof(SYM_QUEHEAD),
5826 for (i = 0 ; i < 2*SYM_CONF_TIMEOUT_ORDER_MAX ; i++)
5827 sym_que_init(&np->tmo_ccbq[i]);
5829 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5830 sym_que_init(&np->dummy_ccbq);
5833 * Allocate some CCB. We need at least ONE.
5835 if (!sym_alloc_ccb(np))
5839 * Calculate BUS addresses where we are going
5840 * to load the SCRIPTS.
5842 np->scripta_ba = vtobus(np->scripta0);
5843 np->scriptb_ba = vtobus(np->scriptb0);
5844 np->scriptz_ba = vtobus(np->scriptz0);
5847 np->scripta_ba = np->ram_ba;
5848 if (np->features & FE_RAM8K) {
5850 np->scriptb_ba = np->scripta_ba + 4096;
5851 #if 0 /* May get useful for 64 BIT PCI addressing */
5852 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5860 * Copy scripts to controller instance.
5862 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5863 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5864 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5867 * Setup variable parts in scripts and compute
5868 * scripts bus addresses used from the C code.
5870 np->fw_setup(np, fw);
5873 * Bind SCRIPTS with physical addresses usable by the
5874 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5876 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5877 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5878 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5880 #ifdef SYM_CONF_IARB_SUPPORT
5882 * If user wants IARB to be set when we win arbitration
5883 * and have other jobs, compute the max number of consecutive
5884 * settings of IARB hints before we leave devices a chance to
5885 * arbitrate for reselection.
5887 #ifdef SYM_SETUP_IARB_MAX
5888 np->iarb_max = SYM_SETUP_IARB_MAX;
5895 * Prepare the idle and invalid task actions.
5897 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
5898 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
5899 np->idletask_ba = vtobus(&np->idletask);
5901 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
5902 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
5903 np->notask_ba = vtobus(&np->notask);
5905 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
5906 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
5907 np->bad_itl_ba = vtobus(&np->bad_itl);
5909 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
5910 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
5911 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5914 * Allocate and prepare the lun JUMP table that is used
5915 * for a target prior the probing of devices (bad lun table).
5916 * A private table will be allocated for the target on the
5917 * first INQUIRY response received.
5919 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5923 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
5924 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5925 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5928 * Prepare the bus address array that contains the bus
5929 * address of each target control block.
5930 * For now, assume all logical units are wrong. :)
5932 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5933 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5934 np->target[i].head.luntbl_sa =
5935 cpu_to_scr(vtobus(np->badluntbl));
5936 np->target[i].head.lun0_sa =
5937 cpu_to_scr(vtobus(&np->badlun_sa));
5941 * Now check the cache handling of the pci chipset.
5943 if (sym_snooptest (np)) {
5944 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5949 * Sigh! we are done.
5958 * Free everything that has been allocated for this device.
5960 void sym_hcb_free(hcb_p np)
5969 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5971 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5973 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5974 #ifdef SYM_OPT_HANDLE_IO_TIMEOUT
5976 sym_mfree(np->tmo_ccbq,
5977 2*SYM_CONF_TIMEOUT_ORDER_MAX*sizeof(SYM_QUEHEAD),
5981 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5983 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5986 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
5987 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5988 sym_data_dmamap_destroy(np, cp);
5989 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN,
5991 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5995 sym_mfree(np->ccbh, sizeof(ccb_p *)*CCB_HASH_SIZE, "CCBH");
5998 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
6000 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
6001 tp = &np->target[target];
6002 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
6003 lp = sym_lp(np, tp, lun);
6007 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
6010 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
6012 sym_mfree_dma(lp, sizeof(*lp), "LCB");
6014 #if SYM_CONF_MAX_LUN > 1
6016 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
6021 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
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