2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/tty.h>
26 #include <linux/ioport.h>
27 #include <linux/init.h>
28 #include <linux/console.h>
29 #include <linux/sysrq.h>
30 #include <linux/serial_reg.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h>
33 #include <linux/delay.h>
34 #include <linux/device.h>
39 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
43 #include <linux/serial_core.h>
48 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
49 * is unsafe when used on edge-triggered interrupts.
51 unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
57 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
59 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
63 #define DEBUG_INTR(fmt...) printk(fmt)
65 #define DEBUG_INTR(fmt...) do { } while (0)
68 #define PASS_LIMIT 256
71 * We default to IRQ0 for the "no irq" hack. Some
72 * machine types want others as well - they're free
73 * to redefine this in their header file.
75 #define is_real_interrupt(irq) ((irq) != 0)
78 * This converts from our new CONFIG_ symbols to the symbols
79 * that asm/serial.h expects. You _NEED_ to comment out the
80 * linux/config.h include contained inside asm/serial.h for
83 #undef CONFIG_SERIAL_MANY_PORTS
84 #undef CONFIG_SERIAL_DETECT_IRQ
85 #undef CONFIG_SERIAL_MULTIPORT
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MULTIPORT
92 #define CONFIG_SERIAL_MULTIPORT 1
94 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
95 #define CONFIG_SERIAL_MANY_PORTS 1
99 * HUB6 is always on. This will be removed once the header
100 * files have been cleaned.
102 #define CONFIG_HUB6 1
104 #include <asm/serial.h>
107 * SERIAL_PORT_DFNS tells us about built-in ports that have no
108 * standard enumeration mechanism. Platforms that can find all
109 * serial ports via mechanisms like ACPI or PCI need not supply it.
111 #ifndef SERIAL_PORT_DFNS
112 #define SERIAL_PORT_DFNS
115 static struct old_serial_port old_serial_port[] = {
116 SERIAL_PORT_DFNS /* defined in asm/serial.h */
119 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
121 #ifdef CONFIG_SERIAL_8250_RSA
123 #define PORT_RSA_MAX 4
124 static unsigned long probe_rsa[PORT_RSA_MAX];
125 static unsigned int probe_rsa_count;
126 #endif /* CONFIG_SERIAL_8250_RSA */
128 struct uart_8250_port {
129 struct uart_port port;
130 struct timer_list timer; /* "no irq" timer */
131 struct list_head list; /* ports on this IRQ */
132 unsigned int capabilities; /* port capabilities */
133 unsigned int tx_loadsz; /* transmit fifo load size */
139 unsigned char mcr_mask; /* mask of user bits */
140 unsigned char mcr_force; /* mask of forced bits */
141 unsigned char lsr_break_flag;
144 * We provide a per-port pm hook.
146 void (*pm)(struct uart_port *port,
147 unsigned int state, unsigned int old);
152 struct list_head *head;
155 static struct irq_info irq_lists[NR_IRQS];
158 * Here we define the default xmit fifo size used for each type of UART.
160 static const struct serial8250_config uart_config[PORT_MAX_8250+1] = {
161 { "unknown", 1, 1, 0 },
163 { "16450", 1, 1, 0 },
164 { "16550", 1, 1, 0 },
165 { "16550A", 16, 16, UART_CAP_FIFO },
166 { "Cirrus", 1, 1, 0 },
167 { "ST16650", 1, 1, UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_EFR },
168 { "ST16650V2", 32, 16, UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_EFR },
169 { "TI16750", 64, 64, UART_CAP_FIFO | UART_CAP_SLEEP },
170 { "Startech", 1, 1, 0 },
171 { "16C950/954", 128, 128, UART_CAP_FIFO },
172 { "ST16654", 64, 32, UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_EFR },
173 { "XR16850", 128, 128, UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_EFR },
174 { "RSA", 2048, 2048, UART_CAP_FIFO },
175 { "NS16550A", 16, 16, UART_CAP_FIFO | UART_NATSEMI },
176 { "XScale", 32, 32, UART_CAP_FIFO },
179 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
181 offset <<= up->port.regshift;
183 switch (up->port.iotype) {
185 outb(up->port.hub6 - 1 + offset, up->port.iobase);
186 return inb(up->port.iobase + 1);
189 return readb(up->port.membase + offset);
192 return readl(up->port.membase + offset);
195 return inb(up->port.iobase + offset);
200 serial_out(struct uart_8250_port *up, int offset, int value)
202 offset <<= up->port.regshift;
204 switch (up->port.iotype) {
206 outb(up->port.hub6 - 1 + offset, up->port.iobase);
207 outb(value, up->port.iobase + 1);
211 writeb(value, up->port.membase + offset);
215 writel(value, up->port.membase + offset);
219 outb(value, up->port.iobase + offset);
224 * We used to support using pause I/O for certain machines. We
225 * haven't supported this for a while, but just in case it's badly
226 * needed for certain old 386 machines, I've left these #define's
229 #define serial_inp(up, offset) serial_in(up, offset)
230 #define serial_outp(up, offset, value) serial_out(up, offset, value)
236 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
238 serial_out(up, UART_SCR, offset);
239 serial_out(up, UART_ICR, value);
242 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
246 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
247 serial_out(up, UART_SCR, offset);
248 value = serial_in(up, UART_ICR);
249 serial_icr_write(up, UART_ACR, up->acr);
257 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
259 if (p->capabilities & UART_CAP_FIFO) {
260 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
261 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
262 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
263 serial_outp(p, UART_FCR, 0);
268 * IER sleep support. UARTs which have EFRs need the "extended
269 * capability" bit enabled. Note that on XR16C850s, we need to
270 * reset LCR to write to IER.
272 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
274 if (p->capabilities & UART_CAP_SLEEP) {
275 if (p->capabilities & UART_CAP_EFR) {
276 serial_outp(p, UART_LCR, 0xBF);
277 serial_outp(p, UART_EFR, UART_EFR_ECB);
278 serial_outp(p, UART_LCR, 0);
280 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
281 if (p->capabilities & UART_CAP_EFR) {
282 serial_outp(p, UART_LCR, 0xBF);
283 serial_outp(p, UART_EFR, 0);
284 serial_outp(p, UART_LCR, 0);
289 #ifdef CONFIG_SERIAL_8250_RSA
291 * Attempts to turn on the RSA FIFO. Returns zero on failure.
292 * We set the port uart clock rate if we succeed.
294 static int __enable_rsa(struct uart_8250_port *up)
299 mode = serial_inp(up, UART_RSA_MSR);
300 result = mode & UART_RSA_MSR_FIFO;
303 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
304 mode = serial_inp(up, UART_RSA_MSR);
305 result = mode & UART_RSA_MSR_FIFO;
309 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
314 static void enable_rsa(struct uart_8250_port *up)
316 if (up->port.type == PORT_RSA) {
317 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
318 spin_lock_irq(&up->port.lock);
320 spin_unlock_irq(&up->port.lock);
322 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
323 serial_outp(up, UART_RSA_FRR, 0);
328 * Attempts to turn off the RSA FIFO. Returns zero on failure.
329 * It is unknown why interrupts were disabled in here. However,
330 * the caller is expected to preserve this behaviour by grabbing
331 * the spinlock before calling this function.
333 static void disable_rsa(struct uart_8250_port *up)
338 if (up->port.type == PORT_RSA &&
339 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
340 spin_lock_irq(&up->port.lock);
342 mode = serial_inp(up, UART_RSA_MSR);
343 result = !(mode & UART_RSA_MSR_FIFO);
346 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
347 mode = serial_inp(up, UART_RSA_MSR);
348 result = !(mode & UART_RSA_MSR_FIFO);
352 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
353 spin_unlock_irq(&up->port.lock);
356 #endif /* CONFIG_SERIAL_8250_RSA */
359 * This is a quickie test to see how big the FIFO is.
360 * It doesn't work at all the time, more's the pity.
362 static int size_fifo(struct uart_8250_port *up)
364 unsigned char old_fcr, old_mcr, old_dll, old_dlm;
367 old_fcr = serial_inp(up, UART_FCR);
368 old_mcr = serial_inp(up, UART_MCR);
369 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
370 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
371 serial_outp(up, UART_MCR, UART_MCR_LOOP);
372 serial_outp(up, UART_LCR, UART_LCR_DLAB);
373 old_dll = serial_inp(up, UART_DLL);
374 old_dlm = serial_inp(up, UART_DLM);
375 serial_outp(up, UART_DLL, 0x01);
376 serial_outp(up, UART_DLM, 0x00);
377 serial_outp(up, UART_LCR, 0x03);
378 for (count = 0; count < 256; count++)
379 serial_outp(up, UART_TX, count);
380 mdelay(20);/* FIXME - schedule_timeout */
381 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
382 (count < 256); count++)
383 serial_inp(up, UART_RX);
384 serial_outp(up, UART_FCR, old_fcr);
385 serial_outp(up, UART_MCR, old_mcr);
386 serial_outp(up, UART_LCR, UART_LCR_DLAB);
387 serial_outp(up, UART_DLL, old_dll);
388 serial_outp(up, UART_DLM, old_dlm);
394 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
395 * When this function is called we know it is at least a StarTech
396 * 16650 V2, but it might be one of several StarTech UARTs, or one of
397 * its clones. (We treat the broken original StarTech 16650 V1 as a
398 * 16550, and why not? Startech doesn't seem to even acknowledge its
401 * What evil have men's minds wrought...
403 static void autoconfig_has_efr(struct uart_8250_port *up)
405 unsigned char id1, id2, id3, rev, saved_dll, saved_dlm;
408 * First we check to see if it's an Oxford Semiconductor UART.
410 * If we have to do this here because some non-National
411 * Semiconductor clone chips lock up if you try writing to the
412 * LSR register (which serial_icr_read does)
416 * Check for Oxford Semiconductor 16C950.
418 * EFR [4] must be set else this test fails.
420 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
421 * claims that it's needed for 952 dual UART's (which are not
422 * recommended for new designs).
425 serial_out(up, UART_LCR, 0xBF);
426 serial_out(up, UART_EFR, UART_EFR_ECB);
427 serial_out(up, UART_LCR, 0x00);
428 id1 = serial_icr_read(up, UART_ID1);
429 id2 = serial_icr_read(up, UART_ID2);
430 id3 = serial_icr_read(up, UART_ID3);
431 rev = serial_icr_read(up, UART_REV);
433 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
435 if (id1 == 0x16 && id2 == 0xC9 &&
436 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
437 up->port.type = PORT_16C950;
438 up->rev = rev | (id3 << 8);
443 * We check for a XR16C850 by setting DLL and DLM to 0, and then
444 * reading back DLL and DLM. The chip type depends on the DLM
446 * 0x10 - XR16C850 and the DLL contains the chip revision.
450 serial_outp(up, UART_LCR, UART_LCR_DLAB);
451 saved_dll = serial_inp(up, UART_DLL);
452 saved_dlm = serial_inp(up, UART_DLM);
453 serial_outp(up, UART_DLL, 0);
454 serial_outp(up, UART_DLM, 0);
455 id2 = serial_inp(up, UART_DLL);
456 id1 = serial_inp(up, UART_DLM);
457 serial_outp(up, UART_DLL, saved_dll);
458 serial_outp(up, UART_DLM, saved_dlm);
460 DEBUG_AUTOCONF("850id=%02x:%02x ", id1, id2);
462 if (id1 == 0x10 || id1 == 0x12 || id1 == 0x14) {
465 up->port.type = PORT_16850;
470 * It wasn't an XR16C850.
472 * We distinguish between the '654 and the '650 by counting
473 * how many bytes are in the FIFO. I'm using this for now,
474 * since that's the technique that was sent to me in the
475 * serial driver update, but I'm not convinced this works.
476 * I've had problems doing this in the past. -TYT
478 if (size_fifo(up) == 64)
479 up->port.type = PORT_16654;
481 up->port.type = PORT_16650V2;
485 * We detected a chip without a FIFO. Only two fall into
486 * this category - the original 8250 and the 16450. The
487 * 16450 has a scratch register (accessible with LCR=0)
489 static void autoconfig_8250(struct uart_8250_port *up)
491 unsigned char scratch, status1, status2;
493 up->port.type = PORT_8250;
495 scratch = serial_in(up, UART_SCR);
496 serial_outp(up, UART_SCR, 0xa5);
497 status1 = serial_in(up, UART_SCR);
498 serial_outp(up, UART_SCR, 0x5a);
499 status2 = serial_in(up, UART_SCR);
500 serial_outp(up, UART_SCR, scratch);
502 if (status1 == 0xa5 && status2 == 0x5a)
503 up->port.type = PORT_16450;
507 * We know that the chip has FIFOs. Does it have an EFR? The
508 * EFR is located in the same register position as the IIR and
509 * we know the top two bits of the IIR are currently set. The
510 * EFR should contain zero. Try to read the EFR.
512 static void autoconfig_16550a(struct uart_8250_port *up)
514 unsigned char status1, status2;
516 up->port.type = PORT_16550A;
519 * Check for presence of the EFR when DLAB is set.
520 * Only ST16C650V1 UARTs pass this test.
522 serial_outp(up, UART_LCR, UART_LCR_DLAB);
523 if (serial_in(up, UART_EFR) == 0) {
524 serial_outp(up, UART_EFR, 0xA8);
525 if (serial_in(up, UART_EFR) != 0) {
526 DEBUG_AUTOCONF("EFRv1 ");
527 up->port.type = PORT_16650;
529 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
531 serial_outp(up, UART_EFR, 0);
536 * Maybe it requires 0xbf to be written to the LCR.
537 * (other ST16C650V2 UARTs, TI16C752A, etc)
539 serial_outp(up, UART_LCR, 0xBF);
540 if (serial_in(up, UART_EFR) == 0) {
541 DEBUG_AUTOCONF("EFRv2 ");
542 autoconfig_has_efr(up);
547 * Check for a National Semiconductor SuperIO chip.
548 * Attempt to switch to bank 2, read the value of the LOOP bit
549 * from EXCR1. Switch back to bank 0, change it in MCR. Then
550 * switch back to bank 2, read it from EXCR1 again and check
551 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
552 * On PowerPC we don't want to change baud_base, as we have
553 * a number of different divisors. -- Tom Rini
555 serial_outp(up, UART_LCR, 0);
556 status1 = serial_in(up, UART_MCR);
557 serial_outp(up, UART_LCR, 0xE0);
558 status2 = serial_in(up, 0x02); /* EXCR1 */
560 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
561 serial_outp(up, UART_LCR, 0);
562 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
563 serial_outp(up, UART_LCR, 0xE0);
564 status2 = serial_in(up, 0x02); /* EXCR1 */
565 serial_outp(up, UART_LCR, 0);
566 serial_outp(up, UART_MCR, status1);
568 if ((status2 ^ status1) & UART_MCR_LOOP) {
570 serial_outp(up, UART_LCR, 0xE0);
571 status1 = serial_in(up, 0x04); /* EXCR1 */
572 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
573 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
574 serial_outp(up, 0x04, status1);
575 serial_outp(up, UART_LCR, 0);
576 up->port.uartclk = 921600*16;
579 up->port.type = PORT_NS16550A;
585 * No EFR. Try to detect a TI16750, which only sets bit 5 of
586 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
587 * Try setting it with and without DLAB set. Cheap clones
588 * set bit 5 without DLAB set.
590 serial_outp(up, UART_LCR, 0);
591 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
592 status1 = serial_in(up, UART_IIR) >> 5;
593 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
594 serial_outp(up, UART_LCR, UART_LCR_DLAB);
595 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
596 status2 = serial_in(up, UART_IIR) >> 5;
597 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
599 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
601 if (status1 == 6 && status2 == 7) {
602 up->port.type = PORT_16750;
608 * This routine is called by rs_init() to initialize a specific serial
609 * port. It determines what type of UART chip this serial port is
610 * using: 8250, 16450, 16550, 16550A. The important question is
611 * whether or not this UART is a 16550A or not, since this will
612 * determine whether or not we can use its FIFO features or not.
614 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
616 unsigned char status1, scratch, scratch2, scratch3;
617 unsigned char save_lcr, save_mcr;
620 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
623 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
624 up->port.line, up->port.iobase, up->port.membase);
627 * We really do need global IRQs disabled here - we're going to
628 * be frobbing the chips IRQ enable register to see if it exists.
630 spin_lock_irqsave(&up->port.lock, flags);
631 // save_flags(flags); cli();
633 if (!(up->port.flags & UPF_BUGGY_UART)) {
635 * Do a simple existence test first; if we fail this,
636 * there's no point trying anything else.
638 * 0x80 is used as a nonsense port to prevent against
639 * false positives due to ISA bus float. The
640 * assumption is that 0x80 is a non-existent port;
641 * which should be safe since include/asm/io.h also
642 * makes this assumption.
644 * Note: this is safe as long as MCR bit 4 is clear
645 * and the device is in "PC" mode.
647 scratch = serial_inp(up, UART_IER);
648 serial_outp(up, UART_IER, 0);
652 scratch2 = serial_inp(up, UART_IER);
653 serial_outp(up, UART_IER, 0x0F);
657 scratch3 = serial_inp(up, UART_IER);
658 serial_outp(up, UART_IER, scratch);
659 if (scratch2 != 0 || scratch3 != 0x0F) {
661 * We failed; there's nothing here
663 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
669 save_mcr = serial_in(up, UART_MCR);
670 save_lcr = serial_in(up, UART_LCR);
673 * Check to see if a UART is really there. Certain broken
674 * internal modems based on the Rockwell chipset fail this
675 * test, because they apparently don't implement the loopback
676 * test mode. So this test is skipped on the COM 1 through
677 * COM 4 ports. This *should* be safe, since no board
678 * manufacturer would be stupid enough to design a board
679 * that conflicts with COM 1-4 --- we hope!
681 if (!(up->port.flags & UPF_SKIP_TEST)) {
682 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
683 status1 = serial_inp(up, UART_MSR) & 0xF0;
684 serial_outp(up, UART_MCR, save_mcr);
685 if (status1 != 0x90) {
686 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
693 * We're pretty sure there's a port here. Lets find out what
694 * type of port it is. The IIR top two bits allows us to find
695 * out if its 8250 or 16450, 16550, 16550A or later. This
696 * determines what we test for next.
698 * We also initialise the EFR (if any) to zero for later. The
699 * EFR occupies the same register location as the FCR and IIR.
701 serial_outp(up, UART_LCR, 0xBF);
702 serial_outp(up, UART_EFR, 0);
703 serial_outp(up, UART_LCR, 0);
705 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
706 scratch = serial_in(up, UART_IIR) >> 6;
708 DEBUG_AUTOCONF("iir=%d ", scratch);
715 up->port.type = PORT_UNKNOWN;
718 up->port.type = PORT_16550;
721 autoconfig_16550a(up);
725 #ifdef CONFIG_SERIAL_8250_RSA
727 * Only probe for RSA ports if we got the region.
729 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
732 for (i = 0 ; i < probe_rsa_count; ++i) {
733 if (probe_rsa[i] == up->port.iobase &&
735 up->port.type = PORT_RSA;
741 serial_outp(up, UART_LCR, save_lcr);
743 up->port.fifosize = uart_config[up->port.type].fifo_size;
744 up->capabilities = uart_config[up->port.type].flags;
745 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
747 if (up->port.type == PORT_UNKNOWN)
753 #ifdef CONFIG_SERIAL_8250_RSA
754 if (up->port.type == PORT_RSA)
755 serial_outp(up, UART_RSA_FRR, 0);
757 serial_outp(up, UART_MCR, save_mcr);
758 serial8250_clear_fifos(up);
759 (void)serial_in(up, UART_RX);
760 serial_outp(up, UART_IER, 0);
763 spin_unlock_irqrestore(&up->port.lock, flags);
764 // restore_flags(flags);
765 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
768 static void autoconfig_irq(struct uart_8250_port *up)
770 unsigned char save_mcr, save_ier;
771 unsigned char save_ICP = 0;
772 unsigned int ICP = 0;
776 if (up->port.flags & UPF_FOURPORT) {
777 ICP = (up->port.iobase & 0xfe0) | 0x1f;
778 save_ICP = inb_p(ICP);
783 /* forget possible initially masked and pending IRQ */
784 probe_irq_off(probe_irq_on());
785 save_mcr = serial_inp(up, UART_MCR);
786 save_ier = serial_inp(up, UART_IER);
787 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
789 irqs = probe_irq_on();
790 serial_outp(up, UART_MCR, 0);
792 if (up->port.flags & UPF_FOURPORT) {
793 serial_outp(up, UART_MCR,
794 UART_MCR_DTR | UART_MCR_RTS);
796 serial_outp(up, UART_MCR,
797 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
799 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
800 (void)serial_inp(up, UART_LSR);
801 (void)serial_inp(up, UART_RX);
802 (void)serial_inp(up, UART_IIR);
803 (void)serial_inp(up, UART_MSR);
804 serial_outp(up, UART_TX, 0xFF);
806 irq = probe_irq_off(irqs);
808 serial_outp(up, UART_MCR, save_mcr);
809 serial_outp(up, UART_IER, save_ier);
811 if (up->port.flags & UPF_FOURPORT)
812 outb_p(save_ICP, ICP);
814 up->port.irq = (irq > 0) ? irq : 0;
817 static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
819 struct uart_8250_port *up = (struct uart_8250_port *)port;
821 if (up->ier & UART_IER_THRI) {
822 up->ier &= ~UART_IER_THRI;
823 serial_out(up, UART_IER, up->ier);
825 if (up->port.type == PORT_16C950 && tty_stop) {
826 up->acr |= UART_ACR_TXDIS;
827 serial_icr_write(up, UART_ACR, up->acr);
831 static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start)
833 struct uart_8250_port *up = (struct uart_8250_port *)port;
835 if (!(up->ier & UART_IER_THRI)) {
836 up->ier |= UART_IER_THRI;
837 serial_out(up, UART_IER, up->ier);
840 * We only do this from uart_start
842 if (tty_start && up->port.type == PORT_16C950) {
843 up->acr &= ~UART_ACR_TXDIS;
844 serial_icr_write(up, UART_ACR, up->acr);
848 static void serial8250_stop_rx(struct uart_port *port)
850 struct uart_8250_port *up = (struct uart_8250_port *)port;
852 up->ier &= ~UART_IER_RLSI;
853 up->port.read_status_mask &= ~UART_LSR_DR;
854 serial_out(up, UART_IER, up->ier);
857 static void serial8250_enable_ms(struct uart_port *port)
859 struct uart_8250_port *up = (struct uart_8250_port *)port;
861 up->ier |= UART_IER_MSI;
862 serial_out(up, UART_IER, up->ier);
866 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
868 struct tty_struct *tty = up->port.info->tty;
873 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
874 tty->flip.work.func((void *)tty);
875 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
876 return; // if TTY_DONT_FLIP is set
878 ch = serial_inp(up, UART_RX);
879 *tty->flip.char_buf_ptr = ch;
880 *tty->flip.flag_buf_ptr = TTY_NORMAL;
881 up->port.icount.rx++;
883 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
884 UART_LSR_FE | UART_LSR_OE))) {
886 * For statistics only
888 if (*status & UART_LSR_BI) {
889 *status &= ~(UART_LSR_FE | UART_LSR_PE);
890 up->port.icount.brk++;
892 * We do the SysRQ and SAK checking
893 * here because otherwise the break
894 * may get masked by ignore_status_mask
895 * or read_status_mask.
897 if (uart_handle_break(&up->port))
899 } else if (*status & UART_LSR_PE)
900 up->port.icount.parity++;
901 else if (*status & UART_LSR_FE)
902 up->port.icount.frame++;
903 if (*status & UART_LSR_OE)
904 up->port.icount.overrun++;
907 * Mask off conditions which should be ingored.
909 *status &= up->port.read_status_mask;
911 #ifdef CONFIG_SERIAL_8250_CONSOLE
912 if (up->port.line == up->port.cons->index) {
913 /* Recover the break flag from console xmit */
914 *status |= up->lsr_break_flag;
915 up->lsr_break_flag = 0;
918 if (*status & UART_LSR_BI) {
919 DEBUG_INTR("handling break....");
920 *tty->flip.flag_buf_ptr = TTY_BREAK;
921 } else if (*status & UART_LSR_PE)
922 *tty->flip.flag_buf_ptr = TTY_PARITY;
923 else if (*status & UART_LSR_FE)
924 *tty->flip.flag_buf_ptr = TTY_FRAME;
926 if (uart_handle_sysrq_char(&up->port, ch, regs))
928 if ((*status & up->port.ignore_status_mask) == 0) {
929 tty->flip.flag_buf_ptr++;
930 tty->flip.char_buf_ptr++;
933 if ((*status & UART_LSR_OE) &&
934 tty->flip.count < TTY_FLIPBUF_SIZE) {
936 * Overrun is special, since it's reported
937 * immediately, and doesn't affect the current
940 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
941 tty->flip.flag_buf_ptr++;
942 tty->flip.char_buf_ptr++;
946 *status = serial_inp(up, UART_LSR);
947 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
948 tty_flip_buffer_push(tty);
951 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
953 struct circ_buf *xmit = &up->port.info->xmit;
956 if (up->port.x_char) {
957 serial_outp(up, UART_TX, up->port.x_char);
958 up->port.icount.tx++;
962 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
963 serial8250_stop_tx(&up->port, 0);
967 count = up->tx_loadsz;
969 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
970 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
971 up->port.icount.tx++;
972 if (uart_circ_empty(xmit))
974 } while (--count > 0);
976 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
977 uart_write_wakeup(&up->port);
979 DEBUG_INTR("THRE...");
981 if (uart_circ_empty(xmit))
982 serial8250_stop_tx(&up->port, 0);
985 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
989 status = serial_in(up, UART_MSR);
991 if ((status & UART_MSR_ANY_DELTA) == 0)
994 if (status & UART_MSR_TERI)
995 up->port.icount.rng++;
996 if (status & UART_MSR_DDSR)
997 up->port.icount.dsr++;
998 if (status & UART_MSR_DDCD)
999 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1000 if (status & UART_MSR_DCTS)
1001 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1003 wake_up_interruptible(&up->port.info->delta_msr_wait);
1007 * This handles the interrupt from one port.
1010 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1012 unsigned int status = serial_inp(up, UART_LSR);
1014 DEBUG_INTR("status = %x...", status);
1016 if (status & UART_LSR_DR)
1017 receive_chars(up, &status, regs);
1018 check_modem_status(up);
1019 if (status & UART_LSR_THRE)
1024 * This is the serial driver's interrupt routine.
1026 * Arjan thinks the old way was overly complex, so it got simplified.
1027 * Alan disagrees, saying that need the complexity to handle the weird
1028 * nature of ISA shared interrupts. (This is a special exception.)
1030 * In order to handle ISA shared interrupts properly, we need to check
1031 * that all ports have been serviced, and therefore the ISA interrupt
1032 * line has been de-asserted.
1034 * This means we need to loop through all ports. checking that they
1035 * don't have an interrupt pending.
1037 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1039 struct irq_info *i = dev_id;
1040 struct list_head *l, *end = NULL;
1041 int pass_counter = 0;
1043 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1045 spin_lock(&i->lock);
1049 struct uart_8250_port *up;
1052 up = list_entry(l, struct uart_8250_port, list);
1054 iir = serial_in(up, UART_IIR);
1055 if (!(iir & UART_IIR_NO_INT)) {
1056 spin_lock(&up->port.lock);
1057 serial8250_handle_port(up, regs);
1058 spin_unlock(&up->port.lock);
1061 } else if (end == NULL)
1066 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1067 /* If we hit this, we're dead. */
1068 printk(KERN_ERR "serial8250: too much work for "
1074 spin_unlock(&i->lock);
1076 DEBUG_INTR("end.\n");
1077 /* FIXME! Was it really ours? */
1082 * To support ISA shared interrupts, we need to have one interrupt
1083 * handler that ensures that the IRQ line has been deasserted
1084 * before returning. Failing to do this will result in the IRQ
1085 * line being stuck active, and, since ISA irqs are edge triggered,
1086 * no more IRQs will be seen.
1088 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1090 spin_lock_irq(&i->lock);
1092 if (!list_empty(i->head)) {
1093 if (i->head == &up->list)
1094 i->head = i->head->next;
1095 list_del(&up->list);
1097 BUG_ON(i->head != &up->list);
1101 spin_unlock_irq(&i->lock);
1104 static int serial_link_irq_chain(struct uart_8250_port *up)
1106 struct irq_info *i = irq_lists + up->port.irq;
1107 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1109 spin_lock_irq(&i->lock);
1112 list_add(&up->list, i->head);
1113 spin_unlock_irq(&i->lock);
1117 INIT_LIST_HEAD(&up->list);
1118 i->head = &up->list;
1119 spin_unlock_irq(&i->lock);
1121 ret = request_irq(up->port.irq, serial8250_interrupt,
1122 irq_flags, "serial", i);
1124 serial_do_unlink(i, up);
1130 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1132 struct irq_info *i = irq_lists + up->port.irq;
1134 BUG_ON(i->head == NULL);
1136 if (list_empty(i->head))
1137 free_irq(up->port.irq, i);
1139 serial_do_unlink(i, up);
1143 * This function is used to handle ports that do not have an
1144 * interrupt. This doesn't work very well for 16450's, but gives
1145 * barely passable results for a 16550A. (Although at the expense
1146 * of much CPU overhead).
1148 static void serial8250_timeout(unsigned long data)
1150 struct uart_8250_port *up = (struct uart_8250_port *)data;
1151 unsigned int timeout;
1154 iir = serial_in(up, UART_IIR);
1155 if (!(iir & UART_IIR_NO_INT)) {
1156 spin_lock(&up->port.lock);
1157 serial8250_handle_port(up, NULL);
1158 spin_unlock(&up->port.lock);
1161 timeout = up->port.timeout;
1162 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1163 mod_timer(&up->timer, jiffies + timeout);
1166 static unsigned int serial8250_tx_empty(struct uart_port *port)
1168 struct uart_8250_port *up = (struct uart_8250_port *)port;
1169 unsigned long flags;
1172 spin_lock_irqsave(&up->port.lock, flags);
1173 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1174 spin_unlock_irqrestore(&up->port.lock, flags);
1179 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1181 struct uart_8250_port *up = (struct uart_8250_port *)port;
1182 unsigned long flags;
1183 unsigned char status;
1186 spin_lock_irqsave(&up->port.lock, flags);
1187 status = serial_in(up, UART_MSR);
1188 spin_unlock_irqrestore(&up->port.lock, flags);
1191 if (status & UART_MSR_DCD)
1193 if (status & UART_MSR_RI)
1195 if (status & UART_MSR_DSR)
1197 if (status & UART_MSR_CTS)
1202 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1204 struct uart_8250_port *up = (struct uart_8250_port *)port;
1205 unsigned char mcr = 0;
1207 if (mctrl & TIOCM_RTS)
1208 mcr |= UART_MCR_RTS;
1209 if (mctrl & TIOCM_DTR)
1210 mcr |= UART_MCR_DTR;
1211 if (mctrl & TIOCM_OUT1)
1212 mcr |= UART_MCR_OUT1;
1213 if (mctrl & TIOCM_OUT2)
1214 mcr |= UART_MCR_OUT2;
1215 if (mctrl & TIOCM_LOOP)
1216 mcr |= UART_MCR_LOOP;
1218 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1220 serial_out(up, UART_MCR, mcr);
1223 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1225 struct uart_8250_port *up = (struct uart_8250_port *)port;
1226 unsigned long flags;
1228 spin_lock_irqsave(&up->port.lock, flags);
1229 if (break_state == -1)
1230 up->lcr |= UART_LCR_SBC;
1232 up->lcr &= ~UART_LCR_SBC;
1233 serial_out(up, UART_LCR, up->lcr);
1234 spin_unlock_irqrestore(&up->port.lock, flags);
1237 static int serial8250_startup(struct uart_port *port)
1239 struct uart_8250_port *up = (struct uart_8250_port *)port;
1240 unsigned long flags;
1243 up->capabilities = uart_config[up->port.type].flags;
1246 if (up->port.type == PORT_16C950) {
1247 /* Wake up and initialize UART */
1249 serial_outp(up, UART_LCR, 0xBF);
1250 serial_outp(up, UART_EFR, UART_EFR_ECB);
1251 serial_outp(up, UART_IER, 0);
1252 serial_outp(up, UART_LCR, 0);
1253 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1254 serial_outp(up, UART_LCR, 0xBF);
1255 serial_outp(up, UART_EFR, UART_EFR_ECB);
1256 serial_outp(up, UART_LCR, 0);
1259 #ifdef CONFIG_SERIAL_8250_RSA
1261 * If this is an RSA port, see if we can kick it up to the
1262 * higher speed clock.
1268 * Clear the FIFO buffers and disable them.
1269 * (they will be reeanbled in set_termios())
1271 serial8250_clear_fifos(up);
1274 * Clear the interrupt registers.
1276 (void) serial_inp(up, UART_LSR);
1277 (void) serial_inp(up, UART_RX);
1278 (void) serial_inp(up, UART_IIR);
1279 (void) serial_inp(up, UART_MSR);
1282 * At this point, there's no way the LSR could still be 0xff;
1283 * if it is, then bail out, because there's likely no UART
1286 if (!(up->port.flags & UPF_BUGGY_UART) &&
1287 (serial_inp(up, UART_LSR) == 0xff)) {
1288 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1293 * For a XR16C850, we need to set the trigger levels
1295 if (up->port.type == PORT_16850) {
1298 serial_outp(up, UART_LCR, 0xbf);
1300 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1301 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1302 serial_outp(up, UART_TRG, UART_TRG_96);
1303 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1304 serial_outp(up, UART_TRG, UART_TRG_96);
1306 serial_outp(up, UART_LCR, 0);
1310 * If the "interrupt" for this port doesn't correspond with any
1311 * hardware interrupt, we use a timer-based system. The original
1312 * driver used to do this with IRQ0.
1314 if (!is_real_interrupt(up->port.irq)) {
1315 unsigned int timeout = up->port.timeout;
1317 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1319 up->timer.data = (unsigned long)up;
1320 mod_timer(&up->timer, jiffies + timeout);
1322 retval = serial_link_irq_chain(up);
1328 * Now, initialize the UART
1330 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1332 spin_lock_irqsave(&up->port.lock, flags);
1333 if (up->port.flags & UPF_FOURPORT) {
1334 if (!is_real_interrupt(up->port.irq))
1335 up->port.mctrl |= TIOCM_OUT1;
1338 * Most PC uarts need OUT2 raised to enable interrupts.
1340 if (is_real_interrupt(up->port.irq))
1341 up->port.mctrl |= TIOCM_OUT2;
1343 serial8250_set_mctrl(&up->port, up->port.mctrl);
1344 spin_unlock_irqrestore(&up->port.lock, flags);
1347 * Finally, enable interrupts. Note: Modem status interrupts
1348 * are set via set_termios(), which will be occurring imminently
1349 * anyway, so we don't enable them here.
1351 up->ier = UART_IER_RLSI | UART_IER_RDI;
1352 serial_outp(up, UART_IER, up->ier);
1354 if (up->port.flags & UPF_FOURPORT) {
1357 * Enable interrupts on the AST Fourport board
1359 icp = (up->port.iobase & 0xfe0) | 0x01f;
1365 * And clear the interrupt registers again for luck.
1367 (void) serial_inp(up, UART_LSR);
1368 (void) serial_inp(up, UART_RX);
1369 (void) serial_inp(up, UART_IIR);
1370 (void) serial_inp(up, UART_MSR);
1375 static void serial8250_shutdown(struct uart_port *port)
1377 struct uart_8250_port *up = (struct uart_8250_port *)port;
1378 unsigned long flags;
1381 * Disable interrupts from this port
1384 serial_outp(up, UART_IER, 0);
1386 spin_lock_irqsave(&up->port.lock, flags);
1387 if (up->port.flags & UPF_FOURPORT) {
1388 /* reset interrupts on the AST Fourport board */
1389 inb((up->port.iobase & 0xfe0) | 0x1f);
1390 up->port.mctrl |= TIOCM_OUT1;
1392 up->port.mctrl &= ~TIOCM_OUT2;
1394 serial8250_set_mctrl(&up->port, up->port.mctrl);
1395 spin_unlock_irqrestore(&up->port.lock, flags);
1398 * Disable break condition and FIFOs
1400 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1401 serial8250_clear_fifos(up);
1403 #ifdef CONFIG_SERIAL_8250_RSA
1405 * Reset the RSA board back to 115kbps compat mode.
1411 * Read data port to reset things, and then unlink from
1414 (void) serial_in(up, UART_RX);
1416 if (!is_real_interrupt(up->port.irq))
1417 del_timer_sync(&up->timer);
1419 serial_unlink_irq_chain(up);
1422 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1427 * Handle magic divisors for baud rates above baud_base on
1428 * SMSC SuperIO chips.
1430 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1431 baud == (port->uartclk/4))
1433 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1434 baud == (port->uartclk/8))
1437 quot = uart_get_divisor(port, baud);
1443 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1444 struct termios *old)
1446 struct uart_8250_port *up = (struct uart_8250_port *)port;
1447 unsigned char cval, fcr = 0;
1448 unsigned long flags;
1449 unsigned int baud, quot;
1451 switch (termios->c_cflag & CSIZE) {
1467 if (termios->c_cflag & CSTOPB)
1469 if (termios->c_cflag & PARENB)
1470 cval |= UART_LCR_PARITY;
1471 if (!(termios->c_cflag & PARODD))
1472 cval |= UART_LCR_EPAR;
1474 if (termios->c_cflag & CMSPAR)
1475 cval |= UART_LCR_SPAR;
1479 * Ask the core to calculate the divisor for us.
1481 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1482 quot = serial8250_get_divisor(port, baud);
1485 * Work around a bug in the Oxford Semiconductor 952 rev B
1486 * chip which causes it to seriously miscalculate baud rates
1489 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
1493 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1495 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1496 #ifdef CONFIG_SERIAL_8250_RSA
1497 else if (up->port.type == PORT_RSA)
1498 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
1501 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
1505 * TI16C750: hardware flow control and 64 byte FIFOs. When AFE is
1506 * enabled, RTS will be deasserted when the receive FIFO contains
1507 * more characters than the trigger, or the MCR RTS bit is cleared.
1509 if (up->port.type == PORT_16750) {
1510 up->mcr &= ~UART_MCR_AFE;
1511 if (termios->c_cflag & CRTSCTS)
1512 up->mcr |= UART_MCR_AFE;
1514 fcr |= UART_FCR7_64BYTE;
1518 * Ok, we're now changing the port state. Do it with
1519 * interrupts disabled.
1521 spin_lock_irqsave(&up->port.lock, flags);
1524 * Update the per-port timeout.
1526 uart_update_timeout(port, termios->c_cflag, baud);
1528 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1529 if (termios->c_iflag & INPCK)
1530 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1531 if (termios->c_iflag & (BRKINT | PARMRK))
1532 up->port.read_status_mask |= UART_LSR_BI;
1535 * Characteres to ignore
1537 up->port.ignore_status_mask = 0;
1538 if (termios->c_iflag & IGNPAR)
1539 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1540 if (termios->c_iflag & IGNBRK) {
1541 up->port.ignore_status_mask |= UART_LSR_BI;
1543 * If we're ignoring parity and break indicators,
1544 * ignore overruns too (for real raw support).
1546 if (termios->c_iflag & IGNPAR)
1547 up->port.ignore_status_mask |= UART_LSR_OE;
1551 * ignore all characters if CREAD is not set
1553 if ((termios->c_cflag & CREAD) == 0)
1554 up->port.ignore_status_mask |= UART_LSR_DR;
1557 * CTS flow control flag and modem status interrupts
1559 up->ier &= ~UART_IER_MSI;
1560 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1561 up->ier |= UART_IER_MSI;
1562 if (up->port.type == PORT_XSCALE)
1563 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1565 serial_out(up, UART_IER, up->ier);
1567 if (up->capabilities & UART_CAP_EFR) {
1568 serial_outp(up, UART_LCR, 0xBF);
1569 serial_outp(up, UART_EFR,
1570 termios->c_cflag & CRTSCTS ? UART_EFR_CTS :0);
1573 if (up->capabilities & UART_NATSEMI) {
1574 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1575 serial_outp(up, UART_LCR, 0xe0);
1577 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1580 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1581 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1584 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1585 * is written without DLAB set, this mode will be disabled.
1587 if (up->port.type == PORT_16750)
1588 serial_outp(up, UART_FCR, fcr);
1590 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1591 up->lcr = cval; /* Save LCR */
1592 if (up->port.type != PORT_16750) {
1593 if (fcr & UART_FCR_ENABLE_FIFO) {
1594 /* emulated UARTs (Lucent Venus 167x) need two steps */
1595 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1597 serial_outp(up, UART_FCR, fcr); /* set fcr */
1599 serial8250_set_mctrl(&up->port, up->port.mctrl);
1600 spin_unlock_irqrestore(&up->port.lock, flags);
1604 serial8250_pm(struct uart_port *port, unsigned int state,
1605 unsigned int oldstate)
1607 struct uart_8250_port *p = (struct uart_8250_port *)port;
1609 serial8250_set_sleep(p, state != 0);
1612 p->pm(port, state, oldstate);
1616 * Resource handling. This is complicated by the fact that resources
1617 * depend on the port type. Maybe we should be claiming the standard
1618 * 8250 ports, and then trying to get other resources as necessary?
1621 serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res)
1623 unsigned int size = 8 << up->port.regshift;
1626 switch (up->port.iotype) {
1628 if (up->port.mapbase) {
1629 *res = request_mem_region(up->port.mapbase, size, "serial");
1637 *res = request_region(up->port.iobase, size, "serial");
1646 serial8250_request_rsa_resource(struct uart_8250_port *up, struct resource **res)
1648 unsigned int size = 8 << up->port.regshift;
1649 unsigned long start;
1652 switch (up->port.iotype) {
1654 if (up->port.mapbase) {
1655 start = up->port.mapbase;
1656 start += UART_RSA_BASE << up->port.regshift;
1657 *res = request_mem_region(start, size, "serial-rsa");
1665 start = up->port.iobase;
1666 start += UART_RSA_BASE << up->port.regshift;
1667 *res = request_region(start, size, "serial-rsa");
1676 static void serial8250_release_port(struct uart_port *port)
1678 struct uart_8250_port *up = (struct uart_8250_port *)port;
1679 unsigned long start, offset = 0, size = 0;
1681 if (up->port.type == PORT_RSA) {
1682 offset = UART_RSA_BASE << up->port.regshift;
1686 size <<= up->port.regshift;
1688 switch (up->port.iotype) {
1690 if (up->port.mapbase) {
1694 iounmap(up->port.membase);
1695 up->port.membase = NULL;
1697 start = up->port.mapbase;
1700 release_mem_region(start + offset, size);
1701 release_mem_region(start, 8 << up->port.regshift);
1707 start = up->port.iobase;
1710 release_region(start + offset, size);
1711 release_region(start + offset, 8 << up->port.regshift);
1719 static int serial8250_request_port(struct uart_port *port)
1721 struct uart_8250_port *up = (struct uart_8250_port *)port;
1722 struct resource *res = NULL, *res_rsa = NULL;
1725 if (up->port.type == PORT_RSA) {
1726 ret = serial8250_request_rsa_resource(up, &res_rsa);
1731 ret = serial8250_request_std_resource(up, &res);
1734 * If we have a mapbase, then request that as well.
1736 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
1737 int size = res->end - res->start + 1;
1739 up->port.membase = ioremap(up->port.mapbase, size);
1740 if (!up->port.membase)
1746 release_resource(res_rsa);
1748 release_resource(res);
1753 static void serial8250_config_port(struct uart_port *port, int flags)
1755 struct uart_8250_port *up = (struct uart_8250_port *)port;
1756 struct resource *res_std = NULL, *res_rsa = NULL;
1757 int probeflags = PROBE_ANY;
1762 * Don't probe for MCA ports on non-MCA machines.
1764 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1769 * Find the region that we can probe for. This in turn
1770 * tells us whether we can probe for the type of port.
1772 ret = serial8250_request_std_resource(up, &res_std);
1776 ret = serial8250_request_rsa_resource(up, &res_rsa);
1778 probeflags &= ~PROBE_RSA;
1780 if (flags & UART_CONFIG_TYPE)
1781 autoconfig(up, probeflags);
1782 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
1786 * If the port wasn't an RSA port, release the resource.
1788 if (up->port.type != PORT_RSA && res_rsa)
1789 release_resource(res_rsa);
1791 if (up->port.type == PORT_UNKNOWN && res_std)
1792 release_resource(res_std);
1796 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1798 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1799 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1800 ser->type > PORT_MAX_8250 || ser->type == PORT_CIRRUS ||
1801 ser->type == PORT_STARTECH)
1807 serial8250_type(struct uart_port *port)
1809 int type = port->type;
1811 if (type >= ARRAY_SIZE(uart_config))
1813 return uart_config[type].name;
1816 static struct uart_ops serial8250_pops = {
1817 .tx_empty = serial8250_tx_empty,
1818 .set_mctrl = serial8250_set_mctrl,
1819 .get_mctrl = serial8250_get_mctrl,
1820 .stop_tx = serial8250_stop_tx,
1821 .start_tx = serial8250_start_tx,
1822 .stop_rx = serial8250_stop_rx,
1823 .enable_ms = serial8250_enable_ms,
1824 .break_ctl = serial8250_break_ctl,
1825 .startup = serial8250_startup,
1826 .shutdown = serial8250_shutdown,
1827 .set_termios = serial8250_set_termios,
1828 .pm = serial8250_pm,
1829 .type = serial8250_type,
1830 .release_port = serial8250_release_port,
1831 .request_port = serial8250_request_port,
1832 .config_port = serial8250_config_port,
1833 .verify_port = serial8250_verify_port,
1836 static struct uart_8250_port serial8250_ports[UART_NR];
1838 static void __init serial8250_isa_init_ports(void)
1840 struct uart_8250_port *up;
1841 static int first = 1;
1848 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
1850 up->port.iobase = old_serial_port[i].port;
1851 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
1852 up->port.uartclk = old_serial_port[i].baud_base * 16;
1853 up->port.flags = old_serial_port[i].flags;
1854 up->port.hub6 = old_serial_port[i].hub6;
1855 up->port.membase = old_serial_port[i].iomem_base;
1856 up->port.iotype = old_serial_port[i].io_type;
1857 up->port.regshift = old_serial_port[i].iomem_reg_shift;
1858 up->port.ops = &serial8250_pops;
1860 up->port.flags |= UPF_SHARE_IRQ;
1864 static void __init serial8250_register_ports(struct uart_driver *drv)
1868 serial8250_isa_init_ports();
1870 for (i = 0; i < UART_NR; i++) {
1871 struct uart_8250_port *up = &serial8250_ports[i];
1874 up->port.ops = &serial8250_pops;
1875 init_timer(&up->timer);
1876 up->timer.function = serial8250_timeout;
1879 * ALPHA_KLUDGE_MCR needs to be killed.
1881 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1882 up->mcr_force = ALPHA_KLUDGE_MCR;
1884 uart_add_one_port(drv, &up->port);
1888 #ifdef CONFIG_SERIAL_8250_CONSOLE
1890 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1893 * Wait for transmitter & holding register to empty
1895 static inline void wait_for_xmitr(struct uart_8250_port *up)
1897 unsigned int status, tmout = 10000;
1899 /* Wait up to 10ms for the character(s) to be sent. */
1901 status = serial_in(up, UART_LSR);
1903 if (status & UART_LSR_BI)
1904 up->lsr_break_flag = UART_LSR_BI;
1909 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1911 /* Wait up to 1s for flow control if necessary */
1912 if (up->port.flags & UPF_CONS_FLOW) {
1915 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1921 * Print a string to the serial port trying not to disturb
1922 * any possible real use of the port...
1924 * The console_lock must be held when we get here.
1927 serial8250_console_write(struct console *co, const char *s, unsigned int count)
1929 struct uart_8250_port *up = &serial8250_ports[co->index];
1934 * First save the UER then disable the interrupts
1936 ier = serial_in(up, UART_IER);
1938 if (up->port.type == PORT_XSCALE)
1939 serial_out(up, UART_IER, UART_IER_UUE);
1941 serial_out(up, UART_IER, 0);
1944 * Now, do each character
1946 for (i = 0; i < count; i++, s++) {
1950 * Send the character out.
1951 * If a LF, also do CR...
1953 serial_out(up, UART_TX, *s);
1956 serial_out(up, UART_TX, 13);
1961 * Finally, wait for transmitter to become empty
1962 * and restore the IER
1965 serial_out(up, UART_IER, ier);
1968 static int __init serial8250_console_setup(struct console *co, char *options)
1970 struct uart_port *port;
1977 * Check whether an invalid uart number has been specified, and
1978 * if so, search for the first available port that does have
1981 if (co->index >= UART_NR)
1983 port = &serial8250_ports[co->index].port;
1990 spin_lock_init(&port->lock);
1993 uart_parse_options(options, &baud, &parity, &bits, &flow);
1995 return uart_set_options(port, co, baud, parity, bits, flow);
1998 static struct uart_driver serial8250_reg;
1999 static struct console serial8250_console = {
2001 .write = serial8250_console_write,
2002 .device = uart_console_device,
2003 .setup = serial8250_console_setup,
2004 .flags = CON_PRINTBUFFER,
2006 .data = &serial8250_reg,
2009 static int __init serial8250_console_init(void)
2011 serial8250_isa_init_ports();
2012 register_console(&serial8250_console);
2015 console_initcall(serial8250_console_init);
2017 static int __init serial8250_late_console_init(void)
2019 if (!(serial8250_console.flags & CON_ENABLED))
2020 register_console(&serial8250_console);
2023 late_initcall(serial8250_late_console_init);
2025 #define SERIAL8250_CONSOLE &serial8250_console
2027 #define SERIAL8250_CONSOLE NULL
2030 static struct uart_driver serial8250_reg = {
2031 .owner = THIS_MODULE,
2032 .driver_name = "serial",
2033 .devfs_name = "tts/",
2038 .cons = SERIAL8250_CONSOLE,
2042 * register_serial and unregister_serial allows for 16x50 serial ports to be
2043 * configured at run-time, to support PCMCIA modems.
2046 static int __register_serial(struct serial_struct *req, int line)
2048 struct uart_port port;
2050 port.iobase = req->port;
2051 port.membase = req->iomem_base;
2052 port.irq = req->irq;
2053 port.uartclk = req->baud_base * 16;
2054 port.fifosize = req->xmit_fifo_size;
2055 port.regshift = req->iomem_reg_shift;
2056 port.iotype = req->io_type;
2057 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2058 port.mapbase = req->iomap_base;
2062 port.flags |= UPF_SHARE_IRQ;
2064 if (HIGH_BITS_OFFSET)
2065 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2068 * If a clock rate wasn't specified by the low level
2069 * driver, then default to the standard clock rate.
2071 if (port.uartclk == 0)
2072 port.uartclk = BASE_BAUD * 16;
2074 return uart_register_port(&serial8250_reg, &port);
2078 * register_serial - configure a 16x50 serial port at runtime
2079 * @req: request structure
2081 * Configure the serial port specified by the request. If the
2082 * port exists and is in use an error is returned. If the port
2083 * is not currently in the table it is added.
2085 * The port is then probed and if necessary the IRQ is autodetected
2086 * If this fails an error is returned.
2088 * On success the port is ready to use and the line number is returned.
2090 int register_serial(struct serial_struct *req)
2092 return __register_serial(req, -1);
2095 int __init early_serial_setup(struct uart_port *port)
2097 if (port->line >= ARRAY_SIZE(serial8250_ports))
2100 serial8250_isa_init_ports();
2101 serial8250_ports[port->line].port = *port;
2102 serial8250_ports[port->line].port.ops = &serial8250_pops;
2107 * unregister_serial - remove a 16x50 serial port at runtime
2108 * @line: serial line number
2110 * Remove one serial port. This may be called from interrupt
2113 void unregister_serial(int line)
2115 uart_unregister_port(&serial8250_reg, line);
2119 * This is for ISAPNP only.
2121 void serial8250_get_irq_map(unsigned int *map)
2125 for (i = 0; i < UART_NR; i++) {
2126 if (serial8250_ports[i].port.type != PORT_UNKNOWN &&
2127 serial8250_ports[i].port.irq < 16)
2128 *map |= 1 << serial8250_ports[i].port.irq;
2133 * serial8250_suspend_port - suspend one serial port
2134 * @line: serial line number
2135 * @level: the level of port suspension, as per uart_suspend_port
2137 * Suspend one serial port.
2139 void serial8250_suspend_port(int line)
2141 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2145 * serial8250_resume_port - resume one serial port
2146 * @line: serial line number
2147 * @level: the level of port resumption, as per uart_resume_port
2149 * Resume one serial port.
2151 void serial8250_resume_port(int line)
2153 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2156 static int __init serial8250_init(void)
2160 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2161 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2162 share_irqs ? "en" : "dis");
2164 for (i = 0; i < NR_IRQS; i++)
2165 spin_lock_init(&irq_lists[i].lock);
2167 ret = uart_register_driver(&serial8250_reg);
2169 serial8250_register_ports(&serial8250_reg);
2174 static void __exit serial8250_exit(void)
2178 for (i = 0; i < UART_NR; i++)
2179 uart_remove_one_port(&serial8250_reg, &serial8250_ports[i].port);
2181 uart_unregister_driver(&serial8250_reg);
2184 module_init(serial8250_init);
2185 module_exit(serial8250_exit);
2187 EXPORT_SYMBOL(register_serial);
2188 EXPORT_SYMBOL(unregister_serial);
2189 EXPORT_SYMBOL(serial8250_get_irq_map);
2190 EXPORT_SYMBOL(serial8250_suspend_port);
2191 EXPORT_SYMBOL(serial8250_resume_port);
2193 MODULE_LICENSE("GPL");
2194 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2196 module_param(share_irqs, uint, 0644);
2197 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2200 #ifdef CONFIG_SERIAL_8250_RSA
2201 module_param_array(probe_rsa, ulong, probe_rsa_count, 0444);
2202 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2204 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);