2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/mca.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
39 #include <linux/serial_reg.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
42 #include <linux/serial_8250.h>
43 #include <linux/nmi.h>
52 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
53 * is unsafe when used on edge-triggered interrupts.
55 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
61 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
63 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
67 #define DEBUG_INTR(fmt...) printk(fmt)
69 #define DEBUG_INTR(fmt...) do { } while (0)
72 #define PASS_LIMIT 256
75 * We default to IRQ0 for the "no irq" hack. Some
76 * machine types want others as well - they're free
77 * to redefine this in their header file.
79 #define is_real_interrupt(irq) ((irq) != 0)
82 * This converts from our new CONFIG_ symbols to the symbols
83 * that asm/serial.h expects. You _NEED_ to comment out the
84 * linux/config.h include contained inside asm/serial.h for
87 #undef CONFIG_SERIAL_MANY_PORTS
88 #undef CONFIG_SERIAL_DETECT_IRQ
89 #undef CONFIG_SERIAL_MULTIPORT
92 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
93 #define CONFIG_SERIAL_DETECT_IRQ 1
95 #ifdef CONFIG_SERIAL_8250_MULTIPORT
96 #define CONFIG_SERIAL_MULTIPORT 1
98 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
99 #define CONFIG_SERIAL_MANY_PORTS 1
103 * HUB6 is always on. This will be removed once the header
104 * files have been cleaned.
106 #define CONFIG_HUB6 1
108 #include <asm/serial.h>
111 * SERIAL_PORT_DFNS tells us about built-in ports that have no
112 * standard enumeration mechanism. Platforms that can find all
113 * serial ports via mechanisms like ACPI or PCI need not supply it.
115 #ifndef SERIAL_PORT_DFNS
116 #define SERIAL_PORT_DFNS
119 static struct old_serial_port old_serial_port[] = {
120 SERIAL_PORT_DFNS /* defined in asm/serial.h */
123 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
125 #ifdef CONFIG_SERIAL_8250_RSA
127 #define PORT_RSA_MAX 4
128 static unsigned long probe_rsa[PORT_RSA_MAX];
129 static unsigned int probe_rsa_count;
130 #endif /* CONFIG_SERIAL_8250_RSA */
132 struct uart_8250_port {
133 struct uart_port port;
134 struct timer_list timer; /* "no irq" timer */
135 struct list_head list; /* ports on this IRQ */
136 unsigned int capabilities; /* port capabilities */
137 unsigned int tx_loadsz; /* transmit fifo load size */
143 unsigned char mcr_mask; /* mask of user bits */
144 unsigned char mcr_force; /* mask of forced bits */
145 unsigned char lsr_break_flag;
148 * We provide a per-port pm hook.
150 void (*pm)(struct uart_port *port,
151 unsigned int state, unsigned int old);
156 struct list_head *head;
159 static struct irq_info irq_lists[NR_IRQS];
162 * Here we define the default xmit fifo size used for each type of UART.
164 static const struct serial8250_config uart_config[] = {
189 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
190 .flags = UART_CAP_FIFO,
201 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
207 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
209 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
215 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
217 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
225 .name = "16C950/954",
228 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
229 .flags = UART_CAP_FIFO,
235 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
237 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
244 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
250 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
251 .flags = UART_CAP_FIFO,
257 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
258 .flags = UART_CAP_FIFO | UART_NATSEMI,
264 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
265 .flags = UART_CAP_FIFO | UART_CAP_UUE,
269 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
271 offset <<= up->port.regshift;
273 switch (up->port.iotype) {
275 outb(up->port.hub6 - 1 + offset, up->port.iobase);
276 return inb(up->port.iobase + 1);
279 return readb(up->port.membase + offset);
282 return readl(up->port.membase + offset);
285 return inb(up->port.iobase + offset);
290 serial_out(struct uart_8250_port *up, int offset, int value)
292 offset <<= up->port.regshift;
294 switch (up->port.iotype) {
296 outb(up->port.hub6 - 1 + offset, up->port.iobase);
297 outb(value, up->port.iobase + 1);
301 writeb(value, up->port.membase + offset);
305 writel(value, up->port.membase + offset);
309 outb(value, up->port.iobase + offset);
314 * We used to support using pause I/O for certain machines. We
315 * haven't supported this for a while, but just in case it's badly
316 * needed for certain old 386 machines, I've left these #define's
319 #define serial_inp(up, offset) serial_in(up, offset)
320 #define serial_outp(up, offset, value) serial_out(up, offset, value)
326 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
328 serial_out(up, UART_SCR, offset);
329 serial_out(up, UART_ICR, value);
332 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
336 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
337 serial_out(up, UART_SCR, offset);
338 value = serial_in(up, UART_ICR);
339 serial_icr_write(up, UART_ACR, up->acr);
347 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
349 if (p->capabilities & UART_CAP_FIFO) {
350 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
351 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
352 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
353 serial_outp(p, UART_FCR, 0);
358 * IER sleep support. UARTs which have EFRs need the "extended
359 * capability" bit enabled. Note that on XR16C850s, we need to
360 * reset LCR to write to IER.
362 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
364 if (p->capabilities & UART_CAP_SLEEP) {
365 if (p->capabilities & UART_CAP_EFR) {
366 serial_outp(p, UART_LCR, 0xBF);
367 serial_outp(p, UART_EFR, UART_EFR_ECB);
368 serial_outp(p, UART_LCR, 0);
370 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
371 if (p->capabilities & UART_CAP_EFR) {
372 serial_outp(p, UART_LCR, 0xBF);
373 serial_outp(p, UART_EFR, 0);
374 serial_outp(p, UART_LCR, 0);
379 #ifdef CONFIG_SERIAL_8250_RSA
381 * Attempts to turn on the RSA FIFO. Returns zero on failure.
382 * We set the port uart clock rate if we succeed.
384 static int __enable_rsa(struct uart_8250_port *up)
389 mode = serial_inp(up, UART_RSA_MSR);
390 result = mode & UART_RSA_MSR_FIFO;
393 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
394 mode = serial_inp(up, UART_RSA_MSR);
395 result = mode & UART_RSA_MSR_FIFO;
399 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
404 static void enable_rsa(struct uart_8250_port *up)
406 if (up->port.type == PORT_RSA) {
407 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
408 spin_lock_irq(&up->port.lock);
410 spin_unlock_irq(&up->port.lock);
412 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
413 serial_outp(up, UART_RSA_FRR, 0);
418 * Attempts to turn off the RSA FIFO. Returns zero on failure.
419 * It is unknown why interrupts were disabled in here. However,
420 * the caller is expected to preserve this behaviour by grabbing
421 * the spinlock before calling this function.
423 static void disable_rsa(struct uart_8250_port *up)
428 if (up->port.type == PORT_RSA &&
429 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
430 spin_lock_irq(&up->port.lock);
432 mode = serial_inp(up, UART_RSA_MSR);
433 result = !(mode & UART_RSA_MSR_FIFO);
436 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
437 mode = serial_inp(up, UART_RSA_MSR);
438 result = !(mode & UART_RSA_MSR_FIFO);
442 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
443 spin_unlock_irq(&up->port.lock);
446 #endif /* CONFIG_SERIAL_8250_RSA */
449 * This is a quickie test to see how big the FIFO is.
450 * It doesn't work at all the time, more's the pity.
452 static int size_fifo(struct uart_8250_port *up)
454 unsigned char old_fcr, old_mcr, old_dll, old_dlm, old_lcr;
457 old_lcr = serial_inp(up, UART_LCR);
458 serial_outp(up, UART_LCR, 0);
459 old_fcr = serial_inp(up, UART_FCR);
460 old_mcr = serial_inp(up, UART_MCR);
461 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
462 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
463 serial_outp(up, UART_MCR, UART_MCR_LOOP);
464 serial_outp(up, UART_LCR, UART_LCR_DLAB);
465 old_dll = serial_inp(up, UART_DLL);
466 old_dlm = serial_inp(up, UART_DLM);
467 serial_outp(up, UART_DLL, 0x01);
468 serial_outp(up, UART_DLM, 0x00);
469 serial_outp(up, UART_LCR, 0x03);
470 for (count = 0; count < 256; count++)
471 serial_outp(up, UART_TX, count);
472 mdelay(20);/* FIXME - schedule_timeout */
473 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
474 (count < 256); count++)
475 serial_inp(up, UART_RX);
476 serial_outp(up, UART_FCR, old_fcr);
477 serial_outp(up, UART_MCR, old_mcr);
478 serial_outp(up, UART_LCR, UART_LCR_DLAB);
479 serial_outp(up, UART_DLL, old_dll);
480 serial_outp(up, UART_DLM, old_dlm);
481 serial_outp(up, UART_LCR, old_lcr);
487 * Read UART ID using the divisor method - set DLL and DLM to zero
488 * and the revision will be in DLL and device type in DLM. We
489 * preserve the device state across this.
491 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
493 unsigned char old_dll, old_dlm, old_lcr;
496 old_lcr = serial_inp(p, UART_LCR);
497 serial_outp(p, UART_LCR, UART_LCR_DLAB);
499 old_dll = serial_inp(p, UART_DLL);
500 old_dlm = serial_inp(p, UART_DLM);
502 serial_outp(p, UART_DLL, 0);
503 serial_outp(p, UART_DLM, 0);
505 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
507 serial_outp(p, UART_DLL, old_dll);
508 serial_outp(p, UART_DLM, old_dlm);
509 serial_outp(p, UART_LCR, old_lcr);
515 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
516 * When this function is called we know it is at least a StarTech
517 * 16650 V2, but it might be one of several StarTech UARTs, or one of
518 * its clones. (We treat the broken original StarTech 16650 V1 as a
519 * 16550, and why not? Startech doesn't seem to even acknowledge its
522 * What evil have men's minds wrought...
524 static void autoconfig_has_efr(struct uart_8250_port *up)
526 unsigned int id1, id2, id3, rev;
529 * Everything with an EFR has SLEEP
531 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
534 * First we check to see if it's an Oxford Semiconductor UART.
536 * If we have to do this here because some non-National
537 * Semiconductor clone chips lock up if you try writing to the
538 * LSR register (which serial_icr_read does)
542 * Check for Oxford Semiconductor 16C950.
544 * EFR [4] must be set else this test fails.
546 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
547 * claims that it's needed for 952 dual UART's (which are not
548 * recommended for new designs).
551 serial_out(up, UART_LCR, 0xBF);
552 serial_out(up, UART_EFR, UART_EFR_ECB);
553 serial_out(up, UART_LCR, 0x00);
554 id1 = serial_icr_read(up, UART_ID1);
555 id2 = serial_icr_read(up, UART_ID2);
556 id3 = serial_icr_read(up, UART_ID3);
557 rev = serial_icr_read(up, UART_REV);
559 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
561 if (id1 == 0x16 && id2 == 0xC9 &&
562 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
563 up->port.type = PORT_16C950;
564 up->rev = rev | (id3 << 8);
569 * We check for a XR16C850 by setting DLL and DLM to 0, and then
570 * reading back DLL and DLM. The chip type depends on the DLM
572 * 0x10 - XR16C850 and the DLL contains the chip revision.
576 id1 = autoconfig_read_divisor_id(up);
577 DEBUG_AUTOCONF("850id=%04x ", id1);
580 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
583 up->port.type = PORT_16850;
588 * It wasn't an XR16C850.
590 * We distinguish between the '654 and the '650 by counting
591 * how many bytes are in the FIFO. I'm using this for now,
592 * since that's the technique that was sent to me in the
593 * serial driver update, but I'm not convinced this works.
594 * I've had problems doing this in the past. -TYT
596 if (size_fifo(up) == 64)
597 up->port.type = PORT_16654;
599 up->port.type = PORT_16650V2;
603 * We detected a chip without a FIFO. Only two fall into
604 * this category - the original 8250 and the 16450. The
605 * 16450 has a scratch register (accessible with LCR=0)
607 static void autoconfig_8250(struct uart_8250_port *up)
609 unsigned char scratch, status1, status2;
611 up->port.type = PORT_8250;
613 scratch = serial_in(up, UART_SCR);
614 serial_outp(up, UART_SCR, 0xa5);
615 status1 = serial_in(up, UART_SCR);
616 serial_outp(up, UART_SCR, 0x5a);
617 status2 = serial_in(up, UART_SCR);
618 serial_outp(up, UART_SCR, scratch);
620 if (status1 == 0xa5 && status2 == 0x5a)
621 up->port.type = PORT_16450;
624 static int broken_efr(struct uart_8250_port *up)
627 * Exar ST16C2550 "A2" devices incorrectly detect as
628 * having an EFR, and report an ID of 0x0201. See
629 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
631 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
638 * We know that the chip has FIFOs. Does it have an EFR? The
639 * EFR is located in the same register position as the IIR and
640 * we know the top two bits of the IIR are currently set. The
641 * EFR should contain zero. Try to read the EFR.
643 static void autoconfig_16550a(struct uart_8250_port *up)
645 unsigned char status1, status2;
646 unsigned int iersave;
648 up->port.type = PORT_16550A;
649 up->capabilities |= UART_CAP_FIFO;
652 * Check for presence of the EFR when DLAB is set.
653 * Only ST16C650V1 UARTs pass this test.
655 serial_outp(up, UART_LCR, UART_LCR_DLAB);
656 if (serial_in(up, UART_EFR) == 0) {
657 serial_outp(up, UART_EFR, 0xA8);
658 if (serial_in(up, UART_EFR) != 0) {
659 DEBUG_AUTOCONF("EFRv1 ");
660 up->port.type = PORT_16650;
661 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
663 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
665 serial_outp(up, UART_EFR, 0);
670 * Maybe it requires 0xbf to be written to the LCR.
671 * (other ST16C650V2 UARTs, TI16C752A, etc)
673 serial_outp(up, UART_LCR, 0xBF);
674 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
675 DEBUG_AUTOCONF("EFRv2 ");
676 autoconfig_has_efr(up);
681 * Check for a National Semiconductor SuperIO chip.
682 * Attempt to switch to bank 2, read the value of the LOOP bit
683 * from EXCR1. Switch back to bank 0, change it in MCR. Then
684 * switch back to bank 2, read it from EXCR1 again and check
685 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
687 serial_outp(up, UART_LCR, 0);
688 status1 = serial_in(up, UART_MCR);
689 serial_outp(up, UART_LCR, 0xE0);
690 status2 = serial_in(up, 0x02); /* EXCR1 */
692 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
693 serial_outp(up, UART_LCR, 0);
694 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
695 serial_outp(up, UART_LCR, 0xE0);
696 status2 = serial_in(up, 0x02); /* EXCR1 */
697 serial_outp(up, UART_LCR, 0);
698 serial_outp(up, UART_MCR, status1);
700 if ((status2 ^ status1) & UART_MCR_LOOP) {
703 serial_outp(up, UART_LCR, 0xE0);
705 quot = serial_inp(up, UART_DLM) << 8;
706 quot += serial_inp(up, UART_DLL);
709 status1 = serial_in(up, 0x04); /* EXCR1 */
710 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
711 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
712 serial_outp(up, 0x04, status1);
714 serial_outp(up, UART_DLL, quot & 0xff);
715 serial_outp(up, UART_DLM, quot >> 8);
717 serial_outp(up, UART_LCR, 0);
719 up->port.uartclk = 921600*16;
720 up->port.type = PORT_NS16550A;
721 up->capabilities |= UART_NATSEMI;
727 * No EFR. Try to detect a TI16750, which only sets bit 5 of
728 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
729 * Try setting it with and without DLAB set. Cheap clones
730 * set bit 5 without DLAB set.
732 serial_outp(up, UART_LCR, 0);
733 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
734 status1 = serial_in(up, UART_IIR) >> 5;
735 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
736 serial_outp(up, UART_LCR, UART_LCR_DLAB);
737 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
738 status2 = serial_in(up, UART_IIR) >> 5;
739 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
740 serial_outp(up, UART_LCR, 0);
742 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
744 if (status1 == 6 && status2 == 7) {
745 up->port.type = PORT_16750;
746 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
751 * Try writing and reading the UART_IER_UUE bit (b6).
752 * If it works, this is probably one of the Xscale platform's
754 * We're going to explicitly set the UUE bit to 0 before
755 * trying to write and read a 1 just to make sure it's not
756 * already a 1 and maybe locked there before we even start start.
758 iersave = serial_in(up, UART_IER);
759 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
760 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
762 * OK it's in a known zero state, try writing and reading
763 * without disturbing the current state of the other bits.
765 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
766 if (serial_in(up, UART_IER) & UART_IER_UUE) {
769 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
771 DEBUG_AUTOCONF("Xscale ");
772 up->port.type = PORT_XSCALE;
773 up->capabilities |= UART_CAP_UUE;
778 * If we got here we couldn't force the IER_UUE bit to 0.
779 * Log it and continue.
781 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
783 serial_outp(up, UART_IER, iersave);
787 * This routine is called by rs_init() to initialize a specific serial
788 * port. It determines what type of UART chip this serial port is
789 * using: 8250, 16450, 16550, 16550A. The important question is
790 * whether or not this UART is a 16550A or not, since this will
791 * determine whether or not we can use its FIFO features or not.
793 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
795 unsigned char status1, scratch, scratch2, scratch3;
796 unsigned char save_lcr, save_mcr;
799 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
802 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
803 up->port.line, up->port.iobase, up->port.membase);
806 * We really do need global IRQs disabled here - we're going to
807 * be frobbing the chips IRQ enable register to see if it exists.
809 spin_lock_irqsave(&up->port.lock, flags);
810 // save_flags(flags); cli();
812 up->capabilities = 0;
814 if (!(up->port.flags & UPF_BUGGY_UART)) {
816 * Do a simple existence test first; if we fail this,
817 * there's no point trying anything else.
819 * 0x80 is used as a nonsense port to prevent against
820 * false positives due to ISA bus float. The
821 * assumption is that 0x80 is a non-existent port;
822 * which should be safe since include/asm/io.h also
823 * makes this assumption.
825 * Note: this is safe as long as MCR bit 4 is clear
826 * and the device is in "PC" mode.
828 scratch = serial_inp(up, UART_IER);
829 serial_outp(up, UART_IER, 0);
833 scratch2 = serial_inp(up, UART_IER);
834 serial_outp(up, UART_IER, 0x0F);
838 scratch3 = serial_inp(up, UART_IER);
839 serial_outp(up, UART_IER, scratch);
840 if (scratch2 != 0 || scratch3 != 0x0F) {
842 * We failed; there's nothing here
844 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
850 save_mcr = serial_in(up, UART_MCR);
851 save_lcr = serial_in(up, UART_LCR);
854 * Check to see if a UART is really there. Certain broken
855 * internal modems based on the Rockwell chipset fail this
856 * test, because they apparently don't implement the loopback
857 * test mode. So this test is skipped on the COM 1 through
858 * COM 4 ports. This *should* be safe, since no board
859 * manufacturer would be stupid enough to design a board
860 * that conflicts with COM 1-4 --- we hope!
862 if (!(up->port.flags & UPF_SKIP_TEST)) {
863 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
864 status1 = serial_inp(up, UART_MSR) & 0xF0;
865 serial_outp(up, UART_MCR, save_mcr);
866 if (status1 != 0x90) {
867 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
874 * We're pretty sure there's a port here. Lets find out what
875 * type of port it is. The IIR top two bits allows us to find
876 * out if its 8250 or 16450, 16550, 16550A or later. This
877 * determines what we test for next.
879 * We also initialise the EFR (if any) to zero for later. The
880 * EFR occupies the same register location as the FCR and IIR.
882 serial_outp(up, UART_LCR, 0xBF);
883 serial_outp(up, UART_EFR, 0);
884 serial_outp(up, UART_LCR, 0);
886 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
887 scratch = serial_in(up, UART_IIR) >> 6;
889 DEBUG_AUTOCONF("iir=%d ", scratch);
896 up->port.type = PORT_UNKNOWN;
899 up->port.type = PORT_16550;
902 autoconfig_16550a(up);
906 #ifdef CONFIG_SERIAL_8250_RSA
908 * Only probe for RSA ports if we got the region.
910 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
913 for (i = 0 ; i < probe_rsa_count; ++i) {
914 if (probe_rsa[i] == up->port.iobase &&
916 up->port.type = PORT_RSA;
922 serial_outp(up, UART_LCR, save_lcr);
924 if (up->capabilities != uart_config[up->port.type].flags) {
926 "ttyS%d: detected caps %08x should be %08x\n",
927 up->port.line, up->capabilities,
928 uart_config[up->port.type].flags);
931 up->port.fifosize = uart_config[up->port.type].fifo_size;
932 up->capabilities = uart_config[up->port.type].flags;
933 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
935 if (up->port.type == PORT_UNKNOWN)
941 #ifdef CONFIG_SERIAL_8250_RSA
942 if (up->port.type == PORT_RSA)
943 serial_outp(up, UART_RSA_FRR, 0);
945 serial_outp(up, UART_MCR, save_mcr);
946 serial8250_clear_fifos(up);
947 (void)serial_in(up, UART_RX);
948 serial_outp(up, UART_IER, 0);
951 spin_unlock_irqrestore(&up->port.lock, flags);
952 // restore_flags(flags);
953 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
956 static void autoconfig_irq(struct uart_8250_port *up)
958 unsigned char save_mcr, save_ier;
959 unsigned char save_ICP = 0;
960 unsigned int ICP = 0;
964 if (up->port.flags & UPF_FOURPORT) {
965 ICP = (up->port.iobase & 0xfe0) | 0x1f;
966 save_ICP = inb_p(ICP);
971 /* forget possible initially masked and pending IRQ */
972 probe_irq_off(probe_irq_on());
973 save_mcr = serial_inp(up, UART_MCR);
974 save_ier = serial_inp(up, UART_IER);
975 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
977 irqs = probe_irq_on();
978 serial_outp(up, UART_MCR, 0);
980 if (up->port.flags & UPF_FOURPORT) {
981 serial_outp(up, UART_MCR,
982 UART_MCR_DTR | UART_MCR_RTS);
984 serial_outp(up, UART_MCR,
985 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
987 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
988 (void)serial_inp(up, UART_LSR);
989 (void)serial_inp(up, UART_RX);
990 (void)serial_inp(up, UART_IIR);
991 (void)serial_inp(up, UART_MSR);
992 serial_outp(up, UART_TX, 0xFF);
994 irq = probe_irq_off(irqs);
996 serial_outp(up, UART_MCR, save_mcr);
997 serial_outp(up, UART_IER, save_ier);
999 if (up->port.flags & UPF_FOURPORT)
1000 outb_p(save_ICP, ICP);
1002 up->port.irq = (irq > 0) ? irq : 0;
1005 static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
1007 struct uart_8250_port *up = (struct uart_8250_port *)port;
1009 if (up->ier & UART_IER_THRI) {
1010 up->ier &= ~UART_IER_THRI;
1011 serial_out(up, UART_IER, up->ier);
1015 * We only do this from uart_stop - if we run out of
1016 * characters to send, we don't want to prevent the
1017 * FIFO from emptying.
1019 if (up->port.type == PORT_16C950 && tty_stop) {
1020 up->acr |= UART_ACR_TXDIS;
1021 serial_icr_write(up, UART_ACR, up->acr);
1025 static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start)
1027 struct uart_8250_port *up = (struct uart_8250_port *)port;
1029 if (!(up->ier & UART_IER_THRI)) {
1030 up->ier |= UART_IER_THRI;
1031 serial_out(up, UART_IER, up->ier);
1034 * We only do this from uart_start
1036 if (tty_start && up->port.type == PORT_16C950) {
1037 up->acr &= ~UART_ACR_TXDIS;
1038 serial_icr_write(up, UART_ACR, up->acr);
1042 static void serial8250_stop_rx(struct uart_port *port)
1044 struct uart_8250_port *up = (struct uart_8250_port *)port;
1046 up->ier &= ~UART_IER_RLSI;
1047 up->port.read_status_mask &= ~UART_LSR_DR;
1048 serial_out(up, UART_IER, up->ier);
1051 static void serial8250_enable_ms(struct uart_port *port)
1053 struct uart_8250_port *up = (struct uart_8250_port *)port;
1055 up->ier |= UART_IER_MSI;
1056 serial_out(up, UART_IER, up->ier);
1059 static _INLINE_ void
1060 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
1062 struct tty_struct *tty = up->port.info->tty;
1063 unsigned char ch, lsr = *status;
1064 int max_count = 256;
1068 /* The following is not allowed by the tty layer and
1069 unsafe. It should be fixed ASAP */
1070 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
1071 if (tty->low_latency) {
1072 spin_unlock(&up->port.lock);
1073 tty_flip_buffer_push(tty);
1074 spin_lock(&up->port.lock);
1077 * If this failed then we will throw away the
1078 * bytes but must do so to clear interrupts
1081 ch = serial_inp(up, UART_RX);
1083 up->port.icount.rx++;
1085 #ifdef CONFIG_SERIAL_8250_CONSOLE
1087 * Recover the break flag from console xmit
1089 if (up->port.line == up->port.cons->index) {
1090 lsr |= up->lsr_break_flag;
1091 up->lsr_break_flag = 0;
1095 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
1096 UART_LSR_FE | UART_LSR_OE))) {
1098 * For statistics only
1100 if (lsr & UART_LSR_BI) {
1101 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1102 up->port.icount.brk++;
1104 * We do the SysRQ and SAK checking
1105 * here because otherwise the break
1106 * may get masked by ignore_status_mask
1107 * or read_status_mask.
1109 if (uart_handle_break(&up->port))
1111 } else if (lsr & UART_LSR_PE)
1112 up->port.icount.parity++;
1113 else if (lsr & UART_LSR_FE)
1114 up->port.icount.frame++;
1115 if (lsr & UART_LSR_OE)
1116 up->port.icount.overrun++;
1119 * Mask off conditions which should be ignored.
1121 lsr &= up->port.read_status_mask;
1123 if (lsr & UART_LSR_BI) {
1124 DEBUG_INTR("handling break....");
1126 } else if (lsr & UART_LSR_PE)
1128 else if (lsr & UART_LSR_FE)
1131 if (uart_handle_sysrq_char(&up->port, ch, regs))
1134 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1137 lsr = serial_inp(up, UART_LSR);
1138 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1139 spin_unlock(&up->port.lock);
1140 tty_flip_buffer_push(tty);
1141 spin_lock(&up->port.lock);
1145 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1147 struct circ_buf *xmit = &up->port.info->xmit;
1150 if (up->port.x_char) {
1151 serial_outp(up, UART_TX, up->port.x_char);
1152 up->port.icount.tx++;
1153 up->port.x_char = 0;
1156 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
1157 serial8250_stop_tx(&up->port, 0);
1161 count = up->tx_loadsz;
1163 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1164 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1165 up->port.icount.tx++;
1166 if (uart_circ_empty(xmit))
1168 } while (--count > 0);
1170 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1171 uart_write_wakeup(&up->port);
1173 DEBUG_INTR("THRE...");
1175 if (uart_circ_empty(xmit))
1176 serial8250_stop_tx(&up->port, 0);
1179 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
1183 status = serial_in(up, UART_MSR);
1185 if ((status & UART_MSR_ANY_DELTA) == 0)
1188 if (status & UART_MSR_TERI)
1189 up->port.icount.rng++;
1190 if (status & UART_MSR_DDSR)
1191 up->port.icount.dsr++;
1192 if (status & UART_MSR_DDCD)
1193 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1194 if (status & UART_MSR_DCTS)
1195 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1197 wake_up_interruptible(&up->port.info->delta_msr_wait);
1201 * This handles the interrupt from one port.
1204 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1206 unsigned int status = serial_inp(up, UART_LSR);
1208 DEBUG_INTR("status = %x...", status);
1210 if (status & UART_LSR_DR)
1211 receive_chars(up, &status, regs);
1212 check_modem_status(up);
1213 if (status & UART_LSR_THRE)
1218 * This is the serial driver's interrupt routine.
1220 * Arjan thinks the old way was overly complex, so it got simplified.
1221 * Alan disagrees, saying that need the complexity to handle the weird
1222 * nature of ISA shared interrupts. (This is a special exception.)
1224 * In order to handle ISA shared interrupts properly, we need to check
1225 * that all ports have been serviced, and therefore the ISA interrupt
1226 * line has been de-asserted.
1228 * This means we need to loop through all ports. checking that they
1229 * don't have an interrupt pending.
1231 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1233 struct irq_info *i = dev_id;
1234 struct list_head *l, *end = NULL;
1235 int pass_counter = 0, handled = 0;
1237 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1239 spin_lock(&i->lock);
1243 struct uart_8250_port *up;
1246 up = list_entry(l, struct uart_8250_port, list);
1248 iir = serial_in(up, UART_IIR);
1249 if (!(iir & UART_IIR_NO_INT)) {
1250 spin_lock(&up->port.lock);
1251 serial8250_handle_port(up, regs);
1252 spin_unlock(&up->port.lock);
1257 } else if (end == NULL)
1262 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1263 /* If we hit this, we're dead. */
1264 printk(KERN_ERR "serial8250: too much work for "
1270 spin_unlock(&i->lock);
1272 DEBUG_INTR("end.\n");
1274 return IRQ_RETVAL(handled);
1278 * To support ISA shared interrupts, we need to have one interrupt
1279 * handler that ensures that the IRQ line has been deasserted
1280 * before returning. Failing to do this will result in the IRQ
1281 * line being stuck active, and, since ISA irqs are edge triggered,
1282 * no more IRQs will be seen.
1284 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1286 spin_lock_irq(&i->lock);
1288 if (!list_empty(i->head)) {
1289 if (i->head == &up->list)
1290 i->head = i->head->next;
1291 list_del(&up->list);
1293 BUG_ON(i->head != &up->list);
1297 spin_unlock_irq(&i->lock);
1300 static int serial_link_irq_chain(struct uart_8250_port *up)
1302 struct irq_info *i = irq_lists + up->port.irq;
1303 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1305 spin_lock_irq(&i->lock);
1308 list_add(&up->list, i->head);
1309 spin_unlock_irq(&i->lock);
1313 INIT_LIST_HEAD(&up->list);
1314 i->head = &up->list;
1315 spin_unlock_irq(&i->lock);
1317 ret = request_irq(up->port.irq, serial8250_interrupt,
1318 irq_flags, "serial", i);
1320 serial_do_unlink(i, up);
1326 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1328 struct irq_info *i = irq_lists + up->port.irq;
1330 BUG_ON(i->head == NULL);
1332 if (list_empty(i->head))
1333 free_irq(up->port.irq, i);
1335 serial_do_unlink(i, up);
1339 * This function is used to handle ports that do not have an
1340 * interrupt. This doesn't work very well for 16450's, but gives
1341 * barely passable results for a 16550A. (Although at the expense
1342 * of much CPU overhead).
1344 static void serial8250_timeout(unsigned long data)
1346 struct uart_8250_port *up = (struct uart_8250_port *)data;
1347 unsigned int timeout;
1350 iir = serial_in(up, UART_IIR);
1351 if (!(iir & UART_IIR_NO_INT)) {
1352 spin_lock(&up->port.lock);
1353 serial8250_handle_port(up, NULL);
1354 spin_unlock(&up->port.lock);
1357 timeout = up->port.timeout;
1358 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1359 mod_timer(&up->timer, jiffies + timeout);
1362 static unsigned int serial8250_tx_empty(struct uart_port *port)
1364 struct uart_8250_port *up = (struct uart_8250_port *)port;
1365 unsigned long flags;
1368 spin_lock_irqsave(&up->port.lock, flags);
1369 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1370 spin_unlock_irqrestore(&up->port.lock, flags);
1375 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1377 struct uart_8250_port *up = (struct uart_8250_port *)port;
1378 unsigned long flags;
1379 unsigned char status;
1382 spin_lock_irqsave(&up->port.lock, flags);
1383 status = serial_in(up, UART_MSR);
1384 spin_unlock_irqrestore(&up->port.lock, flags);
1387 if (status & UART_MSR_DCD)
1389 if (status & UART_MSR_RI)
1391 if (status & UART_MSR_DSR)
1393 if (status & UART_MSR_CTS)
1398 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1400 struct uart_8250_port *up = (struct uart_8250_port *)port;
1401 unsigned char mcr = 0;
1403 if (mctrl & TIOCM_RTS)
1404 mcr |= UART_MCR_RTS;
1405 if (mctrl & TIOCM_DTR)
1406 mcr |= UART_MCR_DTR;
1407 if (mctrl & TIOCM_OUT1)
1408 mcr |= UART_MCR_OUT1;
1409 if (mctrl & TIOCM_OUT2)
1410 mcr |= UART_MCR_OUT2;
1411 if (mctrl & TIOCM_LOOP)
1412 mcr |= UART_MCR_LOOP;
1414 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1416 serial_out(up, UART_MCR, mcr);
1419 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1421 struct uart_8250_port *up = (struct uart_8250_port *)port;
1422 unsigned long flags;
1424 spin_lock_irqsave(&up->port.lock, flags);
1425 if (break_state == -1)
1426 up->lcr |= UART_LCR_SBC;
1428 up->lcr &= ~UART_LCR_SBC;
1429 serial_out(up, UART_LCR, up->lcr);
1430 spin_unlock_irqrestore(&up->port.lock, flags);
1433 static int serial8250_startup(struct uart_port *port)
1435 struct uart_8250_port *up = (struct uart_8250_port *)port;
1436 unsigned long flags;
1439 up->capabilities = uart_config[up->port.type].flags;
1442 if (up->port.type == PORT_16C950) {
1443 /* Wake up and initialize UART */
1445 serial_outp(up, UART_LCR, 0xBF);
1446 serial_outp(up, UART_EFR, UART_EFR_ECB);
1447 serial_outp(up, UART_IER, 0);
1448 serial_outp(up, UART_LCR, 0);
1449 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1450 serial_outp(up, UART_LCR, 0xBF);
1451 serial_outp(up, UART_EFR, UART_EFR_ECB);
1452 serial_outp(up, UART_LCR, 0);
1455 #ifdef CONFIG_SERIAL_8250_RSA
1457 * If this is an RSA port, see if we can kick it up to the
1458 * higher speed clock.
1464 * Clear the FIFO buffers and disable them.
1465 * (they will be reeanbled in set_termios())
1467 serial8250_clear_fifos(up);
1470 * Clear the interrupt registers.
1472 (void) serial_inp(up, UART_LSR);
1473 (void) serial_inp(up, UART_RX);
1474 (void) serial_inp(up, UART_IIR);
1475 (void) serial_inp(up, UART_MSR);
1478 * At this point, there's no way the LSR could still be 0xff;
1479 * if it is, then bail out, because there's likely no UART
1482 if (!(up->port.flags & UPF_BUGGY_UART) &&
1483 (serial_inp(up, UART_LSR) == 0xff)) {
1484 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1489 * For a XR16C850, we need to set the trigger levels
1491 if (up->port.type == PORT_16850) {
1494 serial_outp(up, UART_LCR, 0xbf);
1496 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1497 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1498 serial_outp(up, UART_TRG, UART_TRG_96);
1499 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1500 serial_outp(up, UART_TRG, UART_TRG_96);
1502 serial_outp(up, UART_LCR, 0);
1506 * If the "interrupt" for this port doesn't correspond with any
1507 * hardware interrupt, we use a timer-based system. The original
1508 * driver used to do this with IRQ0.
1510 if (!is_real_interrupt(up->port.irq)) {
1511 unsigned int timeout = up->port.timeout;
1513 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1515 up->timer.data = (unsigned long)up;
1516 mod_timer(&up->timer, jiffies + timeout);
1518 retval = serial_link_irq_chain(up);
1524 * Now, initialize the UART
1526 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1528 spin_lock_irqsave(&up->port.lock, flags);
1529 if (up->port.flags & UPF_FOURPORT) {
1530 if (!is_real_interrupt(up->port.irq))
1531 up->port.mctrl |= TIOCM_OUT1;
1534 * Most PC uarts need OUT2 raised to enable interrupts.
1536 if (is_real_interrupt(up->port.irq))
1537 up->port.mctrl |= TIOCM_OUT2;
1539 serial8250_set_mctrl(&up->port, up->port.mctrl);
1540 spin_unlock_irqrestore(&up->port.lock, flags);
1543 * Finally, enable interrupts. Note: Modem status interrupts
1544 * are set via set_termios(), which will be occurring imminently
1545 * anyway, so we don't enable them here.
1547 up->ier = UART_IER_RLSI | UART_IER_RDI;
1548 serial_outp(up, UART_IER, up->ier);
1550 if (up->port.flags & UPF_FOURPORT) {
1553 * Enable interrupts on the AST Fourport board
1555 icp = (up->port.iobase & 0xfe0) | 0x01f;
1561 * And clear the interrupt registers again for luck.
1563 (void) serial_inp(up, UART_LSR);
1564 (void) serial_inp(up, UART_RX);
1565 (void) serial_inp(up, UART_IIR);
1566 (void) serial_inp(up, UART_MSR);
1571 static void serial8250_shutdown(struct uart_port *port)
1573 struct uart_8250_port *up = (struct uart_8250_port *)port;
1574 unsigned long flags;
1577 * Disable interrupts from this port
1580 serial_outp(up, UART_IER, 0);
1582 spin_lock_irqsave(&up->port.lock, flags);
1583 if (up->port.flags & UPF_FOURPORT) {
1584 /* reset interrupts on the AST Fourport board */
1585 inb((up->port.iobase & 0xfe0) | 0x1f);
1586 up->port.mctrl |= TIOCM_OUT1;
1588 up->port.mctrl &= ~TIOCM_OUT2;
1590 serial8250_set_mctrl(&up->port, up->port.mctrl);
1591 spin_unlock_irqrestore(&up->port.lock, flags);
1594 * Disable break condition and FIFOs
1596 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1597 serial8250_clear_fifos(up);
1599 #ifdef CONFIG_SERIAL_8250_RSA
1601 * Reset the RSA board back to 115kbps compat mode.
1607 * Read data port to reset things, and then unlink from
1610 (void) serial_in(up, UART_RX);
1612 if (!is_real_interrupt(up->port.irq))
1613 del_timer_sync(&up->timer);
1615 serial_unlink_irq_chain(up);
1618 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1623 * Handle magic divisors for baud rates above baud_base on
1624 * SMSC SuperIO chips.
1626 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1627 baud == (port->uartclk/4))
1629 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1630 baud == (port->uartclk/8))
1633 quot = uart_get_divisor(port, baud);
1639 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1640 struct termios *old)
1642 struct uart_8250_port *up = (struct uart_8250_port *)port;
1643 unsigned char cval, fcr = 0;
1644 unsigned long flags;
1645 unsigned int baud, quot;
1647 switch (termios->c_cflag & CSIZE) {
1663 if (termios->c_cflag & CSTOPB)
1665 if (termios->c_cflag & PARENB)
1666 cval |= UART_LCR_PARITY;
1667 if (!(termios->c_cflag & PARODD))
1668 cval |= UART_LCR_EPAR;
1670 if (termios->c_cflag & CMSPAR)
1671 cval |= UART_LCR_SPAR;
1675 * Ask the core to calculate the divisor for us.
1677 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1678 quot = serial8250_get_divisor(port, baud);
1681 * Work around a bug in the Oxford Semiconductor 952 rev B
1682 * chip which causes it to seriously miscalculate baud rates
1685 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
1689 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1691 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1693 fcr = uart_config[up->port.type].fcr;
1697 * MCR-based auto flow control. When AFE is enabled, RTS will be
1698 * deasserted when the receive FIFO contains more characters than
1699 * the trigger, or the MCR RTS bit is cleared. In the case where
1700 * the remote UART is not using CTS auto flow control, we must
1701 * have sufficient FIFO entries for the latency of the remote
1702 * UART to respond. IOW, at least 32 bytes of FIFO.
1704 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
1705 up->mcr &= ~UART_MCR_AFE;
1706 if (termios->c_cflag & CRTSCTS)
1707 up->mcr |= UART_MCR_AFE;
1711 * Ok, we're now changing the port state. Do it with
1712 * interrupts disabled.
1714 spin_lock_irqsave(&up->port.lock, flags);
1717 * Update the per-port timeout.
1719 uart_update_timeout(port, termios->c_cflag, baud);
1721 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1722 if (termios->c_iflag & INPCK)
1723 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1724 if (termios->c_iflag & (BRKINT | PARMRK))
1725 up->port.read_status_mask |= UART_LSR_BI;
1728 * Characteres to ignore
1730 up->port.ignore_status_mask = 0;
1731 if (termios->c_iflag & IGNPAR)
1732 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1733 if (termios->c_iflag & IGNBRK) {
1734 up->port.ignore_status_mask |= UART_LSR_BI;
1736 * If we're ignoring parity and break indicators,
1737 * ignore overruns too (for real raw support).
1739 if (termios->c_iflag & IGNPAR)
1740 up->port.ignore_status_mask |= UART_LSR_OE;
1744 * ignore all characters if CREAD is not set
1746 if ((termios->c_cflag & CREAD) == 0)
1747 up->port.ignore_status_mask |= UART_LSR_DR;
1750 * CTS flow control flag and modem status interrupts
1752 up->ier &= ~UART_IER_MSI;
1753 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1754 up->ier |= UART_IER_MSI;
1755 if (up->capabilities & UART_CAP_UUE)
1756 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1758 serial_out(up, UART_IER, up->ier);
1760 if (up->capabilities & UART_CAP_EFR) {
1761 unsigned char efr = 0;
1763 * TI16C752/Startech hardware flow control. FIXME:
1764 * - TI16C752 requires control thresholds to be set.
1765 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1767 if (termios->c_cflag & CRTSCTS)
1768 efr |= UART_EFR_CTS;
1770 serial_outp(up, UART_LCR, 0xBF);
1771 serial_outp(up, UART_EFR, efr);
1774 if (up->capabilities & UART_NATSEMI) {
1775 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1776 serial_outp(up, UART_LCR, 0xe0);
1778 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1781 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1782 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1785 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1786 * is written without DLAB set, this mode will be disabled.
1788 if (up->port.type == PORT_16750)
1789 serial_outp(up, UART_FCR, fcr);
1791 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1792 up->lcr = cval; /* Save LCR */
1793 if (up->port.type != PORT_16750) {
1794 if (fcr & UART_FCR_ENABLE_FIFO) {
1795 /* emulated UARTs (Lucent Venus 167x) need two steps */
1796 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1798 serial_outp(up, UART_FCR, fcr); /* set fcr */
1800 serial8250_set_mctrl(&up->port, up->port.mctrl);
1801 spin_unlock_irqrestore(&up->port.lock, flags);
1805 serial8250_pm(struct uart_port *port, unsigned int state,
1806 unsigned int oldstate)
1808 struct uart_8250_port *p = (struct uart_8250_port *)port;
1810 serial8250_set_sleep(p, state != 0);
1813 p->pm(port, state, oldstate);
1817 * Resource handling.
1819 static int serial8250_request_std_resource(struct uart_8250_port *up)
1821 unsigned int size = 8 << up->port.regshift;
1824 switch (up->port.iotype) {
1826 if (!up->port.mapbase)
1829 if (!request_mem_region(up->port.mapbase, size, "serial")) {
1834 if (up->port.flags & UPF_IOREMAP) {
1835 up->port.membase = ioremap(up->port.mapbase, size);
1836 if (!up->port.membase) {
1837 release_mem_region(up->port.mapbase, size);
1845 if (!request_region(up->port.iobase, size, "serial"))
1852 static void serial8250_release_std_resource(struct uart_8250_port *up)
1854 unsigned int size = 8 << up->port.regshift;
1856 switch (up->port.iotype) {
1858 if (!up->port.mapbase)
1861 if (up->port.flags & UPF_IOREMAP) {
1862 iounmap(up->port.membase);
1863 up->port.membase = NULL;
1866 release_mem_region(up->port.mapbase, size);
1871 release_region(up->port.iobase, size);
1876 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
1878 unsigned long start = UART_RSA_BASE << up->port.regshift;
1879 unsigned int size = 8 << up->port.regshift;
1882 switch (up->port.iotype) {
1889 start += up->port.iobase;
1890 if (!request_region(start, size, "serial-rsa"))
1898 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
1900 unsigned long offset = UART_RSA_BASE << up->port.regshift;
1901 unsigned int size = 8 << up->port.regshift;
1903 switch (up->port.iotype) {
1909 release_region(up->port.iobase + offset, size);
1914 static void serial8250_release_port(struct uart_port *port)
1916 struct uart_8250_port *up = (struct uart_8250_port *)port;
1918 serial8250_release_std_resource(up);
1919 if (up->port.type == PORT_RSA)
1920 serial8250_release_rsa_resource(up);
1923 static int serial8250_request_port(struct uart_port *port)
1925 struct uart_8250_port *up = (struct uart_8250_port *)port;
1928 ret = serial8250_request_std_resource(up);
1929 if (ret == 0 && up->port.type == PORT_RSA) {
1930 ret = serial8250_request_rsa_resource(up);
1932 serial8250_release_std_resource(up);
1938 static void serial8250_config_port(struct uart_port *port, int flags)
1940 struct uart_8250_port *up = (struct uart_8250_port *)port;
1941 int probeflags = PROBE_ANY;
1945 * Don't probe for MCA ports on non-MCA machines.
1947 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1951 * Find the region that we can probe for. This in turn
1952 * tells us whether we can probe for the type of port.
1954 ret = serial8250_request_std_resource(up);
1958 ret = serial8250_request_rsa_resource(up);
1960 probeflags &= ~PROBE_RSA;
1962 if (flags & UART_CONFIG_TYPE)
1963 autoconfig(up, probeflags);
1964 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
1967 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
1968 serial8250_release_rsa_resource(up);
1969 if (up->port.type == PORT_UNKNOWN)
1970 serial8250_release_std_resource(up);
1974 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1976 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1977 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1978 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
1979 ser->type == PORT_STARTECH)
1985 serial8250_type(struct uart_port *port)
1987 int type = port->type;
1989 if (type >= ARRAY_SIZE(uart_config))
1991 return uart_config[type].name;
1994 static struct uart_ops serial8250_pops = {
1995 .tx_empty = serial8250_tx_empty,
1996 .set_mctrl = serial8250_set_mctrl,
1997 .get_mctrl = serial8250_get_mctrl,
1998 .stop_tx = serial8250_stop_tx,
1999 .start_tx = serial8250_start_tx,
2000 .stop_rx = serial8250_stop_rx,
2001 .enable_ms = serial8250_enable_ms,
2002 .break_ctl = serial8250_break_ctl,
2003 .startup = serial8250_startup,
2004 .shutdown = serial8250_shutdown,
2005 .set_termios = serial8250_set_termios,
2006 .pm = serial8250_pm,
2007 .type = serial8250_type,
2008 .release_port = serial8250_release_port,
2009 .request_port = serial8250_request_port,
2010 .config_port = serial8250_config_port,
2011 .verify_port = serial8250_verify_port,
2014 static struct uart_8250_port serial8250_ports[UART_NR];
2016 static void __init serial8250_isa_init_ports(void)
2018 struct uart_8250_port *up;
2019 static int first = 1;
2026 for (i = 0; i < UART_NR; i++) {
2027 struct uart_8250_port *up = &serial8250_ports[i];
2030 spin_lock_init(&up->port.lock);
2032 init_timer(&up->timer);
2033 up->timer.function = serial8250_timeout;
2036 * ALPHA_KLUDGE_MCR needs to be killed.
2038 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2039 up->mcr_force = ALPHA_KLUDGE_MCR;
2041 up->port.ops = &serial8250_pops;
2044 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
2046 up->port.iobase = old_serial_port[i].port;
2047 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2048 up->port.uartclk = old_serial_port[i].baud_base * 16;
2049 up->port.flags = old_serial_port[i].flags;
2050 up->port.hub6 = old_serial_port[i].hub6;
2051 up->port.membase = old_serial_port[i].iomem_base;
2052 up->port.iotype = old_serial_port[i].io_type;
2053 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2055 up->port.flags |= UPF_SHARE_IRQ;
2060 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2064 serial8250_isa_init_ports();
2066 for (i = 0; i < UART_NR; i++) {
2067 struct uart_8250_port *up = &serial8250_ports[i];
2070 uart_add_one_port(drv, &up->port);
2074 #ifdef CONFIG_SERIAL_8250_CONSOLE
2076 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2079 * Wait for transmitter & holding register to empty
2081 static inline void wait_for_xmitr(struct uart_8250_port *up)
2083 unsigned int status, tmout = 10000;
2085 /* Wait up to 10ms for the character(s) to be sent. */
2087 status = serial_in(up, UART_LSR);
2089 if (status & UART_LSR_BI)
2090 up->lsr_break_flag = UART_LSR_BI;
2095 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
2097 /* Wait up to 1s for flow control if necessary */
2098 if (up->port.flags & UPF_CONS_FLOW) {
2100 while (!(serial_in(up, UART_MSR) & UART_MSR_CTS) && --tmout) {
2102 if ((tmout % 1000) == 0)
2103 touch_nmi_watchdog();
2109 * Print a string to the serial port trying not to disturb
2110 * any possible real use of the port...
2112 * The console_lock must be held when we get here.
2115 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2117 struct uart_8250_port *up = &serial8250_ports[co->index];
2122 * First save the UER then disable the interrupts
2124 ier = serial_in(up, UART_IER);
2126 if (up->capabilities & UART_CAP_UUE)
2127 serial_out(up, UART_IER, UART_IER_UUE);
2129 serial_out(up, UART_IER, 0);
2132 * Now, do each character
2134 for (i = 0; i < count; i++, s++) {
2138 * Send the character out.
2139 * If a LF, also do CR...
2141 serial_out(up, UART_TX, *s);
2144 serial_out(up, UART_TX, 13);
2149 * Finally, wait for transmitter to become empty
2150 * and restore the IER
2153 serial_out(up, UART_IER, ier);
2156 static int serial8250_console_setup(struct console *co, char *options)
2158 struct uart_port *port;
2165 * Check whether an invalid uart number has been specified, and
2166 * if so, search for the first available port that does have
2169 if (co->index >= UART_NR)
2171 port = &serial8250_ports[co->index].port;
2172 if (!port->iobase && !port->membase)
2176 uart_parse_options(options, &baud, &parity, &bits, &flow);
2178 return uart_set_options(port, co, baud, parity, bits, flow);
2181 static struct uart_driver serial8250_reg;
2182 static struct console serial8250_console = {
2184 .write = serial8250_console_write,
2185 .device = uart_console_device,
2186 .setup = serial8250_console_setup,
2187 .flags = CON_PRINTBUFFER,
2189 .data = &serial8250_reg,
2192 static int __init serial8250_console_init(void)
2194 serial8250_isa_init_ports();
2195 register_console(&serial8250_console);
2198 console_initcall(serial8250_console_init);
2200 static int __init find_port(struct uart_port *p)
2203 struct uart_port *port;
2205 for (line = 0; line < UART_NR; line++) {
2206 port = &serial8250_ports[line].port;
2207 if (p->iotype == port->iotype &&
2208 p->iobase == port->iobase &&
2209 p->membase == port->membase)
2215 int __init serial8250_start_console(struct uart_port *port, char *options)
2219 line = find_port(port);
2223 add_preferred_console("ttyS", line, options);
2224 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2225 line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
2226 port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
2227 (unsigned long) port->iobase, options);
2228 if (!(serial8250_console.flags & CON_ENABLED)) {
2229 serial8250_console.flags &= ~CON_PRINTBUFFER;
2230 register_console(&serial8250_console);
2235 #define SERIAL8250_CONSOLE &serial8250_console
2237 #define SERIAL8250_CONSOLE NULL
2240 static struct uart_driver serial8250_reg = {
2241 .owner = THIS_MODULE,
2242 .driver_name = "serial",
2243 .devfs_name = "tts/",
2248 .cons = SERIAL8250_CONSOLE,
2251 int __init early_serial_setup(struct uart_port *port)
2253 if (port->line >= ARRAY_SIZE(serial8250_ports))
2256 serial8250_isa_init_ports();
2257 serial8250_ports[port->line].port = *port;
2258 serial8250_ports[port->line].port.ops = &serial8250_pops;
2263 * serial8250_suspend_port - suspend one serial port
2264 * @line: serial line number
2265 * @level: the level of port suspension, as per uart_suspend_port
2267 * Suspend one serial port.
2269 void serial8250_suspend_port(int line)
2271 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2275 * serial8250_resume_port - resume one serial port
2276 * @line: serial line number
2277 * @level: the level of port resumption, as per uart_resume_port
2279 * Resume one serial port.
2281 void serial8250_resume_port(int line)
2283 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2287 * Register a set of serial devices attached to a platform device. The
2288 * list is terminated with a zero flags entry, which means we expect
2289 * all entries to have at least UPF_BOOT_AUTOCONF set.
2291 static int __devinit serial8250_probe(struct device *dev)
2293 struct plat_serial8250_port *p = dev->platform_data;
2294 struct uart_port port;
2296 memset(&port, 0, sizeof(struct uart_port));
2298 for (; p && p->flags != 0; p++) {
2299 port.iobase = p->iobase;
2300 port.membase = p->membase;
2302 port.uartclk = p->uartclk;
2303 port.regshift = p->regshift;
2304 port.iotype = p->iotype;
2305 port.flags = p->flags;
2306 port.mapbase = p->mapbase;
2309 port.flags |= UPF_SHARE_IRQ;
2310 serial8250_register_port(&port);
2316 * Remove serial ports registered against a platform device.
2318 static int __devexit serial8250_remove(struct device *dev)
2322 for (i = 0; i < UART_NR; i++) {
2323 struct uart_8250_port *up = &serial8250_ports[i];
2325 if (up->port.dev == dev)
2326 serial8250_unregister_port(i);
2331 static int serial8250_suspend(struct device *dev, pm_message_t state, u32 level)
2335 if (level != SUSPEND_DISABLE)
2338 for (i = 0; i < UART_NR; i++) {
2339 struct uart_8250_port *up = &serial8250_ports[i];
2341 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2342 uart_suspend_port(&serial8250_reg, &up->port);
2348 static int serial8250_resume(struct device *dev, u32 level)
2352 if (level != RESUME_ENABLE)
2355 for (i = 0; i < UART_NR; i++) {
2356 struct uart_8250_port *up = &serial8250_ports[i];
2358 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2359 uart_resume_port(&serial8250_reg, &up->port);
2365 static struct device_driver serial8250_isa_driver = {
2366 .name = "serial8250",
2367 .bus = &platform_bus_type,
2368 .probe = serial8250_probe,
2369 .remove = __devexit_p(serial8250_remove),
2370 .suspend = serial8250_suspend,
2371 .resume = serial8250_resume,
2375 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2376 * in the table in include/asm/serial.h
2378 static struct platform_device *serial8250_isa_devs;
2381 * serial8250_register_port and serial8250_unregister_port allows for
2382 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2383 * modems and PCI multiport cards.
2385 static DECLARE_MUTEX(serial_sem);
2387 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2392 * First, find a port entry which matches.
2394 for (i = 0; i < UART_NR; i++)
2395 if (uart_match_port(&serial8250_ports[i].port, port))
2396 return &serial8250_ports[i];
2399 * We didn't find a matching entry, so look for the first
2400 * free entry. We look for one which hasn't been previously
2401 * used (indicated by zero iobase).
2403 for (i = 0; i < UART_NR; i++)
2404 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2405 serial8250_ports[i].port.iobase == 0)
2406 return &serial8250_ports[i];
2409 * That also failed. Last resort is to find any entry which
2410 * doesn't have a real port associated with it.
2412 for (i = 0; i < UART_NR; i++)
2413 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2414 return &serial8250_ports[i];
2420 * serial8250_register_port - register a serial port
2421 * @port: serial port template
2423 * Configure the serial port specified by the request. If the
2424 * port exists and is in use, it is hung up and unregistered
2427 * The port is then probed and if necessary the IRQ is autodetected
2428 * If this fails an error is returned.
2430 * On success the port is ready to use and the line number is returned.
2432 int serial8250_register_port(struct uart_port *port)
2434 struct uart_8250_port *uart;
2437 if (port->uartclk == 0)
2442 uart = serial8250_find_match_or_unused(port);
2444 uart_remove_one_port(&serial8250_reg, &uart->port);
2446 uart->port.iobase = port->iobase;
2447 uart->port.membase = port->membase;
2448 uart->port.irq = port->irq;
2449 uart->port.uartclk = port->uartclk;
2450 uart->port.fifosize = port->fifosize;
2451 uart->port.regshift = port->regshift;
2452 uart->port.iotype = port->iotype;
2453 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2454 uart->port.mapbase = port->mapbase;
2456 uart->port.dev = port->dev;
2458 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2460 ret = uart->port.line;
2466 EXPORT_SYMBOL(serial8250_register_port);
2469 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2470 * @line: serial line number
2472 * Remove one serial port. This may not be called from interrupt
2473 * context. We hand the port back to the our control.
2475 void serial8250_unregister_port(int line)
2477 struct uart_8250_port *uart = &serial8250_ports[line];
2480 uart_remove_one_port(&serial8250_reg, &uart->port);
2481 if (serial8250_isa_devs) {
2482 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2483 uart->port.type = PORT_UNKNOWN;
2484 uart->port.dev = &serial8250_isa_devs->dev;
2485 uart_add_one_port(&serial8250_reg, &uart->port);
2487 uart->port.dev = NULL;
2491 EXPORT_SYMBOL(serial8250_unregister_port);
2493 static int __init serial8250_init(void)
2497 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2498 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2499 share_irqs ? "en" : "dis");
2501 for (i = 0; i < NR_IRQS; i++)
2502 spin_lock_init(&irq_lists[i].lock);
2504 ret = uart_register_driver(&serial8250_reg);
2508 serial8250_isa_devs = platform_device_register_simple("serial8250",
2510 if (IS_ERR(serial8250_isa_devs)) {
2511 ret = PTR_ERR(serial8250_isa_devs);
2515 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2517 ret = driver_register(&serial8250_isa_driver);
2521 platform_device_unregister(serial8250_isa_devs);
2523 uart_unregister_driver(&serial8250_reg);
2528 static void __exit serial8250_exit(void)
2530 struct platform_device *isa_dev = serial8250_isa_devs;
2533 * This tells serial8250_unregister_port() not to re-register
2534 * the ports (thereby making serial8250_isa_driver permanently
2537 serial8250_isa_devs = NULL;
2539 driver_unregister(&serial8250_isa_driver);
2540 platform_device_unregister(isa_dev);
2542 uart_unregister_driver(&serial8250_reg);
2545 module_init(serial8250_init);
2546 module_exit(serial8250_exit);
2548 EXPORT_SYMBOL(serial8250_suspend_port);
2549 EXPORT_SYMBOL(serial8250_resume_port);
2551 MODULE_LICENSE("GPL");
2552 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2554 module_param(share_irqs, uint, 0644);
2555 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2558 #ifdef CONFIG_SERIAL_8250_RSA
2559 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2560 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2562 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
2565 * register_serial - configure a 16x50 serial port at runtime
2566 * @req: request structure
2568 * Configure the serial port specified by the request. If the
2569 * port exists and is in use an error is returned. If the port
2570 * is not currently in the table it is added.
2572 * The port is then probed and if necessary the IRQ is autodetected
2573 * If this fails an error is returned.
2575 * On success the port is ready to use and the line number is returned.
2577 * Note: this function is deprecated - use serial8250_register_port
2580 int register_serial(struct serial_struct *req)
2582 struct uart_port port;
2584 port.iobase = req->port;
2585 port.membase = req->iomem_base;
2586 port.irq = req->irq;
2587 port.uartclk = req->baud_base * 16;
2588 port.fifosize = req->xmit_fifo_size;
2589 port.regshift = req->iomem_reg_shift;
2590 port.iotype = req->io_type;
2591 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2592 port.mapbase = req->iomap_base;
2596 port.flags |= UPF_SHARE_IRQ;
2598 if (HIGH_BITS_OFFSET)
2599 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2602 * If a clock rate wasn't specified by the low level driver, then
2603 * default to the standard clock rate. This should be 115200 (*16)
2604 * and should not depend on the architecture's BASE_BAUD definition.
2605 * However, since this API will be deprecated, it's probably a
2606 * better idea to convert the drivers to use the new API
2607 * (serial8250_register_port and serial8250_unregister_port).
2609 if (port.uartclk == 0) {
2611 "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n",
2612 port.iobase, port.mapbase, port.membase, port.irq);
2613 printk(KERN_WARNING "Serial: see %s:%d for more information\n",
2614 __FILE__, __LINE__);
2618 * Fix it up for now, but this is only a temporary measure.
2620 port.uartclk = BASE_BAUD * 16;
2623 return serial8250_register_port(&port);
2625 EXPORT_SYMBOL(register_serial);
2628 * unregister_serial - remove a 16x50 serial port at runtime
2629 * @line: serial line number
2631 * Remove one serial port. This may not be called from interrupt
2632 * context. We hand the port back to our local PM control.
2634 * Note: this function is deprecated - use serial8250_unregister_port
2637 void unregister_serial(int line)
2639 serial8250_unregister_port(line);
2641 EXPORT_SYMBOL(unregister_serial);