2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/delay.h>
35 #include <linux/device.h>
36 #include <linux/tty.h>
37 #include <linux/tty_flip.h>
38 #include <linux/serial_reg.h>
39 #include <linux/serial_core.h>
40 #include <linux/serial.h>
41 #include <linux/serial_8250.h>
50 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
51 * is unsafe when used on edge-triggered interrupts.
53 unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
59 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
61 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
65 #define DEBUG_INTR(fmt...) printk(fmt)
67 #define DEBUG_INTR(fmt...) do { } while (0)
70 #define PASS_LIMIT 256
73 * We default to IRQ0 for the "no irq" hack. Some
74 * machine types want others as well - they're free
75 * to redefine this in their header file.
77 #define is_real_interrupt(irq) ((irq) != 0)
80 * This converts from our new CONFIG_ symbols to the symbols
81 * that asm/serial.h expects. You _NEED_ to comment out the
82 * linux/config.h include contained inside asm/serial.h for
85 #undef CONFIG_SERIAL_MANY_PORTS
86 #undef CONFIG_SERIAL_DETECT_IRQ
87 #undef CONFIG_SERIAL_MULTIPORT
90 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
91 #define CONFIG_SERIAL_DETECT_IRQ 1
93 #ifdef CONFIG_SERIAL_8250_MULTIPORT
94 #define CONFIG_SERIAL_MULTIPORT 1
96 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
97 #define CONFIG_SERIAL_MANY_PORTS 1
101 * HUB6 is always on. This will be removed once the header
102 * files have been cleaned.
104 #define CONFIG_HUB6 1
106 #include <asm/serial.h>
109 * SERIAL_PORT_DFNS tells us about built-in ports that have no
110 * standard enumeration mechanism. Platforms that can find all
111 * serial ports via mechanisms like ACPI or PCI need not supply it.
113 #ifndef SERIAL_PORT_DFNS
114 #define SERIAL_PORT_DFNS
117 static struct old_serial_port old_serial_port[] = {
118 SERIAL_PORT_DFNS /* defined in asm/serial.h */
121 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
123 #ifdef CONFIG_SERIAL_8250_RSA
125 #define PORT_RSA_MAX 4
126 static unsigned long probe_rsa[PORT_RSA_MAX];
127 static unsigned int probe_rsa_count;
128 #endif /* CONFIG_SERIAL_8250_RSA */
130 struct uart_8250_port {
131 struct uart_port port;
132 struct timer_list timer; /* "no irq" timer */
133 struct list_head list; /* ports on this IRQ */
134 unsigned int capabilities; /* port capabilities */
135 unsigned int tx_loadsz; /* transmit fifo load size */
141 unsigned char mcr_mask; /* mask of user bits */
142 unsigned char mcr_force; /* mask of forced bits */
143 unsigned char lsr_break_flag;
146 * We provide a per-port pm hook.
148 void (*pm)(struct uart_port *port,
149 unsigned int state, unsigned int old);
154 struct list_head *head;
157 static struct irq_info irq_lists[NR_IRQS];
160 * Here we define the default xmit fifo size used for each type of UART.
162 static const struct serial8250_config uart_config[] = {
187 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
188 .flags = UART_CAP_FIFO,
199 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
205 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
207 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
213 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
215 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
223 .name = "16C950/954",
226 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
227 .flags = UART_CAP_FIFO,
233 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
235 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
241 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
242 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
248 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
249 .flags = UART_CAP_FIFO,
255 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
256 .flags = UART_CAP_FIFO | UART_NATSEMI,
262 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
263 .flags = UART_CAP_FIFO,
267 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
269 offset <<= up->port.regshift;
271 switch (up->port.iotype) {
273 outb(up->port.hub6 - 1 + offset, up->port.iobase);
274 return inb(up->port.iobase + 1);
277 return readb(up->port.membase + offset);
280 return readl(up->port.membase + offset);
283 return inb(up->port.iobase + offset);
288 serial_out(struct uart_8250_port *up, int offset, int value)
290 offset <<= up->port.regshift;
292 switch (up->port.iotype) {
294 outb(up->port.hub6 - 1 + offset, up->port.iobase);
295 outb(value, up->port.iobase + 1);
299 writeb(value, up->port.membase + offset);
303 writel(value, up->port.membase + offset);
307 outb(value, up->port.iobase + offset);
312 * We used to support using pause I/O for certain machines. We
313 * haven't supported this for a while, but just in case it's badly
314 * needed for certain old 386 machines, I've left these #define's
317 #define serial_inp(up, offset) serial_in(up, offset)
318 #define serial_outp(up, offset, value) serial_out(up, offset, value)
324 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
326 serial_out(up, UART_SCR, offset);
327 serial_out(up, UART_ICR, value);
330 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
334 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
335 serial_out(up, UART_SCR, offset);
336 value = serial_in(up, UART_ICR);
337 serial_icr_write(up, UART_ACR, up->acr);
345 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
347 if (p->capabilities & UART_CAP_FIFO) {
348 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
349 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
350 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
351 serial_outp(p, UART_FCR, 0);
356 * IER sleep support. UARTs which have EFRs need the "extended
357 * capability" bit enabled. Note that on XR16C850s, we need to
358 * reset LCR to write to IER.
360 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
362 if (p->capabilities & UART_CAP_SLEEP) {
363 if (p->capabilities & UART_CAP_EFR) {
364 serial_outp(p, UART_LCR, 0xBF);
365 serial_outp(p, UART_EFR, UART_EFR_ECB);
366 serial_outp(p, UART_LCR, 0);
368 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
369 if (p->capabilities & UART_CAP_EFR) {
370 serial_outp(p, UART_LCR, 0xBF);
371 serial_outp(p, UART_EFR, 0);
372 serial_outp(p, UART_LCR, 0);
377 #ifdef CONFIG_SERIAL_8250_RSA
379 * Attempts to turn on the RSA FIFO. Returns zero on failure.
380 * We set the port uart clock rate if we succeed.
382 static int __enable_rsa(struct uart_8250_port *up)
387 mode = serial_inp(up, UART_RSA_MSR);
388 result = mode & UART_RSA_MSR_FIFO;
391 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
392 mode = serial_inp(up, UART_RSA_MSR);
393 result = mode & UART_RSA_MSR_FIFO;
397 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
402 static void enable_rsa(struct uart_8250_port *up)
404 if (up->port.type == PORT_RSA) {
405 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
406 spin_lock_irq(&up->port.lock);
408 spin_unlock_irq(&up->port.lock);
410 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
411 serial_outp(up, UART_RSA_FRR, 0);
416 * Attempts to turn off the RSA FIFO. Returns zero on failure.
417 * It is unknown why interrupts were disabled in here. However,
418 * the caller is expected to preserve this behaviour by grabbing
419 * the spinlock before calling this function.
421 static void disable_rsa(struct uart_8250_port *up)
426 if (up->port.type == PORT_RSA &&
427 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
428 spin_lock_irq(&up->port.lock);
430 mode = serial_inp(up, UART_RSA_MSR);
431 result = !(mode & UART_RSA_MSR_FIFO);
434 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
435 mode = serial_inp(up, UART_RSA_MSR);
436 result = !(mode & UART_RSA_MSR_FIFO);
440 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
441 spin_unlock_irq(&up->port.lock);
444 #endif /* CONFIG_SERIAL_8250_RSA */
447 * This is a quickie test to see how big the FIFO is.
448 * It doesn't work at all the time, more's the pity.
450 static int size_fifo(struct uart_8250_port *up)
452 unsigned char old_fcr, old_mcr, old_dll, old_dlm;
455 old_fcr = serial_inp(up, UART_FCR);
456 old_mcr = serial_inp(up, UART_MCR);
457 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
458 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
459 serial_outp(up, UART_MCR, UART_MCR_LOOP);
460 serial_outp(up, UART_LCR, UART_LCR_DLAB);
461 old_dll = serial_inp(up, UART_DLL);
462 old_dlm = serial_inp(up, UART_DLM);
463 serial_outp(up, UART_DLL, 0x01);
464 serial_outp(up, UART_DLM, 0x00);
465 serial_outp(up, UART_LCR, 0x03);
466 for (count = 0; count < 256; count++)
467 serial_outp(up, UART_TX, count);
468 mdelay(20);/* FIXME - schedule_timeout */
469 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
470 (count < 256); count++)
471 serial_inp(up, UART_RX);
472 serial_outp(up, UART_FCR, old_fcr);
473 serial_outp(up, UART_MCR, old_mcr);
474 serial_outp(up, UART_LCR, UART_LCR_DLAB);
475 serial_outp(up, UART_DLL, old_dll);
476 serial_outp(up, UART_DLM, old_dlm);
482 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
483 * When this function is called we know it is at least a StarTech
484 * 16650 V2, but it might be one of several StarTech UARTs, or one of
485 * its clones. (We treat the broken original StarTech 16650 V1 as a
486 * 16550, and why not? Startech doesn't seem to even acknowledge its
489 * What evil have men's minds wrought...
491 static void autoconfig_has_efr(struct uart_8250_port *up)
493 unsigned char id1, id2, id3, rev, saved_dll, saved_dlm;
496 * Everything with an EFR has SLEEP
498 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
501 * First we check to see if it's an Oxford Semiconductor UART.
503 * If we have to do this here because some non-National
504 * Semiconductor clone chips lock up if you try writing to the
505 * LSR register (which serial_icr_read does)
509 * Check for Oxford Semiconductor 16C950.
511 * EFR [4] must be set else this test fails.
513 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
514 * claims that it's needed for 952 dual UART's (which are not
515 * recommended for new designs).
518 serial_out(up, UART_LCR, 0xBF);
519 serial_out(up, UART_EFR, UART_EFR_ECB);
520 serial_out(up, UART_LCR, 0x00);
521 id1 = serial_icr_read(up, UART_ID1);
522 id2 = serial_icr_read(up, UART_ID2);
523 id3 = serial_icr_read(up, UART_ID3);
524 rev = serial_icr_read(up, UART_REV);
526 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
528 if (id1 == 0x16 && id2 == 0xC9 &&
529 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
530 up->port.type = PORT_16C950;
531 up->rev = rev | (id3 << 8);
536 * We check for a XR16C850 by setting DLL and DLM to 0, and then
537 * reading back DLL and DLM. The chip type depends on the DLM
539 * 0x10 - XR16C850 and the DLL contains the chip revision.
543 serial_outp(up, UART_LCR, UART_LCR_DLAB);
544 saved_dll = serial_inp(up, UART_DLL);
545 saved_dlm = serial_inp(up, UART_DLM);
546 serial_outp(up, UART_DLL, 0);
547 serial_outp(up, UART_DLM, 0);
548 id2 = serial_inp(up, UART_DLL);
549 id1 = serial_inp(up, UART_DLM);
550 serial_outp(up, UART_DLL, saved_dll);
551 serial_outp(up, UART_DLM, saved_dlm);
553 DEBUG_AUTOCONF("850id=%02x:%02x ", id1, id2);
555 if (id1 == 0x10 || id1 == 0x12 || id1 == 0x14) {
558 up->port.type = PORT_16850;
563 * It wasn't an XR16C850.
565 * We distinguish between the '654 and the '650 by counting
566 * how many bytes are in the FIFO. I'm using this for now,
567 * since that's the technique that was sent to me in the
568 * serial driver update, but I'm not convinced this works.
569 * I've had problems doing this in the past. -TYT
571 if (size_fifo(up) == 64)
572 up->port.type = PORT_16654;
574 up->port.type = PORT_16650V2;
578 * We detected a chip without a FIFO. Only two fall into
579 * this category - the original 8250 and the 16450. The
580 * 16450 has a scratch register (accessible with LCR=0)
582 static void autoconfig_8250(struct uart_8250_port *up)
584 unsigned char scratch, status1, status2;
586 up->port.type = PORT_8250;
588 scratch = serial_in(up, UART_SCR);
589 serial_outp(up, UART_SCR, 0xa5);
590 status1 = serial_in(up, UART_SCR);
591 serial_outp(up, UART_SCR, 0x5a);
592 status2 = serial_in(up, UART_SCR);
593 serial_outp(up, UART_SCR, scratch);
595 if (status1 == 0xa5 && status2 == 0x5a)
596 up->port.type = PORT_16450;
600 * We know that the chip has FIFOs. Does it have an EFR? The
601 * EFR is located in the same register position as the IIR and
602 * we know the top two bits of the IIR are currently set. The
603 * EFR should contain zero. Try to read the EFR.
605 static void autoconfig_16550a(struct uart_8250_port *up)
607 unsigned char status1, status2;
609 up->port.type = PORT_16550A;
610 up->capabilities |= UART_CAP_FIFO;
613 * Check for presence of the EFR when DLAB is set.
614 * Only ST16C650V1 UARTs pass this test.
616 serial_outp(up, UART_LCR, UART_LCR_DLAB);
617 if (serial_in(up, UART_EFR) == 0) {
618 serial_outp(up, UART_EFR, 0xA8);
619 if (serial_in(up, UART_EFR) != 0) {
620 DEBUG_AUTOCONF("EFRv1 ");
621 up->port.type = PORT_16650;
622 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
624 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
626 serial_outp(up, UART_EFR, 0);
631 * Maybe it requires 0xbf to be written to the LCR.
632 * (other ST16C650V2 UARTs, TI16C752A, etc)
634 serial_outp(up, UART_LCR, 0xBF);
635 if (serial_in(up, UART_EFR) == 0) {
636 DEBUG_AUTOCONF("EFRv2 ");
637 autoconfig_has_efr(up);
642 * Check for a National Semiconductor SuperIO chip.
643 * Attempt to switch to bank 2, read the value of the LOOP bit
644 * from EXCR1. Switch back to bank 0, change it in MCR. Then
645 * switch back to bank 2, read it from EXCR1 again and check
646 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
647 * On PowerPC we don't want to change baud_base, as we have
648 * a number of different divisors. -- Tom Rini
650 serial_outp(up, UART_LCR, 0);
651 status1 = serial_in(up, UART_MCR);
652 serial_outp(up, UART_LCR, 0xE0);
653 status2 = serial_in(up, 0x02); /* EXCR1 */
655 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
656 serial_outp(up, UART_LCR, 0);
657 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
658 serial_outp(up, UART_LCR, 0xE0);
659 status2 = serial_in(up, 0x02); /* EXCR1 */
660 serial_outp(up, UART_LCR, 0);
661 serial_outp(up, UART_MCR, status1);
663 if ((status2 ^ status1) & UART_MCR_LOOP) {
665 serial_outp(up, UART_LCR, 0xE0);
666 status1 = serial_in(up, 0x04); /* EXCR1 */
667 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
668 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
669 serial_outp(up, 0x04, status1);
670 serial_outp(up, UART_LCR, 0);
671 up->port.uartclk = 921600*16;
674 up->port.type = PORT_NS16550A;
675 up->capabilities |= UART_NATSEMI;
681 * No EFR. Try to detect a TI16750, which only sets bit 5 of
682 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
683 * Try setting it with and without DLAB set. Cheap clones
684 * set bit 5 without DLAB set.
686 serial_outp(up, UART_LCR, 0);
687 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
688 status1 = serial_in(up, UART_IIR) >> 5;
689 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
690 serial_outp(up, UART_LCR, UART_LCR_DLAB);
691 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
692 status2 = serial_in(up, UART_IIR) >> 5;
693 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
695 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
697 if (status1 == 6 && status2 == 7) {
698 up->port.type = PORT_16750;
699 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
705 * This routine is called by rs_init() to initialize a specific serial
706 * port. It determines what type of UART chip this serial port is
707 * using: 8250, 16450, 16550, 16550A. The important question is
708 * whether or not this UART is a 16550A or not, since this will
709 * determine whether or not we can use its FIFO features or not.
711 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
713 unsigned char status1, scratch, scratch2, scratch3;
714 unsigned char save_lcr, save_mcr;
717 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
720 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
721 up->port.line, up->port.iobase, up->port.membase);
724 * We really do need global IRQs disabled here - we're going to
725 * be frobbing the chips IRQ enable register to see if it exists.
727 spin_lock_irqsave(&up->port.lock, flags);
728 // save_flags(flags); cli();
730 up->capabilities = 0;
732 if (!(up->port.flags & UPF_BUGGY_UART)) {
734 * Do a simple existence test first; if we fail this,
735 * there's no point trying anything else.
737 * 0x80 is used as a nonsense port to prevent against
738 * false positives due to ISA bus float. The
739 * assumption is that 0x80 is a non-existent port;
740 * which should be safe since include/asm/io.h also
741 * makes this assumption.
743 * Note: this is safe as long as MCR bit 4 is clear
744 * and the device is in "PC" mode.
746 scratch = serial_inp(up, UART_IER);
747 serial_outp(up, UART_IER, 0);
751 scratch2 = serial_inp(up, UART_IER);
752 serial_outp(up, UART_IER, 0x0F);
756 scratch3 = serial_inp(up, UART_IER);
757 serial_outp(up, UART_IER, scratch);
758 if (scratch2 != 0 || scratch3 != 0x0F) {
760 * We failed; there's nothing here
762 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
768 save_mcr = serial_in(up, UART_MCR);
769 save_lcr = serial_in(up, UART_LCR);
772 * Check to see if a UART is really there. Certain broken
773 * internal modems based on the Rockwell chipset fail this
774 * test, because they apparently don't implement the loopback
775 * test mode. So this test is skipped on the COM 1 through
776 * COM 4 ports. This *should* be safe, since no board
777 * manufacturer would be stupid enough to design a board
778 * that conflicts with COM 1-4 --- we hope!
780 if (!(up->port.flags & UPF_SKIP_TEST)) {
781 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
782 status1 = serial_inp(up, UART_MSR) & 0xF0;
783 serial_outp(up, UART_MCR, save_mcr);
784 if (status1 != 0x90) {
785 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
792 * We're pretty sure there's a port here. Lets find out what
793 * type of port it is. The IIR top two bits allows us to find
794 * out if its 8250 or 16450, 16550, 16550A or later. This
795 * determines what we test for next.
797 * We also initialise the EFR (if any) to zero for later. The
798 * EFR occupies the same register location as the FCR and IIR.
800 serial_outp(up, UART_LCR, 0xBF);
801 serial_outp(up, UART_EFR, 0);
802 serial_outp(up, UART_LCR, 0);
804 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
805 scratch = serial_in(up, UART_IIR) >> 6;
807 DEBUG_AUTOCONF("iir=%d ", scratch);
814 up->port.type = PORT_UNKNOWN;
817 up->port.type = PORT_16550;
820 autoconfig_16550a(up);
824 #ifdef CONFIG_SERIAL_8250_RSA
826 * Only probe for RSA ports if we got the region.
828 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
831 for (i = 0 ; i < probe_rsa_count; ++i) {
832 if (probe_rsa[i] == up->port.iobase &&
834 up->port.type = PORT_RSA;
840 serial_outp(up, UART_LCR, save_lcr);
842 if (up->capabilities != uart_config[up->port.type].flags) {
844 "ttyS%d: detected caps %08x should be %08x\n",
845 up->port.line, up->capabilities,
846 uart_config[up->port.type].flags);
849 up->port.fifosize = uart_config[up->port.type].fifo_size;
850 up->capabilities = uart_config[up->port.type].flags;
851 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
853 if (up->port.type == PORT_UNKNOWN)
859 #ifdef CONFIG_SERIAL_8250_RSA
860 if (up->port.type == PORT_RSA)
861 serial_outp(up, UART_RSA_FRR, 0);
863 serial_outp(up, UART_MCR, save_mcr);
864 serial8250_clear_fifos(up);
865 (void)serial_in(up, UART_RX);
866 serial_outp(up, UART_IER, 0);
869 spin_unlock_irqrestore(&up->port.lock, flags);
870 // restore_flags(flags);
871 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
874 static void autoconfig_irq(struct uart_8250_port *up)
876 unsigned char save_mcr, save_ier;
877 unsigned char save_ICP = 0;
878 unsigned int ICP = 0;
882 if (up->port.flags & UPF_FOURPORT) {
883 ICP = (up->port.iobase & 0xfe0) | 0x1f;
884 save_ICP = inb_p(ICP);
889 /* forget possible initially masked and pending IRQ */
890 probe_irq_off(probe_irq_on());
891 save_mcr = serial_inp(up, UART_MCR);
892 save_ier = serial_inp(up, UART_IER);
893 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
895 irqs = probe_irq_on();
896 serial_outp(up, UART_MCR, 0);
898 if (up->port.flags & UPF_FOURPORT) {
899 serial_outp(up, UART_MCR,
900 UART_MCR_DTR | UART_MCR_RTS);
902 serial_outp(up, UART_MCR,
903 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
905 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
906 (void)serial_inp(up, UART_LSR);
907 (void)serial_inp(up, UART_RX);
908 (void)serial_inp(up, UART_IIR);
909 (void)serial_inp(up, UART_MSR);
910 serial_outp(up, UART_TX, 0xFF);
912 irq = probe_irq_off(irqs);
914 serial_outp(up, UART_MCR, save_mcr);
915 serial_outp(up, UART_IER, save_ier);
917 if (up->port.flags & UPF_FOURPORT)
918 outb_p(save_ICP, ICP);
920 up->port.irq = (irq > 0) ? irq : 0;
923 static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
925 struct uart_8250_port *up = (struct uart_8250_port *)port;
927 if (up->ier & UART_IER_THRI) {
928 up->ier &= ~UART_IER_THRI;
929 serial_out(up, UART_IER, up->ier);
933 * We only do this from uart_stop - if we run out of
934 * characters to send, we don't want to prevent the
935 * FIFO from emptying.
937 if (up->port.type == PORT_16C950 && tty_stop) {
938 up->acr |= UART_ACR_TXDIS;
939 serial_icr_write(up, UART_ACR, up->acr);
943 static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start)
945 struct uart_8250_port *up = (struct uart_8250_port *)port;
947 if (!(up->ier & UART_IER_THRI)) {
948 up->ier |= UART_IER_THRI;
949 serial_out(up, UART_IER, up->ier);
952 * We only do this from uart_start
954 if (tty_start && up->port.type == PORT_16C950) {
955 up->acr &= ~UART_ACR_TXDIS;
956 serial_icr_write(up, UART_ACR, up->acr);
960 static void serial8250_stop_rx(struct uart_port *port)
962 struct uart_8250_port *up = (struct uart_8250_port *)port;
964 up->ier &= ~UART_IER_RLSI;
965 up->port.read_status_mask &= ~UART_LSR_DR;
966 serial_out(up, UART_IER, up->ier);
969 static void serial8250_enable_ms(struct uart_port *port)
971 struct uart_8250_port *up = (struct uart_8250_port *)port;
973 up->ier |= UART_IER_MSI;
974 serial_out(up, UART_IER, up->ier);
978 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
980 struct tty_struct *tty = up->port.info->tty;
981 unsigned char ch, lsr = *status;
986 /* The following is not allowed by the tty layer and
987 unsafe. It should be fixed ASAP */
988 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
990 tty_flip_buffer_push(tty);
991 /* If this failed then we will throw away the
992 bytes but must do so to clear interrupts */
994 ch = serial_inp(up, UART_RX);
996 up->port.icount.rx++;
998 #ifdef CONFIG_SERIAL_8250_CONSOLE
1000 * Recover the break flag from console xmit
1002 if (up->port.line == up->port.cons->index) {
1003 lsr |= up->lsr_break_flag;
1004 up->lsr_break_flag = 0;
1008 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
1009 UART_LSR_FE | UART_LSR_OE))) {
1011 * For statistics only
1013 if (lsr & UART_LSR_BI) {
1014 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1015 up->port.icount.brk++;
1017 * We do the SysRQ and SAK checking
1018 * here because otherwise the break
1019 * may get masked by ignore_status_mask
1020 * or read_status_mask.
1022 if (uart_handle_break(&up->port))
1024 } else if (lsr & UART_LSR_PE)
1025 up->port.icount.parity++;
1026 else if (lsr & UART_LSR_FE)
1027 up->port.icount.frame++;
1028 if (lsr & UART_LSR_OE)
1029 up->port.icount.overrun++;
1032 * Mask off conditions which should be ingored.
1034 lsr &= up->port.read_status_mask;
1036 if (lsr & UART_LSR_BI) {
1037 DEBUG_INTR("handling break....");
1039 } else if (lsr & UART_LSR_PE)
1041 else if (lsr & UART_LSR_FE)
1044 if (uart_handle_sysrq_char(&up->port, ch, regs))
1046 if ((lsr & up->port.ignore_status_mask) == 0) {
1047 tty_insert_flip_char(tty, ch, flag);
1049 if ((lsr & UART_LSR_OE) &&
1050 tty->flip.count < TTY_FLIPBUF_SIZE) {
1052 * Overrun is special, since it's reported
1053 * immediately, and doesn't affect the current
1056 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
1059 lsr = serial_inp(up, UART_LSR);
1060 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1061 tty_flip_buffer_push(tty);
1065 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1067 struct circ_buf *xmit = &up->port.info->xmit;
1070 if (up->port.x_char) {
1071 serial_outp(up, UART_TX, up->port.x_char);
1072 up->port.icount.tx++;
1073 up->port.x_char = 0;
1076 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
1077 serial8250_stop_tx(&up->port, 0);
1081 count = up->tx_loadsz;
1083 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1084 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1085 up->port.icount.tx++;
1086 if (uart_circ_empty(xmit))
1088 } while (--count > 0);
1090 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1091 uart_write_wakeup(&up->port);
1093 DEBUG_INTR("THRE...");
1095 if (uart_circ_empty(xmit))
1096 serial8250_stop_tx(&up->port, 0);
1099 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
1103 status = serial_in(up, UART_MSR);
1105 if ((status & UART_MSR_ANY_DELTA) == 0)
1108 if (status & UART_MSR_TERI)
1109 up->port.icount.rng++;
1110 if (status & UART_MSR_DDSR)
1111 up->port.icount.dsr++;
1112 if (status & UART_MSR_DDCD)
1113 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1114 if (status & UART_MSR_DCTS)
1115 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1117 wake_up_interruptible(&up->port.info->delta_msr_wait);
1121 * This handles the interrupt from one port.
1124 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1126 unsigned int status = serial_inp(up, UART_LSR);
1128 DEBUG_INTR("status = %x...", status);
1130 if (status & UART_LSR_DR)
1131 receive_chars(up, &status, regs);
1132 check_modem_status(up);
1133 if (status & UART_LSR_THRE)
1138 * This is the serial driver's interrupt routine.
1140 * Arjan thinks the old way was overly complex, so it got simplified.
1141 * Alan disagrees, saying that need the complexity to handle the weird
1142 * nature of ISA shared interrupts. (This is a special exception.)
1144 * In order to handle ISA shared interrupts properly, we need to check
1145 * that all ports have been serviced, and therefore the ISA interrupt
1146 * line has been de-asserted.
1148 * This means we need to loop through all ports. checking that they
1149 * don't have an interrupt pending.
1151 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1153 struct irq_info *i = dev_id;
1154 struct list_head *l, *end = NULL;
1155 int pass_counter = 0, handled = 0;
1157 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1159 spin_lock(&i->lock);
1163 struct uart_8250_port *up;
1166 up = list_entry(l, struct uart_8250_port, list);
1168 iir = serial_in(up, UART_IIR);
1169 if (!(iir & UART_IIR_NO_INT)) {
1170 spin_lock(&up->port.lock);
1171 serial8250_handle_port(up, regs);
1172 spin_unlock(&up->port.lock);
1177 } else if (end == NULL)
1182 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1183 /* If we hit this, we're dead. */
1184 printk(KERN_ERR "serial8250: too much work for "
1190 spin_unlock(&i->lock);
1192 DEBUG_INTR("end.\n");
1194 return IRQ_RETVAL(handled);
1198 * To support ISA shared interrupts, we need to have one interrupt
1199 * handler that ensures that the IRQ line has been deasserted
1200 * before returning. Failing to do this will result in the IRQ
1201 * line being stuck active, and, since ISA irqs are edge triggered,
1202 * no more IRQs will be seen.
1204 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1206 spin_lock_irq(&i->lock);
1208 if (!list_empty(i->head)) {
1209 if (i->head == &up->list)
1210 i->head = i->head->next;
1211 list_del(&up->list);
1213 BUG_ON(i->head != &up->list);
1217 spin_unlock_irq(&i->lock);
1220 static int serial_link_irq_chain(struct uart_8250_port *up)
1222 struct irq_info *i = irq_lists + up->port.irq;
1223 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1225 spin_lock_irq(&i->lock);
1228 list_add(&up->list, i->head);
1229 spin_unlock_irq(&i->lock);
1233 INIT_LIST_HEAD(&up->list);
1234 i->head = &up->list;
1235 spin_unlock_irq(&i->lock);
1237 ret = request_irq(up->port.irq, serial8250_interrupt,
1238 irq_flags, "serial", i);
1240 serial_do_unlink(i, up);
1246 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1248 struct irq_info *i = irq_lists + up->port.irq;
1250 BUG_ON(i->head == NULL);
1252 if (list_empty(i->head))
1253 free_irq(up->port.irq, i);
1255 serial_do_unlink(i, up);
1259 * This function is used to handle ports that do not have an
1260 * interrupt. This doesn't work very well for 16450's, but gives
1261 * barely passable results for a 16550A. (Although at the expense
1262 * of much CPU overhead).
1264 static void serial8250_timeout(unsigned long data)
1266 struct uart_8250_port *up = (struct uart_8250_port *)data;
1267 unsigned int timeout;
1270 iir = serial_in(up, UART_IIR);
1271 if (!(iir & UART_IIR_NO_INT)) {
1272 spin_lock(&up->port.lock);
1273 serial8250_handle_port(up, NULL);
1274 spin_unlock(&up->port.lock);
1277 timeout = up->port.timeout;
1278 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1279 mod_timer(&up->timer, jiffies + timeout);
1282 static unsigned int serial8250_tx_empty(struct uart_port *port)
1284 struct uart_8250_port *up = (struct uart_8250_port *)port;
1285 unsigned long flags;
1288 spin_lock_irqsave(&up->port.lock, flags);
1289 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1290 spin_unlock_irqrestore(&up->port.lock, flags);
1295 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1297 struct uart_8250_port *up = (struct uart_8250_port *)port;
1298 unsigned long flags;
1299 unsigned char status;
1302 spin_lock_irqsave(&up->port.lock, flags);
1303 status = serial_in(up, UART_MSR);
1304 spin_unlock_irqrestore(&up->port.lock, flags);
1307 if (status & UART_MSR_DCD)
1309 if (status & UART_MSR_RI)
1311 if (status & UART_MSR_DSR)
1313 if (status & UART_MSR_CTS)
1318 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1320 struct uart_8250_port *up = (struct uart_8250_port *)port;
1321 unsigned char mcr = 0;
1323 if (mctrl & TIOCM_RTS)
1324 mcr |= UART_MCR_RTS;
1325 if (mctrl & TIOCM_DTR)
1326 mcr |= UART_MCR_DTR;
1327 if (mctrl & TIOCM_OUT1)
1328 mcr |= UART_MCR_OUT1;
1329 if (mctrl & TIOCM_OUT2)
1330 mcr |= UART_MCR_OUT2;
1331 if (mctrl & TIOCM_LOOP)
1332 mcr |= UART_MCR_LOOP;
1334 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1336 serial_out(up, UART_MCR, mcr);
1339 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1341 struct uart_8250_port *up = (struct uart_8250_port *)port;
1342 unsigned long flags;
1344 spin_lock_irqsave(&up->port.lock, flags);
1345 if (break_state == -1)
1346 up->lcr |= UART_LCR_SBC;
1348 up->lcr &= ~UART_LCR_SBC;
1349 serial_out(up, UART_LCR, up->lcr);
1350 spin_unlock_irqrestore(&up->port.lock, flags);
1353 static int serial8250_startup(struct uart_port *port)
1355 struct uart_8250_port *up = (struct uart_8250_port *)port;
1356 unsigned long flags;
1359 up->capabilities = uart_config[up->port.type].flags;
1362 if (up->port.type == PORT_16C950) {
1363 /* Wake up and initialize UART */
1365 serial_outp(up, UART_LCR, 0xBF);
1366 serial_outp(up, UART_EFR, UART_EFR_ECB);
1367 serial_outp(up, UART_IER, 0);
1368 serial_outp(up, UART_LCR, 0);
1369 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1370 serial_outp(up, UART_LCR, 0xBF);
1371 serial_outp(up, UART_EFR, UART_EFR_ECB);
1372 serial_outp(up, UART_LCR, 0);
1375 #ifdef CONFIG_SERIAL_8250_RSA
1377 * If this is an RSA port, see if we can kick it up to the
1378 * higher speed clock.
1384 * Clear the FIFO buffers and disable them.
1385 * (they will be reeanbled in set_termios())
1387 serial8250_clear_fifos(up);
1390 * Clear the interrupt registers.
1392 (void) serial_inp(up, UART_LSR);
1393 (void) serial_inp(up, UART_RX);
1394 (void) serial_inp(up, UART_IIR);
1395 (void) serial_inp(up, UART_MSR);
1398 * At this point, there's no way the LSR could still be 0xff;
1399 * if it is, then bail out, because there's likely no UART
1402 if (!(up->port.flags & UPF_BUGGY_UART) &&
1403 (serial_inp(up, UART_LSR) == 0xff)) {
1404 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1409 * For a XR16C850, we need to set the trigger levels
1411 if (up->port.type == PORT_16850) {
1414 serial_outp(up, UART_LCR, 0xbf);
1416 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1417 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1418 serial_outp(up, UART_TRG, UART_TRG_96);
1419 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1420 serial_outp(up, UART_TRG, UART_TRG_96);
1422 serial_outp(up, UART_LCR, 0);
1426 * If the "interrupt" for this port doesn't correspond with any
1427 * hardware interrupt, we use a timer-based system. The original
1428 * driver used to do this with IRQ0.
1430 if (!is_real_interrupt(up->port.irq)) {
1431 unsigned int timeout = up->port.timeout;
1433 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1435 up->timer.data = (unsigned long)up;
1436 mod_timer(&up->timer, jiffies + timeout);
1438 retval = serial_link_irq_chain(up);
1444 * Now, initialize the UART
1446 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1448 spin_lock_irqsave(&up->port.lock, flags);
1449 if (up->port.flags & UPF_FOURPORT) {
1450 if (!is_real_interrupt(up->port.irq))
1451 up->port.mctrl |= TIOCM_OUT1;
1454 * Most PC uarts need OUT2 raised to enable interrupts.
1456 if (is_real_interrupt(up->port.irq))
1457 up->port.mctrl |= TIOCM_OUT2;
1459 serial8250_set_mctrl(&up->port, up->port.mctrl);
1460 spin_unlock_irqrestore(&up->port.lock, flags);
1463 * Finally, enable interrupts. Note: Modem status interrupts
1464 * are set via set_termios(), which will be occurring imminently
1465 * anyway, so we don't enable them here.
1467 up->ier = UART_IER_RLSI | UART_IER_RDI;
1468 serial_outp(up, UART_IER, up->ier);
1470 if (up->port.flags & UPF_FOURPORT) {
1473 * Enable interrupts on the AST Fourport board
1475 icp = (up->port.iobase & 0xfe0) | 0x01f;
1481 * And clear the interrupt registers again for luck.
1483 (void) serial_inp(up, UART_LSR);
1484 (void) serial_inp(up, UART_RX);
1485 (void) serial_inp(up, UART_IIR);
1486 (void) serial_inp(up, UART_MSR);
1491 static void serial8250_shutdown(struct uart_port *port)
1493 struct uart_8250_port *up = (struct uart_8250_port *)port;
1494 unsigned long flags;
1497 * Disable interrupts from this port
1500 serial_outp(up, UART_IER, 0);
1502 spin_lock_irqsave(&up->port.lock, flags);
1503 if (up->port.flags & UPF_FOURPORT) {
1504 /* reset interrupts on the AST Fourport board */
1505 inb((up->port.iobase & 0xfe0) | 0x1f);
1506 up->port.mctrl |= TIOCM_OUT1;
1508 up->port.mctrl &= ~TIOCM_OUT2;
1510 serial8250_set_mctrl(&up->port, up->port.mctrl);
1511 spin_unlock_irqrestore(&up->port.lock, flags);
1514 * Disable break condition and FIFOs
1516 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1517 serial8250_clear_fifos(up);
1519 #ifdef CONFIG_SERIAL_8250_RSA
1521 * Reset the RSA board back to 115kbps compat mode.
1527 * Read data port to reset things, and then unlink from
1530 (void) serial_in(up, UART_RX);
1532 if (!is_real_interrupt(up->port.irq))
1533 del_timer_sync(&up->timer);
1535 serial_unlink_irq_chain(up);
1538 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1543 * Handle magic divisors for baud rates above baud_base on
1544 * SMSC SuperIO chips.
1546 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1547 baud == (port->uartclk/4))
1549 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1550 baud == (port->uartclk/8))
1553 quot = uart_get_divisor(port, baud);
1559 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1560 struct termios *old)
1562 struct uart_8250_port *up = (struct uart_8250_port *)port;
1563 unsigned char cval, fcr = 0;
1564 unsigned long flags;
1565 unsigned int baud, quot;
1567 switch (termios->c_cflag & CSIZE) {
1583 if (termios->c_cflag & CSTOPB)
1585 if (termios->c_cflag & PARENB)
1586 cval |= UART_LCR_PARITY;
1587 if (!(termios->c_cflag & PARODD))
1588 cval |= UART_LCR_EPAR;
1590 if (termios->c_cflag & CMSPAR)
1591 cval |= UART_LCR_SPAR;
1595 * Ask the core to calculate the divisor for us.
1597 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1598 quot = serial8250_get_divisor(port, baud);
1601 * Work around a bug in the Oxford Semiconductor 952 rev B
1602 * chip which causes it to seriously miscalculate baud rates
1605 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
1609 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1611 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1613 fcr = uart_config[up->port.type].fcr;
1617 * MCR-based auto flow control. When AFE is enabled, RTS will be
1618 * deasserted when the receive FIFO contains more characters than
1619 * the trigger, or the MCR RTS bit is cleared. In the case where
1620 * the remote UART is not using CTS auto flow control, we must
1621 * have sufficient FIFO entries for the latency of the remote
1622 * UART to respond. IOW, at least 32 bytes of FIFO.
1624 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
1625 up->mcr &= ~UART_MCR_AFE;
1626 if (termios->c_cflag & CRTSCTS)
1627 up->mcr |= UART_MCR_AFE;
1631 * Ok, we're now changing the port state. Do it with
1632 * interrupts disabled.
1634 spin_lock_irqsave(&up->port.lock, flags);
1637 * Update the per-port timeout.
1639 uart_update_timeout(port, termios->c_cflag, baud);
1641 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1642 if (termios->c_iflag & INPCK)
1643 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1644 if (termios->c_iflag & (BRKINT | PARMRK))
1645 up->port.read_status_mask |= UART_LSR_BI;
1648 * Characteres to ignore
1650 up->port.ignore_status_mask = 0;
1651 if (termios->c_iflag & IGNPAR)
1652 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1653 if (termios->c_iflag & IGNBRK) {
1654 up->port.ignore_status_mask |= UART_LSR_BI;
1656 * If we're ignoring parity and break indicators,
1657 * ignore overruns too (for real raw support).
1659 if (termios->c_iflag & IGNPAR)
1660 up->port.ignore_status_mask |= UART_LSR_OE;
1664 * ignore all characters if CREAD is not set
1666 if ((termios->c_cflag & CREAD) == 0)
1667 up->port.ignore_status_mask |= UART_LSR_DR;
1670 * CTS flow control flag and modem status interrupts
1672 up->ier &= ~UART_IER_MSI;
1673 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1674 up->ier |= UART_IER_MSI;
1675 if (up->port.type == PORT_XSCALE)
1676 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1678 serial_out(up, UART_IER, up->ier);
1680 if (up->capabilities & UART_CAP_EFR) {
1681 unsigned char efr = 0;
1683 * TI16C752/Startech hardware flow control. FIXME:
1684 * - TI16C752 requires control thresholds to be set.
1685 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1687 if (termios->c_cflag & CRTSCTS)
1688 efr |= UART_EFR_CTS;
1690 serial_outp(up, UART_LCR, 0xBF);
1691 serial_outp(up, UART_EFR, efr);
1694 if (up->capabilities & UART_NATSEMI) {
1695 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1696 serial_outp(up, UART_LCR, 0xe0);
1698 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1701 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1702 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1705 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1706 * is written without DLAB set, this mode will be disabled.
1708 if (up->port.type == PORT_16750)
1709 serial_outp(up, UART_FCR, fcr);
1711 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1712 up->lcr = cval; /* Save LCR */
1713 if (up->port.type != PORT_16750) {
1714 if (fcr & UART_FCR_ENABLE_FIFO) {
1715 /* emulated UARTs (Lucent Venus 167x) need two steps */
1716 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1718 serial_outp(up, UART_FCR, fcr); /* set fcr */
1720 serial8250_set_mctrl(&up->port, up->port.mctrl);
1721 spin_unlock_irqrestore(&up->port.lock, flags);
1725 serial8250_pm(struct uart_port *port, unsigned int state,
1726 unsigned int oldstate)
1728 struct uart_8250_port *p = (struct uart_8250_port *)port;
1730 serial8250_set_sleep(p, state != 0);
1733 p->pm(port, state, oldstate);
1737 * Resource handling.
1739 static int serial8250_request_std_resource(struct uart_8250_port *up)
1741 unsigned int size = 8 << up->port.regshift;
1744 switch (up->port.iotype) {
1746 if (!up->port.mapbase)
1749 if (!request_mem_region(up->port.mapbase, size, "serial")) {
1754 if (up->port.flags & UPF_IOREMAP) {
1755 up->port.membase = ioremap(up->port.mapbase, size);
1756 if (!up->port.membase) {
1757 release_mem_region(up->port.mapbase, size);
1765 if (!request_region(up->port.iobase, size, "serial"))
1772 static void serial8250_release_std_resource(struct uart_8250_port *up)
1774 unsigned int size = 8 << up->port.regshift;
1776 switch (up->port.iotype) {
1778 if (!up->port.mapbase)
1781 if (up->port.flags & UPF_IOREMAP) {
1782 iounmap(up->port.membase);
1783 up->port.membase = NULL;
1786 release_mem_region(up->port.mapbase, size);
1791 release_region(up->port.iobase, size);
1796 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
1798 unsigned long start = UART_RSA_BASE << up->port.regshift;
1799 unsigned int size = 8 << up->port.regshift;
1802 switch (up->port.iotype) {
1809 start += up->port.iobase;
1810 if (!request_region(start, size, "serial-rsa"))
1818 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
1820 unsigned long offset = UART_RSA_BASE << up->port.regshift;
1821 unsigned int size = 8 << up->port.regshift;
1823 switch (up->port.iotype) {
1829 release_region(up->port.iobase + offset, size);
1834 static void serial8250_release_port(struct uart_port *port)
1836 struct uart_8250_port *up = (struct uart_8250_port *)port;
1838 serial8250_release_std_resource(up);
1839 if (up->port.type == PORT_RSA)
1840 serial8250_release_rsa_resource(up);
1843 static int serial8250_request_port(struct uart_port *port)
1845 struct uart_8250_port *up = (struct uart_8250_port *)port;
1848 ret = serial8250_request_std_resource(up);
1849 if (ret == 0 && up->port.type == PORT_RSA) {
1850 ret = serial8250_request_rsa_resource(up);
1852 serial8250_release_std_resource(up);
1858 static void serial8250_config_port(struct uart_port *port, int flags)
1860 struct uart_8250_port *up = (struct uart_8250_port *)port;
1861 int probeflags = PROBE_ANY;
1866 * Don't probe for MCA ports on non-MCA machines.
1868 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1873 * Find the region that we can probe for. This in turn
1874 * tells us whether we can probe for the type of port.
1876 ret = serial8250_request_std_resource(up);
1880 ret = serial8250_request_rsa_resource(up);
1882 probeflags &= ~PROBE_RSA;
1884 if (flags & UART_CONFIG_TYPE)
1885 autoconfig(up, probeflags);
1886 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
1889 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
1890 serial8250_release_rsa_resource(up);
1891 if (up->port.type == PORT_UNKNOWN)
1892 serial8250_release_std_resource(up);
1896 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1898 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1899 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1900 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
1901 ser->type == PORT_STARTECH)
1907 serial8250_type(struct uart_port *port)
1909 int type = port->type;
1911 if (type >= ARRAY_SIZE(uart_config))
1913 return uart_config[type].name;
1916 static struct uart_ops serial8250_pops = {
1917 .tx_empty = serial8250_tx_empty,
1918 .set_mctrl = serial8250_set_mctrl,
1919 .get_mctrl = serial8250_get_mctrl,
1920 .stop_tx = serial8250_stop_tx,
1921 .start_tx = serial8250_start_tx,
1922 .stop_rx = serial8250_stop_rx,
1923 .enable_ms = serial8250_enable_ms,
1924 .break_ctl = serial8250_break_ctl,
1925 .startup = serial8250_startup,
1926 .shutdown = serial8250_shutdown,
1927 .set_termios = serial8250_set_termios,
1928 .pm = serial8250_pm,
1929 .type = serial8250_type,
1930 .release_port = serial8250_release_port,
1931 .request_port = serial8250_request_port,
1932 .config_port = serial8250_config_port,
1933 .verify_port = serial8250_verify_port,
1936 static struct uart_8250_port serial8250_ports[UART_NR];
1938 static void __init serial8250_isa_init_ports(void)
1940 struct uart_8250_port *up;
1941 static int first = 1;
1948 for (i = 0; i < UART_NR; i++) {
1949 struct uart_8250_port *up = &serial8250_ports[i];
1952 spin_lock_init(&up->port.lock);
1954 init_timer(&up->timer);
1955 up->timer.function = serial8250_timeout;
1958 * ALPHA_KLUDGE_MCR needs to be killed.
1960 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1961 up->mcr_force = ALPHA_KLUDGE_MCR;
1963 up->port.ops = &serial8250_pops;
1966 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
1968 up->port.iobase = old_serial_port[i].port;
1969 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
1970 up->port.uartclk = old_serial_port[i].baud_base * 16;
1971 up->port.flags = old_serial_port[i].flags;
1972 up->port.hub6 = old_serial_port[i].hub6;
1973 up->port.membase = old_serial_port[i].iomem_base;
1974 up->port.iotype = old_serial_port[i].io_type;
1975 up->port.regshift = old_serial_port[i].iomem_reg_shift;
1977 up->port.flags |= UPF_SHARE_IRQ;
1982 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
1986 serial8250_isa_init_ports();
1988 for (i = 0; i < UART_NR; i++) {
1989 struct uart_8250_port *up = &serial8250_ports[i];
1992 uart_add_one_port(drv, &up->port);
1996 #ifdef CONFIG_SERIAL_8250_CONSOLE
1998 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2001 * Wait for transmitter & holding register to empty
2003 static inline void wait_for_xmitr(struct uart_8250_port *up)
2005 unsigned int status, tmout = 10000;
2007 /* Wait up to 10ms for the character(s) to be sent. */
2009 status = serial_in(up, UART_LSR);
2011 if (status & UART_LSR_BI)
2012 up->lsr_break_flag = UART_LSR_BI;
2017 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
2019 /* Wait up to 1s for flow control if necessary */
2020 if (up->port.flags & UPF_CONS_FLOW) {
2023 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
2029 * Print a string to the serial port trying not to disturb
2030 * any possible real use of the port...
2032 * The console_lock must be held when we get here.
2035 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2037 struct uart_8250_port *up = &serial8250_ports[co->index];
2042 * First save the UER then disable the interrupts
2044 ier = serial_in(up, UART_IER);
2046 if (up->port.type == PORT_XSCALE)
2047 serial_out(up, UART_IER, UART_IER_UUE);
2049 serial_out(up, UART_IER, 0);
2052 * Now, do each character
2054 for (i = 0; i < count; i++, s++) {
2058 * Send the character out.
2059 * If a LF, also do CR...
2061 serial_out(up, UART_TX, *s);
2064 serial_out(up, UART_TX, 13);
2069 * Finally, wait for transmitter to become empty
2070 * and restore the IER
2073 serial_out(up, UART_IER, ier);
2076 static int serial8250_console_setup(struct console *co, char *options)
2078 struct uart_port *port;
2085 * Check whether an invalid uart number has been specified, and
2086 * if so, search for the first available port that does have
2089 if (co->index >= UART_NR)
2091 port = &serial8250_ports[co->index].port;
2092 if (!port->iobase && !port->membase)
2096 uart_parse_options(options, &baud, &parity, &bits, &flow);
2098 return uart_set_options(port, co, baud, parity, bits, flow);
2101 static struct uart_driver serial8250_reg;
2102 static struct console serial8250_console = {
2104 .write = serial8250_console_write,
2105 .device = uart_console_device,
2106 .setup = serial8250_console_setup,
2107 .flags = CON_PRINTBUFFER,
2109 .data = &serial8250_reg,
2112 static int __init serial8250_console_init(void)
2114 serial8250_isa_init_ports();
2115 register_console(&serial8250_console);
2118 console_initcall(serial8250_console_init);
2120 static int __init serial8250_late_console_init(void)
2122 if (!(serial8250_console.flags & CON_ENABLED))
2123 register_console(&serial8250_console);
2126 late_initcall(serial8250_late_console_init);
2128 static int __init find_port(struct uart_port *p)
2131 struct uart_port *port;
2133 for (line = 0; line < UART_NR; line++) {
2134 port = &serial8250_ports[line].port;
2135 if (p->iotype == port->iotype &&
2136 p->iobase == port->iobase &&
2137 p->membase == port->membase)
2143 int __init serial8250_start_console(struct uart_port *port, char *options)
2147 line = find_port(port);
2151 add_preferred_console("ttyS", line, options);
2152 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2153 line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
2154 port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
2155 (unsigned long) port->iobase, options);
2156 if (!(serial8250_console.flags & CON_ENABLED)) {
2157 serial8250_console.flags &= ~CON_PRINTBUFFER;
2158 register_console(&serial8250_console);
2163 #define SERIAL8250_CONSOLE &serial8250_console
2165 #define SERIAL8250_CONSOLE NULL
2168 static struct uart_driver serial8250_reg = {
2169 .owner = THIS_MODULE,
2170 .driver_name = "serial",
2171 .devfs_name = "tts/",
2176 .cons = SERIAL8250_CONSOLE,
2179 int __init early_serial_setup(struct uart_port *port)
2181 if (port->line >= ARRAY_SIZE(serial8250_ports))
2184 serial8250_isa_init_ports();
2185 serial8250_ports[port->line].port = *port;
2186 serial8250_ports[port->line].port.ops = &serial8250_pops;
2191 * serial8250_suspend_port - suspend one serial port
2192 * @line: serial line number
2193 * @level: the level of port suspension, as per uart_suspend_port
2195 * Suspend one serial port.
2197 void serial8250_suspend_port(int line)
2199 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2203 * serial8250_resume_port - resume one serial port
2204 * @line: serial line number
2205 * @level: the level of port resumption, as per uart_resume_port
2207 * Resume one serial port.
2209 void serial8250_resume_port(int line)
2211 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2215 * Register a set of serial devices attached to a platform device. The
2216 * list is terminated with a zero flags entry, which means we expect
2217 * all entries to have at least UPF_BOOT_AUTOCONF set.
2219 static int __devinit serial8250_probe(struct device *dev)
2221 struct plat_serial8250_port *p = dev->platform_data;
2222 struct uart_port port;
2224 memset(&port, 0, sizeof(struct uart_port));
2226 for (; p && p->flags != 0; p++) {
2227 port.iobase = p->iobase;
2228 port.membase = p->membase;
2230 port.uartclk = p->uartclk;
2231 port.regshift = p->regshift;
2232 port.iotype = p->iotype;
2233 port.flags = p->flags;
2234 port.mapbase = p->mapbase;
2237 port.flags |= UPF_SHARE_IRQ;
2238 serial8250_register_port(&port);
2244 * Remove serial ports registered against a platform device.
2246 static int __devexit serial8250_remove(struct device *dev)
2250 for (i = 0; i < UART_NR; i++) {
2251 struct uart_8250_port *up = &serial8250_ports[i];
2253 if (up->port.dev == dev)
2254 serial8250_unregister_port(i);
2259 static int serial8250_suspend(struct device *dev, u32 state, u32 level)
2263 if (level != SUSPEND_DISABLE)
2266 for (i = 0; i < UART_NR; i++) {
2267 struct uart_8250_port *up = &serial8250_ports[i];
2269 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2270 uart_suspend_port(&serial8250_reg, &up->port);
2276 static int serial8250_resume(struct device *dev, u32 level)
2280 if (level != RESUME_ENABLE)
2283 for (i = 0; i < UART_NR; i++) {
2284 struct uart_8250_port *up = &serial8250_ports[i];
2286 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2287 uart_resume_port(&serial8250_reg, &up->port);
2293 static struct device_driver serial8250_isa_driver = {
2294 .name = "serial8250",
2295 .bus = &platform_bus_type,
2296 .probe = serial8250_probe,
2297 .remove = __devexit_p(serial8250_remove),
2298 .suspend = serial8250_suspend,
2299 .resume = serial8250_resume,
2303 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2304 * in the table in include/asm/serial.h
2306 static struct platform_device *serial8250_isa_devs;
2309 * serial8250_register_port and serial8250_unregister_port allows for
2310 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2311 * modems and PCI multiport cards.
2313 static DECLARE_MUTEX(serial_sem);
2316 * Are the two ports equivalent?
2318 static int uart_match_port(struct uart_port *port1, struct uart_port *port2)
2320 if (port1->iotype != port2->iotype)
2323 switch (port1->iotype) {
2325 return (port1->iobase == port2->iobase);
2327 return (port1->iobase == port2->iobase) &&
2328 (port1->hub6 == port2->hub6);
2330 return (port1->membase == port2->membase);
2335 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2340 * First, find a port entry which matches.
2342 for (i = 0; i < UART_NR; i++)
2343 if (uart_match_port(&serial8250_ports[i].port, port))
2344 return &serial8250_ports[i];
2347 * We didn't find a matching entry, so look for the first
2348 * free entry. We look for one which hasn't been previously
2349 * used (indicated by zero iobase).
2351 for (i = 0; i < UART_NR; i++)
2352 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2353 serial8250_ports[i].port.iobase == 0)
2354 return &serial8250_ports[i];
2357 * That also failed. Last resort is to find any entry which
2358 * doesn't have a real port associated with it.
2360 for (i = 0; i < UART_NR; i++)
2361 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2362 return &serial8250_ports[i];
2368 * serial8250_register_port - register a serial port
2369 * @port: serial port template
2371 * Configure the serial port specified by the request. If the
2372 * port exists and is in use, it is hung up and unregistered
2375 * The port is then probed and if necessary the IRQ is autodetected
2376 * If this fails an error is returned.
2378 * On success the port is ready to use and the line number is returned.
2380 int serial8250_register_port(struct uart_port *port)
2382 struct uart_8250_port *uart;
2385 if (port->uartclk == 0)
2390 uart = serial8250_find_match_or_unused(port);
2392 uart_remove_one_port(&serial8250_reg, &uart->port);
2394 uart->port.iobase = port->iobase;
2395 uart->port.membase = port->membase;
2396 uart->port.irq = port->irq;
2397 uart->port.uartclk = port->uartclk;
2398 uart->port.fifosize = port->fifosize;
2399 uart->port.regshift = port->regshift;
2400 uart->port.iotype = port->iotype;
2401 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2402 uart->port.mapbase = port->mapbase;
2404 uart->port.dev = port->dev;
2406 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2408 ret = uart->port.line;
2414 EXPORT_SYMBOL(serial8250_register_port);
2417 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2418 * @line: serial line number
2420 * Remove one serial port. This may not be called from interrupt
2421 * context. We hand the port back to the our control.
2423 void serial8250_unregister_port(int line)
2425 struct uart_8250_port *uart = &serial8250_ports[line];
2428 uart_remove_one_port(&serial8250_reg, &uart->port);
2429 if (serial8250_isa_devs) {
2430 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2431 uart->port.type = PORT_UNKNOWN;
2432 uart->port.dev = &serial8250_isa_devs->dev;
2433 uart_add_one_port(&serial8250_reg, &uart->port);
2435 uart->port.dev = NULL;
2439 EXPORT_SYMBOL(serial8250_unregister_port);
2441 static int __init serial8250_init(void)
2445 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2446 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2447 share_irqs ? "en" : "dis");
2449 for (i = 0; i < NR_IRQS; i++)
2450 spin_lock_init(&irq_lists[i].lock);
2452 ret = uart_register_driver(&serial8250_reg);
2456 serial8250_isa_devs = platform_device_register_simple("serial8250",
2458 if (IS_ERR(serial8250_isa_devs)) {
2459 ret = PTR_ERR(serial8250_isa_devs);
2463 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2465 ret = driver_register(&serial8250_isa_driver);
2469 platform_device_unregister(serial8250_isa_devs);
2471 uart_unregister_driver(&serial8250_reg);
2476 static void __exit serial8250_exit(void)
2478 struct platform_device *isa_dev = serial8250_isa_devs;
2481 * This tells serial8250_unregister_port() not to re-register
2482 * the ports (thereby making serial8250_isa_driver permanently
2485 serial8250_isa_devs = NULL;
2487 driver_unregister(&serial8250_isa_driver);
2488 platform_device_unregister(isa_dev);
2490 uart_unregister_driver(&serial8250_reg);
2493 module_init(serial8250_init);
2494 module_exit(serial8250_exit);
2496 EXPORT_SYMBOL(serial8250_suspend_port);
2497 EXPORT_SYMBOL(serial8250_resume_port);
2499 MODULE_LICENSE("GPL");
2500 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2502 module_param(share_irqs, uint, 0644);
2503 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2506 #ifdef CONFIG_SERIAL_8250_RSA
2507 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2508 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2510 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
2513 * register_serial - configure a 16x50 serial port at runtime
2514 * @req: request structure
2516 * Configure the serial port specified by the request. If the
2517 * port exists and is in use an error is returned. If the port
2518 * is not currently in the table it is added.
2520 * The port is then probed and if necessary the IRQ is autodetected
2521 * If this fails an error is returned.
2523 * On success the port is ready to use and the line number is returned.
2525 int register_serial(struct serial_struct *req)
2527 struct uart_port port;
2529 port.iobase = req->port;
2530 port.membase = req->iomem_base;
2531 port.irq = req->irq;
2532 port.uartclk = req->baud_base * 16;
2533 port.fifosize = req->xmit_fifo_size;
2534 port.regshift = req->iomem_reg_shift;
2535 port.iotype = req->io_type;
2536 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2537 port.mapbase = req->iomap_base;
2541 port.flags |= UPF_SHARE_IRQ;
2543 if (HIGH_BITS_OFFSET)
2544 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2547 * If a clock rate wasn't specified by the low level driver, then
2548 * default to the standard clock rate. This should be 115200 (*16)
2549 * and should not depend on the architecture's BASE_BAUD definition.
2550 * However, since this API will be deprecated, it's probably a
2551 * better idea to convert the drivers to use the new API
2552 * (serial8250_register_port and serial8250_unregister_port).
2554 if (port.uartclk == 0) {
2556 "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n",
2557 port.iobase, port.mapbase, port.membase, port.irq);
2558 printk(KERN_WARNING "Serial: see %s:%d for more information\n",
2559 __FILE__, __LINE__);
2563 * Fix it up for now, but this is only a temporary measure.
2565 port.uartclk = BASE_BAUD * 16;
2568 return serial8250_register_port(&port);
2570 EXPORT_SYMBOL(register_serial);
2573 * unregister_serial - remove a 16x50 serial port at runtime
2574 * @line: serial line number
2576 * Remove one serial port. This may not be called from interrupt
2577 * context. We hand the port back to our local PM control.
2579 void unregister_serial(int line)
2581 serial8250_unregister_port(line);
2583 EXPORT_SYMBOL(unregister_serial);