2 * linux/drivers/char/clps711x.c
4 * Driver for CLPS711x serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
28 #include <linux/config.h>
29 #include <linux/module.h>
30 #include <linux/tty.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/serial.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/spinlock.h>
37 #include <linux/device.h>
39 #include <asm/hardware.h>
43 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
47 #include <linux/serial_core.h>
49 #include <asm/hardware/clps7111.h>
53 #define SERIAL_CLPS711X_MAJOR 204
54 #define SERIAL_CLPS711X_MINOR 40
55 #define SERIAL_CLPS711X_NR UART_NR
58 * We use the relevant SYSCON register as a base address for these ports.
60 #define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
61 #define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
62 #define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
63 #define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
65 #define TX_IRQ(port) ((port)->irq)
66 #define RX_IRQ(port) ((port)->irq + 1)
68 #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
70 #define tx_enabled(port) ((port)->unused[0])
73 clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop)
75 if (tx_enabled(port)) {
76 disable_irq(TX_IRQ(port));
82 clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start)
84 if (!tx_enabled(port)) {
85 enable_irq(TX_IRQ(port));
90 static void clps711xuart_stop_rx(struct uart_port *port)
92 disable_irq(RX_IRQ(port));
95 static void clps711xuart_enable_ms(struct uart_port *port)
99 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
101 struct uart_port *port = dev_id;
102 struct tty_struct *tty = port->info->tty;
103 unsigned int status, ch, flg, ignored = 0;
105 status = clps_readl(SYSFLG(port));
106 while (!(status & SYSFLG_URXFE)) {
107 ch = clps_readl(UARTDR(port));
109 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
116 * Note that the error handling code is
117 * out of the main execution path
119 if (ch & UART_ANY_ERR)
122 if (uart_handle_sysrq_char(port, ch, regs))
126 *tty->flip.flag_buf_ptr++ = flg;
127 *tty->flip.char_buf_ptr++ = ch;
130 status = clps_readl(SYSFLG(port));
133 tty_flip_buffer_push(tty);
137 if (ch & UARTDR_PARERR)
138 port->icount.parity++;
139 else if (ch & UARTDR_FRMERR)
140 port->icount.frame++;
141 if (ch & UARTDR_OVERR)
142 port->icount.overrun++;
144 if (ch & port->ignore_status_mask) {
149 ch &= port->read_status_mask;
151 if (ch & UARTDR_PARERR)
153 else if (ch & UARTDR_FRMERR)
156 if (ch & UARTDR_OVERR) {
158 * CHECK: does overrun affect the current character?
159 * ASSUMPTION: it does not.
161 *tty->flip.flag_buf_ptr++ = flg;
162 *tty->flip.char_buf_ptr++ = ch;
164 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
175 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
177 struct uart_port *port = dev_id;
178 struct circ_buf *xmit = &port->info->xmit;
182 clps_writel(port->x_char, UARTDR(port));
187 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
188 clps711xuart_stop_tx(port, 0);
192 count = port->fifosize >> 1;
194 clps_writel(xmit->buf[xmit->tail], UARTDR(port));
195 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
197 if (uart_circ_empty(xmit))
199 } while (--count > 0);
201 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
202 uart_write_wakeup(port);
204 if (uart_circ_empty(xmit))
205 clps711xuart_stop_tx(port, 0);
210 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
212 unsigned int status = clps_readl(SYSFLG(port));
213 return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
216 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
218 unsigned int port_addr;
219 unsigned int result = 0;
222 port_addr = SYSFLG(port);
223 if (port_addr == SYSFLG1) {
224 status = clps_readl(SYSFLG1);
225 if (status & SYSFLG1_DCD)
227 if (status & SYSFLG1_DSR)
229 if (status & SYSFLG1_CTS)
237 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
241 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
246 spin_lock_irqsave(&port->lock, flags);
247 ubrlcr = clps_readl(UBRLCR(port));
248 if (break_state == -1)
249 ubrlcr |= UBRLCR_BREAK;
251 ubrlcr &= ~UBRLCR_BREAK;
252 clps_writel(ubrlcr, UBRLCR(port));
253 spin_unlock_irqrestore(&port->lock, flags);
256 static int clps711xuart_startup(struct uart_port *port)
261 tx_enabled(port) = 1;
266 retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
267 "clps711xuart_tx", port);
271 retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
272 "clps711xuart_rx", port);
274 free_irq(TX_IRQ(port), port);
281 syscon = clps_readl(SYSCON(port));
282 syscon |= SYSCON_UARTEN;
283 clps_writel(syscon, SYSCON(port));
288 static void clps711xuart_shutdown(struct uart_port *port)
290 unsigned int ubrlcr, syscon;
295 free_irq(TX_IRQ(port), port); /* TX interrupt */
296 free_irq(RX_IRQ(port), port); /* RX interrupt */
301 syscon = clps_readl(SYSCON(port));
302 syscon &= ~SYSCON_UARTEN;
303 clps_writel(syscon, SYSCON(port));
306 * disable break condition and fifos
308 ubrlcr = clps_readl(UBRLCR(port));
309 ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
310 clps_writel(ubrlcr, UBRLCR(port));
314 clps711xuart_set_termios(struct uart_port *port, struct termios *termios,
317 unsigned int ubrlcr, baud, quot;
321 * We don't implement CREAD.
323 termios->c_cflag |= CREAD;
326 * Ask the core to calculate the divisor for us.
328 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
329 quot = uart_get_divisor(port, baud);
331 switch (termios->c_cflag & CSIZE) {
333 ubrlcr = UBRLCR_WRDLEN5;
336 ubrlcr = UBRLCR_WRDLEN6;
339 ubrlcr = UBRLCR_WRDLEN7;
342 ubrlcr = UBRLCR_WRDLEN8;
345 if (termios->c_cflag & CSTOPB)
346 ubrlcr |= UBRLCR_XSTOP;
347 if (termios->c_cflag & PARENB) {
348 ubrlcr |= UBRLCR_PRTEN;
349 if (!(termios->c_cflag & PARODD))
350 ubrlcr |= UBRLCR_EVENPRT;
352 if (port->fifosize > 1)
353 ubrlcr |= UBRLCR_FIFOEN;
355 spin_lock_irqsave(&port->lock, flags);
358 * Update the per-port timeout.
360 uart_update_timeout(port, termios->c_cflag, baud);
362 port->read_status_mask = UARTDR_OVERR;
363 if (termios->c_iflag & INPCK)
364 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
367 * Characters to ignore
369 port->ignore_status_mask = 0;
370 if (termios->c_iflag & IGNPAR)
371 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
372 if (termios->c_iflag & IGNBRK) {
374 * If we're ignoring parity and break indicators,
375 * ignore overruns to (for real raw support).
377 if (termios->c_iflag & IGNPAR)
378 port->ignore_status_mask |= UARTDR_OVERR;
383 clps_writel(ubrlcr | quot, UBRLCR(port));
385 spin_unlock_irqrestore(&port->lock, flags);
388 static const char *clps711xuart_type(struct uart_port *port)
390 return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
394 * Configure/autoconfigure the port.
396 static void clps711xuart_config_port(struct uart_port *port, int flags)
398 if (flags & UART_CONFIG_TYPE)
399 port->type = PORT_CLPS711X;
402 static void clps711xuart_release_port(struct uart_port *port)
406 static int clps711xuart_request_port(struct uart_port *port)
411 static struct uart_ops clps711x_pops = {
412 .tx_empty = clps711xuart_tx_empty,
413 .set_mctrl = clps711xuart_set_mctrl_null,
414 .get_mctrl = clps711xuart_get_mctrl,
415 .stop_tx = clps711xuart_stop_tx,
416 .start_tx = clps711xuart_start_tx,
417 .stop_rx = clps711xuart_stop_rx,
418 .enable_ms = clps711xuart_enable_ms,
419 .break_ctl = clps711xuart_break_ctl,
420 .startup = clps711xuart_startup,
421 .shutdown = clps711xuart_shutdown,
422 .set_termios = clps711xuart_set_termios,
423 .type = clps711xuart_type,
424 .config_port = clps711xuart_config_port,
425 .release_port = clps711xuart_release_port,
426 .request_port = clps711xuart_request_port,
429 static struct uart_port clps711x_ports[UART_NR] = {
432 .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
435 .ops = &clps711x_pops,
437 .flags = ASYNC_BOOT_AUTOCONF,
441 .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
444 .ops = &clps711x_pops,
446 .flags = ASYNC_BOOT_AUTOCONF,
450 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
452 * Print a string to the serial port trying not to disturb
453 * any possible real use of the port...
455 * The console_lock must be held when we get here.
457 * Note that this is called with interrupts already disabled
460 clps711xuart_console_write(struct console *co, const char *s,
463 struct uart_port *port = clps711x_ports + co->index;
464 unsigned int status, syscon;
468 * Ensure that the port is enabled.
470 syscon = clps_readl(SYSCON(port));
471 clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
474 * Now, do each character
476 for (i = 0; i < count; i++) {
478 status = clps_readl(SYSFLG(port));
479 } while (status & SYSFLG_UTXFF);
480 clps_writel(s[i], UARTDR(port));
483 status = clps_readl(SYSFLG(port));
484 } while (status & SYSFLG_UTXFF);
485 clps_writel('\r', UARTDR(port));
490 * Finally, wait for transmitter to become empty
491 * and restore the uart state.
494 status = clps_readl(SYSFLG(port));
495 } while (status & SYSFLG_UBUSY);
497 clps_writel(syscon, SYSCON(port));
501 clps711xuart_console_get_options(struct uart_port *port, int *baud,
502 int *parity, int *bits)
504 if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
505 unsigned int ubrlcr, quot;
507 ubrlcr = clps_readl(UBRLCR(port));
510 if (ubrlcr & UBRLCR_PRTEN) {
511 if (ubrlcr & UBRLCR_EVENPRT)
517 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
522 quot = ubrlcr & UBRLCR_BAUD_MASK;
523 *baud = port->uartclk / (16 * (quot + 1));
527 static int __init clps711xuart_console_setup(struct console *co, char *options)
529 struct uart_port *port;
536 * Check whether an invalid uart number has been specified, and
537 * if so, search for the first available port that does have
540 port = uart_get_console(clps711x_ports, UART_NR, co);
543 uart_parse_options(options, &baud, &parity, &bits, &flow);
545 clps711xuart_console_get_options(port, &baud, &parity, &bits);
547 return uart_set_options(port, co, baud, parity, bits, flow);
550 extern struct uart_driver clps711x_reg;
551 static struct console clps711x_console = {
553 .write = clps711xuart_console_write,
554 .device = uart_console_device,
555 .setup = clps711xuart_console_setup,
556 .flags = CON_PRINTBUFFER,
558 .data = &clps711x_reg,
561 static int __init clps711xuart_console_init(void)
563 register_console(&clps711x_console);
566 console_initcall(clps711xuart_console_init);
568 #define CLPS711X_CONSOLE &clps711x_console
570 #define CLPS711X_CONSOLE NULL
573 static struct uart_driver clps711x_reg = {
574 .driver_name = "ttyCL",
576 .major = SERIAL_CLPS711X_MAJOR,
577 .minor = SERIAL_CLPS711X_MINOR,
580 .cons = CLPS711X_CONSOLE,
583 static int __init clps711xuart_init(void)
587 printk(KERN_INFO "Serial: CLPS711x driver $Revision: 1.42 $\n");
589 ret = uart_register_driver(&clps711x_reg);
593 for (i = 0; i < UART_NR; i++)
594 uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
599 static void __exit clps711xuart_exit(void)
603 for (i = 0; i < UART_NR; i++)
604 uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
606 uart_unregister_driver(&clps711x_reg);
609 module_init(clps711xuart_init);
610 module_exit(clps711xuart_exit);
612 MODULE_AUTHOR("Deep Blue Solutions Ltd");
613 MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
614 MODULE_LICENSE("GPL");
615 MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);